US20020076859A1 - Overmolding encapsulation process and encapsulated article made therefrom - Google Patents
Overmolding encapsulation process and encapsulated article made therefrom Download PDFInfo
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- US20020076859A1 US20020076859A1 US09/989,477 US98947701A US2002076859A1 US 20020076859 A1 US20020076859 A1 US 20020076859A1 US 98947701 A US98947701 A US 98947701A US 2002076859 A1 US2002076859 A1 US 2002076859A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/293—Organic, e.g. plastic
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14336—Coating a portion of the article, e.g. the edge of the article
- B29C45/14418—Sealing means between mould and article
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
- B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
- B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
- B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
- B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
- B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
- B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
- B29C2045/14672—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame moulding with different depths of the upper and lower mould cavity
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/13—Hollow or container type article [e.g., tube, vase, etc.]
- Y10T428/1352—Polymer or resin containing [i.e., natural or synthetic]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/23—Sheet including cover or casing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/23—Sheet including cover or casing
- Y10T428/239—Complete cover or casing
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Mechanical Engineering (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Injection Moulding Of Plastics Or The Like (AREA)
Abstract
A method of encapsulating an article having first and second surfaces, includes positioning the article on a carrier such that at least a portion of the first surface contacts the carrier. A portion of the carrier carrying the article is then positioned within a mold and a seal is formed between the mold and the carrier. The mold is then filled with an encapsulating material to form a seal between the article and the carrier.
Description
- This is a continuation-in-part application of U.S. patent application Ser. No. 09/255,554 filed on Feb. 22, 1999.
- 1. Field of the Invention
- The invention relates to a method of encapsulating an article and, more specifically, to a method of overmolding an article and an overmolded encapsulated article made therefrom.
- 2. Description of the Background
- It is well known that electronic devices are sensitive and thus require protection from physical and environmental conditions which may degrade or completely ruin them. Therefore, it is well known in the art to protect electronic devices from these conditions by sealing them with a protective encapsulation material. This “packaging” of the electronic devices protects them from the conditions which may degrade them and allows the devices to be transported and handled, and thus allows them to be easily configured with other components.
- One prior-art method for encapsulating devices is the “transfer-molding” method. Transfer molding is a process through which an encapsulating material, such as a thermosetting material, is caused to flow into a cavity formed by components of a mold. The thermosetting material enters into the cavity and flows over the electronic device[s] that is[are] located within the cavity and is then “cured” so that the resin hardens into a non-flowable state. Traditionally it has been important to control the flow of the material into the cavity for a number of reasons, including: to provide void-free fill over the electrical device, to control the flow of the material so as to not contaminate unwanted areas with the encapsulating material, and to control the flow of the material so as to not cause any wire displacement or other damage to the assembly.
- Also, it is well known in the art to use mechanical clamping mechanisms as sealing devices in conjunction with the molding cavity to attempt to contain the thermosetting resin within the cavity prior to curing. However, because mechanical clamps must be applied in a symmetrical fashion, i.e. equal and opposite clamping forces, the configuration of the molds is limited to symmetrical designs.
- Therefore there is a need for an improved encapsulation method for transfer molding electronic devices which provides a leak proof sealing mechanism for asymmetric designs while using current equipment and known materials and techniques.
- Additionally, many competing packaging technologies are available for main and cache memory chips. For example, plastic quad flat pack (PQFD), Swiss outline package (SOP), Swiss outline J-leaded (SOJ), small outline IC (SOIC), thin quad flat pack (TQFP), thin small outline package (TSOP) direct chip attachment on PCB (DCA), and chip scale package (CSP) are all available for use in connection with memory chips. Each of these types of packaging has its own unique advantages, and the selection of a packaging type is often dictated by such advantages. For example, PQFPs are considered by some as the most cost-effective packages for surface mount technology. This type of packaging is often used to house one or more cache memories. On the other hand, TSOP is a very low profile plastic package which is specifically designed to house SRAM, DRAM, and flash memory chips for space limited applications.
- Although the CSP is a relatively new packaging technology, there are more than forty different CSPs reported in the literature with most uses being for SRAMs, DRAMs, and flash memory chips. CSPs are also used for application specific ICs (ASICs) and microprocessors in cases where the pin count is not too high. The unique feature of most CSPs is the use of a substrate to redistribute the very fine-pitch of the peripheral pads on the chip to a much larger pitch of the pads on the substrate. With the substrate, the CSP is easier to test at high speeds and to perform bum-in than, for example, the DCA package. Because of the standard size, another advantage of the CSP is ease of assembly or rework. The CSP also provides for physical protection of the die and is less susceptible to die shrinkage.
- However, it is often desirable to mount a memory chip directly onto a board. With the CSP, the chip is already mounted to a substrate such that the ability to directly mount the chip to a board is lost. Thus, the need exists for a CSP that provides all the advantages of the CSP but without the need for a substrate.
- The present invention, in its broadest form, is directed to a method of sealing an article to be encapsulated in which a first seal is created using a clamping pressure. The first seal prevents an encapsulating material from escaping from the mold. As the encapsulating material is injected into the mold, a second seal is dynamically formed by the force of the encapsulating material acting on the article being encapsulated.
- The present invention also provides a method of encapsulating an article having first and second surfaces comprising, positioning the article on a carrier such that at least a portion of the first surface contacts the carrier, positioning a portion of the carrier carrying the article within a mold, forming a seal between the mold and the carrier, and filling the mold with an encapsulating material in a manner that forms a seal between the article and the carrier.
- Additionally, the present invention is directed to a chip scale packaged die having no substrate. The present invention combines the advantages of chip scale packaging with the flexibility of direct board mounting. Those advantages and benefits, and others, will be apparent from the Description of the Preferred Embodiment hereinbelow.
- For the present invention to be readily understood and practiced, the invention will now be described, for purposes of illustration and not limitation, in conjunction with the following figures wherein:
- FIG. 1 illustrates a substrate which may be used in conjunction with a method of the present invention;
- FIG. 2 illustrates a portion of the substrate of FIG. 1 carrying an electrical device to be encapsulated;
- FIG. 3 illustrates the opposite side of the substrate illustrated in FIG. 2;
- FIG. 4 illustrates first and second mold sections which define a mold cavity;
- FIG. 5 illustrates the portion of the substrate shown in FIGS. 2 and 3 positioned in the mold cavity;
- FIG. 6 illustrates a sequence of filling the mold cavity;
- FIGS. 7 and 8 are perspective and plan views, respectively, of a first side of the portion of the substrate illustrated in FIGS. 2 and 3, after encapsulation;
- FIGS. 9 and 10 are perspective and plan views, respectively, of a second side of the portion of the substrate illustrated in FIGS. 2 and 3, after encapsulation;
- FIGS. 11 and 12 are views taken along the lines XI and XII, respectively, in FIG. 10;
- FIGS. 13A and 13B illustrate an asymmetric encapsulated device;
- FIG. 14 illustrates another gate arrangement which may be used with a method of the present invention;
- FIG. 15 illustrates a system which may be used to practice one embodiment of the present invention;
- FIG. 16 illustrates a cross sectional view of the mold, carrier and die during an overmolding process of the present invention;
- FIG. 17 illustrates a close-up of the relationship between one of the cavities of the mold of FIG. 16 with respect to an item being overmolded and the carrier;
- FIGS. 18A and 18B illustrate a bumped die after overmolding by the process of the present invention using the mold of FIG. 17;
- FIG. 19 illustrates a plurality of overmolded dies mounted on a board or substrate;
- FIG. 20 illustrates another embodiment for a carrier; and
- FIG. 21 illustrates an encapsulated die formed using the carrier of FIG. 20.
- FIG. 1 illustrates a
substrate 10 which may be used in conjunction with the method of the present invention. The description of the method of the present invention in connection with thesubstrate 10 is for purposes of illustration only, and not limitation. It is anticipated that the method and molds of the present invention may be used to encapsulate a large variety of articles, both electrical and non-electrical. In FIG. 1, the substrate is a known flexible substrate suitable for receivingelectrical devices 12 inopenings 14. The electrical device may be any type of device, although a memory device is shown in FIG. 1. - The
electrical device 12 may be connected to afirst side 16 of thesubstrate 10 by any known means, e.g. lamination, adhesion, etc. Thedevice 12 may be of a type in which electrical connections extend from the center of the device. Thedevice 12 is positioned such that theelectrical connections 18 of thedevice 12 extend throughopening 14 to asecond side 20 ofsubstrate 10, seen in FIG. 3. In the remaining pre-singulation figures,only portion 22 ofsubstrate 10 is illustrated for purposes of convenience. The reader will recognize that the description of the method and molds hereinafter with respect toportion 22 is actually carried out “x” times, e.g., 8, 10, 12, etc. depending upon the size and capacity of the encapsulating equipment. - In FIG. 2 it is seen that the
device 12 is positioned such thatopening 14 is not completely blocked leaving a small opening referred to as asecondary gate 24. If thedevice 12 completely blocks opening 14, then an alternate means of providing encapsulating material must be provided as described below. - In FIG. 3, the
second side 20 of theportion 22 of thesubstrate 10 is illustrated.Second side 20 hastraces 26 formed therein. Thetraces 26 may be formed using a solder masking step as is known in the art.Solder balls 28 may be embedded inportion 22 to provide a termination/connection point for each of thetraces 26. After thedevice 12 is connected to theportion 22 and theelectrical connections 18 are extending throughopening 14, eachelectrical connection 18 is connected to one of the traces using any known connection technique and machinery. - A
mold 30 which may be used in conjunction with the method of the present invention is illustrated in FIG. 4. In FIG. 4, afirst mold section 32 and asecond mold section 34 cooperate to define amold cavity 36. - FIG. 5 illustrates the
portion 22 positioned withincavity 36. Theportion 22 is positioned such thatdevice 12 is entirely within the portion of thecavity 36 formed by thefirst mold section 32, although, for other devices that may not be the case. Similarly, opening 14, and the connection of theelectrical connections 18 totraces 26 is positioned entirely within the portion of thecavity 36 formed by thesecond mold section 34. - The asymmetry of the
mold sections mold section 32 is approximately three times greater than a surface area of themold section 34. Generally, the surface area (A 16) of thefirst side 16 ofportion 22 facingmold cavity 36 must be greater than the surface area (A20) of thesecond side 20 ofportion 22 facingmold cavity 36. That is A16>A20. - Another by-product of the asymmetry is that
first mold portion 32 may be sealed against thefirst surface 16 ofportion 22 by applying clamping pressure in the four areas marked 38. No such seal can be formed at this time betweensecond mold portion 34 and thesecond surface 20 ofportion 22 because no clamping pressure can be exerted in opposition to the two areas marked 40. Not shown in FIGS. 4 and 5 is a runner and primary gate, which is the mechanism for injecting the encapsulating material into the portion of the mold cavity formed by thefirst mold section 32. - Turning now to FIG. 6, the sequential flow of encapsulating material into the
mold cavity 34 is shown. Encapsulating material flows under pressure throughrunner 42 into the portion of the mold cavity formed byfirst mold section 32. The pressure inrunner 42 is designated P1 while the pressure in the portion of the mold cavity formed byfirst mold section 32 is designated P2. The encapsulating material passes throughsecondary gate 24 at a pressure of P3 and into the portion of the mold cavity formed bysecond mold section 34 at a pressure of P4. The pressure is controlled such that P1>P2>P3>P4. - In one embodiment, the encapsulation material is a thermo-set epoxy resin mixture and may be loaded under a pressure in the range of 500-2000 psi. Fill times when the encapsulation material is a thermo-set epoxy resin mixture are on the order of 3-10 seconds. The injection pressure and fill times are dependent upon the specific encapsulating material that is used.
- As the encapsulation material fills the portion of the mold cavity formed by the
first mold section 32, theportion 22 of thesubstrate 10 bends or flexes under the pressure exerted by the encapsulation material. The bending brings thesecond surface 20 into a sealing engagement with thesecond molding section 34. Thus, a seal is dynamically formed as a portion of the mold cavity formed by thefirst mold section 32 is filled. In low-pressure applications, it is anticipated that a force may be exerted to cause the bending to take place. - The encapsulation material may be chosen from a class consisting of epoxies (including thermo-set resins), silicones, sycar, polyimides, and polyurethanes. These encapsulation materials are suitable for use when encapsulating electronic components because they have low moisture permeability, high mobile ions barriers, good UV-VIS and alpha particle protection, favorable mechanical, electrical and physical properties, as well as a low dielectric constant to reduce the device propagation delay and high thermal conductivity to dissipate heat generated by the devices. The proper choice of encapsulation material can enhance reliability of the device and improve its mechanical and physical properties. An optional curing step may hereinafter be required, depending upon the choice of encapsulation material, followed by removal of the
mold sections - After the
mold sections first side 16 ofportion 22 after removal ofmold section 32. A first portion of encapsulatedmaterial 33 is formed as a result of the encapsulation material being loaded intomold section 32. FIGS. 9 and 10 show thesecond side 20 ofportion 22 after removal ofmold section 34. A second portion of encapsulatedmaterial 35 is formed as a result of the encapsulation material being loaded intomold section 34. - FIGS. 11 and 12 illustrate views taken along the lines XI and XII, respectively, in FIG. 10. FIG. 12 provides a view of
runner 42 andprimary gate 44, which is the mechanism for injecting the encapsulation material into the portion of the mold cavity formed by thefirst mold section 32. - FIGS. 13A and 13B show the final product of the present invention after singulation, i.e. after portions of the
substrate 22 are separated and therunner 42 is removed. - FIG. 14 shows another gate arrangement which may be used with the method of the present invention. The electrical device to be encapsulated is a memory device identical to the one as shown in previous FIGS. 1 through 13B, although the electrical device may be any type of device. The
electrical device 12 is positioned such that opening 14 (see FIG. 1) is completely blocked. Thus encapsulating material injected intofirst mold section 32 fromrunner 42 andprimary gate 44 is contained withinfirst mold section 32. That is, there is no connecting gate betweenfirst mold section 32 andsecond mold section 34 through which encapsulation material may flow. Encapsulating material may be injected directly intomold section 34 through agate 46 and a runner, not shown. The encapsulating material injected intomold section 34 is contained withinmold section 34. - FIG. 15 illustrates a system which may be used to practice one embodiment of the present invention.
Wafer 101, upon dicing, produces a plurality of singulated die 102. The present invention allows for the overmolding encapsulation of singulated die 102, having no frame or substrate. Overmolding is a process of encapsulating at least the side ofdie 102 opposite the side carrying the bonding pads leaving the side of the die carrying the bonding pads exposed for bonding or board mounting. The singulated die 102 may be encapsulated with an epoxy resin to create a standard size, and to adhere a protective shell ontodie 102. This protects die 102 during handling processes. The present invention provides a standard package foot print, not affected by die shrinkage. - As stated, singulated die102 will be overmolded, that is, encapsulated at least on the side of the die which does not contain the bonding pads using the method of the present invention. While four singulated die are shown in FIG. 15, the reader will understand that a plurality of die may be encapsulated at the same time. For example, a number of rows of any number of die each may be encapsulated simultaneously. Further, the description of the method of the present invention in connection with the die is for purposes of illustration only, and not for limitation. It is anticipated that the method of the present invention may be used to overmold a large variety of articles.
-
Die 102 may be applied tocarrier 104 by any known means, e.g. lamination, adhesion, etc.Carrier 104 is a temporary carrier which is used during the overmolding process of the present invention, and is not a component of the overmolded encapsulation made therefrom.Carrier 104 may be a carrier film which can be either a continuous roll or, as shown in FIG. 15, a strip configuration.Die 102 is attached tocarrier film 104 such that the bonding pads ofdie 102 are “face down” oncarrier 104. That will usually, but not necessarily, mean that the circuitry of thedie 102 is face down oncarrier 104.Carrier 104 serves to protect the bond pads ofdie 102. The bond pads ofdie 102 may comprise, for example, solder balls or bumps constructed according to techniques well known in the art.Carrier film 104 protects the bond pads ofdie 102 from being contaminated through resin bleed during the overmolding process. - Once the
die 102 are placed oncarrier 104, they are transported bycarrier 104 tomold 108. After die 102 andcarrier 104 are located withinmold 108, the carrier is stopped,mold 108 is closed, and a clamping force is exerted bymold 108 to create a seal betweencarrier film 104 andmold 108. The encapsulation step occurs while the die are inside ofmold 108 and after the seal betweencarrier film 104 andmold 108 is created, so thatmold 108 provides an overmolding of that portion of the surface ofdie 102 which is not in direct contact withcarrier 104. After overmolding, the pressure is released, themold 108 is opened, and die 102 are transported out ofmold 108 for removal fromcarrier 104.Die 102 are then tested and, if suitable, may be used in assembly processes such as module mounting. If necessary, and as described further hereinbelow, an underfill process may be necessary to seal the package. Known standard underfilling processes and materials may be used. Examples of underfill epoxy encapsulants which may be used are bis-phenol type epoxy and cycloaliphatic epoxy to name a few. The most desired features of underfill materials are low viscosity (which can increase throughput), low curing temperature/fast curing time (which can reduce cost and be less harmful to other components), low thermal coefficient of expansion, high modulus (which leads to good mechanical properties), and low moisture absorption. - FIG. 16 provides a cross sectional view of
mold 108,carrier 104 and die 102 during the overmolding process of the present invention.Mold 108 comprisesfirst molding section 110 andsecond molding section 112 which are positioned aroundcarrier 104 and die 102.Molding section 110 is a flat molding section and is in direct contact withcarrier 104.Molding section 112 comprises a number ofcavities 114.Cavities 114 are configured to receive die 102 and a portion ofcarrier 104. In one embodiment of the present invention,mold 108 is designed to apply force tocarrier 104 and, whencavities 114 are filled, to apply force to die 102 such that a seal is created betweensection 112 andcarrier 104 andcarrier 104 and theside 103 ofdie 102 in contact with thecarrier 104, respectively. The force which must be exerted bymold 108 to create a seal betweencarrier film 104 and die 102 is related to the thickness ofcarrier 104, the type of material of whichcarrier 104 is produced, the encapsulation material which is used to overmold die 102 and the injection pressure of the encapsulation material. The force exerted by themold 108 to create a seal betweencarrier film 104 and die 102 will ordinarily be much larger than any force exerted by any adhesive material oncarrier 104. - In one embodiment of the present invention, encapsulation material is injected through
openings 116 into thecavities 114 ofmolding sections 112 to encapsulate those portions ofdie 102 which are not inaccessible as a result of the seal withcarrier 104. That is, encapsulation material is injected intocavities 114 throughopenings 116 to overmold die 102. The seal which is created between theconnection side 103 ofdie 102 andcarrier 104 as the encapsulation material is injected prevents migration of the encapsulation material onto theside 103 ofdie 102 thereby preventing resin bleed. - The encapsulation material may be chosen from a class consisting of epoxies (including thermo-set resins), silicones, sycar, polyimides, and polyurethanes. These encapsulation materials are suitable for use when encapsulating electronic components because they have low moisture permeability, high mobile ion barriers, good UV-VIS and alpha particle protection, favorable mechanical, electrical and physical properties, as well as a low dielectric constant to reduce the device propagation delay and high thermal conductivity to dissipate heat generated by the devices. The proper choice of encapsulation material can enhance reliability of the device and improve its mechanical and physical properties. An optional curing step may hereinafter be required, depending upon the choice of encapsulation material, followed by opening of
mold 108. - FIG. 17 is a close up of a portion of the
upper die section 112 havingdie cavity 114 serviced by opening 116. As previously mentioned, die 102 may be applied tocarrier 104 by any known means, e.g. lamination, adhesion, etc. FIG. 17 shows die 102 attached tocarrier 104 by a layer of gasket forming adhesive 118 which is applied to the surface ofcarrier 104. Gasket forming adhesive 118 may be applied to the surface ofcarrier 104 or may be one of the ingredients which comprisecarrier 104. - Shown in FIG. 17 is a type of die connection referred to as “bumped”. That is, connection between the die and the outside world occurs through the balls or bumps forming the bonding pads.
Carrier 104 may configured to be approximately three times as thick as the height ofbumps 120. In one embodiment of the present invention, the height of thebumps 120 is 0.1 mm and the thickness ofcarrier 104 is 0.3 mm. - Because
carrier 104 is approximately three times as thick as the height of thebumps 120, when force is applied to this configuration,carrier 104 absorbsbumps 120 and thus creates a seal to prevent the encapsulation material from bleeding betweencarrier 104 and theconnection side 103 ofdie 102.Carrier 104 may also be a die boat of rigid material or constructed of a rolled material. - As shown in FIG. 18A, when
cavity 114 is filled, abody 121 having the shape ofcavity 114 is attached directly ontodie 102 while leavingconnection side 103 of die 102 (see FIG. 18B) exposed for bonding or board mounting. Theside 103 is exposed as a result of the encapsulation material being prevented from reachingunderside 103. Under such circumstances, an underfill process is needed to completely seal the package. - An example of a known underfill application comprises dispensing the underfill material through a syringe with a version system (to locate the edges of the die) and a pumping system (to control the amount of underfill material). After the underfill material is dispensed on either one side or two adjacent sides, the underfill material flows to completely cover the exposed portion of the die. The underfill material is then cured to completely seal the package. After underfilling, the resulting encapsulated device124 (FIG. 19) is ready for mounting. FIG. 19 illustrates a plurality of encapsulated
devices 124 mounted on asubstrate 126. - Another embodiment of the present invention shown in FIG. 20 differs from the first embodiment in two ways. First,
carrier 104 may have gaps orcavities 128 configured therein, which cavities 128 receive thebumps 120 ofdie 102.Carrier 104 is in contact with a portion of theconnection side 103 ofdie 102 viaseal 130.Seal 130 prevents resin bleed into cavities 125 and thus ontobumps 120. Note thatseal 130 is positioned such that encapsulation material can reach at least a portion ofside 103 ofdie 102. That permits encapsulation of a portion ofside 103 and eliminates the need for an underfill step. However, the area of the die 102 exposed to the encapsulation material must be controlled such that the downward pressure exerted by the mold and encapsulation material exceeds the upward pressure exerted by the encapsulation between thecarrier 104 andside 103. Also, the encapsulation material must have flow characteristics that permit the material to flow in the space betweencarrier 104 andside 103 without disrupting the seal created byseal 130. Those of ordinary skill in the art will recognize that the differences between the embodiment of FIG. 17 and the embodiment of FIG. 20 can be used either individually or in combination, as shown in FIG. 20. - FIG. 21 illustrates a bumped
die 132 after overmolding by the process of the present invention as illustrated in FIG. 20. Bumped die 132 is completely encapsulated except forbumps 120 which are exposed for module mounting. No encapsulation material is present onside 103 in the area of thebumps 120 because of the position of theseal 130. - The present invention allows for a single die to be encapsulated with an epoxy resin to create a standard size overmolded die. The epoxy resin serves as a protective shell to the die. The resulting CSP is an important packaging type in the electronic packaging industry. The present invention provides for the advantages of a CSP because of standardization in size but still enables the chip to be used in processes in which chips are mounted directly onto boards.
- While the present invention has been described in conjunction with preferred embodiments thereof, those of ordinary skill will recognize that many modifications and variations thereof are possible. It is anticipated that the method of the present invention may be carried out using a variety of encapsulating materials and commercially available injection molding machines as well as a variety of underfill materials and applications. Also, the carrier may be comprised of a variety of materials. The foregoing description and following claims are intended to cover all such modifications and variations.
Claims (29)
1. A method of encapsulating an article having first and second surfaces, comprising:
positioning the article on a carrier such that at least a portion of the first surface contacts the carrier;
positioning a portion of the carrier carrying the article within a mold;
forming a seal between the mold and the carrier; and
filling the mold with an encapsulating material in a manner that forms a seal between the article and the carrier.
2. The method of claim 1 wherein the positioning step includes positioning the article to prohibit the flow of any encapsulating material between the carrier and the first surface of the article.
3. The method of claim 2 further comprising underfilling the first surface of the article with an underfill material.
4. The method of claim 2 wherein the filling step forms a seal between the article and the carrier as a result of pressure exerted by the encapsulating material onto the second surface of the article as the encapsulating material fills the mold.
5. The method of claim 1 wherein the positioning step includes positioning the article to allow the flow of encapsulating material between a portion of the carrier and the first surface of the article.
6. The method of claim 5 wherein the filling step forms a seal between the article and the carrier as the pressure exerted by the encapsulating material onto the second surface of the article as the encapsulating material fills the mold exceeds the pressure exerted by the encapsulating material onto the first surface of the article.
7. The method of claim 1 wherein said carrier is comprised of polymeric core material overlaid with an adhesive material.
8. The method of claim 1 wherein said step of filling the molding section includes the step of filling the molding section with an encapsulating material chosen from a class consisting of epoxies, including thermo-set resins, silicones, sycar, polyimides, and polyurethanes.
9. The method of claim 8 including the step of curing the encapsulating material.
10. The method of claim 3 wherein the step of underfilling includes the step of underfilling the first surface of the article with an epoxy resin.
11. The method of claim 10 including the step of curing the epoxy resin.
12. The method of claim 1 wherein the carrier is further defined as having gaps such that at least a portion of the article positioned on the carrier is located on a gap.
13. A method of encapsulating an article having first and second surfaces, comprising:
positioning the article on a carrier such that at least a portion of the first surface contacts the carrier;
positioning a portion of the carrier carrying the article within a mold;
forming a seal between the mold and the carrier using clamping pressure; and
dynamically forming a seal between the article and the carrier by injecting an encapsulating material into the mold.
14. The method of claim 13 wherein the positioning step includes positioning the article to prohibit the flow of any encapsulating material between the carrier and the first surface of the article.
15. The method of claim 14 further comprising underfilling the first surface of the article with an underfill material.
16. The method of claim 15 wherein the dynamically forming a seal step results from the pressure exerted by the encapsulating material onto the second surface of the article as the encapsulating material fills the mold.
17. The method of claim 13 wherein the positioning step includes positioning the article to allow the flow of encapsulating material between the carrier and the first surface of the article.
18. The method of claim 17 wherein the dynamically forming a seal step results as the pressure exerted by the encapsulating material onto the second surface of the article as the encapsulating material fills the mold is greater than the pressure exerted by the encapsulating material onto the first surface of the article.
19. The method of claim 13 wherein said carrier is comprised of polymeric core material overlaid with an adhesive material.
20. The method of claim 13 wherein said step of dynamically forming a seal includes the step of injecting the molding section with an encapsulating material chosen from a class consisting of epoxies, including thermo-set resins, silicones, sycar, polyimides, and polyurethanes.
21. The method of claim 20 including the step of curing the encapsulating material.
22. The method of claim 15 wherein the step of underfilling includes the step of underfilling the first surface of the article with an epoxy resin.
23. The method of claim 22 including the step of curing the epoxy resin.
24. The method of claim 13 wherein the carrier is further defined as having gaps such that at least a portion of the article positioned on the carrier is located on a gap.
25. A sealing process for an article being encapsulated, comprising:
forming a first seal to prevent an encapsulating material from escaping from a mold with a clamping pressure; and
forming a second seal by exerting pressure on an article being encapsulated with the encapsulating material.
26. An overmolded die the size of a chip scale package and not having any substrate.
27. A chip scale packaged die having no substrate.
28. An overmolded die without a substrate, comprising:
a die having a first surface carrying electrical contacts; and
an encapsulation material sealing the die except for the electrical contacts.
29. The overmolded die of claim 28 wherein the encapsulated material is chosen from a class consisting of epoxies, including thermo-set resins, silicons, sycar, polyimides and polyurethanes.
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US10/894,675 US7655508B2 (en) | 1999-02-22 | 2004-07-20 | Overmolding encapsulation process and encapsulated article made therefrom |
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US09/989,477 US20020076859A1 (en) | 1999-02-22 | 2001-11-20 | Overmolding encapsulation process and encapsulated article made therefrom |
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US09/989,477 Abandoned US20020076859A1 (en) | 1999-02-22 | 2001-11-20 | Overmolding encapsulation process and encapsulated article made therefrom |
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US8643492B2 (en) | 2009-04-08 | 2014-02-04 | Sabic Innovative Plastics Ip B.V. | Encapsulated RFID tags and methods of making same |
US11030511B2 (en) * | 2017-04-21 | 2021-06-08 | Assaabloy Ab | Housing for identification device |
US20190273029A1 (en) * | 2018-03-02 | 2019-09-05 | Micron Technology, Inc. | Electronic device with a package-level thermal regulator mechanism and associated systems, devices, and methods |
US10692793B2 (en) * | 2018-03-02 | 2020-06-23 | Micron Technology, Inc. | Electronic device with a package-level thermal regulator mechanism and associated systems, devices, and methods |
US10834853B2 (en) | 2018-03-02 | 2020-11-10 | Micron Technology, Inc. | Electronic device with a card-level thermal regulator mechanism and associated systems, devices, and methods |
US11564331B2 (en) | 2018-03-02 | 2023-01-24 | Micron Technology, Inc. | Electronic device with a card-level thermal regulator mechanism and associated systems, devices, and methods |
Also Published As
Publication number | Publication date |
---|---|
US20040266069A1 (en) | 2004-12-30 |
US6143581A (en) | 2000-11-07 |
US20030086994A1 (en) | 2003-05-08 |
US7655508B2 (en) | 2010-02-02 |
US6605331B1 (en) | 2003-08-12 |
US6951981B2 (en) | 2005-10-04 |
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STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |