US20010017415A1 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
US20010017415A1
US20010017415A1 US09/779,565 US77956501A US2001017415A1 US 20010017415 A1 US20010017415 A1 US 20010017415A1 US 77956501 A US77956501 A US 77956501A US 2001017415 A1 US2001017415 A1 US 2001017415A1
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Prior art keywords
conductive layer
semiconductor device
forming
layer
temperature
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US09/779,565
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Takao Kamoshima
Hiroki Takewaka
Takashi Yamashita
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Renesas Technology Corp
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Mitsubishi Electric Corp
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Publication of US20010017415A1 publication Critical patent/US20010017415A1/en
Assigned to RENESAS TECHNOLOGY CORP. reassignment RENESAS TECHNOLOGY CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MITSUBISHI DENKI KABUSHIKI KAISHA
Assigned to RENESAS TECHNOLOGY CORP. reassignment RENESAS TECHNOLOGY CORP. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MITSUBISHI DENKI KABUSHIKI KAISHA
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers

Definitions

  • the present invention relates to semiconductor devices and manufacturing methods thereof, and more particularly to a semiconductor device having a conductive layer as an interconnection layer and a manufacturing method thereof.
  • FIGS. 18 to 22 are cross sectional views shown in conjunction with the problem associated with the conventional manufacturing method.
  • an interlayer insulating film 102 is formed on a silicon substrate 101 .
  • a titanium nitride film 103 as a barrier layer is formed on interlayer insulating film 102 .
  • An aluminum film (hereinafter referred to as a high-temperature aluminum film) 105 is formed on titanium nitride film 103 by sputtering at a high temperature of about 400° C.
  • a crystal grain size of high-temperature aluminum film 105 is larger than that of an aluminum film formed at a low temperature. Therefore, when high-temperature aluminum film 105 is cooled, a recess 106 is formed by the grain boundary, for example, due to shrinkage of a crystal.
  • an anti-reflection film 109 of titanium nitride is formed on a surface of high-temperature aluminum film 105 .
  • a thickness of anti-reflection film 109 is particularly small at a corner 106 a of recess 106 .
  • resist is applied onto anti-reflection film 109 .
  • a resist pattern 110 is formed by development using developer.
  • the developer melts a portion of anti-reflection film 109 and also a portion of high-temperature aluminum film 105 .
  • recess 106 extends and an opening 107 is formed. Opening 107 is greater than the opening at anti-reflection film 109 .
  • etching of anti-reflection film 109 and high-temperature aluminum film 105 is started using resist pattern 110 as a mask.
  • etch residue 111 formed by reaction of high-temperature aluminum film 105 and etchant, is left at a portion covered by anti-reflection film 109 in opening 107 . It is relatively difficult to etch etching residue 111 .
  • etch residue 111 acts as a mask to leave high-temperature aluminum film 105 and titanium nitride film 103 thereunder.
  • interconnection layers 112 and 113 are formed and, at the same time, residues 121 and 122 including conductive portions are formed at portions which would have essentially been free of such conductive materials.
  • the present invention is made to solve the aforementioned problem.
  • An object according to one aspect of the present invention is to provide a semiconductor device provided with high reliability and preventing insulation failure.
  • An object according to another aspect of the present invention is to provide a semiconductor device provided with high adhesion with a lower layer and preventing connection failure.
  • the semiconductor device includes a semiconductor substrate and a conductive layer including polycrystal formed on the semiconductor substrate.
  • a recess is formed by a grain boundary in a surface of the conductive layer. A distance between side walls of the recess becomes small as closer to the semiconductor substrate.
  • the semiconductor device having such structure As the distance between the side walls of the recess becomes small as closer to the semiconductor substrate, there would be no space for the residue caused by the etching in the recess in the conductive layer and any conductive material is not left at the unexpected portion. As a result, the semiconductor device provided with high reliability and preventing insulation failure is provided.
  • the conductive layer includes first and second conductive layers.
  • the first conductive layer is formed on the semiconductor substrate and includes a polycrystal having a first average grain size.
  • the second conductive layer is formed with a recess on the first conductive layer and includes a polycrystal having a second average grain size which is greater than the first average grain size.
  • the semiconductor device provided with high reliability and preventing connection failure is provided.
  • the semiconductor device further includes a thin film layer formed on the conductive layer and having a material which is different from that of the conductive layer.
  • the thin film layer includes titanium or silicon nitride. Then, the thin film layer can be used as a barrier layer or anti-reflection layer.
  • the conductive layer includes aluminum.
  • the semiconductor device further includes an insulating layer formed on the semiconductor substrate and a barrier layer formed on the insulating layer.
  • the conductive layer is formed on the barrier layer.
  • a semiconductor device includes first, second and third conductive layers.
  • the first conductive layer is formed on the semiconductor substrate and includes a polycrystal having a first average grain size.
  • the second conductive layer is formed on the first conductive layer and includes a polycrystal having a second average grain size which is greater than the first average grain size.
  • the third conductive layer is formed on the second conductive layer and includes a polycrystal having a third average grain size which is smaller than the second average grain size.
  • the semiconductor device having such structure As the average grain size of the third conductive layer formed on the second conductive layer is small, formation of a recess by a grain boundary in the third conductive layer is prevented. As there would be no space for residue caused by etching in the third conductive layer, a conductive material is not left at an unexpected portion. As a result, the semiconductor device provided with high reliability and preventing insulation failure is provided.
  • a recess is formed in a surface of the second conductive layer by the grain boundary. A distance between side walls of the recess becomes small as closer to the semiconductor substrate.
  • the semiconductor device further includes a thin film layer formed on the third conductive layer and having a material which is different from that of the third conductive layer.
  • the thin film layer includes titanium or silicon nitride. Then, the thin film layer can be used as an anti-reflection film or barrier layer.
  • the conductive layer includes aluminum.
  • the semiconductor device includes an insulating layer formed on the semiconductor substrate and a barrier layer formed on the insulating layer.
  • the conductive layer is formed on the barrier layer.
  • a method of manufacturing a semiconductor device includes a step of forming a conductive layer including a polycrystal on a semiconductor substrate.
  • the conductive layer having a recess in its surface formed by a grain boundary. A distance between side walls of the recess becomes large as closer to the semiconductor substrate.
  • the method of manufacturing the semiconductor device includes a step of forming the side walls such that a distance therebetween becomes small as closer to the semiconductor substrate.
  • the side walls prevents formation of a space for the residue in the conductive layer.
  • a conductive material is not left at an unexpected portion, so that the semiconductor device provided with high reliability and preventing insulation failure is provided.
  • the step of forming the conductive layer includes a step of forming a first conductive layer at a first temperature on the semiconductor substrate, and a step of forming a second conductive layer having a recess at a second temperature which is higher than the first temperature on the first conductive layer.
  • the semiconductor device As the first conductive layer is formed at the relatively low temperature, adhesion between the first conductive layer and a lower layer increases. As a result, the semiconductor device provided with high reliability and preventing connection failure is provided.
  • the step of forming the second conductive layer includes a step of keeping the second conductive layer in the atmosphere at the second temperature after the second conductive layer is formed by sputtering at a temperature which is lower than the second temperature.
  • the method of manufacturing the semiconductor device further includes a step of forming a thin film layer having a material which is different from that of the conductive layer on the conductive layer having the formed side walls.
  • the method of manufacturing the semiconductor device further includes a step of forming an insulating layer on the semiconductor substrate and a step of forming a barrier layer on the insulating layer.
  • the step of forming the conductive layer includes a step of forming a conductive layer on the barrier layer.
  • the step of forming the side walls includes a step of sputter etching the conductive layer.
  • a method of manufacturing a semiconductor device includes a step of forming a first conductive layer on a semiconductor substrate at a first temperature, a step of forming a second conductive layer on the first conductive layer at a second temperature higher than the first temperature, and a step of forming a third conductive layer on the second conductive layer at a third temperature lower than the second temperature.
  • the semiconductor device As the first conductive layer is formed at the relatively low temperature, adhesion with a lower layer increases. Thus, the semiconductor device provided with high reliability and preventing connection failure is provided.
  • the step of forming the second conductive layer includes a step of forming a second conductive layer having in its surface a recess caused by the grain boundary, where a distance between side walls of the recess becomes large as closer to the semiconductor substrate.
  • the method of manufacturing the semiconductor device further includes a step of forming the side walls such that the distance therebetween becomes small as closer to the semiconductor substrate.
  • the step of forming the third conductive layer includes a step of forming the third conductive layer on the second conductive layer having the formed side walls.
  • the step of forming the side walls includes a step of sputter etching the conductive layer.
  • the method of manufacturing the semiconductor device further includes a step of forming a thin film layer having a material which is different from that of the third conductive layer on the third conductive layer.
  • the step of forming the second conductive layer includes a step of keeping the second conductive layer in the atmosphere at the second temperature after the second conductive layer is formed by sputtering at a temperature lower than the second temperature.
  • the method of manufacturing the semiconductor device further includes a step of forming an insulating layer on the semiconductor substrate and a step of forming a barrier layer on the insulating layer.
  • the step of forming the conductive layer includes a step of forming a conductive layer on the barrier layer. Then, as the conductive layer is formed on the barter layer, diffusion of atoms of the conductive layer is prevented.
  • FIG. 1A is a schematic cross sectional view showing a semiconductor device according to a first embodiment of the present invention
  • FIG. 1B is a partial cross sectional view showing in enlargement an opening in the semiconductor device according to the first embodiment of the present invention.
  • FIG. 2 is a cross sectional view showing a first step of a method of manufacturing the semiconductor device shown in FIG. 1.
  • FIG. 3 is a partial cross sectional view showing in enlargement a recess of the semiconductor device shown in FIG. 2.
  • FIGS. 4 to 7 are cross sectional views showing second to fifth steps of the method of manufacturing the semiconductor device shown in FIG. 1.
  • FIG. 8 is a cross sectional view showing a semiconductor device according to a second embodiment of the present invention.
  • FIGS. 9 to 12 are cross sectional views showing first to fourth steps of a method of manufacturing the semiconductor device shown in FIG. 8.
  • FIG. 13 is a cross sectional view showing a semiconductor device according to a third embodiment of the present invention.
  • FIGS. 14 to 17 are cross sectional views showing first to fourth steps of a method of manufacturing the semiconductor device shown in FIG. 13.
  • FIGS. 18 to 22 are cross sectional views showing first to fifth steps of a method of manufacturing a conventional semiconductor device.
  • an interlayer insulating film 2 is formed on a silicon substrate 1 as a semiconductor substrate.
  • An interconnection layer 12 is formed on interlayer insulating film 2 .
  • Interconnection layer 12 includes: a titanium nitride film 3 as a barrier layer; a low-temperature aluminum layer (an aluminum layer formed at a low temperature) 4 as a first conductive layer; a high-temperature aluminum layer 5 as a second conductive layer; and an anti-reflection film 9 as a thin film layer having two layers of titanium and titanium nitride.
  • Titanium nitride film 3 has a thickness of about 100 nm.
  • a thickness of low-temperature aluminum film 4 including polycrystalline aluminum is about 150 nm and has an average crystal grain size of about 0.5 ⁇ m.
  • High-temperature aluminum film 5 is formed on low-temperature aluminum film 4 .
  • a thickness of high-temperature aluminum film is about 200 nm.
  • High-temperature aluminum film 5 includes polycrystalline aluminum and has an average crystal grain size of about 1.5 ⁇ m.
  • An opening 107 is formed as a recess in a surface of high-temperature aluminum film 5 .
  • opening 7 is defined by grain boundaries of crystals 5 a to 5 c of aluminum. Opening 7 has a depth D of 20 nm, a diameter W 1 at its upper portion of about 50 nm and a diameter W 2 at its bottom portion of 30 nm. A distance between side walls 7 a and 7 b of opening 7 becomes small as closer to silicon substrate 1 .
  • an interlayer insulating film 2 is formed by CVD (Chemical Vapor Deposition) on a surface of silicon substrate 1 .
  • a titanium nitride film 3 is formed on interlayer insulating film 2 by PVD Physical Vapor Deposition).
  • a low-temperature aluminum film 4 is formed on titanium nitride film 3 by sputtering at a low temperature of about 100° C.
  • High-temperature aluminum film 5 is formed on low-temperature aluminum film 4 by sputtering at a high temperature of about 400° C. Thereafter, high-temperature aluminum film 5 is cooled, and a recess 6 is formed in a surface thereof by crystal depression.
  • recess 6 is formed by grain boundaries of crystals 5 a to 5 c of aluminum, that is, crystal grain boundaries of aluminum. Recess 6 is formed by depression of crystal 5 b of aluminum.
  • the largest portion of recess 6 has a diameter W 2 , and a diameter at the surface of high-temperature aluminum film 5 is W 3 (20 nm). A distance between side walls 6 a and 6 b of recess 6 becomes small as closer to silicon substrate 1 .
  • opening 7 is formed by processing the side walls of recess 6 .
  • a distance between side walls 7 a and 7 b of opening 7 becomes small as doser to silicon substrate 1 .
  • a corner 7 c of opening 7 is arcuate in shape.
  • an anti-reflection film 9 having two layers of titanium and titanium nitride is formed by PVD to cover high-temperature aluminum film 5 .
  • resist is applied onto anti-reflection film 9 . After the resist is exposed to light, it is developed by developer to form a resist pattern 10 .
  • anti-reflection film 9 , high-temperature aluminum film 5 , low-temperature aluminum film 4 and titanium nitride film 3 are etched in accordance with resist pattern 10 .
  • an interconnection layer 12 is formed.
  • resist pattern 10 is removed to complete the semiconductor device shown in FIG. 1.
  • Low-temperature aluminum film 4 is formed on titanium nitride film 3 . As low-temperature aluminum film 4 is provided with high adhesion with other layers, the semiconductor device provided with high reliability and preventing connection failure is achieved.
  • silicon substrate 1 , interlayer insulating film 2 , titanium nitride film 3 and low-temperature aluminum film 4 are the same as those of the first embodiment.
  • a high-temperature aluminum-film 5 is formed on low-temperature aluminum film 4 .
  • High-temperature aluminum film 5 has an average grain size of 1.5 ⁇ m and a thickness of 200 nm.
  • a recess 6 is formed in a surface of high-temperature aluminum film 5 .
  • a dimension of recess 6 is the same as that shown in FIG. 2.
  • Low-temperature aluminum film 21 is formed over recess 6 .
  • Low-temperature aluminum film 21 has a thickness of 100 nm and an average grain size of 0.1 ⁇ m. A distance between side walls 6 a and 6 b of recess 6 becomes small as closer to silicon substrate 1 .
  • An anti-reflection film 22 having two layers of titanium and titanium nitride is formed on low-temperature aluminum film 21 .
  • an interlayer insulating film 2 , titanium nitride film 3 , low-temperature aluminum film 4 and high-temperature aluminum film 5 are formed on silicon substrate 1 .
  • Recess 6 is formed in the surface of high-temperature aluminum film 5 .
  • low-temperature aluminum film 21 is formed by sputtering at a temperature of about 100° C.
  • An anti-reflection film 22 is formed on low-temperature aluminum film 21 by PVD.
  • resist is applied onto anti-reflection film 22 . After the resist is exposed to light, it is developed by a developer to form a resist pattern 23 .
  • anti-reflection film 22 , low-temperature aluminum film 21 , high-temperature aluminum film 5 , low-temperature aluminum film 4 and titanium nitride film 3 are etched in accordance with resist pattern 23 .
  • an interconnection layer 25 is formed.
  • resist pattern 23 is removed to complete the semiconductor device shown in FIG. 8.
  • low-temperature aluminum film 21 is formed in recess 6 .
  • the average grain size of low-temperature aluminum film 21 is relatively small, it is unlikely that depression of a crystal is caused.
  • anti-reflection film 22 is formed on low-temperature aluminum film 21 , any portion of anti-reflection film 22 would not have a smaller thickness. Therefore, low-temperature aluminum film 21 would not be etched at the time of development of resist pattern 23 , and there is not any space for the etch residue. In addition, insulation failure is prevented.
  • the conductive material is left exclusively under resist pattern 23 , and the other portion would be free of conductive material. As a result, the semiconductor device with high reliability is achieved.
  • Low-temperature aluminum film 4 is formed on titanium nitride film 3 . As low-temperature aluminum film 4 has high adhesion with other layers, connection failure is prevented. As a result, the semiconductor device with high reliability is achieved.
  • an interlayer insulating film 2 , titanium nitride film 3 , low-temperature aluminum film 4 and high-temperature aluminum film 5 are formed on a silicon substrate 1 .
  • An opening 7 is formed in a surface of high-temperature aluminum film 5 , and a distance between side walls 7 a and 7 b of opening 7 becomes small at closer to silicon substrate 1 .
  • Low-temperature aluminum film 31 is formed in opening 7 .
  • An anti-reflection film 32 having two layers of titanium and titanium nitride is formed on low-temperature aluminum film 31 .
  • Titanium nitride film 3 , low-temperature aluminum film 4 , high-temperature aluminum film 5 , low-temperature aluminum film 31 and anti-reflection film 32 comprise an interconnection layer 35 .
  • interlayer insulating film 2 , titanium nitride film 3 , low-temperature aluminum film 4 and high-temperature aluminum film 5 are formed on silicon substrate 1 .
  • Opening 7 is formed by sputter etching the surface of high-temperature aluminum film 5 by argon. The distance between side walls 7 a and 7 b of opening 7 becomes small as closer to silicon substrate 1 .
  • low-temperature aluminum film 31 is formed to cover opening 7 by sputtering at a temperature of about 100° C.
  • Anti-reflection film 32 having two layers of titanium and titanium nitride is formed on low-temperature aluminum film 31 by CVD.
  • resist is applied onto anti-reflection film 32 . After the resist is exposed to light, it is developed by developer. Thus, a resist pattern 33 is formed.
  • anti-reflection film 32 , low-temperature aluminum film 31 , high-temperature aluminum film 5 , low-temperature aluminum film 4 and titanium nitride film 3 are etched in accordance with resist pattern 33 to form an interconnection layer 35 . Thereafter, resist pattern 33 is removed to complete the semiconductor device shown in FIG. 13.
  • low-temperature aluminum film 31 is formed on high-temperature aluminum film 5 at a low temperature as shown in FIG. 15.
  • a crystal grain size of low-temperature aluminum film 31 is relatively small, it is unlikely that a recess is formed in low-temperature aluminum film 31 .
  • Recess 6 in the high-temperature aluminum film is processed to be tapered opening 7 , so that a surface of low-temperature aluminum film 31 is almost planar. Accordingly, even when anti-reflection film 32 is formed on low-temperature aluminum film 31 , any portion of anti-reflection film 32 would not have a smaller thickness.
  • low-temperature aluminum film 31 is not etched at the time of development of resist pattern 33 , whereby formation of a space for the etch residue is prevented.
  • a conductive material is left exclusively under resist pattern 33 and the other portions are substantially flee of the conductive material, as shown in FIG. 12. Therefore, the semiconductor device provided with high reliability and preventing connection failure is achieved.
  • anti-reflection film 9 has been described as having two layers of titanium and titanium nitride, a silicon nitride film may be used as the anti-reflection film. Further, though aluminum has been described as the conductive material of the interconnection layer, copper or tungsten may be employed.
  • a boundary between low temperature having aluminum film 4 and high-temperature aluminum film 5 is not clearly defined. Then, a portion of low-temperature aluminum film 4 that is closer to titanium nitride film 3 has a relatively small grain size, whereas the portion closer to high temperature having aluminum film 5 has a relatively large grain size.

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Abstract

A semiconductor device with high reliability is provided in which an insulating property of an insulating layer is high and connection failure is prevented.
The semiconductor device includes: a silicon substrate; a low-temperature aluminum film formed on silicon substrate and including a polycrystal; and a high-temperature aluminum film. An opening is formed in a surface of a high-temperature aluminum film by a crystal grain boundary. A distance between side walls of the opening becomes small as closer to silicon substrate.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention relates to semiconductor devices and manufacturing methods thereof, and more particularly to a semiconductor device having a conductive layer as an interconnection layer and a manufacturing method thereof. [0002]
  • 2. Description of the Background Art [0003]
  • Conventionally, aluminum is used for an interconnection layer of a semiconductor device. The problem related to a method of manufacturing the interconnection with aluminum will be described. [0004]
  • FIGS. [0005] 18 to 22 are cross sectional views shown in conjunction with the problem associated with the conventional manufacturing method.
  • Referring to FIG. 18, an [0006] interlayer insulating film 102 is formed on a silicon substrate 101. A titanium nitride film 103 as a barrier layer is formed on interlayer insulating film 102. An aluminum film (hereinafter referred to as a high-temperature aluminum film) 105 is formed on titanium nitride film 103 by sputtering at a high temperature of about 400° C.
  • The formation of the aluminum film at such high temperature increases planarity of high-[0007] temperature aluminum film 105. A crystal grain size of high-temperature aluminum film 105 is larger than that of an aluminum film formed at a low temperature. Therefore, when high-temperature aluminum film 105 is cooled, a recess 106 is formed by the grain boundary, for example, due to shrinkage of a crystal.
  • Referring to FIG. 19, an [0008] anti-reflection film 109 of titanium nitride is formed on a surface of high-temperature aluminum film 105. At the time, a thickness of anti-reflection film 109 is particularly small at a corner 106 a of recess 106.
  • Referring to FIG. 20, resist is applied onto [0009] anti-reflection film 109. After the resist is exposed to light, a resist pattern 110 is formed by development using developer. As the thickness of anti-reflection film 109 is small at corner 106 a of recess 106, the developer melts a portion of anti-reflection film 109 and also a portion of high-temperature aluminum film 105. Thus, recess 106 extends and an opening 107 is formed. Opening 107 is greater than the opening at anti-reflection film 109.
  • Referring to FIG. 21, etching of [0010] anti-reflection film 109 and high-temperature aluminum film 105 is started using resist pattern 110 as a mask. At the time, etch residue 111, formed by reaction of high-temperature aluminum film 105 and etchant, is left at a portion covered by anti-reflection film 109 in opening 107. It is relatively difficult to etch etching residue 111.
  • Referring to FIG. 22, when etching is further performed, [0011] etch residue 111 acts as a mask to leave high-temperature aluminum film 105 and titanium nitride film 103 thereunder. As a result, interconnection layers 112 and 113 are formed and, at the same time, residues 121 and 122 including conductive portions are formed at portions which would have essentially been free of such conductive materials.
  • Formation of an interlayer insulating film on [0012] residues 121 and 122 would result in insulation failure of the interlayer insulating film and reduction in reliability of the semiconductor device.
    • SUMMARY OF THE INVENTION
  • The present invention is made to solve the aforementioned problem. An object according to one aspect of the present invention is to provide a semiconductor device provided with high reliability and preventing insulation failure. [0013]
  • An object according to another aspect of the present invention is to provide a semiconductor device provided with high adhesion with a lower layer and preventing connection failure. [0014]
  • The semiconductor device according to one aspect of the present invention includes a semiconductor substrate and a conductive layer including polycrystal formed on the semiconductor substrate. A recess is formed by a grain boundary in a surface of the conductive layer. A distance between side walls of the recess becomes small as closer to the semiconductor substrate. [0015]
  • In the semiconductor device having such structure, as the distance between the side walls of the recess becomes small as closer to the semiconductor substrate, there would be no space for the residue caused by the etching in the recess in the conductive layer and any conductive material is not left at the unexpected portion. As a result, the semiconductor device provided with high reliability and preventing insulation failure is provided. [0016]
  • More preferably, the conductive layer includes first and second conductive layers. The first conductive layer is formed on the semiconductor substrate and includes a polycrystal having a first average grain size. The second conductive layer is formed with a recess on the first conductive layer and includes a polycrystal having a second average grain size which is greater than the first average grain size. [0017]
  • As the first average grain size is relatively small as compared with the second average grain size, adhesion between the first conductive layer of the first average grain size and a lower layer increases. Thus, the semiconductor device provided with high reliability and preventing connection failure is provided. [0018]
  • More preferably, the semiconductor device further includes a thin film layer formed on the conductive layer and having a material which is different from that of the conductive layer. [0019]
  • More preferably, the thin film layer includes titanium or silicon nitride. Then, the thin film layer can be used as a barrier layer or anti-reflection layer. [0020]
  • More preferably, the conductive layer includes aluminum. [0021]
  • More preferably, the semiconductor device further includes an insulating layer formed on the semiconductor substrate and a barrier layer formed on the insulating layer. The conductive layer is formed on the barrier layer. [0022]
  • Then, as the barrier layer is formed under the conductive layer, diffusion of atoms of the conductive layer can be prevented. [0023]
  • A semiconductor device according to another aspect of the present invention includes first, second and third conductive layers. The first conductive layer is formed on the semiconductor substrate and includes a polycrystal having a first average grain size. The second conductive layer is formed on the first conductive layer and includes a polycrystal having a second average grain size which is greater than the first average grain size. The third conductive layer is formed on the second conductive layer and includes a polycrystal having a third average grain size which is smaller than the second average grain size. [0024]
  • In the semiconductor device having such structure, as the average grain size of the third conductive layer formed on the second conductive layer is small, formation of a recess by a grain boundary in the third conductive layer is prevented. As there would be no space for residue caused by etching in the third conductive layer, a conductive material is not left at an unexpected portion. As a result, the semiconductor device provided with high reliability and preventing insulation failure is provided. [0025]
  • As a first average grain size of the first conductive layer formed on the semiconductor substrate is relatively small, adhesion with a lower layer is increased and connection failure can be prevented. [0026]
  • More preferably, a recess is formed in a surface of the second conductive layer by the grain boundary. A distance between side walls of the recess becomes small as closer to the semiconductor substrate. [0027]
  • Then, there would be no space for the residue caused by the etching in the third conductive layer covering the recess. As a result, the conductive material is not left at the unexpected portion, so that reliability of the semiconductor device is further increased. [0028]
  • More preferably, the semiconductor device further includes a thin film layer formed on the third conductive layer and having a material which is different from that of the third conductive layer. [0029]
  • More preferably, the thin film layer includes titanium or silicon nitride. Then, the thin film layer can be used as an anti-reflection film or barrier layer. [0030]
  • More preferably, the conductive layer includes aluminum. [0031]
  • More preferably, the semiconductor device includes an insulating layer formed on the semiconductor substrate and a barrier layer formed on the insulating layer. The conductive layer is formed on the barrier layer. [0032]
  • Then, as the barrier layer is formed under the conductive layer, diffusion of atoms of the conductive layer can be prevented. [0033]
  • A method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a conductive layer including a polycrystal on a semiconductor substrate. The conductive layer having a recess in its surface formed by a grain boundary. A distance between side walls of the recess becomes large as closer to the semiconductor substrate. The method of manufacturing the semiconductor device includes a step of forming the side walls such that a distance therebetween becomes small as closer to the semiconductor substrate. [0034]
  • In the method of manufacturing the semiconductor device having such structure, the side walls prevents formation of a space for the residue in the conductive layer. Thus, a conductive material is not left at an unexpected portion, so that the semiconductor device provided with high reliability and preventing insulation failure is provided. [0035]
  • More preferably, the step of forming the conductive layer includes a step of forming a first conductive layer at a first temperature on the semiconductor substrate, and a step of forming a second conductive layer having a recess at a second temperature which is higher than the first temperature on the first conductive layer. [0036]
  • As the first conductive layer is formed at the relatively low temperature, adhesion between the first conductive layer and a lower layer increases. As a result, the semiconductor device provided with high reliability and preventing connection failure is provided. [0037]
  • More preferably, the step of forming the second conductive layer includes a step of keeping the second conductive layer in the atmosphere at the second temperature after the second conductive layer is formed by sputtering at a temperature which is lower than the second temperature. [0038]
  • More preferably, the method of manufacturing the semiconductor device further includes a step of forming a thin film layer having a material which is different from that of the conductive layer on the conductive layer having the formed side walls. [0039]
  • More preferably, the method of manufacturing the semiconductor device further includes a step of forming an insulating layer on the semiconductor substrate and a step of forming a barrier layer on the insulating layer. The step of forming the conductive layer includes a step of forming a conductive layer on the barrier layer. [0040]
  • Then, as the barrier layer is formed under the conductive layer, diffusion of atoms of the conductive layer is prevented. [0041]
  • More preferably, the step of forming the side walls includes a step of sputter etching the conductive layer. [0042]
  • A method of manufacturing a semiconductor device according to another aspect of the present invention includes a step of forming a first conductive layer on a semiconductor substrate at a first temperature, a step of forming a second conductive layer on the first conductive layer at a second temperature higher than the first temperature, and a step of forming a third conductive layer on the second conductive layer at a third temperature lower than the second temperature. [0043]
  • In the method of manufacturing the semiconductor device having such structure, as the third conductive layer is formed at the relatively low temperature, formation of a recess in a surface of the third conductive layer by a grain boundary is prevented. Thus, there would be no space for a residue caused by the etching in the surface of the third conductive layer. As a result, any conductive material is not left at an unexpected portion, so that the semiconductor device provided with high reliability and preventing insulation failure is provided. [0044]
  • As the first conductive layer is formed at the relatively low temperature, adhesion with a lower layer increases. Thus, the semiconductor device provided with high reliability and preventing connection failure is provided. [0045]
  • Preferably, the step of forming the second conductive layer includes a step of forming a second conductive layer having in its surface a recess caused by the grain boundary, where a distance between side walls of the recess becomes large as closer to the semiconductor substrate. The method of manufacturing the semiconductor device further includes a step of forming the side walls such that the distance therebetween becomes small as closer to the semiconductor substrate. The step of forming the third conductive layer includes a step of forming the third conductive layer on the second conductive layer having the formed side walls. [0046]
  • As the side walls of the recess are thus formed, even when the third conductive layer is formed thereon, there would be no space for the residue caused by the etching in the third conductive layer. As a result, any conductive material is not left at the unexpected portion, so that the semiconductor device provided with higher reliability and preventing insulating failure is provided. [0047]
  • More preferably, the step of forming the side walls includes a step of sputter etching the conductive layer. [0048]
  • More preferably, the method of manufacturing the semiconductor device further includes a step of forming a thin film layer having a material which is different from that of the third conductive layer on the third conductive layer. [0049]
  • The step of forming the second conductive layer includes a step of keeping the second conductive layer in the atmosphere at the second temperature after the second conductive layer is formed by sputtering at a temperature lower than the second temperature. [0050]
  • More preferably, the method of manufacturing the semiconductor device further includes a step of forming an insulating layer on the semiconductor substrate and a step of forming a barrier layer on the insulating layer. The step of forming the conductive layer includes a step of forming a conductive layer on the barrier layer. Then, as the conductive layer is formed on the barter layer, diffusion of atoms of the conductive layer is prevented. [0051]
  • The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings. [0052]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1A is a schematic cross sectional view showing a semiconductor device according to a first embodiment of the present invention, and FIG. 1B is a partial cross sectional view showing in enlargement an opening in the semiconductor device according to the first embodiment of the present invention. [0053]
  • FIG. 2 is a cross sectional view showing a first step of a method of manufacturing the semiconductor device shown in FIG. 1. [0054]
  • FIG. 3 is a partial cross sectional view showing in enlargement a recess of the semiconductor device shown in FIG. 2. [0055]
  • FIGS. [0056] 4 to 7 are cross sectional views showing second to fifth steps of the method of manufacturing the semiconductor device shown in FIG. 1.
  • FIG. 8 is a cross sectional view showing a semiconductor device according to a second embodiment of the present invention. [0057]
  • FIGS. [0058] 9 to 12 are cross sectional views showing first to fourth steps of a method of manufacturing the semiconductor device shown in FIG. 8.
  • FIG. 13 is a cross sectional view showing a semiconductor device according to a third embodiment of the present invention. [0059]
  • FIGS. [0060] 14 to 17 are cross sectional views showing first to fourth steps of a method of manufacturing the semiconductor device shown in FIG. 13.
  • FIGS. [0061] 18 to 22 are cross sectional views showing first to fifth steps of a method of manufacturing a conventional semiconductor device.
    • DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Embodiments of the present invention will now be described with reference to the drawings. [0062]
  • First Embodiment [0063]
  • Referring to FIG. 1A, in a semiconductor device according to the present invention, an [0064] interlayer insulating film 2 is formed on a silicon substrate 1 as a semiconductor substrate. An interconnection layer 12 is formed on interlayer insulating film 2. Interconnection layer 12 includes: a titanium nitride film 3 as a barrier layer; a low-temperature aluminum layer (an aluminum layer formed at a low temperature) 4 as a first conductive layer; a high-temperature aluminum layer 5 as a second conductive layer; and an anti-reflection film 9 as a thin film layer having two layers of titanium and titanium nitride.
  • [0065] Titanium nitride film 3 has a thickness of about 100 nm. A thickness of low-temperature aluminum film 4 including polycrystalline aluminum is about 150 nm and has an average crystal grain size of about 0.5 μm. High-temperature aluminum film 5 is formed on low-temperature aluminum film 4. A thickness of high-temperature aluminum film is about 200 nm. High-temperature aluminum film 5 includes polycrystalline aluminum and has an average crystal grain size of about 1.5 μm. An opening 107 is formed as a recess in a surface of high-temperature aluminum film 5.
  • Referring to FIG. 1B, [0066] opening 7 is defined by grain boundaries of crystals 5 a to 5 c of aluminum. Opening 7 has a depth D of 20 nm, a diameter W1 at its upper portion of about 50 nm and a diameter W2 at its bottom portion of 30 nm. A distance between side walls 7 a and 7 b of opening 7 becomes small as closer to silicon substrate 1.
  • Now, a method of manufacturing the semiconductor device shown in FIG. 1 will be described. Referring to FIG. 2, an [0067] interlayer insulating film 2 is formed by CVD (Chemical Vapor Deposition) on a surface of silicon substrate 1. A titanium nitride film 3 is formed on interlayer insulating film 2 by PVD Physical Vapor Deposition).
  • A low-[0068] temperature aluminum film 4 is formed on titanium nitride film 3 by sputtering at a low temperature of about 100° C. High-temperature aluminum film 5 is formed on low-temperature aluminum film 4 by sputtering at a high temperature of about 400° C. Thereafter, high-temperature aluminum film 5 is cooled, and a recess 6 is formed in a surface thereof by crystal depression.
  • Referring to FIG. 3, [0069] recess 6 is formed by grain boundaries of crystals 5 a to 5 c of aluminum, that is, crystal grain boundaries of aluminum. Recess 6 is formed by depression of crystal 5 b of aluminum.
  • Returning to FIG. 2, the largest portion of [0070] recess 6 has a diameter W2, and a diameter at the surface of high-temperature aluminum film 5 is W3 (20 nm). A distance between side walls 6 a and 6 b of recess 6 becomes small as closer to silicon substrate 1.
  • Referring to FIG. 4, the surface of high-[0071] temperature aluminum film 5 is sputter etched using argon gas. Thus, opening 7 is formed by processing the side walls of recess 6. A distance between side walls 7 a and 7 b of opening 7 becomes small as doser to silicon substrate 1. A corner 7 c of opening 7 is arcuate in shape.
  • Referring to FIG. 5, an [0072] anti-reflection film 9 having two layers of titanium and titanium nitride is formed by PVD to cover high-temperature aluminum film 5.
  • Referring to FIG. 6, resist is applied onto [0073] anti-reflection film 9. After the resist is exposed to light, it is developed by developer to form a resist pattern 10.
  • Referring to FIG. 7, [0074] anti-reflection film 9, high-temperature aluminum film 5, low-temperature aluminum film 4 and titanium nitride film 3 are etched in accordance with resist pattern 10. Thus, an interconnection layer 12 is formed. Thereafter, resist pattern 10 is removed to complete the semiconductor device shown in FIG. 1.
  • According to the semiconductor device and manufacturing method thereof, first, [0075] side walls 7 a and 7 b of opening 7 are formed as shown in FIG. 4. As anti-reflection film 9 is formed over opening 7, any particular portion of anti-reflection film 9 would not have extremely small thickness. Thus, if the resist is developed in the step shown in FIG. 6, formation of a space for etch residue is prevented. As a result, etching in accordance with resist pattern 10 ensures that a conductive material is left exclusively under resist pattern 10 and the other portion would be free of the conductive material. Therefore, the semiconductor device is provided with higher reliability.
  • Low-[0076] temperature aluminum film 4 is formed on titanium nitride film 3. As low-temperature aluminum film 4 is provided with high adhesion with other layers, the semiconductor device provided with high reliability and preventing connection failure is achieved.
  • Second Embodiment [0077]
  • Referring to FIG. 8, [0078] silicon substrate 1, interlayer insulating film 2, titanium nitride film 3 and low-temperature aluminum film 4 are the same as those of the first embodiment.
  • A high-temperature aluminum-[0079] film 5 is formed on low-temperature aluminum film 4. High-temperature aluminum film 5 has an average grain size of 1.5 μm and a thickness of 200 nm. A recess 6 is formed in a surface of high-temperature aluminum film 5. A dimension of recess 6 is the same as that shown in FIG. 2.
  • Low-[0080] temperature aluminum film 21 is formed over recess 6. Low-temperature aluminum film 21 has a thickness of 100 nm and an average grain size of 0.1 μm. A distance between side walls 6 a and 6 b of recess 6 becomes small as closer to silicon substrate 1. An anti-reflection film 22 having two layers of titanium and titanium nitride is formed on low-temperature aluminum film 21.
  • Now, a method of manufacturing the semiconductor device shown in FIG. 8 will be described. Referring to FIG. 9, as in the first embodiment, an [0081] interlayer insulating film 2, titanium nitride film 3, low-temperature aluminum film 4 and high-temperature aluminum film 5 are formed on silicon substrate 1. Recess 6 is formed in the surface of high-temperature aluminum film 5.
  • Referring to FIG. 10, low-[0082] temperature aluminum film 21 is formed by sputtering at a temperature of about 100° C. An anti-reflection film 22 is formed on low-temperature aluminum film 21 by PVD.
  • Referring to FIG. 11, resist is applied onto [0083] anti-reflection film 22. After the resist is exposed to light, it is developed by a developer to form a resist pattern 23.
  • Referring to FIG. 12, [0084] anti-reflection film 22, low-temperature aluminum film 21, high-temperature aluminum film 5, low-temperature aluminum film 4 and titanium nitride film 3 are etched in accordance with resist pattern 23. Thus, an interconnection layer 25 is formed. Thereafter, resist pattern 23 is removed to complete the semiconductor device shown in FIG. 8.
  • According to the semiconductor device and manufacturing method thereof, low-[0085] temperature aluminum film 21 is formed in recess 6. As the average grain size of low-temperature aluminum film 21 is relatively small, it is unlikely that depression of a crystal is caused. Thus, even when anti-reflection film 22 is formed on low-temperature aluminum film 21, any portion of anti-reflection film 22 would not have a smaller thickness. Therefore, low-temperature aluminum film 21 would not be etched at the time of development of resist pattern 23, and there is not any space for the etch residue. In addition, insulation failure is prevented. As shown in FIG. 12, the conductive material is left exclusively under resist pattern 23, and the other portion would be free of conductive material. As a result, the semiconductor device with high reliability is achieved.
  • Low-[0086] temperature aluminum film 4 is formed on titanium nitride film 3. As low-temperature aluminum film 4 has high adhesion with other layers, connection failure is prevented. As a result, the semiconductor device with high reliability is achieved.
  • Third Embodiment [0087]
  • Referring to FIG. 13, an [0088] interlayer insulating film 2, titanium nitride film 3, low-temperature aluminum film 4 and high-temperature aluminum film 5 are formed on a silicon substrate 1. An opening 7 is formed in a surface of high-temperature aluminum film 5, and a distance between side walls 7 a and 7 b of opening 7 becomes small at closer to silicon substrate 1. Low-temperature aluminum film 31 is formed in opening 7.
  • An [0089] anti-reflection film 32 having two layers of titanium and titanium nitride is formed on low-temperature aluminum film 31. Titanium nitride film 3, low-temperature aluminum film 4, high-temperature aluminum film 5, low-temperature aluminum film 31 and anti-reflection film 32 comprise an interconnection layer 35.
  • Now, a method of manufacturing the semiconductor device shown in FIG. 13 will be described. Referring to FIG. 14, as in the steps shown in FIGS. 2 and 4 of the first embodiment, [0090] interlayer insulating film 2, titanium nitride film 3, low-temperature aluminum film 4 and high-temperature aluminum film 5 are formed on silicon substrate 1. Opening 7 is formed by sputter etching the surface of high-temperature aluminum film 5 by argon. The distance between side walls 7 a and 7 b of opening 7 becomes small as closer to silicon substrate 1.
  • Referring to FIG. 15, low-[0091] temperature aluminum film 31 is formed to cover opening 7 by sputtering at a temperature of about 100° C. Anti-reflection film 32 having two layers of titanium and titanium nitride is formed on low-temperature aluminum film 31 by CVD.
  • Referring to FIG. 16, resist is applied onto [0092] anti-reflection film 32. After the resist is exposed to light, it is developed by developer. Thus, a resist pattern 33 is formed.
  • Referring to FIG. 17, [0093] anti-reflection film 32, low-temperature aluminum film 31, high-temperature aluminum film 5, low-temperature aluminum film 4 and titanium nitride film 3 are etched in accordance with resist pattern 33 to form an interconnection layer 35. Thereafter, resist pattern 33 is removed to complete the semiconductor device shown in FIG. 13.
  • According to the semiconductor device and manufacturing method thereof, first, low-[0094] temperature aluminum film 31 is formed on high-temperature aluminum film 5 at a low temperature as shown in FIG. 15. As a crystal grain size of low-temperature aluminum film 31 is relatively small, it is unlikely that a recess is formed in low-temperature aluminum film 31. Recess 6 in the high-temperature aluminum film is processed to be tapered opening 7, so that a surface of low-temperature aluminum film 31 is almost planar. Accordingly, even when anti-reflection film 32 is formed on low-temperature aluminum film 31, any portion of anti-reflection film 32 would not have a smaller thickness. Therefore, low-temperature aluminum film 31 is not etched at the time of development of resist pattern 33, whereby formation of a space for the etch residue is prevented. As a result, a conductive material is left exclusively under resist pattern 33 and the other portions are substantially flee of the conductive material, as shown in FIG. 12. Therefore, the semiconductor device provided with high reliability and preventing connection failure is achieved.
  • As high-[0095] temperature aluminum film 4 with high adhesion with other material is formed on titanium nitride film 3, semiconductor device with high reliability and preventing connection failure is achieved.
  • Although the embodiments of the present invention have been described above, various modifications can be made to the embodiments. For example, in the above sputtering at the high temperature has been exemplified as a method of forming high-[0096] temperature aluminum film 5. However, the method is not limited to this and, for example, a so-called high temperature reflow method may be used in which an aluminum film is formed by sputtering at a low temperature of about 100° C. and the aluminum film is kept at a high temperature of about 400° C.
  • Although [0097] anti-reflection film 9 has been described as having two layers of titanium and titanium nitride, a silicon nitride film may be used as the anti-reflection film. Further, though aluminum has been described as the conductive material of the interconnection layer, copper or tungsten may be employed.
  • In some cases, a boundary between low temperature having [0098] aluminum film 4 and high-temperature aluminum film 5 is not clearly defined. Then, a portion of low-temperature aluminum film 4 that is closer to titanium nitride film 3 has a relatively small grain size, whereas the portion closer to high temperature having aluminum film 5 has a relatively large grain size.
  • Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims. [0099]

Claims (20)

What is claimed is:
1. A semiconductor device, comprising:
a semiconductor substrate; and
a conductive layer formed on said semiconductor substrate and including polycrystals, said conductive layer including in its surface a recess caused by a crystal grain boundary and having side walls formed such that a distance therebetween becomes small as closer to said semiconductor substrate.
2. The semiconductor device according to
claim 1
, wherein said conductive layer includes:
a first conductive layer formed on said semiconductor substrate and including a polycrystal having a first average grain size; and
a second conductive layer formed on said first conductive layer, including a polycrystal having a second average grain size greater than said first average grain size and having said recess.
3. The semiconductor device according to
claim 1
, further comprising a thin film layer formed on said conductive layer and having a material different from that of said conductive layer.
4. The semiconductor device according to
claim 1
, wherein said conductive layer includes aluminum.
5. The semiconductor device according to
claim 1
, further comprising an insulating layer formed on said semiconductor substrate and a barrier layer formed on said insulating layer, said conductive layer being formed on said barrier layer.
6. A semiconductor device, comprising:
a first conductive layer formed on a semiconductor substrate and including a polycrystal having a first average grain size;
a second conductive layer formed on said first conductive layer and including a polycrystal having a second average grain size greater than said first average grain size; and
a third conductive layer formed on said second conductive layer and including a polycrystal having a third average grain size smaller than said second average grain size.
7. The semiconductor device according to
claim 6
, wherein a recess is formed in a surface of said second conductive layer by a crystal grain boundary, and a distance between side walls of said recess becomes small as closer to said semiconductor substrate.
8. The semiconductor device according to
claim 6
, further comprising a thin film layer formed on said third conductive layer and having a material different from that said third conductive layer.
9. The semiconductor device according to
claim 6
, wherein said conductive layer includes aluminum.
10. The semiconductor device according to
claim 6
, further comprising an insulating layer formed on said semiconductor substrate and a barrier layer formed on said insulating layer, said conductive layer being formed on said barrier layer.
11. A method of manufacturing a semiconductor device, comprising the steps of:
forming a conductive layer including a polycrystal on a semiconductor substrate, said conductive layer having a recess in its surface formed by a crystal grain boundary, a distance between side walls of said recess becoming large as closer to said semiconductor substrate; and
processing said side walls of said recess such that the distance therebetween becomes small as closer to said semiconductor substrate.
12. The method of manufacturing the semiconductor device according to
claim 11
, wherein said step of forming said conductive layer includes the steps of:
forming a first conductive layer on said semiconductor substrate at a first temperature; and
forming a second conductive layer having said recess on said first conductive layer at a second temperature higher than said first temperature.
13. The method of manufacturing the semiconductor device according to
claim 11
, further comprising the step of forming a thin film layer having a material different from that of said conductive layer on said conductive layer having the processed side walls.
14. The method of manufacturing the semiconductor device according to
claim 11
, further comprising the step of forming an insulating layer on said semiconductor substrate and the step of forming a barrier layer on said insulating layer, said step of forming said conductive layer including the step of forming said conductive layer on said barrier layer.
15. The method of manufacturing the semiconductor device according to
claim 11
, wherein said step of processing said side walls includes the step of sputter etching said conductive layer.
16. A method of manufacturing a semiconductor device, comprising the steps of:
forming a first conductive layer on a semiconductor substrate at a first temperature;
forming a second conductive layer on said first conductive layer at a second temperature higher than said first temperature; and
forming a third conductive layer on said second conductive layer at a third temperature lower than said second temperature.
17. The method of manufacturing the semiconductor device according to
claim 16
, wherein said step of forming said second conductive layer includes the step of forming said second conductive layer with a recess formed in its surface by a crystal grain boundary and having side walls, a distance between said side walls becoming large as closer to said semiconductor substrate, said method further comprising the step of processing said side walls such that a distance therebetween becomes small as closer to said semiconductor substrate, and wherein
said step of forming said third conductive layer includes the step of forming said third conductive layer on said second conductive layer having said processed side walls.
18. The method of manufacturing the semiconductor device according to
claim 16
, wherein said step of processing said side walls further includes the step of sputter etching said conductive layer.
19. The method of manufacturing the semiconductor device according to
claim 16
, further comprising the step of forming a thin film layer having a material different from that of said third conductive layer on said third conductive layer.
20. The method of manufacturing the semiconductor device according to
claim 16
, further comprising the step of forming an insulating layer on said semiconductor substrate and the step of forming a barrier layer on said insulating layer, said step of forming said conductive layer including the step of forming said conductive layer on said barrier layer.
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