US20010004543A1 - Semiconductor processing method and trench isolation method - Google Patents
Semiconductor processing method and trench isolation method Download PDFInfo
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- US20010004543A1 US20010004543A1 US09/745,453 US74545300A US2001004543A1 US 20010004543 A1 US20010004543 A1 US 20010004543A1 US 74545300 A US74545300 A US 74545300A US 2001004543 A1 US2001004543 A1 US 2001004543A1
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- 238000002955 isolation Methods 0.000 title claims abstract description 34
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000003672 processing method Methods 0.000 title claims abstract description 7
- 239000000758 substrate Substances 0.000 claims abstract description 54
- 229910052751 metal Inorganic materials 0.000 claims abstract description 47
- 239000002184 metal Substances 0.000 claims abstract description 47
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 44
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims abstract description 38
- 239000000460 chlorine Substances 0.000 claims abstract description 38
- 229910052801 chlorine Inorganic materials 0.000 claims abstract description 38
- 238000000151 deposition Methods 0.000 claims abstract description 37
- 239000000126 substance Substances 0.000 claims abstract description 26
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 22
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- 238000007254 oxidation reaction Methods 0.000 claims abstract description 15
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- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 15
- 229910052760 oxygen Inorganic materials 0.000 claims description 15
- 239000001301 oxygen Substances 0.000 claims description 15
- 230000008021 deposition Effects 0.000 claims description 13
- 230000005587 bubbling Effects 0.000 claims description 9
- 239000001257 hydrogen Substances 0.000 claims description 9
- 229910052739 hydrogen Inorganic materials 0.000 claims description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 8
- 150000004045 organic chlorine compounds Chemical class 0.000 claims description 6
- UOCLXMDMGBRAIB-UHFFFAOYSA-N 1,1,1-trichloroethane Chemical compound CC(Cl)(Cl)Cl UOCLXMDMGBRAIB-UHFFFAOYSA-N 0.000 claims description 4
- WSLDOOZREJYCGB-UHFFFAOYSA-N 1,2-Dichloroethane Chemical group ClCCCl WSLDOOZREJYCGB-UHFFFAOYSA-N 0.000 claims description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical group CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 3
- 239000011800 void material Substances 0.000 claims description 3
- 238000000354 decomposition reaction Methods 0.000 claims description 2
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- 238000009279 wet oxidation reaction Methods 0.000 claims 1
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 3
- 235000012431 wafers Nutrition 0.000 description 15
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- 239000012634 fragment Substances 0.000 description 5
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- 230000002411 adverse Effects 0.000 description 3
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- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
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- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
Definitions
- This invention relates to semiconductor processing methods, such as trench isolation methods.
- semiconductor substrate is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials).
- substrate refers to any supporting structure, including, but not limited to, the semiconductor substrates described above.
- insulating materials such as silicon dioxide.
- One isolation technique uses shallow trench isolation, whereby trenches are cut into a substrate and are subsequently filled with an insulating material, such as, for example, silicon dioxide.
- shallow trench isolation shall refer to a distance of no greater than about 1 micron from an outermost surface of the substrate material within which an isolation region is received.
- Prior art methods for forming trench isolation regions typically initially deposit a pad oxide layer and a silicon nitride layer over a semiconductive substrate.
- the substrate typically comprises a monocrystalline silicon wafer lightly doped with a p-type background dopant material.
- a photoresist layer is deposited onto the silicon nitride, and is processed to define desired trench shaped openings within the photoresist over the silicon nitride. Suitable etching steps are then conducted to etch trenches through the silicon nitride and pad oxide layer into the bulk monocrystalline silicon substrate, thus defining trenches which will be utilized for isolating various active regions on the substrate.
- the photoresist is then stripped from the substrate, and the wafer is subjected to appropriate thermal oxidation conditions to oxide the substrate sidewalls within the trenches.
- appropriate thermal oxidation conditions to oxide the substrate sidewalls within the trenches.
- One purpose of this oxidation is to round the bottom corners of the trenches to reduce stress at these corners during subsequent processing.
- the trenches are typically filled with a dielectric material, such as by high density plasma chemical vapor deposition of an undoped oxide.
- a dielectric material such as by high density plasma chemical vapor deposition of an undoped oxide.
- Such deposition typically is conducted within a processing furnace having internal metal walls. Hence, some of the metal from these chamber walls gets displaced, and ends up being deposited in the oxide on the substrate.
- the metals typically include one or more of aluminum, molybdenum, iron or chromium. Contamination concentration is typically on the order of 1 ⁇ 10 11 atoms/cm 3 . Presence of these metals in the finished product adversely affects device performance, such as creating refresh problems in DRAM circuitry and otherwise adversely impacting leakage characteristics of transistors formed within the active areas.
- the high density plasma deposited oxide is typically not suitably dense as deposited. Accordingly in the prior art, it is subjected to a densification step at, for example, from about 800° C. to 1000°C. for 30 minutes in a chemically inert atmosphere. This causes the deposited oxide to densify and shrink to achieve desirable densification. Unfortunately, the deposited oxide and thermal oxide lining the trench sidewalls densify or shrink at different rates. This undesirably imparts stress into the deposited oxide layer and underlying substrate which also can have an adverse effect on the finished circuitry.
- the invention includes semiconductor processing methods, including trench isolation.
- an oxide layer is deposited over a substrate. The deposited oxide layer is exposed to a chlorine-containing gas effective to getter metals outwardly therefrom.
- a dielectric layer for example silicon dioxide, is plasma enhanced chemical vapor deposited over a substrate within a chamber comprising an internal metal surface under conditions effective to incorporate metal from the chamber surface within the dielectric layer. The dielectric layer is then exposed to a chlorine-containing gas effective to getter at least some of said metal outwardly therefrom.
- a trench isolation method comprises forming a series of isolation trenches into a semiconductive substrate.
- Silicon dioxide is chemical vapor deposited to within the trenches, with the silicon dioxide comprising metal impurity therein.
- the silicon dioxide within the trenches is densified using an atmosphere comprising chlorine which is effective to remove metal impurity from the silicon dioxide.
- some dielectric isolation material is chemical vapor deposited to within the trenches. After the chemical vapor deposition, the substrate is exposed to oxidation conditions effective to oxidize the trench sidewalls, with most preferably there having been no dedicated trench sidewall oxidation step conducted prior to the chemical vapor depositing.
- FIG. 1 is a diagrammatic sectional view of a semiconductor wafer fragment at one processing step in accordance with the invention.
- FIG. 2 is a view of the FIG. 1 wafer at a processing step subsequent to that shown by FIG. 1.
- FIG. 3 is a diagrammatic sectional view of an alternate embodiment semiconductor wafer fragment at a processing step in accordance with the invention.
- FIG. 4 is a view of the FIG. 3 wafer at a processing step subsequent to that shown by FIG. 3.
- FIG. 5 is a diagrammatic sectional view of another alternate embodiment semiconductor wafer fragment at a processing step in accordance with the invention.
- FIG. 6 is a view of the FIG. 5 wafer at a processing step subsequent to that shown by FIG. 5.
- a semiconductor wafer fragment in process in indicated generally with reference numeral 10 and comprises a bulk monocrystalline silicon substrate 12 .
- a series of isolation trenches 14 are formed into semiconductive substrate 12 .
- isolation trenches 14 have sidewalls 16 and a base wall 18 .
- a pad oxide layer 20 and silicon nitride layer 22 is formed over semiconductive substrate 12 , with trenches 14 having been cut therethrough.
- the substrate is then subjected to suitable oxidation conditions to thermally grow oxide layers 24 over or relative to trench sidewalls 16 and trench bases 18 .
- a dielectric layer 26 is deposited over substrate 12 to within trenches 14 .
- Preferred deposited material is undoped silicon dioxide deposited by high density plasma enhanced chemical vapor deposition.
- “undoped” is defined as having less than 0.1% molar of conductivity enhancing dopant therein.
- typical deposition conditions are unfortunately effective to remove metal from such sidewalls and incorporate such metal from the chamber surface to within deposited layer 26 .
- Undesired metal impurity might also be incorporated within layer 26 in some other manner, such as inherent in the deposition process independent of the type of chamber being utilized.
- Deposited dielectric layer 26 is exposed to a chlorine-containing gas (indicated by arrows 28 ) effective to getter metals, such as metal impurity, outwardly therefrom.
- the exposing also constitutes conditions effective to densify the deposited dielectric layer within the trenches to a more dense condition than the as-deposited state.
- the prior art dry/inert densification of the high density plasma deposited oxide layer is substituted with a densification process at least including a chlorine gas, and most preferably also constituting hydrogen and oxygen (i.e., H 2 and O 2 ) to provide wet densification conditions.
- the chlorine-containing gas can be provided to the substrate in any suitable manner, with a preferred method comprising bubbling a gas into an organic chlorine compound containing liquid and providing the bubbled gas to proximate the dielectric layer on the substrate within a chamber.
- Example preferred chlorine-containing compounds comprise dichloroethylene, trichloroethane, and HCl.
- Example specific chlorine precursors comprise Trans LCTM available from ADCS Inc. of Burnet, Tex., and TCATM available from the J. C. Schumacher Company of Oceanside, Calif. Gaseous metal chlorides are most likely formed from the chlorine containing gas and metals displaced from the deposited layer.
- the exposure and densification conditions preferably comprise from about 750° C. to about 1000° C. at a pressure greater than about 600 Torr, and most preferably at or around atmospheric pressure. Most preferably, the exposing and/or densification occurs prior to any deposition of any metal layer over the substrate to prevent the chlorine-containing gas from attacking such previously deposited metal.
- Example gases for bubbling through the organic chlorine compound containing liquid are inert gases, such as N 2 and Ar. More preferably, the gas bubbled into the liquid comprises an oxygen containing compound, such as O 2 and/or O 3 .
- Bubbling an oxygen containing compound gas through certain organic chlorine containing compound liquids can oxide material therein to produce CO 2 , H 2 O and Cl — , potentially making more chlorine available for gettering metal from the deposited dielectric layer.
- the chlorine-containing liquid precursor is preferably heated to a range from about 20° C. to about 30° C. during the bubbling, with the bubbling gas flow being at an exemplary rate from about 10 sccm to about 300 sccm for from about 5 minutes to 30 minutes.
- the preferred additional feed of H 2 and O 2 during the chlorine exposure and densification preferably ranges from about 1:1 to about 1:4, respectively by volume.
- FIGS. 3 and 4 Another embodiment in accordance with the invention is described with reference to FIGS. 3 and 4. Like numerals from the first described embodiment are utilized where appropriate, with differences being indicated with a suffix “a” or with different numerals.
- substrate 10 a With substrate 10 a , a series of isolation trenches 14 have been formed into semiconductive substrate 12 having initial sidewalls 16 and bases 18 .
- the dielectric isolation material layer 26 is chemical vapor deposited to within the trenches.
- the substrate is exposed to oxidizing conditions effective to oxidize trench sidewalls 18 and form oxidation layer 24 .
- processing of wafer 10 to this point has been void of any dedicated trench sidewall oxidation step prior to the chemical vapor depositing of layer 26 .
- Prior art processing in this regard has never before been understood to appreciably oxidize the sidewalls of isolation trenches after deposition of the trench-filling dielectric material.
- the isolation material is exposed to conditions effective to getter metal therefrom after the chemical vapor depositing of layer 26 , such as for example by utilizing a chlorine-containing gas in accordance with the first described embodiment.
- the exposing to getter and the exposing to oxidize the sidewalls occur in the same/common processing step, for example utilizing the processing and parameters as described above.
- a processing temperature of at least 950° C. (and preferably less than or equal to about 1100° C.) might be most desirable to assure achieving all of the sidewall oxidation, metal gettering, and densification of layer 26 .
- the preferred densification/sidewall oxidation after the dielectric layer deposition will also be wet, for example using added feed gases of H 2 and O 2 .
- a more H 2 rich ambient than the above described first embodiment is preferred, for example using a volumetric ratio of H 2 :O 2 from about 1.25:1 to 1:2.
- Sidewall oxide growth after deposition and during densification can relieve stress over the prior art, and may be used to possibly eliminate a separate processing step.
- Subsequent processing in accordance with the first and second described embodiments would typically include a suitable planarization step of layer 26 , and ultimate stripping of nitride layer 22 and pad oxide layer 20 to form the desired isolation trenches. Subsequent processing would form circuit devices and typically form doped and other oxide and dielectric layers over the substrate.
- FIG. 5 depicts a semiconductor wafer fragment 10 b comprised of a bulk monocrystalline silicon substrate 12 .
- An undoped oxide layer 40 has been deposited over substrate 12 .
- such layer might be deposited by decomposition of tetraethylorthosilicate (TEOS).
- TEOS tetraethylorthosilicate
- the deposited undoped oxide layer 40 is densified in a chlorine-containing atmosphere, such as that described above and under similar conditions, as depicted by arrows 28 .
- a doped oxide layer 42 is formed over undoped oxide layer 40 .
- An example material is borophosphosilcate glass (BPSG).
- BPSG borophosphosilcate glass
- After depositing doped oxide layer 40 it can be densified or otherwise exposed to a chlorine-containing atmosphere. Such processing might be utilizable apart from shallow trench isolation formation, such as relative to interlevel dielectric layer processing. Again however most preferably, no metal layer will have been deposited on the wafer prior to such chlorine atmosphere processing to avoid risk of attack of such metal by the chlorine atmosphere, even through previously deposited layers.
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Abstract
The invention includes semiconductor processing methods, including trench isolation. In one implementation, an oxide layer is deposited over a substrate. The deposited oxide layer is exposed to a chlorine containing gas effective to getter metals outwardly therefrom. In one implementation, a dielectric layer, for example silicon dioxide, is plasma enhanced chemical vapor deposited over a substrate within a chamber comprising an internal metal surface under conditions effective to incorporate metal from the chamber surface within the dielectric layer. The dielectric layer is then exposed to a chlorine containing gas effective to getter at least some of said metal outwardly therefrom. In one implementation, a trench isolation method comprises forming a series of isolation trenches into a semiconductive substrate. Silicon dioxide is chemical vapor deposited to within the trenches, with the silicon dioxide comprising metal impurity therein. The silicon dioxide within the trenches is densified using an atmosphere comprising chlorine which is effective to remove metal impurity from the silicon dioxide. In one implementation, some dielectric isolation material is chemical vapor deposited to within the trenches. After the chemical vapor deposition, the substrate is exposed to oxidation conditions effective to oxidize the trench sidewalls, with most preferably there having been no dedicated trench sidewall oxidation step conducted prior to the chemical vapor depositing.
Description
- This invention relates to semiconductor processing methods, such as trench isolation methods.
- Integrated circuitry is typically fabricated on and within semiconductor substrates, such as bulk monocrystalline silicon wafers. To aid in interpretation of the claims that follow, the term “semiconductor substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductor substrates described above.
- Electric components fabricated on substrates, and particularly bulk semiconductor wafers, are isolated from adjacent devices by insulating materials, such as silicon dioxide. One isolation technique uses shallow trench isolation, whereby trenches are cut into a substrate and are subsequently filled with an insulating material, such as, for example, silicon dioxide. In the context of this document, “shallow” shall refer to a distance of no greater than about 1 micron from an outermost surface of the substrate material within which an isolation region is received.
- Prior art methods for forming trench isolation regions typically initially deposit a pad oxide layer and a silicon nitride layer over a semiconductive substrate. The substrate typically comprises a monocrystalline silicon wafer lightly doped with a p-type background dopant material. A photoresist layer is deposited onto the silicon nitride, and is processed to define desired trench shaped openings within the photoresist over the silicon nitride. Suitable etching steps are then conducted to etch trenches through the silicon nitride and pad oxide layer into the bulk monocrystalline silicon substrate, thus defining trenches which will be utilized for isolating various active regions on the substrate.
- The photoresist is then stripped from the substrate, and the wafer is subjected to appropriate thermal oxidation conditions to oxide the substrate sidewalls within the trenches. One purpose of this oxidation is to round the bottom corners of the trenches to reduce stress at these corners during subsequent processing.
- After sidewall oxidation, the trenches are typically filled with a dielectric material, such as by high density plasma chemical vapor deposition of an undoped oxide. Such deposition typically is conducted within a processing furnace having internal metal walls. Apparently, some of the metal from these chamber walls gets displaced, and ends up being deposited in the oxide on the substrate. The metals typically include one or more of aluminum, molybdenum, iron or chromium. Contamination concentration is typically on the order of 1×1011 atoms/cm3. Presence of these metals in the finished product adversely affects device performance, such as creating refresh problems in DRAM circuitry and otherwise adversely impacting leakage characteristics of transistors formed within the active areas.
- The high density plasma deposited oxide is typically not suitably dense as deposited. Accordingly in the prior art, it is subjected to a densification step at, for example, from about 800° C. to 1000°C. for 30 minutes in a chemically inert atmosphere. This causes the deposited oxide to densify and shrink to achieve desirable densification. Unfortunately, the deposited oxide and thermal oxide lining the trench sidewalls densify or shrink at different rates. This undesirably imparts stress into the deposited oxide layer and underlying substrate which also can have an adverse effect on the finished circuitry.
- The invention includes semiconductor processing methods, including trench isolation. In one implementation, an oxide layer is deposited over a substrate. The deposited oxide layer is exposed to a chlorine-containing gas effective to getter metals outwardly therefrom. In one implementation, a dielectric layer, for example silicon dioxide, is plasma enhanced chemical vapor deposited over a substrate within a chamber comprising an internal metal surface under conditions effective to incorporate metal from the chamber surface within the dielectric layer. The dielectric layer is then exposed to a chlorine-containing gas effective to getter at least some of said metal outwardly therefrom. In one implementation, a trench isolation method comprises forming a series of isolation trenches into a semiconductive substrate. Silicon dioxide is chemical vapor deposited to within the trenches, with the silicon dioxide comprising metal impurity therein. The silicon dioxide within the trenches is densified using an atmosphere comprising chlorine which is effective to remove metal impurity from the silicon dioxide. In one implementation, some dielectric isolation material is chemical vapor deposited to within the trenches. After the chemical vapor deposition, the substrate is exposed to oxidation conditions effective to oxidize the trench sidewalls, with most preferably there having been no dedicated trench sidewall oxidation step conducted prior to the chemical vapor depositing.
- Preferred embodiments of the invention are described below with reference to the following accompanying drawings.
- FIG. 1 is a diagrammatic sectional view of a semiconductor wafer fragment at one processing step in accordance with the invention.
- FIG. 2 is a view of the FIG. 1 wafer at a processing step subsequent to that shown by FIG. 1.
- FIG. 3 is a diagrammatic sectional view of an alternate embodiment semiconductor wafer fragment at a processing step in accordance with the invention.
- FIG. 4 is a view of the FIG. 3 wafer at a processing step subsequent to that shown by FIG. 3.
- FIG. 5 is a diagrammatic sectional view of another alternate embodiment semiconductor wafer fragment at a processing step in accordance with the invention.
- FIG. 6 is a view of the FIG. 5 wafer at a processing step subsequent to that shown by FIG. 5.
- This disclosure of the invention is submitted in furtherance of the constitutional purposes of the U.S. Patent Laws “to promote the progress of science and useful arts” (Article 1, Section 8).
- Referring to FIG. 1, a semiconductor wafer fragment in process in indicated generally with
reference numeral 10 and comprises a bulkmonocrystalline silicon substrate 12. A series ofisolation trenches 14 are formed intosemiconductive substrate 12. As deposited,isolation trenches 14 havesidewalls 16 and abase wall 18. Apad oxide layer 20 andsilicon nitride layer 22 is formed oversemiconductive substrate 12, withtrenches 14 having been cut therethrough. The substrate is then subjected to suitable oxidation conditions to thermally growoxide layers 24 over or relative totrench sidewalls 16 andtrench bases 18. - Referring to FIG. 2, a
dielectric layer 26 is deposited oversubstrate 12 to withintrenches 14. Preferred deposited material is undoped silicon dioxide deposited by high density plasma enhanced chemical vapor deposition. In the context of this document, “undoped” is defined as having less than 0.1% molar of conductivity enhancing dopant therein. When deposited within a chamber comprising internal metal surfaces, typical deposition conditions are unfortunately effective to remove metal from such sidewalls and incorporate such metal from the chamber surface to within depositedlayer 26. Undesired metal impurity might also be incorporated withinlayer 26 in some other manner, such as inherent in the deposition process independent of the type of chamber being utilized. - Deposited
dielectric layer 26 is exposed to a chlorine-containing gas (indicated by arrows 28) effective to getter metals, such as metal impurity, outwardly therefrom. Most preferably, the exposing also constitutes conditions effective to densify the deposited dielectric layer within the trenches to a more dense condition than the as-deposited state. Accordingly, with the most preferred embodiment of the invention, the prior art dry/inert densification of the high density plasma deposited oxide layer is substituted with a densification process at least including a chlorine gas, and most preferably also constituting hydrogen and oxygen (i.e., H2 and O2) to provide wet densification conditions. The chlorine-containing gas can be provided to the substrate in any suitable manner, with a preferred method comprising bubbling a gas into an organic chlorine compound containing liquid and providing the bubbled gas to proximate the dielectric layer on the substrate within a chamber. Example preferred chlorine-containing compounds comprise dichloroethylene, trichloroethane, and HCl. Example specific chlorine precursors comprise Trans LC™ available from ADCS Inc. of Burnet, Tex., and TCA™ available from the J. C. Schumacher Company of Oceanside, Calif. Gaseous metal chlorides are most likely formed from the chlorine containing gas and metals displaced from the deposited layer. - The exposure and densification conditions preferably comprise from about 750° C. to about 1000° C. at a pressure greater than about 600 Torr, and most preferably at or around atmospheric pressure. Most preferably, the exposing and/or densification occurs prior to any deposition of any metal layer over the substrate to prevent the chlorine-containing gas from attacking such previously deposited metal. Example gases for bubbling through the organic chlorine compound containing liquid are inert gases, such as N2 and Ar. More preferably, the gas bubbled into the liquid comprises an oxygen containing compound, such as O2 and/or O3. Bubbling an oxygen containing compound gas through certain organic chlorine containing compound liquids can oxide material therein to produce CO2, H2O and Cl—, potentially making more chlorine available for gettering metal from the deposited dielectric layer. Regardless, the chlorine-containing liquid precursor is preferably heated to a range from about 20° C. to about 30° C. during the bubbling, with the bubbling gas flow being at an exemplary rate from about 10 sccm to about 300 sccm for from about 5 minutes to 30 minutes.
- The preferred additional feed of H2 and O2 during the chlorine exposure and densification preferably ranges from about 1:1 to about 1:4, respectively by volume.
- Another embodiment in accordance with the invention is described with reference to FIGS. 3 and 4. Like numerals from the first described embodiment are utilized where appropriate, with differences being indicated with a suffix “a” or with different numerals. With
substrate 10 a, a series ofisolation trenches 14 have been formed intosemiconductive substrate 12 havinginitial sidewalls 16 and bases 18. The dielectricisolation material layer 26 is chemical vapor deposited to within the trenches. - Referring to FIG. 4 and after the chemical vapor depositing, the substrate is exposed to oxidizing conditions effective to oxidize
trench sidewalls 18 andform oxidation layer 24. Most preferably, processing ofwafer 10 to this point has been void of any dedicated trench sidewall oxidation step prior to the chemical vapor depositing oflayer 26. Prior art processing in this regard has never before been understood to appreciably oxidize the sidewalls of isolation trenches after deposition of the trench-filling dielectric material. Preferably in accordance with the above-described first embodiment, the isolation material is exposed to conditions effective to getter metal therefrom after the chemical vapor depositing oflayer 26, such as for example by utilizing a chlorine-containing gas in accordance with the first described embodiment. Most preferably, the exposing to getter and the exposing to oxidize the sidewalls occur in the same/common processing step, for example utilizing the processing and parameters as described above. With high density plasma deposited oxide, a processing temperature of at least 950° C. (and preferably less than or equal to about 1100° C.) might be most desirable to assure achieving all of the sidewall oxidation, metal gettering, and densification oflayer 26. The preferred densification/sidewall oxidation after the dielectric layer deposition will also be wet, for example using added feed gases of H2 and O2. A more H2 rich ambient than the above described first embodiment is preferred, for example using a volumetric ratio of H2:O2 from about 1.25:1 to 1:2. Sidewall oxide growth after deposition and during densification can relieve stress over the prior art, and may be used to possibly eliminate a separate processing step. - Subsequent processing in accordance with the first and second described embodiments would typically include a suitable planarization step of
layer 26, and ultimate stripping ofnitride layer 22 andpad oxide layer 20 to form the desired isolation trenches. Subsequent processing would form circuit devices and typically form doped and other oxide and dielectric layers over the substrate. - Another alternate embodiment is described with references to FIGS. 5 and 6. Like numerals from the first-described embodiment have been utilized where appropriate, with differences being indicated by the suffix “b”, or with different numerals. FIG. 5 depicts a
semiconductor wafer fragment 10 b comprised of a bulkmonocrystalline silicon substrate 12. Anundoped oxide layer 40 has been deposited oversubstrate 12. By way of example only, such layer might be deposited by decomposition of tetraethylorthosilicate (TEOS). The depositedundoped oxide layer 40 is densified in a chlorine-containing atmosphere, such as that described above and under similar conditions, as depicted byarrows 28. - Referring to FIG. 6 and after the densifying, a doped
oxide layer 42 is formed overundoped oxide layer 40. An example material is borophosphosilcate glass (BPSG). After depositingdoped oxide layer 40, it can be densified or otherwise exposed to a chlorine-containing atmosphere. Such processing might be utilizable apart from shallow trench isolation formation, such as relative to interlevel dielectric layer processing. Again however most preferably, no metal layer will have been deposited on the wafer prior to such chlorine atmosphere processing to avoid risk of attack of such metal by the chlorine atmosphere, even through previously deposited layers. - In compliance with the statute, the invention has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the invention is not limited to the specific features shown and described, since the means herein disclosed comprise preferred forms of putting the invention into effect. The invention is, therefore, claimed in any of its forms or modifications within the proper scope of the appended claims appropriately interpreted in accordance with the doctrine of equivalents.
Claims (56)
1. A semiconductor processing method comprising:
depositing an oxide layer over a substrate; and
exposing the deposited oxide layer to a chlorine containing gas effective to getter metals outwardly therefrom.
2. The method of wherein the depositing comprises chemical vapor depositing.
claim 1
3. The method of wherein the exposing gas also comprises hydrogen and oxygen.
claim 1
4. The method of wherein the exposing comprises a temperature from about 750° C. to about 1000° C.
claim 1
5. The method of wherein the exposing comprises a pressure greater than about 600 Torr.
claim 1
6. The method of wherein the exposing occurs prior to any deposition of any metal layer over the substrate.
claim 1
7. The method of wherein the exposing comprises bubbling a gas into an organic chlorine compound containing liquid and providing the bubbled gas proximate the oxide layer.
claim 1
8. The method of wherein the gas bubbled into the liquid comprises an oxygen containing compound.
claim 7
9. The method of wherein the gas bubbled into the liquid comprises O2.
claim 7
10. The method of wherein the chlorine containing compound comprises a dichloroethylene.
claim 7
11. The method of wherein the chlorine containing compound comprises a trichloroethane.
claim 7
12. The method of wherein the chlorine containing compound comprises HCl.
claim 7
13. A semiconductor processing method comprising:
depositing an undoped oxide layer over a substrate;
densifying the deposited undoped oxide layer in a chlorine containing atmosphere; and
after said densifying, forming a doped oxide layer over the undoped oxide layer.
14. The method of wherein the undoped and doped oxide layers are formed by chemical vapor depositing.
claim 13
15. The method of wherein the undoped oxide layer is deposited by decomposition of TEOS and the doped oxide layer comprises BPSG.
claim 13
16. The method of comprising, after depositing the doped oxide layer, densifying the doped oxide layer in a chlorine containing atmosphere.
claim 13
17. The method of wherein the densifying atmosphere also comprises hydrogen and oxygen.
claim 13
18. The method of wherein the densifying occurs prior to any deposition of any metal layer over the substrate.
claim 13
19. The method of wherein the densifying comprises bubbling a gas into an organic chlorine compound containing liquid and providing the bubbled gas proximate the oxide layer.
claim 13
20. The method of wherein the gas bubbled into the liquid comprises an oxygen containing compound.
claim 19
21. The method of wherein the gas bubbled into the liquid comprises O2.
claim 19
22. The method of wherein the chlorine containing compound comprises a dichloroethylene.
claim 19
23. The method of wherein the chlorine containing compound comprises a trichloroethane.
claim 19
24. The method of wherein the chlorine containing compound comprises HCl.
claim 19
25. A semiconductor processing method comprising:
plasma enhanced chemical vapor depositing a dielectric layer over a substrate within a chamber comprising an internal metal surface under conditions effective to incorporate metal from the chamber surface within the dielectric layer; and
exposing the dielectric layer to a chlorine containing gas effective to getter at least some of said metal outwardly therefrom.
26. The method of wherein the exposing gas also comprises hydrogen and oxygen.
claim 25
27. The method of wherein the exposing comprises a temperature from about 750° C. to about 1000° C.
claim 25
28. The method of wherein the exposing occurs prior to any deposition of any metal layer over the substrate.
claim 25
29. The method of wherein the exposing comprises bubbling a gas into an organic chlorine compound containing liquid and providing the bubbled gas proximate the oxide layer.
claim 25
30. The method of wherein the gas bubbled into the liquid comprises an oxygen containing compound.
claim 29
31. The method of wherein the gas bubbled into the liquid comprises O2.
claim 29
32. A trench isolation method comprising:
forming a series of isolation trenches into a semiconductive substrate;
chemical vapor depositing silicon dioxide to within the trenches, the silicon dioxide comprising metal impurity therein; and
densifying the silicon dioxide within the trenches using an atmosphere comprising chlorine which is effective to remove metal impurity from the silicon dioxide.
33. The method of wherein the exposing gas also comprises hydrogen and oxygen.
claim 32
34. The method of wherein the exposing comprises a temperature from about 750° C. to about 1000° C.
claim 32
35. The method of wherein the exposing comprises a pressure greater than about 600 Torr.
claim 32
36. The method of wherein the exposing occurs prior to any deposition of any metal layer over the substrate.
claim 32
37. The method of wherein the densifying occurs prior to any removal of the silicon dioxide layer from over the substrate after its deposition.
claim 32
38. The method of wherein the exposing comprises bubbling a gas into an organic chlorine compound containing liquid and providing the bubbled gas proximate the oxide layer.
claim 32
39. The method of wherein the gas bubbled into the liquid comprises an oxygen containing compound.
claim 38
40. The method of wherein the gas bubbled into the liquid comprises O2.
claim 38
41. The method of wherein the chlorine containing compound comprises a dichloroethylene.
claim 38
42. The method of wherein the chlorine containing compound comprises a trichloroethane.
claim 38
43. The method of wherein the chlorine containing compound comprises HCl.
claim 38
44. A trench isolation method comprising:
forming a series of isolation trenches into a semiconductive substrate, the isolation trenches having sidewalls;
chemical vapor depositing dielectric isolation material to within the trenches; and
after the chemical vapor depositing, exposing the substrate to oxidation conditions effective to oxidize the trench sidewalls.
45. The method of being void of any dedicated trench sidewall oxidation step prior to the chemical vapor depositing.
claim 44
46. The method of wherein the exposing occurs prior to any removal of the dielectric isolation material from over the substrate after its deposition.
claim 44
47. The method of further comprising after the chemical vapor depositing, exposing the isolation material to conditions effective to getter metal therefrom.
claim 44
48. The method of wherein the exposing to getter and the exposing to oxidize occur in a common processing step.
claim 47
49. The method of wherein the chemical vapor depositing comprises plasma enhanced chemical vapor depositing a dielectric layer over the substrate within a chamber comprising an internal metal surface under conditions effective to incorporate metal from the chamber surface within the dielectric layer, and further comprising after the chemical vapor depositing, exposing the isolation material to conditions effective to getter metal therefrom.
claim 44
50. The method of wherein the exposing to getter and the exposing to oxidize occur in a common processing step.
claim 49
51. The method of wherein the exposing gas comprises hydrogen and oxygen.
claim 49
52. The method of wherein the exposing gas comprises chlorine, hydrogen and oxygen.
claim 49
53. The method of wherein the exposing gas comprises chlorine, hydrogen and oxygen.
claim 49
54. The method of wherein the exposing comprises a temperature of at least about 950° C.
claim 49
55. A trench isolation method comprising:
forming a series of isolation trenches into a semiconductive substrate, the isolation trenches having sidewalls;
plasma enhanced chemical vapor depositing a silicon dioxide layer over the substrate to within the trenches within a chamber comprising an internal metal surface under conditions effective to incorporate metal from the chamber surface within the silicon dioxide layer; and
after the chemical vapor depositing and in a common processing step, exposing the substrate to wet oxidation conditions comprising hydrogen, oxygen and chlorine gases and a temperature of at least about 950° C. effective to both oxidize the trench sidewalls and to getter metal outwardly from the deposited silicon dioxide layer, with the method being void of any dedicated trench sidewall oxidation step prior to the chemical vapor depositing.
56. The method of wherein the exposing occurs prior to any removal of the silicon dioxide layer from over the substrate after its deposition.
claim 55
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US09/745,453 US6391738B2 (en) | 1998-07-22 | 2000-12-20 | Semiconductor processing method and trench isolation method |
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US12071498A | 1998-07-22 | 1998-07-22 | |
US09/745,453 US6391738B2 (en) | 1998-07-22 | 2000-12-20 | Semiconductor processing method and trench isolation method |
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TW389999B (en) * | 1995-11-21 | 2000-05-11 | Toshiba Corp | Substrate having shallow trench isolation and method of manufacturing the same |
US5811346A (en) * | 1997-04-14 | 1998-09-22 | Vlsi Technology, Inc. | Silicon corner rounding in shallow trench isolation process |
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US6271153B1 (en) | 2001-08-07 |
US6391738B2 (en) | 2002-05-21 |
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