US11417802B2 - Method of making a light emitting device and light emitting device made thereof - Google Patents

Method of making a light emitting device and light emitting device made thereof Download PDF

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US11417802B2
US11417802B2 US16/800,885 US202016800885A US11417802B2 US 11417802 B2 US11417802 B2 US 11417802B2 US 202016800885 A US202016800885 A US 202016800885A US 11417802 B2 US11417802 B2 US 11417802B2
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electrode
light
emitting device
region
barrier layer
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US20200243720A1 (en
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Jar-Yu WU
Ching-Jang Su
Chun-Lung Tseng
Ching-Hsing Shen
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Epistar Corp
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Epistar Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/42—Transparent materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0025—Processes relating to coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004—Devices characterised by their operation
    • H01L33/002—Devices characterised by their operation having heterojunctions or graded gap

Definitions

  • the present disclosure relates to a method of making a light-emitting device and in particular to a method of etching a protective layer.
  • the light-emitting diodes (LEDs) of the solid-state lighting elements have the characteristics of the low power consumption, low heat generation, long operational life, shockproof, small volume, quick response and good opto-electrical property like light emission with a stable wavelength so the LEDs have been widely used in household appliances, indicator light of instruments, and opto-electrical products, etc.
  • the method of making a light-emitting diode comprises many lithography processes and each of the processes comprises complicated steps. How to reduce the steps of processes and decrease the cost is an important issue.
  • light-emitting diodes can be further combined with a sub-mount to form a light emitting device, such as a bulb.
  • the light-emitting device comprises a sub-mount with circuit; a solder on the sub-mount fixing the light-emitting diode on the sub-mount and electrically connecting the base of the light-emitting diode and the circuit of the sub-mount; and an electrical connection structure electrically connecting the electrode pad of the light-emitting diode and the circuit of the sub-mount; wherein the above sub-mount can be a lead frame or a large size mounting substrate for designing circuit of the light-emitting device and improving its heat dissipation.
  • a light-emitting device includes: a semiconductor stack, including a top surface, wherein the top surface includes a first region and a second region which are coplanar; a current barrier layer formed on the first region, wherein the current barrier layer includes an insulating material; and a transparent conductive layer formed on the current barrier layer and the second region; and a first electrode formed on the transparent conductive layer; wherein the current barrier layer includes: an electrode region at a position corresponding to the first electrode, having a shape substantially the same as the first electrode; and a plurality of extension regions extending from the electrode region and not covered by the first electrode.
  • FIGS. 1A-1H show a cross-sectional view of a method of manufacturing a light-emitting device in accordance with an embodiment of the present disclosure.
  • FIG. 2A shows a light-emitting device in accordance with an embodiment according to the manufacturing method of the present disclosure.
  • FIG. 2B shows a partial enlarged drawing of FIG. 2A .
  • FIGS. 3A-3C show top views of light-emitting devices in accordance with embodiments of the present disclosure.
  • FIG. 4 shows an exploded drawing of a bulb in accordance with an embodiment of the present disclosure.
  • FIGS. 1A-1G show figures of a method of manufacturing a light-emitting device 100 in accordance with an embodiment of the present disclosure.
  • a substrate 10 a is provided and a light-emitting structure 11 is formed on the substrate 10 a .
  • the substrate 10 a is a sapphire wafer substrate.
  • the light-emitting structure 11 sequentially comprises a first type semiconductor layer 111 , an active layer 112 , and a second semiconductor layer 113 on the substrate.
  • the first type semiconductor layer 111 and the second semiconductor layer 122 can be a cladding layer or a confinement layer separately provides an electron and a hole to be combined with each other in the active layer 112 and emits a light.
  • FIG. 1B etching the active layer 112 and the second type semiconductor layer 113 to from a plurality of light-emitting structures 1000 .
  • a plurality of the light-emitting structures 1000 are spaced arranged on the substrate 10 a and expose a part of the first semiconductor layer 111 .
  • the light-emitting device 100 is a horizontal type structure but can also be a vertical type structure or other type structure.
  • a protection layer 12 is formed to cover the first type semiconductor layer 111 , the active layer 112 , the second type semiconductor layer 113 and the substrate 10 a .
  • the protective layer 12 has a first thickness t 1 and is configured to protect the light-emitting structure 11 during the following etching process.
  • the first thickness t 1 is between 3300-10000 ⁇ .
  • a laser is applied to cut the substrate 10 to form a trench 16 in the substrate 10 , wherein the cross section of the trench 16 is a triangle.
  • byproducts are generated when using a laser to cut the substrate 10 , and an etching step is applied to remove the byproducts.
  • the protective layer 12 is also etched while etching the byproducts. Therefore, as shown in FIG. 1E , the protective layer 120 has a second thickness t 2 between 3000-9700 ⁇ after etching the byproducts and the second thickness t 2 is less than the first thickness t 1 .
  • the difference between the first thickness t 1 and the second thickness t 2 is larger than 300 ⁇ .
  • the method of etching the byproducts and etching the protective layer 12 at the same time comprises using an acidic solution to etch the byproducts and the protective layer 12 .
  • the acidic solution comprises a mixture solution of a phosphoric acid solution and a sulfuric acid solution, wherein a ratio between the sulfuric acid and the phosphoric acid is about 3:1.
  • the acidic solution is a phosphoric acid solution.
  • the protective layer 120 is patterned to be a patterned protective layer 121 .
  • the patterned protective layer 121 is also configured to be a current barrier layer 121 . As shown in FIG.
  • a transparent conductive layer 13 is formed on the barrier layer 121 and the second semiconductor layer 113 .
  • a first electrode 14 is formed on the transparent conductive layer 13 at the position corresponding to the barrier layer 121 and a second electrode 15 is formed on the first type semiconductor layer 111 .
  • the protective layer 121 or the barrier layer 121 is an insulating material and has a transmittance larger than 90%.
  • the barrier layer 121 has a resistance larger than 10 14 ⁇ -cm.
  • the barrier layer 121 comprises silicon oxide (SiO 2 ), silicon nitride (SiN x ) or titanium dioxide (TiO 2 ). Then, splitting the light-emitting structure 1000 along the trench 16 to form a plurality of light-emitting devices 100 .
  • FIG. 2A shows a light-emitting device 100 based on the method described in FIGS. 1A-1H .
  • FIG. 2B shows a partial enlarged drawing of FIG. 2A .
  • the light-emitting structure 11 is formed on the substrate 10 b .
  • the light-emitting structure 11 sequentially comprises a first type semiconductor layer 111 , an active layer 112 , and a second type semiconductor layer 113 .
  • the second type semiconductor layer 113 comprises a first region 1131 and a second region 1132 .
  • a barrier layer 121 is formed on the first region 1131 and has a lower surface 1211 and a side wall 1212 which is inclined against the lower surface 1211 and an angle ( ⁇ ) between the sidewall and the bottom surface is between 10°-70°.
  • a transparent conductive layer 13 is formed on the side wall 1212 of the barrier layer 121 and has a third thickness (t 3 ); the transparent conductive layer 13 is also formed on the second region 1132 of the second semiconductor layer 113 and has a fourth thickness (t 4 ). Since the angle ( ⁇ ) between the sidewall 1212 and the lower surface 121 is less than 70°, the transparent conductive layer 13 can cover the side wall 1212 of the barrier layer 121 and the second region 1132 of the second semiconductor layer 113 uniformly.
  • a difference (t 3 ⁇ t 4 ) between the thickness of the transparent conductive layer 13 formed on the sidewall 1212 of the barrier layer 121 and the thickness of the transparent conductive layer 13 formed on the second region 1132 of the second semiconductor layer 113 and the thickness (t 3 ) of the transparent conductive layer 13 formed on the side wall 1212 of the barrier layer 121 forms a ratio ((t 3 ⁇ t 4 )/t 3 ) less than 10%.
  • a trench 16 of a triangular shape (referring to FIG. 1D ) is formed in the substrate 10 a when applying a laser, an inclined sidewall 101 of the substrate 10 b is formed while splitting the light-emitting structures 1000 to form a light-emitting device 100 .
  • the inclined sidewall 101 is inclined against an upper surface 102 of the substrate 10 b and an angle between the inclined sidewall 101 and the upper surface 102 of the upper surface 102 is larger than 90°. Moreover, an acidic solution is used to remove the byproducts generated by laser cutting after the inclined sidewall 101 is cut by laser so that the inclined sidewall 101 has a rough surface.
  • FIGS. 3A-3C show top views of light-emitting devices 100 , 100 ′ and 100 ′′.
  • the light-emitting device 100 , 100 ′ or 100 ′′ has a rectangular shape and has a first side 104 , a second side 105 , a third side 106 , and a fourth side 107 .
  • the light-emitting device 100 has a first electrode 14 near the first side 104 and the first electrode 14 is formed at the position on the transparent conductive layer 13 opposing to the barrier layer 121 .
  • the first electrode 14 has a shape substantially the same as that of the barrier layer 121 .
  • the first electrode 14 comprises a first electrode pad 141 and a plurality of first extended electrodes 142 extending from the first electrode pad 141 .
  • the area of the barrier layer 121 is larger than the area of the electrode pad 141 and the extended electrode 142 .
  • the light-emitting device 100 further comprises a second electrode 15 near the second side 105 opposing to the first side 104 .
  • the second electrode 15 comprises a second electrode pad 151 and a second extended electrode 152 extending to the first side 104 while a first extended electrode 142 extends from the first electrode pad 141 to the second electrode pad 151 (in a direction toward the second side 105 ).
  • the first electrode pad 141 can also be placed at a corner near the first side 104 and the third side 106
  • the second electrode pad 151 can also be placed at a corner near the second side 105 and the fourth side 107
  • the second extended electrode 152 extends toward the first electrode pad 141 .
  • the light-emitting device 100 ′ comprises a first electrode 14 ′ and a second electrode 15 ′.
  • the first electrode 14 ′ comprises a first electrode pad 141 ′ and a first extended electrode 142 ′.
  • the second electrode 15 ′ comprises a second electrode pad 151 ′.
  • the first extended electrode 142 ′ extends in a direction from the first electrode pad 141 ′ to the second electrode pad 151 ′.
  • a barrier layer 121 comprises an electrode region 1215 , a plurality of first extension regions 1213 , and a plurality of second extension regions 1214 .
  • the electrode region 1215 of the barrier layer 121 is formed on the region corresponding to the region of the first electrode 14 ′ and has a shape substantially the same as the first electrode 14 ′ and an area larger than that of the first electrode 14 ′.
  • the first extension region 1213 extends from the electrode region 1215 (the first electrode pad 141 ′ and the first extend electrode 142 ′) to the side wall (the third side 106 and the fourth side 107 ).
  • four second extension regions 1214 extend forward (in a direction to the first side 104 ) and backward (in a direction to the second side 105 ) form the electrode region 1215 (the first electrode pad 141 ′ and the first extend electrode 142 ′).
  • the first electrode 14 ′ is not formed on the first extension region 1213 and the second extension region 1214 .
  • the light-emitting device 100 ′′ comprises a first electrode 14 ′′ and a second electrode 15 ′′.
  • the first electrode 14 ′′ comprises a first electrode pad 141 ′′ and a first extended electrode 142 ′′.
  • the second electrode 15 ′′ comprises a second electrode pad 151 ′′.
  • the first extended electrode 142 ′′ extends in a direction from the first electrode pad 141 ′′ to the second electrode pad 151 ′′.
  • a barrier layer 121 comprises an electrode region 1215 ′ and a plurality of extension regions 1213 ′.
  • the electrode region 1215 ′ of the barrier layer 121 is formed on the region corresponding to that of the first electrode 14 ′′ and has a shape substantially the same as the first electrode 14 ′′ and an area larger than that of the first electrode 14 ′′.
  • a plurality of extension regions 1213 ′ extends from the electrode region 1215 ′ (the first electrode pad 141 ′′ and the first extend electrode 142 ′′) to four sides ( 104 , 105 , 106 , and 107 ) at an angle of 45°.
  • the first electrode 14 ′′ is not formed on the extension region 1213 ′.
  • the first type semiconductor layer can be an n-type semiconductor and the second type semiconductor layer can be a p-type semiconductor.
  • the first type semiconductor layer and the second semiconductor layer comprise AlGaAs, AlGaInP, AlInP, InGaP, AlInGaN, InGaN, AlGaN and GaN.
  • the first type semiconductor layer can be a p-type semiconductor layer and the second type semiconductor layer can be an n-type semiconductor layer.
  • the active layer comprises AlGaAs, AlGaInP, InGaP, AlInP, AlInGaN, InGaN, AlGaN and GaN.
  • the active layer can be a single heterostructure (SH), a double-side double heterostructure (DDH) or a multi-quantum well (MQW) structure.
  • the substrate comprises GaAs, GaP, Ge, sapphire, glass, diamond, SiC, Si, GaN, and ZnO or other substitution material.
  • FIG. 4 shows an exploded drawing of a bulb 30 in accordance with an embodiment of the present disclosure.
  • the bulb 30 comprises a cover 21 , a lens 22 , a light emitting module 24 , a substrate 25 , a heat-dissipation element 26 , a connection element 27 , and a circuit element 28 .
  • the light emitting module 24 comprises a carrier 23 and a plurality of light-emitting devices.
  • the light-emitting device can be any of the light-emitting device 100 ( 100 ′ and 100 ′′) mentioned above. As shown in FIG.
  • the blue light light-emitting device comprises a phosphor device formed above to convert the light emitted from the blue light light-emitting device.
  • the light emitted by the blue light light-emitting device and the converted light are mixed to be a white light which is matched with a red light light-emitting device to emit a warm white light having a color temperature between 2400-3000K.

Abstract

A light-emitting device, includes: a semiconductor stack, including a top surface, wherein the top surface includes a first region and a second region which are coplanar; a current barrier layer formed on the first region, wherein the current barrier layer includes an insulating material; and a transparent conductive layer formed on the current barrier layer and the second region; and a first electrode formed on the transparent conductive layer; wherein the current barrier layer includes: an electrode region at a position corresponding to the first electrode, having a shape substantially the same as the first electrode; and a plurality of extension regions extending from the electrode region and not covered by the first electrode.

Description

RELATED APPLICATION
This application a continuation application of U.S. patent application Ser. No. 15/703,649, entitled “METHOD OF MAKING A LIGHT EMITTING DEVICE HAVING A PATTERNED PROTECTIVE LAYER”, filed on Sep. 13, 2017, which is a continuation application of U.S. patent application Ser. No. 15/240,264, entitled “LIGHT EMITTING DEVICE”, filed on Aug. 18, 2016, now U.S. Pat. No. 9,786,815, which is a continuation application of U.S. patent application Ser. No. 14/098,643, entitled “LIGHT EMITTING DEVICE”, filed on Dec. 6, 2013, now U.S. Pat. No. 9,425,362, which claims priority from previously filed Taiwan Patent Application No. 101146337 filed on Dec. 7, 2012, entitled as “METHOD OF MAKING A LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE MADE THEREOF”, and the entire contents of which are hereby incorporated by reference herein in its entirety.
BACKGROUND Technical Field
The present disclosure relates to a method of making a light-emitting device and in particular to a method of etching a protective layer.
Description of the Related Art
The light-emitting diodes (LEDs) of the solid-state lighting elements have the characteristics of the low power consumption, low heat generation, long operational life, shockproof, small volume, quick response and good opto-electrical property like light emission with a stable wavelength so the LEDs have been widely used in household appliances, indicator light of instruments, and opto-electrical products, etc.
Generally speaking, the method of making a light-emitting diode comprises many lithography processes and each of the processes comprises complicated steps. How to reduce the steps of processes and decrease the cost is an important issue.
Besides, light-emitting diodes can be further combined with a sub-mount to form a light emitting device, such as a bulb. The light-emitting device comprises a sub-mount with circuit; a solder on the sub-mount fixing the light-emitting diode on the sub-mount and electrically connecting the base of the light-emitting diode and the circuit of the sub-mount; and an electrical connection structure electrically connecting the electrode pad of the light-emitting diode and the circuit of the sub-mount; wherein the above sub-mount can be a lead frame or a large size mounting substrate for designing circuit of the light-emitting device and improving its heat dissipation.
SUMMARY OF THE DISCLOSURE
A light-emitting device, includes: a semiconductor stack, including a top surface, wherein the top surface includes a first region and a second region which are coplanar; a current barrier layer formed on the first region, wherein the current barrier layer includes an insulating material; and a transparent conductive layer formed on the current barrier layer and the second region; and a first electrode formed on the transparent conductive layer; wherein the current barrier layer includes: an electrode region at a position corresponding to the first electrode, having a shape substantially the same as the first electrode; and a plurality of extension regions extending from the electrode region and not covered by the first electrode.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1A-1H show a cross-sectional view of a method of manufacturing a light-emitting device in accordance with an embodiment of the present disclosure.
FIG. 2A shows a light-emitting device in accordance with an embodiment according to the manufacturing method of the present disclosure.
FIG. 2B shows a partial enlarged drawing of FIG. 2A.
FIGS. 3A-3C show top views of light-emitting devices in accordance with embodiments of the present disclosure.
FIG. 4 shows an exploded drawing of a bulb in accordance with an embodiment of the present disclosure.
 DETAILED DESCRIPTION OF THE EMBODIMENTS
The drawings illustrate the embodiments of the application and, together with the description, serve to illustrate the principles of the application. The same name or the same reference number given or appeared in different paragraphs or figures along the specification should has the same or equivalent meanings while it is once defined anywhere of the disclosure. The thickness or the shape of an element in the specification can be expanded or narrowed. It is noted that the elements not drawn or described in the figure can be included in the present application by the skilled person in the art.
FIGS. 1A-1G show figures of a method of manufacturing a light-emitting device 100 in accordance with an embodiment of the present disclosure.
As shown in FIG. 1A, a substrate 10 a is provided and a light-emitting structure 11 is formed on the substrate 10 a. In this embodiment, the substrate 10 a is a sapphire wafer substrate. The light-emitting structure 11 sequentially comprises a first type semiconductor layer 111, an active layer 112, and a second semiconductor layer 113 on the substrate. The first type semiconductor layer 111 and the second semiconductor layer 122 can be a cladding layer or a confinement layer separately provides an electron and a hole to be combined with each other in the active layer 112 and emits a light. As shown in FIG. 1B, etching the active layer 112 and the second type semiconductor layer 113 to from a plurality of light-emitting structures 1000. A plurality of the light-emitting structures 1000 are spaced arranged on the substrate 10 a and expose a part of the first semiconductor layer 111. Besides, the light-emitting device 100 is a horizontal type structure but can also be a vertical type structure or other type structure. As shown in FIG. 1C, a protection layer 12 is formed to cover the first type semiconductor layer 111, the active layer 112, the second type semiconductor layer 113 and the substrate 10 a. The protective layer 12 has a first thickness t1 and is configured to protect the light-emitting structure 11 during the following etching process. In this embodiment, the first thickness t1 is between 3300-10000 Å. As shown in FIG. 1D, a laser is applied to cut the substrate 10 to form a trench 16 in the substrate 10, wherein the cross section of the trench 16 is a triangle. It is noted that byproducts are generated when using a laser to cut the substrate 10, and an etching step is applied to remove the byproducts. However, the protective layer 12 is also etched while etching the byproducts. Therefore, as shown in FIG. 1E, the protective layer 120 has a second thickness t2 between 3000-9700 Å after etching the byproducts and the second thickness t2 is less than the first thickness t1. The difference between the first thickness t1 and the second thickness t2 is larger than 300 Å. In this embodiment, the method of etching the byproducts and etching the protective layer 12 at the same time comprises using an acidic solution to etch the byproducts and the protective layer 12. The acidic solution comprises a mixture solution of a phosphoric acid solution and a sulfuric acid solution, wherein a ratio between the sulfuric acid and the phosphoric acid is about 3:1. In another embodiment, the acidic solution is a phosphoric acid solution. As shown in FIG. 1F, the protective layer 120 is patterned to be a patterned protective layer 121. In this embodiment, the patterned protective layer 121 is also configured to be a current barrier layer 121. As shown in FIG. 1G, a transparent conductive layer 13 is formed on the barrier layer 121 and the second semiconductor layer 113. As shown in FIG. 1H, a first electrode 14 is formed on the transparent conductive layer 13 at the position corresponding to the barrier layer 121 and a second electrode 15 is formed on the first type semiconductor layer 111. The protective layer 121 or the barrier layer 121 is an insulating material and has a transmittance larger than 90%. Besides, the barrier layer 121 has a resistance larger than 1014 Ω-cm. The barrier layer 121 comprises silicon oxide (SiO2), silicon nitride (SiNx) or titanium dioxide (TiO2). Then, splitting the light-emitting structure 1000 along the trench 16 to form a plurality of light-emitting devices 100.
FIG. 2A shows a light-emitting device 100 based on the method described in FIGS. 1A-1H. FIG. 2B shows a partial enlarged drawing of FIG. 2A. The light-emitting structure 11 is formed on the substrate 10 b. The light-emitting structure 11 sequentially comprises a first type semiconductor layer 111, an active layer 112, and a second type semiconductor layer 113. The second type semiconductor layer 113 comprises a first region 1131 and a second region 1132. A barrier layer 121 is formed on the first region 1131 and has a lower surface 1211 and a side wall 1212 which is inclined against the lower surface 1211 and an angle (Θ) between the sidewall and the bottom surface is between 10°-70°. A transparent conductive layer 13 is formed on the side wall 1212 of the barrier layer 121 and has a third thickness (t3); the transparent conductive layer 13 is also formed on the second region 1132 of the second semiconductor layer 113 and has a fourth thickness (t4). Since the angle (Θ) between the sidewall 1212 and the lower surface 121 is less than 70°, the transparent conductive layer 13 can cover the side wall 1212 of the barrier layer 121 and the second region 1132 of the second semiconductor layer 113 uniformly. In this embodiment, a difference (t3−t4) between the thickness of the transparent conductive layer 13 formed on the sidewall 1212 of the barrier layer 121 and the thickness of the transparent conductive layer 13 formed on the second region 1132 of the second semiconductor layer 113 and the thickness (t3) of the transparent conductive layer 13 formed on the side wall 1212 of the barrier layer 121 forms a ratio ((t3−t4)/t3) less than 10%. Besides, since a trench 16 of a triangular shape (referring to FIG. 1D) is formed in the substrate 10 a when applying a laser, an inclined sidewall 101 of the substrate 10 b is formed while splitting the light-emitting structures 1000 to form a light-emitting device 100. The inclined sidewall 101 is inclined against an upper surface 102 of the substrate 10 b and an angle between the inclined sidewall 101 and the upper surface 102 of the upper surface 102 is larger than 90°. Moreover, an acidic solution is used to remove the byproducts generated by laser cutting after the inclined sidewall 101 is cut by laser so that the inclined sidewall 101 has a rough surface.
FIGS. 3A-3C show top views of light-emitting devices 100, 100′ and 100″. The light-emitting device 100, 100′ or 100″ has a rectangular shape and has a first side 104, a second side 105, a third side 106, and a fourth side 107. As shown in FIG. 3A, the light-emitting device 100 has a first electrode 14 near the first side 104 and the first electrode 14 is formed at the position on the transparent conductive layer 13 opposing to the barrier layer 121. In this embodiment, the first electrode 14 has a shape substantially the same as that of the barrier layer 121. The first electrode 14 comprises a first electrode pad 141 and a plurality of first extended electrodes 142 extending from the first electrode pad 141. The area of the barrier layer 121 is larger than the area of the electrode pad 141 and the extended electrode 142. The light-emitting device 100 further comprises a second electrode 15 near the second side 105 opposing to the first side 104. The second electrode 15 comprises a second electrode pad 151 and a second extended electrode 152 extending to the first side 104 while a first extended electrode 142 extends from the first electrode pad 141 to the second electrode pad 151 (in a direction toward the second side 105). Besides, the first electrode pad 141 can also be placed at a corner near the first side 104 and the third side 106, the second electrode pad 151 can also be placed at a corner near the second side 105 and the fourth side 107, and the second extended electrode 152 extends toward the first electrode pad 141. In another embodiment, as shown in FIG. 3B, the light-emitting device 100′ comprises a first electrode 14′ and a second electrode 15′. The first electrode 14′ comprises a first electrode pad 141′ and a first extended electrode 142′. The second electrode 15′ comprises a second electrode pad 151′. The first extended electrode 142′ extends in a direction from the first electrode pad 141′ to the second electrode pad 151′. Besides, a barrier layer 121 comprises an electrode region 1215, a plurality of first extension regions 1213, and a plurality of second extension regions 1214. The electrode region 1215 of the barrier layer 121 is formed on the region corresponding to the region of the first electrode 14′ and has a shape substantially the same as the first electrode 14′ and an area larger than that of the first electrode 14′. The first extension region 1213 extends from the electrode region 1215 (the first electrode pad 141′ and the first extend electrode 142′) to the side wall (the third side 106 and the fourth side 107). In this embodiment, four second extension regions 1214 extend forward (in a direction to the first side 104) and backward (in a direction to the second side 105) form the electrode region 1215 (the first electrode pad 141′ and the first extend electrode 142′). The first electrode 14′ is not formed on the first extension region 1213 and the second extension region 1214.
As shown in FIG. 3C, in another embodiment, the light-emitting device 100″ comprises a first electrode 14″ and a second electrode 15″. The first electrode 14″ comprises a first electrode pad 141″ and a first extended electrode 142″. The second electrode 15″ comprises a second electrode pad 151″. The first extended electrode 142″ extends in a direction from the first electrode pad 141″ to the second electrode pad 151″. Besides, a barrier layer 121 comprises an electrode region 1215′ and a plurality of extension regions 1213′. The electrode region 1215′ of the barrier layer 121 is formed on the region corresponding to that of the first electrode 14″ and has a shape substantially the same as the first electrode 14″ and an area larger than that of the first electrode 14″. A plurality of extension regions 1213′ extends from the electrode region 1215′ (the first electrode pad 141″ and the first extend electrode 142″) to four sides (104,105,106, and 107) at an angle of 45°. The first electrode 14″ is not formed on the extension region 1213′.
The first type semiconductor layer can be an n-type semiconductor and the second type semiconductor layer can be a p-type semiconductor. The first type semiconductor layer and the second semiconductor layer comprise AlGaAs, AlGaInP, AlInP, InGaP, AlInGaN, InGaN, AlGaN and GaN. Optionally, the first type semiconductor layer can be a p-type semiconductor layer and the second type semiconductor layer can be an n-type semiconductor layer. The active layer comprises AlGaAs, AlGaInP, InGaP, AlInP, AlInGaN, InGaN, AlGaN and GaN. The active layer can be a single heterostructure (SH), a double-side double heterostructure (DDH) or a multi-quantum well (MQW) structure. The substrate comprises GaAs, GaP, Ge, sapphire, glass, diamond, SiC, Si, GaN, and ZnO or other substitution material.
FIG. 4 shows an exploded drawing of a bulb 30 in accordance with an embodiment of the present disclosure. The bulb 30 comprises a cover 21, a lens 22, a light emitting module 24, a substrate 25, a heat-dissipation element 26, a connection element 27, and a circuit element 28. The light emitting module 24 comprises a carrier 23 and a plurality of light-emitting devices. The light-emitting device can be any of the light-emitting device 100 (100′ and 100″) mentioned above. As shown in FIG. 4, for example, twelve light-emitting devices are placed on the carrier 23 comprising six red light light-emitting devices and six blue light light-emitting devices arranged staggered and electrically connected to each other (in series or in parallel). The blue light light-emitting device comprises a phosphor device formed above to convert the light emitted from the blue light light-emitting device. The light emitted by the blue light light-emitting device and the converted light are mixed to be a white light which is matched with a red light light-emitting device to emit a warm white light having a color temperature between 2400-3000K.
It will be apparent to those having ordinary skill in the art that various modifications and variations can be made to the devices in accordance with the present disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the present disclosure covers modifications and variations of this disclosure provided they fall within the scope of the following claims and their equivalents.

Claims (18)

What is claimed is:
1. A light-emitting device, comprising:
a semiconductor stack, comprising a top surface, wherein the top surface comprises a first region and a second region which are coplanar;
a current barrier layer formed on the first region, wherein the current barrier layer comprises an insulating material; and
a transparent conductive layer formed on the current barrier layer and the second region; and
a first electrode formed on the transparent conductive layer;
wherein the current barrier layer comprises:
an electrode region at a position corresponding to the first electrode, having a shape substantially the same as the first electrode; and
a plurality of extension regions extending from the electrode region and not covered by the first electrode.
2. The light-emitting device of claim 1, wherein the first electrode comprises a first electrode pad and a first extended electrode, and the electrode region of the current barrier layer is under the first electrode pad and the first extended electrode.
3. The light-emitting device of claim 2, wherein the plurality of extension regions and the first extended electrode extend toward different directions.
4. The light-emitting device of claim 1, wherein the semiconductor stack comprises four sides and the plurality of extension regions extends toward the four sides.
5. The light-emitting device of claim 1, wherein the semiconductor stack comprises a first type semiconductor layer, a second semiconductor layer and an active layer therebetween; and wherein the current barrier layer and the first electrode are formed on the second semiconductor layer.
6. The light-emitting device of claim 5, further comprising:
a second electrode formed on and electrically connecting to the first type semiconductor layer;
wherein the first electrode comprises a first electrode pad and a first extended electrode;
wherein the semiconductor stack comprises a first side, a second side opposite to the first side, a third side and a fourth side opposite to the third side;
wherein the first electrode pad and the second electrode are near the first side and the second side, respectively; and
wherein part of the plurality of extension regions extends toward the third side and the fourth side.
7. The light-emitting device of claim 6, wherein one of the plurality of extension regions extends toward the first side.
8. The light-emitting device of claim 6, wherein the first extended electrode extends toward the second side.
9. The light-emitting device of claim 6, wherein part of the plurality of extension regions extends from the electrode region which is under the first electrode pad toward at least one of the first side, the second side, the third side and the fourth side.
10. The light-emitting device of claim 1, wherein the current barrier layer has a sidewall and a bottom surface facing the first region and an angle between the sidewall and the bottom surface is between 10°-70°.
11. The light-emitting device of claim 10, wherein the transparent conductive layer is formed between the sidewall of the current barrier layer and the second region of the semiconductor stack, wherein a difference between a thickness of the transparent conductive layer at the sidewall on the current barrier layer and a thickness of the transparent conductive layer on the second region of the semiconductor stack forms a ratio not larger than 10%.
12. The light-emitting device of claim 1, wherein the current barrier layer comprises silicon oxide (SiO2), silicon nitride (SiNx) or titanium dioxide (TiO2).
13. The light-emitting device of claim 1, wherein the current barrier layer has a resistance larger than 1014 Ω-cm.
14. The light-emitting device of claim 1, wherein the transparent conductive layer contacts the second region.
15. The light-emitting device of claim 1, further comprising:
a substrate under the semiconductor stack, wherein the substrate comprises an inclined sidewall.
16. The light-emitting device of claim 15, wherein the inclined sidewall comprises a rough surface.
17. The light-emitting device of claim 1, wherein in a top view, the electrode region of the current barrier layer has a width larger than that of the first electrode.
18. The light-emitting device of claim 1, wherein an area of the first region enclosed by a contour of the electrode region of the current barrier layer is larger than an area of the first region covered by the first electrode.
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US20160359088A1 (en) 2016-12-08
US9425362B2 (en) 2016-08-23
US9786815B2 (en) 2017-10-10
US10608142B2 (en) 2020-03-31
TW201424043A (en) 2014-06-16
US20200243720A1 (en) 2020-07-30
US20140159099A1 (en) 2014-06-12
US20180013038A1 (en) 2018-01-11

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