TWM641128U - Substrate structure - Google Patents

Substrate structure Download PDF

Info

Publication number
TWM641128U
TWM641128U TW112201659U TW112201659U TWM641128U TW M641128 U TWM641128 U TW M641128U TW 112201659 U TW112201659 U TW 112201659U TW 112201659 U TW112201659 U TW 112201659U TW M641128 U TWM641128 U TW M641128U
Authority
TW
Taiwan
Prior art keywords
coil
main body
conductive layer
disposed
layer
Prior art date
Application number
TW112201659U
Other languages
Chinese (zh)
Inventor
陳禹伸
Original Assignee
欣興電子股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 欣興電子股份有限公司 filed Critical 欣興電子股份有限公司
Priority to TW112201659U priority Critical patent/TWM641128U/en
Publication of TWM641128U publication Critical patent/TWM641128U/en

Links

Images

Landscapes

  • Pressure Sensors (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

A substrate structure is provided. The substrate structure includes a main body and an inductance component. The main body has a normal direction. The inductance component is disposed in the main body and at least partly penetrates through the main body. The inductance component includes a soft magnetic portion, a dielectric portion, and a coil portion. The soft magnetic portion is disposed in the main body along the normal direction of the main body. The dielectric portion is disposed in the main body and covers the soft magnetic portion. The coil portion is disposed in the main body and surrounds the dielectric portion.

Description

基板結構Substrate structure

本創作是關於基板結構,特別是關於具有電感組件的基板結構。 The present work is about substrate structures, in particular substrate structures with inductive components.

隨著電子產業的高度發展,各式各樣的電子產品被製造出並應用在不同的領域。為了符合設計與應用需求,可在電子產品的電路板或載板中或其上設置有諸如電感裝置等的特定元件。舉例而言,可藉由焊接製程將電感元件設置於電路板或載板的表面上。然而,此作法會占用電路板/載板的外表面,進而減少用於連接晶片的連接區域。替代地,也可藉由埋置製程將電感元件設置於電路板或載板的內部。然而,此作法會占用電路板/載板中的佈線空間,從而需要增加層數來維持原本的功能性。如此一來,會使得電路板或載板的體積變大,進而增加電路板的厚度與整體封裝體積。 With the high development of the electronic industry, various electronic products have been manufactured and applied in different fields. In order to meet design and application requirements, specific components such as inductance devices can be provided in or on the circuit board or carrier board of the electronic product. For example, the inductance element can be disposed on the surface of the circuit board or the carrier board through a soldering process. However, this method occupies the outer surface of the circuit board/carrier, thereby reducing the connection area for connecting chips. Alternatively, the inductance element can also be disposed inside the circuit board or the carrier board by an embedding process. However, this approach consumes routing space in the circuit board/substrate, requiring additional layers to maintain the original functionality. In this way, the volume of the circuit board or the carrier board will increase, thereby increasing the thickness of the circuit board and the overall packaging volume.

是以,雖然現存的諸如電路板或載板的基板已逐步滿足它們既定的用途,但它們並非在各方面皆符合要求。因此,關於基板仍有一些問題需要克服。 Therefore, although existing substrates such as circuit boards or carrier boards have gradually fulfilled their intended uses, they are not satisfactory in every respect. Therefore, there are still some issues to be overcome regarding the substrate.

在一些實施例中,提供基板結構。所述基板結構包括主體及電感組件。主體具有法線方向。電感組件設置於主體中且至少部分貫穿主體。電感組件包括軟磁部、介電部及線圈部。軟磁部沿著主體的法線方向設置於主體中。介電部設置於主體中,並包覆軟磁部。線圈部設置於主體中,並環繞介電部。 In some embodiments, a substrate structure is provided. The substrate structure includes a main body and an inductor component. The body has a normal direction. The inductance component is disposed in the main body and at least partly penetrates through the main body. The inductance component includes a soft magnetic part, a dielectric part and a coil part. The soft magnetic part is arranged in the main body along the normal direction of the main body. The dielectric part is disposed in the main body and covers the soft magnetic part. The coil part is disposed in the main body and surrounds the dielectric part.

在一些實施例中,線圈部包括第一線圈、第二線圈及第一導孔。第一線圈設置於主體中,且非封閉地環繞介電部。第二線圈設置於主體中,且非封閉地環繞介電部。第一導孔設置於主體中,且兩端分別電性連接於第一線圈及第二線圈。 In some embodiments, the coil part includes a first coil, a second coil and a first via. The first coil is disposed in the main body and surrounds the dielectric part in a non-closed manner. The second coil is disposed in the main body and surrounds the dielectric part in a non-closed manner. The first guide hole is disposed in the main body, and its two ends are electrically connected to the first coil and the second coil respectively.

在一些實施例中,電感組件完全內埋於主體中。 In some embodiments, the inductive component is completely embedded in the body.

在一些實施例中,基板結構更包括第一導電層及第二導電層。第一導電層設置於主體中,且第一導電層與第一線圈同層設置。第二導電層設置於主體中,且第二導電層與第二線圈同層設置。 In some embodiments, the substrate structure further includes a first conductive layer and a second conductive layer. The first conductive layer is disposed in the main body, and the first conductive layer is disposed on the same layer as the first coil. The second conductive layer is disposed in the main body, and the second conductive layer is disposed on the same layer as the second coil.

在一些實施例中,線圈部更包括第三線圈、第二導孔、第四線圈及第三導孔。第三線圈設置於主體上的第一表面上,且非封閉地環繞介電部。第二導孔設置於主體中,且兩端分別電性連接於第三線圈及第一線圈。第四線圈設置於主體上的第二表面上,且非封閉地環繞介電部,其中第一表面與第二表面彼此相對。第三導孔設置於主體中,且兩端分別電性連接於第四線圈及第三線圈。 In some embodiments, the coil portion further includes a third coil, a second via, a fourth coil, and a third via. The third coil is disposed on the first surface of the main body and surrounds the dielectric part in a non-closed manner. The second guide hole is disposed in the main body, and its two ends are electrically connected to the third coil and the first coil respectively. The fourth coil is disposed on the second surface of the main body and surrounds the dielectric part non-closed, wherein the first surface and the second surface are opposite to each other. The third guide hole is disposed in the main body, and its two ends are electrically connected to the fourth coil and the third coil respectively.

在一些實施例中,電感組件的頂表面及底表面分別 暴露於主體的第一表面及第二表面上。 In some embodiments, the top surface and the bottom surface of the inductor component are respectively exposed on the first surface and the second surface of the body.

在一些實施例中,基板結構更包括第三導電層及第四導電層。第三導電層設置於主體的第一表面上,且第三導電層與第三線圈同層設置。第四導電層設置於主體的第二表面上,且第四導電層與第四線圈同層設置。 In some embodiments, the substrate structure further includes a third conductive layer and a fourth conductive layer. The third conductive layer is disposed on the first surface of the main body, and the third conductive layer is disposed on the same layer as the third coil. The fourth conductive layer is disposed on the second surface of the main body, and the fourth conductive layer is disposed on the same layer as the fourth coil.

在一些實施例中,第一線圈、第二線圈、第三線圈及第四線圈分別具有開口,且多個開口在第二表面上的投影彼此相鄰但不重疊。 In some embodiments, the first coil, the second coil, the third coil and the fourth coil respectively have openings, and the projections of the openings on the second surface are adjacent to each other but do not overlap.

在一些實施例中,第一導孔、第二導孔及第三導孔在第二表面上的投影彼此相鄰但不重疊。 In some embodiments, projections of the first via hole, the second via hole and the third via hole on the second surface are adjacent to each other but do not overlap.

在一些實施例中,基板結構更包括保護層,保護層設置於主體上。 In some embodiments, the substrate structure further includes a protective layer disposed on the main body.

本揭露的基板結構可應用於多種類型的電子裝置中。為讓本揭露之特徵及優點能更明顯易懂,下文特舉出各種實施例,並配合所附圖式,作詳細說明如下。 The disclosed substrate structure can be applied to various types of electronic devices. In order to make the features and advantages of the present disclosure more comprehensible, various embodiments are specially cited below, together with the accompanying drawings, to be described in detail as follows.

1a,1b,1c:基板結構 1a, 1b, 1c: Substrate structure

10:基礎基板 10: Basic substrate

100:核心層 100: core layer

100a,13a,14a,19a,26a,32a,35a:頂表面 100a, 13a, 14a, 19a, 26a, 32a, 35a: top surface

100b,11a,12a,19b,25a,32b,35a:底表面 100b, 11a, 12a, 19b, 25a, 32b, 35a: bottom surface

101,231,241:導電層 101,231,241: conductive layer

11:第一線圈 11: First coil

110,130,350,360:開口 110, 130, 350, 360: opening

110a,130a,15a,350a,360a,37a,38a:投影 110a, 130a, 15a, 350a, 360a, 37a, 38a: projection

12:第一導電層 12: The first conductive layer

13:第二線圈 13: Second coil

14:第二導電層 14: Second conductive layer

15:第一導孔 15: The first guide hole

16,27,28:導孔 16,27,28: guide hole

17,39:線圈部 17,39: coil department

18,20,31,33:通孔 18,20,31,33: through hole

19,32:介電部 19,32: Dielectric part

21,34:軟磁部 21,34: soft magnetic part

21a:軟磁性材料 21a: Soft Magnetic Materials

21b:介電材料 21b: Dielectric material

22,40,41,42:電感組件 22,40,41,42: inductance components

23,24:增層結構 23,24: Build-up structure

230,240:介電層 230,240: dielectric layer

25:第三導電層 25: The third conductive layer

26:第四導電層 26: The fourth conductive layer

29,39:主體 29,39: subject

29a:第一表面 29a: first surface

29b:第二表面 29b: second surface

30:保護層 30: protective layer

35:第三線圈 35: The third coil

36:第四線圈 36: Fourth coil

37:第二導孔 37: Second guide hole

38:第三導孔 38: The third guide hole

40a:頂表面 40a: top surface

40b:底表面 40b: bottom surface

d1,d2:距離 d1, d2: distance

d3,d4:線圈直徑 d3, d4: coil diameter

Z:法線方向 Z: normal direction

藉由以下的詳細敘述配合所附圖式,能更加理解本揭露實施例的觀點。值得注意的是,根據工業上的標準慣例,一些部件(feature)可能沒有按照比例繪製。事實上,為了能清楚地描述,不同部件的尺寸可能被增加或減少。 The viewpoints of the embodiments of the present disclosure can be better understood through the following detailed description and the accompanying drawings. It is worth noting that, in accordance with the standard practice in the industry, some features may not be drawn to scale. In fact, the dimensions of various components may be increased or decreased for clarity of description.

圖1、圖2、圖4至圖7、及圖10至圖12分別是根據本揭露的一些 實施例,顯示在製造方法中的各階段的基板結構的剖面示意圖。 Fig. 1, Fig. 2, Fig. 4 to Fig. 7, and Fig. 10 to Fig. 12 are some according to the present disclosure respectively Examples, showing schematic cross-sectional views of substrate structures at various stages in the fabrication process.

圖3是根據本揭露的一些實施例,顯示線圈部的立體示意圖。 FIG. 3 is a schematic perspective view showing a coil part according to some embodiments of the present disclosure.

圖8是根據本揭露的一些實施例,顯示軟磁部的放大示意圖。 FIG. 8 is an enlarged schematic view showing a soft magnetic portion according to some embodiments of the present disclosure.

圖9是根據本揭露的一些實施例,顯示電感組件的立體示意圖。 FIG. 9 is a schematic perspective view showing an inductor component according to some embodiments of the present disclosure.

圖13至圖18、及圖20分別是根據本揭露的另一些實施例,顯示在製造方法中的各階段的基板結構的剖面示意圖。 13 to 18 , and FIG. 20 are schematic cross-sectional views showing substrate structures at various stages in the manufacturing method according to other embodiments of the present disclosure.

圖19是根據本揭露的一些實施例,顯示電感組件的立體示意圖。 FIG. 19 is a schematic perspective view showing an inductor component according to some embodiments of the present disclosure.

圖21是根據本揭露的又一些實施例,顯示基板結構的剖面示意圖。 FIG. 21 is a schematic cross-sectional view showing a substrate structure according to still other embodiments of the present disclosure.

以下揭露提供了很多不同的實施例或範例,用於實施所提供的基板結構中的不同部件。各部件及其配置的具體範例描述如下,以簡化本揭露實施例,當然並非用以限定本揭露。舉例而言,敘述中若提及第一部件形成在第二部件之上,可能包括第一部件及第二部件直接接觸的實施例,也可能包括形成額外的部件在第一部件及第二部件之間,使得第一部件及第二部件不直接接觸的實施例。此外,本揭露可能在不同的實施例或範例中重複元件符號及/或字符。如此重複是為了簡明及清楚,而非用以表示所討論的不同實施例及/或範例之間的關係。 The following disclosure provides many different embodiments or examples for implementing different components in the provided substrate structures. Specific examples of components and their configurations are described below to simplify the embodiments of the disclosure, but certainly not to limit the disclosure. For example, if it is mentioned in the description that the first component is formed on the second component, it may include an embodiment in which the first component and the second component are in direct contact, or may include forming an additional component on the first component and the second component An embodiment in which the first component and the second component are not in direct contact. In addition, the present disclosure may repeat element symbols and/or characters in different embodiments or examples. This repetition is for brevity and clarity and does not represent a relationship between the various embodiments and/or examples discussed.

本文中所提到的方向用語,例如:「上」、「下」、「左」、「右」及其類似用語是參考圖式的方向。因此,使用的方 向用語是用來說明而非限制本揭露。 The directional terms mentioned herein, such as "upper", "lower", "left", "right" and similar terms refer to the directions of the drawings. Therefore, the method used The terminology is used to describe, not to limit, the present disclosure.

在本揭露的一些實施例中,關於設置、連接之用語例如「設置」、「連接」及其類似用語,除非特別定義,否則可指兩個部件直接接觸,或者亦可指兩個部件並非直接接觸,其中有額外結部件位於此兩個結構之間。關於設置、連接之用語亦可包括兩個結構都可移動,或者兩個結構都固定的情況。 In some embodiments of the present disclosure, terms such as "arrangement", "connection" and similar terms related to arrangement and connection, unless otherwise specified, may refer to two parts in direct contact, or may also refer to two parts that are not in direct contact. Contact, where there is an extra junction component between the two structures. The terms about installation and connection may also include the case where both structures are movable, or both structures are fixed.

另外,本說明書或申請專利範圍中提及的「第一」、「第二」及其類似用語是用以命名不同的部件或區別不同實施例或範圍,而並非用來限制部件數量上的上限或下限,也並非用以限定部件的製造順序或設置順序。 In addition, the "first", "second" and similar terms mentioned in this specification or the scope of the patent application are used to name different components or to distinguish different embodiments or ranges, and are not used to limit the upper limit of the number of components or lower limit, nor is it intended to limit the order of manufacture or arrangement of components.

於下文中,「大約」、「實質上」或其類似用語表示在一給定數值或數值範圍的10%內、或5%內、或3%之內、或2%之內、或1%之內、或0.5%之內。在此給定的數量為大約的數量,亦即在沒有特定說明「大約」或「實質上」的情況下,仍可隱含「大約」或「實質上」的含義。 Hereinafter, "about", "substantially" or similar terms mean within 10%, or within 5%, or within 3%, or within 2%, or within 1% of a given value or range of values within, or within 0.5%. The quantities given here are approximate quantities, that is, the meaning of "approximately" or "substantially" may still be implied if "approximately" or "substantially" is not specified.

除非另外定義,在此使用的全部用語(包括技術及科學用語)具有與所屬技術領域中具有通常知識者通常理解的相同涵義。能理解的是,這些用語例如在通常使用的字典中定義用語,應被解讀成具有與相關技術及本揭露的背景或上下文一致的意思,而不應以一理想化或過度正式的方式解讀,除非在本揭露的實施例有特別定義。 Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It can be understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having meanings consistent with the background or context of the related technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner, Unless otherwise specified in the embodiments of the present disclosure.

以下描述實施例的一些變化。在不同圖式和說明的 實施例中,相同或相似的元件符號被用來標明相同或相似的部件。可以理解的是,在方法之前、期間中、之後可以提供額外的步驟,且一些所敘述的步驟可為了方法的其他實施例被取代或刪除。 Some variations of the embodiment are described below. in different diagrams and descriptions In the embodiments, the same or similar reference numerals are used to designate the same or similar components. It is understood that additional steps may be provided before, during, and after the method, and that some recited steps may be substituted or deleted for other embodiments of the method.

在一些基板中,為了滿足應用需求,可設置諸如電感元件等的被動元件於基板中或其上方。舉例而言,可分別形成電感元件與基板,接著將電感元件埋置於基板中或黏接於基板上。然而,以埋置的方式為例,其會需要對基板進行額外的增層製程以容置電感元件。另一方面,以黏接的方式為例,其會因凸出於基板外電感元件而使產品的整體形狀變得複雜。 In some substrates, in order to meet application requirements, passive elements such as inductance elements can be disposed in or on the substrate. For example, the inductance element and the substrate can be formed separately, and then the inductance element can be embedded in the substrate or bonded on the substrate. However, taking the embedding method as an example, it requires an additional build-up process on the substrate to accommodate the inductor element. On the other hand, taking the bonding method as an example, the overall shape of the product will be complicated because the inductance element protrudes out of the substrate.

據此,本揭露提供了一種具有電感組件的基板結構,其是藉由在基板結構的製作過程中利用線路搭配盲孔設計,直接在電路板/載板內一併形成電感組件。如此一來,不僅可以簡化製程,且可最小化電感組件所佔據的體積,從而實現基板結構的輕薄化。 Accordingly, the present disclosure provides a substrate structure with an inductor component, which directly forms the inductor component in the circuit board/carrier by utilizing the circuit and blind hole design during the manufacturing process of the substrate structure. In this way, not only the manufacturing process can be simplified, but also the volume occupied by the inductance component can be minimized, so as to realize the thinning of the substrate structure.

參照圖1至圖11。其中,圖1、2、4-7及10-12是根據本揭露的一些實施例,顯示在製造方法中的各階段的基板結構的剖面示意圖;圖3是根據本揭露的一些實施例,顯示線圈部的立體示意圖;圖8是根據本揭露的一些實施例,顯示軟磁部的放大示意圖;以及圖9是根據本揭露的一些實施例,顯示電感組件的立體示意圖。首先參照圖1,在一些實施例中,提供基礎基板10,基礎基板10可為或可包括銅箔基板,但本揭露不限於此。在一些實施例中,基礎基板10可包括核心層100及導電層101。在一些實施例中,核心層100可為或可包括含有高分子材料、纖維材料、其他 合適的材料的預浸材(prepreg),但本揭露不限於此。舉例而言,高分子材料可為或可包括環氧樹脂(epoxy resin)、聚醯亞胺(polyimide,PI)、其他合適的高分子材料或其組合,但本揭露不限於此。纖維材料可包括碳纖維(carbon fiber)、玻璃纖維(glass fiber)、其他合適的纖維材料或其組合,但本揭露不限於此。 Refer to Figures 1 to 11. Among them, FIGS. 1, 2, 4-7 and 10-12 are schematic cross-sectional views showing substrate structures at various stages in the manufacturing method according to some embodiments of the present disclosure; FIG. 3 is a schematic diagram showing FIG. 8 is an enlarged schematic view of the soft magnetic portion according to some embodiments of the present disclosure; and FIG. 9 is a perspective view of an inductor component according to some embodiments of the present disclosure. Referring first to FIG. 1 , in some embodiments, a base substrate 10 is provided, which may be or include a copper foil substrate, but the disclosure is not limited thereto. In some embodiments, the base substrate 10 may include a core layer 100 and a conductive layer 101 . In some embodiments, the core layer 100 may be or may include polymer materials, fiber materials, other A prepreg of suitable material is used, although the disclosure is not limited thereto. For example, the polymer material may be or include epoxy resin, polyimide (PI), other suitable polymer materials or combinations thereof, but the disclosure is not limited thereto. The fiber material may include carbon fiber, glass fiber, other suitable fiber materials or combinations thereof, but the present disclosure is not limited thereto.

在一些實施例中,導電層101可設置於核心層100上。舉例而言,導電層101可完整覆蓋核心層100的頂表面100a及底表面100b,或部分覆蓋核心層100的頂表面100a及底表面100b。在一些實施例中,導電層101可為或可包括導電材料。舉例而言,所述導電材料可為鋁(Al)、銅(Cu)、其合金或其化合物,但本揭露不限於此。在一些實施例中,導電層101可為銅箔。舉例而言,銅箔可為或可包括黃銅(brass)、磷青銅(phosphor bronze)、鈹銅(berylliun alloy)或無氧銅,但本揭露不限於此。 In some embodiments, the conductive layer 101 can be disposed on the core layer 100 . For example, the conductive layer 101 can completely cover the top surface 100 a and the bottom surface 100 b of the core layer 100 , or partially cover the top surface 100 a and the bottom surface 100 b of the core layer 100 . In some embodiments, the conductive layer 101 can be or include a conductive material. For example, the conductive material may be aluminum (Al), copper (Cu), alloys thereof or compounds thereof, but the disclosure is not limited thereto. In some embodiments, the conductive layer 101 can be copper foil. For example, the copper foil may be or include brass, phosphor bronze, berylliun alloy or oxygen-free copper, but the disclosure is not limited thereto.

參照圖2及圖3,在一些實施例中,形成第一線圈11、第一導電層12、第二線圈13、第二導電層14、第一導孔15及導孔16。其中,第一導孔15不位於圖2所示的剖面上,故下文將以圖3中所示進行說明。在一些實施例中,首先形成圖案化遮罩層在導電層101上。舉例而言,圖案化遮罩層可為或可包括光阻,但本揭露不限於此。接著,形成貫穿基礎基板10的通孔。在一些實施例中,可藉由雷射鑽孔製程、機械鑽孔製程、其他合適的鑽孔製程或其組合形成通孔,但本揭露不限於此。可替代地,可先形成通孔在基礎基板10中,再形成圖案化遮罩層在基礎基板10上。 Referring to FIG. 2 and FIG. 3 , in some embodiments, the first coil 11 , the first conductive layer 12 , the second coil 13 , the second conductive layer 14 , the first via hole 15 and the via hole 16 are formed. Wherein, the first guide hole 15 is not located on the cross-section shown in FIG. 2 , so the following will be described as shown in FIG. 3 . In some embodiments, a patterned mask layer is firstly formed on the conductive layer 101 . For example, the patterned mask layer can be or include photoresist, but the disclosure is not limited thereto. Next, through holes penetrating the base substrate 10 are formed. In some embodiments, the via holes may be formed by laser drilling process, mechanical drilling process, other suitable drilling processes or a combination thereof, but the disclosure is not limited thereto. Alternatively, through holes may be formed in the base substrate 10 first, and then a patterned mask layer may be formed on the base substrate 10 .

接續上述製程,在圖案化遮罩層所暴露區域填入導電材料,以在核心層100的頂表面100a上形成第一線圈11及第一導電層12,及在核心層100的底表面100b上形成第二線圈13及第二導電層14。在一些實施例中,更設置導電材料於通孔中,以形成第一導孔15(如圖3所示)以及導孔16(如圖2所示)。其中,第一導孔15的兩端分別電性連接第一線圈11及第二線圈13(如圖3所示),且導孔16的兩端分別電性連接於第一導電層12及第二導電層14(如圖2所示)。值得一提的是,雖然本揭露的圖式中僅示出了一個用於連接第一導電層12與第二導電層14的導孔(亦即,導孔16),但本揭露不限於此。導孔的數量可根據設計而定,例如可設置二個、三個或是多於三個的導孔。在一些實施例中,可藉由電鍍製程設置導電材料於核心層100上及通孔中,但本揭露不限於此。在一些實施例中,上述的導電材料可相似或相同於導電層101的材料,但本揭露不限於此。 Continuing the above process, fill the exposed area of the patterned mask layer with conductive material to form the first coil 11 and the first conductive layer 12 on the top surface 100a of the core layer 100, and on the bottom surface 100b of the core layer 100 The second coil 13 and the second conductive layer 14 are formed. In some embodiments, a conductive material is further disposed in the through hole to form the first via hole 15 (as shown in FIG. 3 ) and the via hole 16 (as shown in FIG. 2 ). Wherein, the two ends of the first via 15 are respectively electrically connected to the first coil 11 and the second coil 13 (as shown in FIG. 3 ), and the two ends of the via 16 are respectively electrically connected to the first conductive layer 12 and the second coil. The second conductive layer 14 (as shown in FIG. 2 ). It should be noted that although only one via hole (ie, via hole 16 ) for connecting the first conductive layer 12 and the second conductive layer 14 is shown in the drawings of the present disclosure, the present disclosure is not limited thereto. . The number of guide holes can be determined according to the design, for example, two, three or more than three guide holes can be provided. In some embodiments, the conductive material can be disposed on the core layer 100 and in the through hole by electroplating process, but the disclosure is not limited thereto. In some embodiments, the aforementioned conductive material may be similar or identical to the material of the conductive layer 101 , but the disclosure is not limited thereto.

接續上述製程,在形成第一線圈11、第二線圈13、第一導電層12、第二導電層14、第一導孔15及導孔16之後,移除圖案化遮罩層。接著,移除未被第一線圈11、第一導電層12、第二線圈13、第二導電層14、第一導孔15及導孔16所遮蔽的導電層101。舉例而言,可對導電層101執行蝕刻製程,直到露出未被第一線圈11、第一導電層12、第二線圈13、第二導電層14、第一導孔15及導孔16覆蓋的核心層100為止。由於殘留的導電層101可分別視為第一線圈11、第一導電層12、第二線圈13、第二 導電層14、第一導孔15及導孔16的一部份,為簡化圖式起見,並未將其單獨示出。 Following the above process, after forming the first coil 11 , the second coil 13 , the first conductive layer 12 , the second conductive layer 14 , the first via hole 15 and the via hole 16 , the patterned mask layer is removed. Next, the conductive layer 101 not covered by the first coil 11 , the first conductive layer 12 , the second coil 13 , the second conductive layer 14 , the first via hole 15 and the via hole 16 is removed. For example, an etching process can be performed on the conductive layer 101 until the parts not covered by the first coil 11 , the first conductive layer 12 , the second coil 13 , the second conductive layer 14 , the first via hole 15 and the via hole 16 are exposed. Up to 100 core layers. Since the remaining conductive layer 101 can be regarded as the first coil 11, the first conductive layer 12, the second coil 13, the second Parts of the conductive layer 14 , the first via hole 15 and the via hole 16 are not shown separately for the sake of simplification of the drawing.

如圖2所示,在一些實施例中,第一線圈11及第一導電層12是藉由同一道製程而同層設置於核心層100的頂表面100a上,且因此第一線圈11的底表面11a與第一導電層12的底表面12a彼此齊平。類似地,第二線圈13及第二導電層14是藉由同一道製程而同層設置於核心層100的底表面100b上,且因此第二線圈13的頂表面13a與第二導電層14的頂表面14a齊平。在一些實施例中,第一導電層12及第二導電層14可為導電線路或導電圖案,但本揭露不限於此。 As shown in FIG. 2, in some embodiments, the first coil 11 and the first conductive layer 12 are disposed on the top surface 100a of the core layer 100 in the same layer through the same process, and therefore the bottom of the first coil 11 The surface 11a and the bottom surface 12a of the first conductive layer 12 are flush with each other. Similarly, the second coil 13 and the second conductive layer 14 are disposed on the bottom surface 100b of the core layer 100 in the same layer by the same process, and thus the top surface 13a of the second coil 13 is the same as that of the second conductive layer 14. The top surface 14a is flush. In some embodiments, the first conductive layer 12 and the second conductive layer 14 can be conductive lines or conductive patterns, but the disclosure is not limited thereto.

如圖3所示,在一些實施例中,第一線圈11及第二線圈13為圓形的非封閉線圈,但本揭露不限於此。舉例而言,第一線圈11及第二線圈13可為橢圓形的非封閉線圈、矩形的非封閉線圈、或是三角形的非封閉線圈,但本揭露不限於此。在第一線圈11及第二線圈13為圓形的非封閉線圈的一些實施例中,第一線圈11的內側與其圓心之間的距離d1和第二線圈13的內側與其圓心之間的距離d2可為相同或不相同。在一些實施例中,第一線圈11的線圈直徑d3及第二線圈13的線圈直徑d4可為相同或不相同。 As shown in FIG. 3 , in some embodiments, the first coil 11 and the second coil 13 are circular non-closed coils, but the present disclosure is not limited thereto. For example, the first coil 11 and the second coil 13 may be oval non-closed coils, rectangular non-closed coils, or triangular non-closed coils, but the disclosure is not limited thereto. In some embodiments where the first coil 11 and the second coil 13 are circular non-closed coils, the distance d1 between the inner side of the first coil 11 and its center of circle and the distance d2 between the inner side of the second coil 13 and its circle center Can be the same or different. In some embodiments, the coil diameter d3 of the first coil 11 and the coil diameter d4 of the second coil 13 may be the same or different.

在一些實施例中,第一線圈11、第二線圈13及第一導孔15可共同稱為線圈部17,並用於產生磁場。在一些實施例中,為了強化線圈部17在通電時產生的磁場強度,可增加線圈部17的總線圈長度。舉例而言,第一線圈11具有開口110,且第一 線圈11兩端分別電性連接第一導電層12與第一導孔15。第二線圈13具有開口130,且第二線圈13兩端分別電性連接第二導電層14與第一導孔15。在底表面100b上,藉由使開口110的投影110a與開口130的投影130a彼此相鄰但不重疊,並使第一導孔15的投影15a位於開口110的投影110a與開口130的投影130a之間,可增加線圈部17的總線圈長度。 In some embodiments, the first coil 11 , the second coil 13 and the first guide hole 15 may be collectively referred to as a coil part 17 and used to generate a magnetic field. In some embodiments, in order to strengthen the magnetic field strength generated by the coil part 17 when energized, the total coil length of the coil part 17 can be increased. For example, the first coil 11 has an opening 110, and the first Both ends of the coil 11 are electrically connected to the first conductive layer 12 and the first via 15 respectively. The second coil 13 has an opening 130 , and two ends of the second coil 13 are electrically connected to the second conductive layer 14 and the first via 15 respectively. On the bottom surface 100b, by making the projection 110a of the opening 110 and the projection 130a of the opening 130 adjacent to each other but not overlapping, and making the projection 15a of the first guide hole 15 be located between the projection 110a of the opening 110 and the projection 130a of the opening 130 In between, the total coil length of the coil part 17 can be increased.

參照圖4,在一些實施例中,沿著核心層100的法線方向Z於第一線圈11及第二線圈13中形成通孔18,且使通孔18貫穿核心層100的頂表面100a及底表面100b。在一些實施例中,可藉由雷射鑽孔製程、機械鑽孔製程、其他合適的鑽孔製程或其組合形成通孔18,但本揭露不限於此。 Referring to FIG. 4 , in some embodiments, a through hole 18 is formed in the first coil 11 and the second coil 13 along the normal direction Z of the core layer 100, and the through hole 18 penetrates the top surface 100a and the top surface 100a of the core layer 100. Bottom surface 100b. In some embodiments, the via hole 18 may be formed by a laser drilling process, a mechanical drilling process, other suitable drilling processes or a combination thereof, but the disclosure is not limited thereto.

參照圖5,在一些實施例中,於通孔18中填入介電材料,以形成介電部19。在一些實施例中,介電材料可為或可包括熱固性樹脂(thermosetting resin)、光敏樹脂(light-activated resin)、其組合或其他合適的材料,但本揭露不限於此。在一些實施例中,介電部19與線圈部17在水平面上的間距可為0mm至1mm,但本揭露不限於此。在一些實施例中,介電部19的頂表面19a可與核心層100的頂表面100a齊平,及/或介電部19的底表面19b可與核心層100的底表面100b齊平,但本揭露不限於此。在介電部19凸出於頂表面100a與底表面100b的一些實施例中,介電部19可直接接觸線圈部17中的第一線圈11或第二線圈13,但本揭露不限於此。 Referring to FIG. 5 , in some embodiments, a dielectric material is filled in the through hole 18 to form a dielectric portion 19 . In some embodiments, the dielectric material may be or include thermosetting resin, light-activated resin, combinations thereof, or other suitable materials, but the disclosure is not limited thereto. In some embodiments, the distance between the dielectric part 19 and the coil part 17 on the horizontal plane may be 0 mm to 1 mm, but the disclosure is not limited thereto. In some embodiments, the top surface 19a of the dielectric portion 19 may be flush with the top surface 100a of the core layer 100, and/or the bottom surface 19b of the dielectric portion 19 may be flush with the bottom surface 100b of the core layer 100, but The present disclosure is not limited thereto. In some embodiments where the dielectric part 19 protrudes from the top surface 100a and the bottom surface 100b, the dielectric part 19 may directly contact the first coil 11 or the second coil 13 in the coil part 17, but the disclosure is not limited thereto.

參照圖6,在一些實施例中,沿著核心層100的法線方向Z於介電部19中形成通孔20,且使通孔20貫穿介電部19的頂表面19a及底表面19b。在一些實施例中,可藉由雷射鑽孔製程、機械鑽孔製程、其他合適的鑽孔製程或其組合形成通孔20,但本揭露不限於此。 Referring to FIG. 6 , in some embodiments, a via hole 20 is formed in the dielectric portion 19 along the normal direction Z of the core layer 100 , and the via hole 20 penetrates the top surface 19 a and the bottom surface 19 b of the dielectric portion 19 . In some embodiments, the via hole 20 may be formed by a laser drilling process, a mechanical drilling process, other suitable drilling processes or a combination thereof, but the disclosure is not limited thereto.

參照圖7至圖9,在一些實施例中,於通孔20中填入軟磁性材料,以形成軟磁部21。在一些實施例中,所述軟磁性材料可為或可包括鐵、鈷、鎳、其合金或其他合適的材料,但本揭露不限於此。如圖8的(A)所示,在一些實施例中,可藉由填入柱狀的軟磁性材料以形成軟磁部21。如圖8的(B)所示,在一些實施例中,可先將粉末狀的軟磁性材料21a與介電材料21b混合,再將混和後的材料注入通孔20中以形成軟磁部21。舉例而言,用於與軟磁性材料21a互相混和的所述介電材料21b可相似或相同於介電部19的材料,但本揭露不限於此。 Referring to FIGS. 7 to 9 , in some embodiments, a soft magnetic material is filled in the through hole 20 to form the soft magnetic portion 21 . In some embodiments, the soft magnetic material may be or include iron, cobalt, nickel, alloys thereof, or other suitable materials, but the present disclosure is not limited thereto. As shown in (A) of FIG. 8 , in some embodiments, the soft magnetic portion 21 can be formed by filling columnar soft magnetic material. As shown in FIG. 8(B), in some embodiments, the powdered soft magnetic material 21 a and the dielectric material 21 b may be mixed first, and then the mixed material is injected into the through hole 20 to form the soft magnetic portion 21 . For example, the dielectric material 21 b used for mixing with the soft magnetic material 21 a may be similar or identical to the material of the dielectric portion 19 , but the disclosure is not limited thereto.

如圖9所示,在一些實施例中,軟磁部21、介電部19及線圈部17可共同稱為電感組件22。其中,軟磁部21沿著核心層100的法線方向Z設置於核心層100中,介電部19設置於核心層100中並包覆軟磁部21,且線圈部17設置於核心層100中並環繞介電部19。如此一來,藉由對線圈部17施加電流,可使軟磁部21受到線圈部17所產生的磁場而磁化,從而實現與其他元件或是裝置互動的功效。 As shown in FIG. 9 , in some embodiments, the soft magnetic part 21 , the dielectric part 19 and the coil part 17 may be collectively referred to as an inductor component 22 . Wherein, the soft magnetic portion 21 is disposed in the core layer 100 along the normal direction Z of the core layer 100, the dielectric portion 19 is disposed in the core layer 100 and covers the soft magnetic portion 21, and the coil portion 17 is disposed in the core layer 100 and surrounding dielectric portion 19 . In this way, by applying current to the coil portion 17 , the soft magnetic portion 21 can be magnetized by the magnetic field generated by the coil portion 17 , thereby achieving the effect of interacting with other components or devices.

參照圖10,在一些實施例中,設置增層結構23及增層結構24於核心層100的兩側上,以覆蓋核心層100的頂表面100a、底表面100b、第一線圈11、第一導電層12、第二線圈13、第二導電層14及導孔16。舉例而言,可藉由增層製程將增層結構23及增層結構24層壓於核心層100上,但本揭露不限於此。在一些實施例中,增層結構23包括介電層230以及導電層231,且增層結構24包括介電層240以及導電層241。在一些實施例中,介電層230及介電層240的材料可相似或相同於核心層100的材料,但本揭露不限於此。在一些實施例中,導電層231及導電層241的材料可相似或相同於導電層101的材料,但本揭露不限於此。 Referring to FIG. 10, in some embodiments, a build-up structure 23 and a build-up structure 24 are provided on both sides of the core layer 100 to cover the top surface 100a, the bottom surface 100b, the first coil 11, the first The conductive layer 12 , the second coil 13 , the second conductive layer 14 and the guide hole 16 . For example, the build-up structure 23 and the build-up structure 24 can be laminated on the core layer 100 through a build-up process, but the present disclosure is not limited thereto. In some embodiments, the build-up structure 23 includes a dielectric layer 230 and a conductive layer 231 , and the build-up structure 24 includes a dielectric layer 240 and a conductive layer 241 . In some embodiments, the materials of the dielectric layer 230 and the dielectric layer 240 may be similar or identical to the material of the core layer 100 , but the disclosure is not limited thereto. In some embodiments, the materials of the conductive layer 231 and the conductive layer 241 may be similar or identical to the material of the conductive layer 101 , but the disclosure is not limited thereto.

參照圖11,在一些實施例中,形成第三導電層25、第四導電層26、導孔27及導孔28。在一些實施例中,首先形成圖案化遮罩層在導電層231及導電層241上。舉例而言,圖案化遮罩層可為或可包括光阻,但本揭露不限於此。接著,形成貫穿介電層230及介電層240的盲孔。在一些實施例中,可藉由雷射鑽孔製程、機械鑽孔製程、其他合適的鑽孔製程或其組合形成盲孔,但本揭露不限於此。可替代地,可先形成盲孔在介電層230及介電層240中,再形成圖案化遮罩層在導電層231及導電層241上。 Referring to FIG. 11 , in some embodiments, a third conductive layer 25 , a fourth conductive layer 26 , a via hole 27 and a via hole 28 are formed. In some embodiments, a patterned mask layer is firstly formed on the conductive layer 231 and the conductive layer 241 . For example, the patterned mask layer can be or include photoresist, but the disclosure is not limited thereto. Next, a blind hole penetrating through the dielectric layer 230 and the dielectric layer 240 is formed. In some embodiments, the blind holes may be formed by laser drilling process, mechanical drilling process, other suitable drilling processes or a combination thereof, but the disclosure is not limited thereto. Alternatively, blind holes can be formed in the dielectric layer 230 and the dielectric layer 240 first, and then a patterned mask layer can be formed on the conductive layer 231 and the conductive layer 241 .

接續上述製程,在圖案化遮罩層所暴露區域填入導電材料,以在介電層230及介電層240上分別形成第三導電層25及第四導電層26。在一些實施例中,更設置導電材料於盲孔中,以形成導孔27及導孔28。其中,第三導電層25藉由導孔27與第一 導電層12電性連接,且第四導電層26藉由導孔28與第二導電層14電性連接。在一些實施例中,可藉由電鍍製程設置導電材料於導電層231及導電層241上及盲孔中,但本揭露不限於此。在一些實施例中,上述的導電材料可相似或相同於導電層101的材料,但本揭露不限於此。 Following the above process, the exposed area of the patterned mask layer is filled with conductive material to form the third conductive layer 25 and the fourth conductive layer 26 on the dielectric layer 230 and the dielectric layer 240 respectively. In some embodiments, a conductive material is further disposed in the blind hole to form the guide hole 27 and the guide hole 28 . Wherein, the third conductive layer 25 connects with the first through the guide hole 27 The conductive layer 12 is electrically connected, and the fourth conductive layer 26 is electrically connected to the second conductive layer 14 through the via hole 28 . In some embodiments, the conductive material can be disposed on the conductive layer 231 and the conductive layer 241 and in the blind holes through an electroplating process, but the disclosure is not limited thereto. In some embodiments, the aforementioned conductive material may be similar or identical to the material of the conductive layer 101 , but the disclosure is not limited thereto.

接續上述製程,去除圖案化遮罩層之後,移除未被第三導電層25、第四導電層26、導孔27及導孔28所遮蔽的導電層231及導電層241。舉例而言,對導電層231、241執行蝕刻製程,直到露出未被第三導電層25及導孔27所遮蔽的介電層230及未被第四導電層26及導孔28所遮蔽的介電層240為止。由於殘留的導電層231、241可分別視為第三導電層25、第四導電層26、導孔27及導孔28的一部份,為簡化圖式起見,並未將其單獨示出。 Following the above process, after removing the patterned mask layer, the conductive layer 231 and the conductive layer 241 not covered by the third conductive layer 25 , the fourth conductive layer 26 , the via hole 27 and the via hole 28 are removed. For example, an etching process is performed on the conductive layers 231, 241 until the dielectric layer 230 not covered by the third conductive layer 25 and the via hole 27 and the dielectric layer not covered by the fourth conductive layer 26 and the via hole 28 are exposed. electrical layer 240. Since the remaining conductive layers 231 and 241 can be regarded as part of the third conductive layer 25, the fourth conductive layer 26, the via hole 27 and the via hole 28 respectively, they are not shown separately for the sake of simplifying the drawings. .

在一些實施例中,介電層230、核心層100與介電層240可共同稱為主體29。在這種情況下,介電層230的頂表面可稱為主體29的第一表面29a。介電層240的底表面可稱為主體29的第二表面29b。 In some embodiments, the dielectric layer 230 , the core layer 100 and the dielectric layer 240 may be collectively referred to as the body 29 . In this case, the top surface of the dielectric layer 230 may be referred to as the first surface 29 a of the body 29 . The bottom surface of the dielectric layer 240 may be referred to as the second surface 29b of the body 29 .

參照圖12,在一些實施例中,設置保護層30於主體29的第一表面29a及第二表面29b上,以形成基板結構1a。在一些實施例中,可藉由浸塗(dip coating)、滾塗(roller coating)、簾塗(curtain coating)、噴塗(spraying)、印刷(screen printing)、其他合適的製程或其組合設置保護層30,但本揭露不限於此。在一些實施例中,保護層30的材料可為或可包括樹脂或其他合適的材 料,但本揭露不限於此。舉例而言,保護層30可為防焊油墨。 Referring to FIG. 12 , in some embodiments, a protection layer 30 is disposed on the first surface 29 a and the second surface 29 b of the body 29 to form the substrate structure 1 a. In some embodiments, protection may be provided by dip coating, roller coating, curtain coating, spraying, screen printing, other suitable processes, or combinations thereof Layer 30, but the present disclosure is not limited thereto. In some embodiments, the material of the protective layer 30 may be or may include resin or other suitable materials material, but the disclosure is not limited thereto. For example, the protective layer 30 can be solder resist ink.

在上述的實施例中,電感組件22是與主體29中的金屬層或線路層(例如,第一導電層12、第二導電層14)一起形成,且完全內埋於主體29中。換言之,本揭露採用線路搭配盲孔的設計,直接在電路板/載板內形成電感組件,且其方向與線路方向垂直。如此一來,本揭露可在不縮減基板的晶片連接區域(例如,主體外表面上的特定區域)及/或在不增加基板體積的情況下設置有電感組件。此外,本揭露的基板結構亦可根據使用者的需求來選擇不同大小的線圈,或使電感組件橫跨多個線路層,以符合設計需求。承上所述,雖然在上文中已提供一種具有電感組件的基板結構的實施態樣,但本揭露不限於此。在下文中,將提供另一種具有電感組件的基板結構的實施態樣作為參考。 In the above embodiments, the inductor element 22 is formed together with the metal layer or circuit layer (eg, the first conductive layer 12 and the second conductive layer 14 ) in the main body 29 and is completely embedded in the main body 29 . In other words, the present disclosure adopts the design of wiring with blind holes to directly form the inductance component in the circuit board/carrier, and its direction is perpendicular to the wiring direction. In this way, the present disclosure can be provided with an inductor element without reducing the chip connection area of the substrate (eg, a specific area on the outer surface of the main body) and/or without increasing the volume of the substrate. In addition, the substrate structure of the present disclosure can also select coils of different sizes according to user requirements, or make the inductance component span multiple circuit layers to meet the design requirements. Based on the above, although an embodiment of the substrate structure with the inductor component has been provided above, the present disclosure is not limited thereto. Hereinafter, another embodiment of a substrate structure with an inductor component will be provided as a reference.

參照圖13至圖20。其中,圖13-18及圖20是根據本揭露的另一些實施例,顯示基板結構在各製造階段的剖面示意圖;且圖19是根據本揭露的另一些實施例,顯示電感組件的立體示意圖。應注意的是,圖13是承接圖2之後續步驟,之前的所有步驟皆可參照圖1及圖2所述,因此不再加以贅述。此外,與前述步驟類似之步驟亦不再多加贅述。本實施例與前述實施例的主要差別在於,本實施例的電感組件是貫穿整個主體而不是內埋於主體中,從而使基板結構可應用在不同的電子裝置中。 Refer to Figures 13 to 20. 13-18 and FIG. 20 are schematic cross-sectional views showing substrate structures at various manufacturing stages according to other embodiments of the present disclosure; and FIG. 19 is a perspective view showing inductor components according to other embodiments of the present disclosure. It should be noted that FIG. 13 is a subsequent step following FIG. 2 , and all previous steps can be described with reference to FIG. 1 and FIG. 2 , so details are not repeated here. In addition, steps similar to the aforementioned steps will not be repeated here. The main difference between this embodiment and the previous embodiments is that the inductor component of this embodiment runs through the whole body instead of being embedded in the body, so that the substrate structure can be applied in different electronic devices.

接續圖2,如圖13所示,在一些實施例中,設置增層結構23及增層結構24於核心層100的兩側上,以覆蓋核心層 100的頂表面100a、底表面100b、第一線圈11、第一導電層12、第二線圈13、第二導電層14及導孔16。舉例而言,可藉由增層製程將增層結構23及增層結構24層壓於核心層100上,但本揭露不限於此。在一些實施例中,增層結構23包括介電層230以及導電層231,且增層結構24包括介電層240以及導電層241。在一些實施例中,介電層230及介電層240的材料可相似或相同於核心層100的材料,但本揭露不限於此。在一些實施例中,導電層231及導電層241的材料可相似或相同於導電層101的材料,但本揭露不限於此。 Continuing from FIG. 2, as shown in FIG. 13, in some embodiments, a build-up structure 23 and a build-up structure 24 are arranged on both sides of the core layer 100 to cover the core layer 100 includes a top surface 100 a , a bottom surface 100 b , a first coil 11 , a first conductive layer 12 , a second coil 13 , a second conductive layer 14 and a via 16 . For example, the build-up structure 23 and the build-up structure 24 can be laminated on the core layer 100 through a build-up process, but the present disclosure is not limited thereto. In some embodiments, the build-up structure 23 includes a dielectric layer 230 and a conductive layer 231 , and the build-up structure 24 includes a dielectric layer 240 and a conductive layer 241 . In some embodiments, the materials of the dielectric layer 230 and the dielectric layer 240 may be similar or identical to the material of the core layer 100 , but the disclosure is not limited thereto. In some embodiments, the materials of the conductive layer 231 and the conductive layer 241 may be similar or identical to the material of the conductive layer 101 , but the disclosure is not limited thereto.

在一些實施例中,介電層230、核心層100與介電層240可共同稱為主體29。在這種情況下,介電層230的頂表面可稱為主體的第一表面29a。介電層240的底表面可稱為主體的第二表面29b。 In some embodiments, the dielectric layer 230 , the core layer 100 and the dielectric layer 240 may be collectively referred to as the body 29 . In this case, the top surface of the dielectric layer 230 may be referred to as the first surface 29a of the body. The bottom surface of the dielectric layer 240 may be referred to as the second surface 29b of the body.

參照圖14,在一些實施例中,沿著主體29的法線方向Z於主體29中形成通孔31,且使通孔31貫穿主體29的第一表面29a及第二表面29b。在一些實施例中,可藉由雷射鑽孔製程、機械鑽孔製程、其他合適的鑽孔製程或其組合形成通孔31,但本揭露不限於此。 Referring to FIG. 14 , in some embodiments, a through hole 31 is formed in the main body 29 along the normal direction Z of the main body 29 , and the through hole 31 penetrates through the first surface 29 a and the second surface 29 b of the main body 29 . In some embodiments, the via hole 31 may be formed by a laser drilling process, a mechanical drilling process, other suitable drilling processes or a combination thereof, but the disclosure is not limited thereto.

參照圖15,在一些實施例中,於通孔31中填入介電材料,以形成介電部32。在一些實施例中,介電材料可為或可包括熱固性樹脂、光敏樹脂、其組合或其他合適的材料,但本揭露不限於此。在一些實施例中,介電部32與第一線圈11及第二線圈13 在水平面上的間距可為0mm至1mm,但本揭露不限於此。在一些實施例中,介電部32可直接接觸第一線圈11及第二線圈13。 Referring to FIG. 15 , in some embodiments, a dielectric material is filled in the through hole 31 to form a dielectric portion 32 . In some embodiments, the dielectric material may be or include a thermosetting resin, a photosensitive resin, a combination thereof, or other suitable materials, but the disclosure is not limited thereto. In some embodiments, the dielectric part 32 and the first coil 11 and the second coil 13 The spacing on the horizontal plane may be 0 mm to 1 mm, but the present disclosure is not limited thereto. In some embodiments, the dielectric part 32 may directly contact the first coil 11 and the second coil 13 .

參照圖16,在一些實施例中,沿著主體29的法線方向Z於介電部32中形成通孔33,且使通孔33貫穿介電部32的頂表面32a及底表面32b。在一些實施例中,可藉由雷射鑽孔製程、機械鑽孔製程、其他合適的鑽孔製程或其組合形成通孔33,但本揭露不限於此。 Referring to FIG. 16 , in some embodiments, a via hole 33 is formed in the dielectric portion 32 along the normal direction Z of the main body 29 , and the via hole 33 penetrates the top surface 32 a and the bottom surface 32 b of the dielectric portion 32 . In some embodiments, the via hole 33 may be formed by a laser drilling process, a mechanical drilling process, other suitable drilling processes or a combination thereof, but the disclosure is not limited thereto.

參照圖17,在一些實施例中,於通孔33中填入軟磁性材料,以形成軟磁部34。在一些實施例中,所述軟磁性材料可為或可包括鐵、鈷、鎳、其合金或其他合適的材料,但本揭露不限於此。在一些實施例中,可藉由填入柱狀的軟磁性材料以形成軟磁部34。在一些實施例中,可先將粉末狀的軟磁性材料(例如,圖8(B)的軟磁性材料21a)與介電材料(例如,圖8(B)的介電材料21b)混合,再將混和後的材料注入通孔33中以形成軟磁部34。舉例而言,與軟磁性材料互相混和的所述介電材料可相似或相同於介電部32的材料,但本揭露不限於此。 Referring to FIG. 17 , in some embodiments, a soft magnetic material is filled in the through hole 33 to form a soft magnetic portion 34 . In some embodiments, the soft magnetic material may be or include iron, cobalt, nickel, alloys thereof, or other suitable materials, but the present disclosure is not limited thereto. In some embodiments, the soft magnetic portion 34 can be formed by filling columnar soft magnetic material. In some embodiments, the powdered soft magnetic material (for example, the soft magnetic material 21a of FIG. 8(B) ) can be mixed with the dielectric material (for example, the dielectric material 21b of FIG. The mixed material is injected into the through hole 33 to form the soft magnetic portion 34 . For example, the dielectric material mixed with the soft magnetic material may be similar or identical to the material of the dielectric portion 32 , but the disclosure is not limited thereto.

參照圖18及圖19,在一些實施例中,在鄰近第一表面29a的位置處形成第三導電層25、導孔27、第三線圈35及第二導孔37,並在鄰近第二表面29b的位置處形成第四導電層26、導孔28、第四線圈36及第三導孔38。其中,第二導孔37及第三導孔38不位於圖18所示的剖面上,故下文將以圖19中所示進行說明。在一些實施例中,首先形成圖案化遮罩層在導電層231及導 電層241上。舉例而言,圖案化遮罩層可為或可包括光阻,但本揭露不限於此。接著,形成貫穿介電層230及介電層240的盲孔。在一些實施例中,可藉由雷射鑽孔製程、機械鑽孔製程、其他合適的鑽孔製程或其組合形成盲孔,但本揭露不限於此。可替代地,可先形成盲孔在主體29中,再形成圖案化遮罩層在導電層231及導電層241上。 18 and 19, in some embodiments, the third conductive layer 25, the guide hole 27, the third coil 35 and the second guide hole 37 are formed at a position adjacent to the first surface 29a, and are adjacent to the second surface. The fourth conductive layer 26 , the guide hole 28 , the fourth coil 36 and the third guide hole 38 are formed at the position of 29 b. Wherein, the second guide hole 37 and the third guide hole 38 are not located on the cross-section shown in FIG. 18 , so the following will be described as shown in FIG. 19 . In some embodiments, a patterned mask layer is formed on the conductive layer 231 and the conductive layer first. on the electrical layer 241. For example, the patterned mask layer can be or include photoresist, but the disclosure is not limited thereto. Next, a blind hole penetrating through the dielectric layer 230 and the dielectric layer 240 is formed. In some embodiments, the blind holes may be formed by laser drilling process, mechanical drilling process, other suitable drilling processes or a combination thereof, but the disclosure is not limited thereto. Alternatively, blind holes can be formed in the main body 29 first, and then a patterned mask layer can be formed on the conductive layer 231 and the conductive layer 241 .

接續上述製程,在圖案化遮罩層所暴露區域填入導電材料,以在主體29的第一表面29a上形成第三導電層25及第三線圈35,及在主體29的第二表面29b上形成第四導電層26及第四線圈36。換言之,第三導電層25及第三線圈35是藉由同一道製程而同層設置於主體29的第一表面29a上,且因此第三導電層25的底表面25a與第三線圈35的底表面35a彼此齊平。類似地,第四導電層26及第四線圈36是藉由同一道製程而同層設置於主體29的第二表面29b上,且因此第四導電層26的頂表面26a與第四線圈36的頂表面36a齊平。在一些實施例中,可藉由電鍍製程設置導電材料於導電層231及導電層241上,但本揭露不限於此。在一些實施例中,上述的導電材料可相似或相同於導電層101的材料,但本揭露不限於此。 Continuing the above process, fill the exposed area of the patterned mask layer with conductive material to form the third conductive layer 25 and the third coil 35 on the first surface 29a of the main body 29, and on the second surface 29b of the main body 29 The fourth conductive layer 26 and the fourth coil 36 are formed. In other words, the third conductive layer 25 and the third coil 35 are disposed on the first surface 29a of the main body 29 in the same layer through the same process, and therefore the bottom surface 25a of the third conductive layer 25 and the bottom surface of the third coil 35 The surfaces 35a are flush with each other. Similarly, the fourth conductive layer 26 and the fourth coil 36 are disposed on the second surface 29b of the main body 29 in the same layer through the same process, and therefore the top surface 26a of the fourth conductive layer 26 and the fourth coil 36 The top surface 36a is flush. In some embodiments, the conductive material can be disposed on the conductive layer 231 and the conductive layer 241 through an electroplating process, but the disclosure is not limited thereto. In some embodiments, the aforementioned conductive material may be similar or identical to the material of the conductive layer 101 , but the disclosure is not limited thereto.

在一些實施例中,更設置導電材料於盲孔中,以形成導孔27(如圖18所示)、導孔28(如圖18所示)、第二導孔37(如圖19所示)及第三導孔38(如圖19所示)。其中,第三導電層25藉由導孔27與第一導電層12電性連接,且第四導電層26藉由導孔 28與第二導電層14電性連接。除此之外,第二導孔37設置於主體29中,且兩端分別電性連接於第三線圈35及第一線圈11。第三導孔38設置於主體29中,且兩端分別電性連接於第四線圈36及第二線圈13。在一些實施例中,可藉由電鍍製程設置導電材料於盲孔中,但本揭露不限於此。在一些實施例中,上述的導電材料可相似或相同於導電層101的材料,但本揭露不限於此。 In some embodiments, a conductive material is further provided in the blind hole to form a guide hole 27 (as shown in FIG. 18 ), a guide hole 28 (as shown in FIG. 18 ), and a second guide hole 37 (as shown in FIG. 19 ). ) and the third guide hole 38 (as shown in Figure 19). Wherein, the third conductive layer 25 is electrically connected to the first conductive layer 12 through the via hole 27, and the fourth conductive layer 26 is electrically connected to the first conductive layer 12 through the via hole. 28 is electrically connected to the second conductive layer 14 . In addition, the second guide hole 37 is disposed in the main body 29 , and its two ends are electrically connected to the third coil 35 and the first coil 11 respectively. The third guide hole 38 is disposed in the main body 29 , and its two ends are electrically connected to the fourth coil 36 and the second coil 13 respectively. In some embodiments, the conductive material can be disposed in the blind hole by electroplating process, but the disclosure is not limited thereto. In some embodiments, the aforementioned conductive material may be similar or identical to the material of the conductive layer 101 , but the disclosure is not limited thereto.

在一些實施例中,去除圖案化遮罩層之後,移除未被第三導電層25、第四導電層26、導孔27、導孔28、第三線圈35及第四線圈36所遮蔽的導電層231及導電層241。舉例而言,對導電層231及導電層241執行蝕刻製程,直到露出未被第三導電層25、第四導電層26、導孔27、導孔28、第三線圈35及第四線圈36所遮蔽的主體29為止。由於殘留的導電層231及殘留導電層241可分別視為第三導電層25、第四導電層26、導孔27、導孔28、第三線圈35及第四線圈36的一部份,為簡化圖式起見,並未將其單獨示出。 In some embodiments, after the patterned mask layer is removed, the parts not covered by the third conductive layer 25, the fourth conductive layer 26, the via 27, the via 28, the third coil 35 and the fourth coil 36 are removed. The conductive layer 231 and the conductive layer 241 . For example, an etching process is performed on the conductive layer 231 and the conductive layer 241, until the third conductive layer 25, the fourth conductive layer 26, the via hole 27, the via hole 28, the third coil 35, and the fourth coil 36 are exposed. Covered subject 29 so far. Since the remaining conductive layer 231 and the remaining conductive layer 241 can be regarded as a part of the third conductive layer 25, the fourth conductive layer 26, the guide hole 27, the guide hole 28, the third coil 35 and the fourth coil 36 respectively, it is For the sake of simplifying the drawings, they are not shown separately.

如圖19所示,在一些實施例中,第一線圈11、第二線圈13、第三線圈35、第四線圈36、第一導孔15、第二導孔37及第三導孔38可共同稱為線圈部39。在一些實施例中,軟磁部34、介電部32及線圈部39可共同稱為電感組件40。其中,軟磁部34沿著主體29的法線方向Z設置於主體29中,介電部32設置於主體29中並包覆軟磁部34,且線圈部39設置於主體29中並環繞介電部32。如此一來,藉由對線圈部39施加電流(例如,交流 電),可使軟磁部34受到線圈部39所產生的磁場而磁化,從而實現與其他元件或是裝置互動的功效。 As shown in FIG. 19, in some embodiments, the first coil 11, the second coil 13, the third coil 35, the fourth coil 36, the first guide hole 15, the second guide hole 37 and the third guide hole 38 can be They are collectively referred to as the coil portion 39 . In some embodiments, the soft magnetic portion 34 , the dielectric portion 32 and the coil portion 39 may be collectively referred to as an inductor component 40 . Wherein, the soft magnetic part 34 is arranged in the main body 29 along the normal direction Z of the main body 29, the dielectric part 32 is arranged in the main body 29 and covers the soft magnetic part 34, and the coil part 39 is arranged in the main body 29 and surrounds the dielectric part 32. In this way, by applying current (for example, AC Electricity), the soft magnetic part 34 can be magnetized by the magnetic field generated by the coil part 39, so as to achieve the effect of interacting with other components or devices.

在一些實施例中,第一線圈11、第二線圈13、第三線圈35及第四線圈36的內側與其圓心之間的距離可為相同或不相同。在一些實施例中,第一線圈11、第二線圈13、第三線圈35與第四線圈36的線圈直徑可為相同或不相同。 In some embodiments, the distances between the inner sides of the first coil 11 , the second coil 13 , the third coil 35 and the fourth coil 36 and their centers may be the same or different. In some embodiments, the coil diameters of the first coil 11 , the second coil 13 , the third coil 35 and the fourth coil 36 may be the same or different.

在一些實施例中,第一線圈11具有開口110,且其兩端分別電性連接第二導孔37與第一導孔15;第二線圈13具有開口130,且其兩端分別電性連接第三導孔38與第一導孔15;第三線圈35具有開口350,且其兩端分別電性連接第二導孔37與第三導電層25;及第四線圈36具有開口360,且其兩端分別電性連接第三導孔38與第四導電層26。藉由使開口110、開口130、開口350及開口360在主體29的第二表面29b上的投影(例如,投影110a、投影130a、投影350a及投影360a)彼此相鄰但不重疊,可使線圈部17的總線圈長度較大。替代地,藉由使第一導孔15、第二導孔37及第三導孔38在主體29的第二表面29b上的投影(例如,投影15a、投影37a及投影38a)彼此相鄰但不重疊,可使線圈部39的總線圈長度較大。 In some embodiments, the first coil 11 has an opening 110, and its two ends are respectively electrically connected to the second via 37 and the first via 15; the second coil 13 has an opening 130, and its two ends are respectively electrically connected The third via hole 38 and the first via hole 15; the third coil 35 has an opening 350, and its two ends are respectively electrically connected to the second via hole 37 and the third conductive layer 25; and the fourth coil 36 has an opening 360, and Two ends thereof are electrically connected to the third via 38 and the fourth conductive layer 26 respectively. By having the projections of opening 110, opening 130, opening 350, and opening 360 on second surface 29b of body 29 (e.g., projection 110a, projection 130a, projection 350a, and projection 360a) adjacent to each other but not overlapping, the coil The total coil length of section 17 is relatively large. Alternatively, by making the projections of the first guide hole 15, the second guide hole 37 and the third guide hole 38 on the second surface 29b of the main body 29 (for example, the projection 15a, the projection 37a and the projection 38a) adjacent to each other but Without overlapping, the total coil length of the coil portion 39 can be made larger.

參照圖20,在一些實施例中,設置保護層30於主體29的第一表面29a及第二表面29b上,以形成基板結構1b。與基板結構1a相比,基板結構1b中的電感組件40的頂表面40a及底表面40b分別暴露於主體29的第一表面29a及第二表面29b。 換言之,可根據需求來選擇製程,以在基板結構中設置有內埋於主體中的電感組件、貫穿主體的電感組件或其組合。舉例而言,參照圖21,其是根據本揭露的又一些實施例,顯示基板結構的剖面示意圖。如圖所示,可藉由上文中提到的各階段製程的組合同時設置內埋於主體39中的電感組件41以及貫穿主體39的電感組件42,以獲得基板結構1c。 Referring to FIG. 20 , in some embodiments, a protection layer 30 is disposed on the first surface 29 a and the second surface 29 b of the body 29 to form the substrate structure 1 b. Compared with the substrate structure 1a, the top surface 40a and the bottom surface 40b of the inductor element 40 in the substrate structure 1b are respectively exposed to the first surface 29a and the second surface 29b of the main body 29 . In other words, the manufacturing process can be selected according to requirements, so that the substrate structure is provided with an inductance component embedded in the main body, an inductance component penetrating through the main body, or a combination thereof. For example, refer to FIG. 21 , which is a schematic cross-sectional view showing a substrate structure according to still other embodiments of the present disclosure. As shown in the figure, the inductance element 41 embedded in the main body 39 and the inductance element 42 penetrating through the main body 39 can be simultaneously provided by combining the above-mentioned processes at various stages to obtain the substrate structure 1c.

綜上所述,根據本揭露的實施例,提供一種具有電感組件的基板結構。藉由在基板結構的製作過程中一併形成電感組件,不僅可以簡化製程,且可縮減基板結構的整體體積及/或增加晶片連接區域的面積,從而實現基板結構的輕薄化。除此之外,由於本揭露的電感組件可根據使用者需求,以完全內埋或貫穿主體的方式獨立設置或同時設置有多個,從而實現更加靈活的應用性。 To sum up, according to the embodiments of the present disclosure, a substrate structure with an inductor component is provided. By forming the inductance element during the manufacturing process of the substrate structure, not only the manufacturing process can be simplified, but also the overall volume of the substrate structure can be reduced and/or the area of the chip connection area can be increased, thereby realizing thinning of the substrate structure. In addition, since the inductance components of the present disclosure can be installed independently or in multiples in a manner of being completely embedded or penetrating through the main body according to user requirements, thereby achieving more flexible applicability.

本揭露實施例之間的部件只要不違背創作精神或相衝突,均可任意混合搭配使用。此外,本揭露之保護範圍並未侷限於說明書內所述特定實施例中的製程、機器、製造、物質組成、裝置、方法及步驟,任何本領域中的通常知識者可從本揭露內容中理解現行或未來所發展出的製程、機器、製造、物質組成、裝置、方法及步驟,只要可以在此處所述實施例中實施實質上相同功能或獲得實質上相同結果皆可根據本揭露使用。因此,本揭露之保護範圍包括上述製程、機器、製造、物質組成、裝置、方法及步驟。本揭露的任一實施例或請求項不須達成本揭露所公開的全部目的、優點及/或特點。 As long as the components in the disclosed embodiments do not violate the spirit of creation or conflict, they can be mixed and matched arbitrarily. In addition, the protection scope of the present disclosure is not limited to the process, machine, manufacture, material composition, device, method and steps in the specific embodiments described in the specification, and anyone with ordinary knowledge in the field can understand from the disclosure Processes, machines, manufactures, material compositions, devices, methods and steps developed at present or in the future can be used according to the present disclosure as long as they can perform substantially the same functions or obtain substantially the same results in the embodiments described herein. Therefore, the protection scope of the present disclosure includes the above-mentioned process, machine, manufacture, composition of matter, device, method and steps. Any embodiment or claims of the present disclosure need not achieve all the objectives, advantages and/or features disclosed in the present disclosure.

以上概述數個實施例,以便本領域中的通常知識者可以更理解本揭露實施例的觀點。本領域中的通常知識者應該理解的是,能以本揭露實施例為基礎,設計或修改其他製程與結構,以達到與在此介紹的實施例相同之目的及/或優勢。本領域中的通常知識者也應該理解的是,此類等效的製程與結構並無悖離本揭露的精神與範圍,且能在不違背本揭露之精神與範圍之下,做各式各樣的改變、取代與替換。 Several embodiments are summarized above so that those skilled in the art can better understand the viewpoints of the embodiments of the present disclosure. Those skilled in the art should understand that other processes and structures can be designed or modified based on the embodiments disclosed herein to achieve the same purpose and/or advantages as the embodiments introduced herein. Those with ordinary knowledge in this field should also understand that such equivalent processes and structures do not deviate from the spirit and scope of this disclosure, and can be made in various ways without departing from the spirit and scope of this disclosure. Such changes, substitutions and substitutions.

1b:基板結構 1b: Substrate structure

11:第一線圈 11: First coil

12:第一導電層 12: The first conductive layer

13:第二線圈 13: Second coil

14:第二導電層 14: Second conductive layer

16,27,28:導孔 16,27,28: guide hole

25:第三導電層 25: The third conductive layer

26:第四導電層 26: The fourth conductive layer

29:主體 29: subject

29a:第一表面 29a: first surface

29b:第二表面 29b: second surface

30:保護層 30: protective layer

32:介電部 32: Dielectric part

34:軟磁部 34: Soft magnetic part

35:第三線圈 35: The third coil

36:第四線圈 36: Fourth coil

40:電感組件 40: Inductance components

40a:頂表面 40a: top surface

40b:底表面 40b: bottom surface

Z:法線方向 Z: normal direction

Claims (10)

一種基板結構,包括:一主體,具有一法線方向;以及一電感組件,設置於該主體中且至少部分貫穿該主體,該電感組件包括:一軟磁部,沿著該主體的該法線方向設置於該主體中;一介電部,設置於該主體中,並包覆該軟磁部;及一線圈部,設置於該主體中,並環繞該介電部。 A substrate structure, comprising: a main body having a normal direction; and an inductance component disposed in the main body and at least partly passing through the main body, the inductance component comprising: a soft magnetic part along the normal direction of the main body It is arranged in the main body; a dielectric part is arranged in the main body and covers the soft magnetic part; and a coil part is arranged in the main body and surrounds the dielectric part. 如請求項1所述之基板結構,其中該線圈部包括:一第一線圈,設置於該主體中,且非封閉地環繞該介電部;一第二線圈,設置於該主體中,且非封閉地環繞該介電部;以及一第一導孔,設置於該主體中,且兩端分別電性連接於該第一線圈及該第二線圈。 The substrate structure as claimed in claim 1, wherein the coil portion comprises: a first coil disposed in the main body and surrounding the dielectric portion non-closed; a second coil disposed in the main body and not enclosing the dielectric part; and a first guide hole, which is disposed in the main body, and its two ends are electrically connected to the first coil and the second coil respectively. 如請求項2所述之基板結構,其中該電感組件完全內埋於該主體中。 The substrate structure as claimed in claim 2, wherein the inductor element is completely embedded in the main body. 如請求項2所述之基板結構,更包括:一第一導電層,設置於該主體中,且該第一導電層與該第一線圈同層設置;以及一第二導電層,設置於該主體中,且該第二導電層與該第二線圈同層設置。 The substrate structure according to claim 2, further comprising: a first conductive layer disposed in the main body, and the first conductive layer is disposed on the same layer as the first coil; and a second conductive layer disposed on the In the main body, and the second conductive layer is set on the same layer as the second coil. 如請求項2所述之基板結構,其中該線圈部更包 括:一第三線圈,設置於該主體上的一第一表面上,且非封閉地環繞該介電部;一第二導孔,設置於該主體中,且兩端分別電性連接於該第三線圈及該第一線圈;一第四線圈,設置於該主體上的一第二表面上,且非封閉地環繞該介電部,其中該第一表面與該第二表面彼此相對;以及一第三導孔,設置於該主體中,且兩端分別電性連接於該第四線圈及該第三線圈。 The substrate structure as claimed in item 2, wherein the coil portion further includes Comprising: a third coil, arranged on a first surface of the main body, and surrounding the dielectric part in a non-closed manner; a second guide hole, arranged in the main body, and its two ends are respectively electrically connected to the a third coil and the first coil; a fourth coil disposed on a second surface on the body and non-closedly surrounding the dielectric portion, wherein the first surface and the second surface are opposite to each other; and A third guide hole is arranged in the main body, and its two ends are electrically connected to the fourth coil and the third coil respectively. 如請求項5所述之基板結構,其中該電感組件的頂表面及底表面分別暴露於該主體的該第一表面及該第二表面。 The substrate structure as claimed in claim 5, wherein the top surface and the bottom surface of the inductor component are respectively exposed to the first surface and the second surface of the main body. 如請求項5所述之基板結構,更包括:一第三導電層,設置於該主體的該第一表面上,且該第三導電層與該第三線圈同層設置;以及一第四導電層,設置於該主體的該第二表面上,且該第四導電層與該第四線圈同層設置。 The substrate structure according to claim 5, further comprising: a third conductive layer disposed on the first surface of the main body, and the third conductive layer is disposed on the same layer as the third coil; and a fourth conductive layer A layer is disposed on the second surface of the main body, and the fourth conductive layer is disposed on the same layer as the fourth coil. 如請求項5所述之基板結構,其中該第一線圈、該第二線圈、該第三線圈及該第四線圈分別具有一開口,且該些開口在該第二表面上的投影彼此相鄰但不重疊。 The substrate structure according to claim 5, wherein the first coil, the second coil, the third coil and the fourth coil each have an opening, and the projections of the openings on the second surface are adjacent to each other but not overlapping. 如請求項5所述之基板結構,其中該第一導孔、該第二導孔及該第三導孔在該第二表面上的投影彼此相鄰但不重疊。 The substrate structure according to claim 5, wherein projections of the first via, the second via, and the third via on the second surface are adjacent to each other but do not overlap. 如請求項1所述之基板結構,更包括一保護層, 該保護層設置於該主體上。 The substrate structure as claimed in claim 1, further comprising a protective layer, The protective layer is disposed on the main body.
TW112201659U 2023-02-24 2023-02-24 Substrate structure TWM641128U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW112201659U TWM641128U (en) 2023-02-24 2023-02-24 Substrate structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW112201659U TWM641128U (en) 2023-02-24 2023-02-24 Substrate structure

Publications (1)

Publication Number Publication Date
TWM641128U true TWM641128U (en) 2023-05-11

Family

ID=87383020

Family Applications (1)

Application Number Title Priority Date Filing Date
TW112201659U TWM641128U (en) 2023-02-24 2023-02-24 Substrate structure

Country Status (1)

Country Link
TW (1) TWM641128U (en)

Similar Documents

Publication Publication Date Title
US8586875B2 (en) Wiring board and method for manufacturing the same
JP6373574B2 (en) Circuit board and manufacturing method thereof
JP6504565B2 (en) Coil built-in integrated circuit board and method of manufacturing the same
US10388451B2 (en) Inductor component and method for manufacturing inductor component
JP2006190953A (en) Printed circuit board with built-in chip by plating and its manufacturing method
US7745933B2 (en) Circuit structure and process thereof
US20150213946A1 (en) Printed wiring board
KR101392164B1 (en) Microelectronic device and method of manufacturing same
KR20160066311A (en) semi-conductor package and manufacturing method thereof
TW201436660A (en) Multilayered substrate and method of manufacturing the same
JP2018078133A (en) Built-in coil glass substrate and build-up substrate
KR102523852B1 (en) Magnetic core embedded printed circuit board
KR20150006686A (en) Printed Circuit Board and Method of Manufacturing The Same
TWI772480B (en) Method of manufacturing semiconductor package substrate and semiconductor package substrate manufactured using the same
KR102078009B1 (en) Printed circuit board and manufacturing method of the same
TW201637522A (en) Printed circuit boards having profiled conductive layer and methods of manufacturing same
JP6643956B2 (en) Printed wiring board and manufacturing method thereof
CN108811323B (en) Printed circuit board and method for manufacturing the same
US11452212B2 (en) Component carrier with electrically conductive layer structures having windows defined by a conformal mask and tapering at least partially
TWI678952B (en) Circuit board structure and manufacturing method thereof
JP5599860B2 (en) Manufacturing method of semiconductor package substrate
CN104766832A (en) Method of manufacturing semiconductor package substrate and semiconductor package substrate manufactured using same
KR20150065029A (en) Printed circuit board, manufacturing method thereof and semiconductor package
TWM641128U (en) Substrate structure
US20120266463A1 (en) Method for manufacturing printed circuit board