TWM634074U - Printed circuit board processing defect detection and test board structure - Google Patents

Abstract

A printed circuit board process defect inspection test board structure includes a board body, a first metal coating and a second metal coating. The plate body includes at least one insulating plate material, metal foil layers corresponding to two opposite surfaces of the insulating plate material, and at least prepregs respectively arranged between the insulating plate material and the metal foil layer. The plate body has at least one first through hole, at least one first Two ends of a through hole are opened on two metal foil layers and a first ring-shaped metal foil is respectively arranged at the opening. The first metal plating layer is formed on the two metal foil layers, the inner wall of the first through hole and the first annular metal foil. The second metal plating layer is formed on the first metal plating layer that has a defect that the inner wall of the first through hole is concave toward the board, so that the first metal plating layer on the inner wall of the first through hole is electrically connected with the metal circuit pattern layer.

Description

Printed circuit board process defect inspection test board structure

The invention relates to a technical field of printed circuit board testing, in particular to a printed circuit board process defect inspection test board structure for judging the pressing defects of printed circuit boards through the formation of metal plating.

Printed circuit boards are now widely used in various electronic devices, which carry electronic components to achieve predetermined functions and also provide a structure for electrical connection of various electronic components. Existing printed circuit boards include rigid circuit boards and flexible circuit boards. The rigid circuit board is composed of one or more insulating plates made of glass fiber and polymer composite materials. The two opposite surfaces of each insulating plate form The metal circuit pattern layer, and then a prepreg made of glass fiber and polymer composite material is placed between the metal circuit pattern layer and the copper foil layer, and then the copper foil layer is softened by heat to have a flow through a hot pressing process The permanent prepreg is combined with the insulation board.

Among the polymer composite materials used in high-frequency materials, although the material properties have high stability and heat resistance, their fluidity is poor, especially in the lamination process of thick copper (above 2oz) multi-layer boards, often due to Due to poor fluidity, it is impossible to fully fill the various structures of the metal circuit pattern layer, so there are voids or wrinkles.

The current method of checking whether there are defects such as voids or wrinkles in the laminated structure of the printed circuit board is to press the finished product of a printed circuit board under the existing process conditions, and then inspect it by slicing. Test or use flying probe to do short-circuit test, so as to determine whether the structures of the metal circuit pattern layer are fully filled with glue, or have defects such as voids or wrinkles. However, this inspection method needs to add multiple steps, so it is quite labor-intensive and time-consuming.

In view of this, this creation provides a printed circuit board process defect inspection test board structure, which shows different metal colors on the board body according to whether the metal plating is formed or not, so that the air bubbles in the printed circuit board lamination structure can be directly inspected Or wrinkles and other defects, eliminating steps such as slicing, and solving the labor-intensive and time-consuming problems of traditional inspection methods.

An embodiment of the printed circuit board process defect inspection test board structure of the invention includes a board body, a first metal coating layer and a second metal coating layer. The plate body includes two metal foil layers and two insulating plates arranged between the two metal foil layers, each of the two opposite surfaces of the insulating plates forms a metal circuit pattern layer, between the two insulating plates and the At least semi-cured sheets are respectively arranged between the insulating board and the metal foil layer. The board body has a first sub-test area, and the first sub-test area is provided with at least one first through hole, and the two ends of the at least one first through hole are opened in There are two metal foil layers and a first ring-shaped metal foil is respectively provided at the opening. A first ring-shaped isolation area is formed between the first ring-shaped metal foil and the metal foil layer. The first ring-shaped metal foil has a first diameter. The first metal plating layer is formed on the two metal foil layers, the inner wall of the first through hole and the first annular metal foil. The second metal plating layer is formed on the first metal plating layer that has a defect that the inner wall of the first through hole is concave toward the board, so that the first metal plating layer on the inner wall of the first through hole is electrically connected with the metal circuit pattern layer.

In another embodiment, the board body further has a second sub-test area, and the second sub-test area is provided with at least one second through hole, and the two ends of the second through hole are opened on the two metal foil layers and separated at the opening do not There is a second ring-shaped metal foil, a second ring-shaped isolation area is formed between the second ring-shaped metal foil and the metal foil layer, the second ring-shaped metal foil has a second diameter, and the first diameter is equal to the second diameter Differently, the first metal plating layer is formed on the inner wall of the second through hole and the second ring-shaped metal foil, and the second metal plating layer is formed on the inner wall of the second through hole that has a defect that is concave toward the plate, so that the second through hole The first metal plating layer on the inner wall of the hole forms an electrical connection with the metal circuit pattern layer on the first metal plating layer.

In another embodiment, the second sub-test area has a plurality of second through holes, and the plurality of second through holes are arranged in a plurality of second arrays, and the center of each second through hole is connected to the adjacent second through hole. The centers of have a second pitch.

In another embodiment, the first sub-test area has a plurality of first through holes, and the plurality of first through holes are arranged in a plurality of first arrays, and the center of each first through hole is connected to the adjacent first through hole. Centers of the holes have a first pitch that is different from the second pitch.

In another embodiment, a plurality of prepregs are disposed between at least one insulating board and the two metal foil layers.

In another embodiment, the board body includes a plurality of insulating boards, and at least one prepreg is arranged between two adjacent insulating boards.

In another embodiment, the board body includes a plurality of insulating boards, and at least one prepreg is provided between two adjacent insulating boards.

In another embodiment, a plurality of prepregs are arranged between two adjacent insulating boards.

In another embodiment, the first metal coating layer and the second metal coating layer have different metal colors.

In another embodiment, one or more test function holes are provided on the edge of the board for passing through external conductive circuits so as to electrically connect the metal circuit pattern layer with the external power supply.

In another embodiment, a plurality of test function holes correspond to the prepregs.

The printed circuit board process defect inspection test board structure of the present creation may also include: a board body, which includes two metal foil layers and two insulating plates arranged between the two metal foil layers, each of the insulating plates A metal circuit pattern layer is formed on the two opposite surfaces of each, and at least a prepreg is respectively set between the two insulating plates and between the insulating plate and the metal foil layer; wherein, a plurality of test areas are set on the surface of the plate, the The test area includes a plurality of sub-test areas, and each sub-test area has a plurality of through holes, which penetrate the at least one insulating plate and two metal foil layers, and the plurality of through holes are located in the sub-test area. A plurality of arrays are formed in the area, and the array is suitable for a ball grid array package, and the through holes are not provided between the plurality of arrays; and, one or more test function holes are provided on the edge of the board for passing a The external conductive circuit makes the metal circuit pattern layer electrically connected with an external power supply.

In another embodiment, the plurality of sub-test areas are a first sub-test area and a second sub-test area, and the through holes are a plurality of first through holes and a plurality of second through holes; A sub-test area is provided with the first through hole, the two ends of the first through hole are opened on the metal foil layers and a first ring-shaped metal foil is respectively arranged at the opening, the first ring-shaped metal foil and the A first annular isolation area is formed between the metal foil layers, and the first annular isolation area has a first diameter; and, the second sub-test area is provided with the second through hole, and the two holes of the second through hole The ends are opened at the metal foil layers and there is a second ring-shaped metal foil at the opening respectively, a second ring-shaped isolation area is formed between the second ring-shaped metal foil and the metal foil layer, and the second ring-shaped metal foil The isolation region has a second diameter; and, the first diameter is different from the second diameter.

In another embodiment, the second through holes are arranged in a plurality of second arrays, and the center of each second through hole has a second pitch from the center of the adjacent second through holes; and, The first holes arranged in a plurality of first arrays, the center of each first through hole has a first pitch from the center of the adjacent first through hole; and the first pitch is different from the second pitch .

The printed circuit board process defect inspection test board structure of this creation is completed by laminating the board body with the initial process parameters, by using the two metal foil layers on the board body, the inner wall of the first through hole and the first ring-shaped metal foil A first metal plating layer is formed. If the inner wall of the first through hole produces a defect that is sunken to the inside of the board caused by voids or wrinkles, the first metal coating will be formed on the surface of the sunken defect to the inside of the board at the same time, and the first metal coating will be Form electrical connection with the metal circuit pattern layer. Then a conductive line is passed through the test function hole on the edge of the board to connect the metal circuit pattern layer with an external power supply, and then attempt to form a second metal plating layer on the first metal plating layer. If the inner wall of the first through hole has a defect that is sunken to the inside of the plate body, a second metal plating layer will be formed on the first ring-shaped metal foil and the first metal plating layer on the inner wall of the first through hole there, by Whether the second metal coating is formed or not is used to determine whether there is a defect in the board, so as to adjust various process parameters, such as the number and composition of the prepreg, or various conditions of machine operation, to obtain a defect-free board.

1: Printed circuit board process defect inspection test board structure

10: board body

11: Insulation sheet

12: Metal foil layer

13: Prepreg

15: Test function hole

20: Test area

21: The first sub-test area

22: The second sub-test area

23: The third sub-test area

30: The first metal coating

40: Second metal coating

111: metal circuit pattern layer

212: Open end

213: The first ring-shaped metal foil

214: The first circular isolation area

211: The first through hole

221: Second through hole

231: The third through hole

D: defect

D1: first diameter

P: Pressing equipment

P1: first pitch

FIG. 1 is a schematic diagram of an embodiment of the structure of a printed circuit board process defect inspection test board of the present invention.

FIG. 2 is an enlarged view of a part of the structure of the printed circuit board process defect inspection test board shown in FIG. 1 .

FIG. 3 is an enlarged view of an array of first through holes of the printed circuit board process defect inspection test board structure of FIG. 2 .

4 is a cross-sectional view of the structure of the printed circuit board process defect inspection test board of FIG. 1 , wherein the first through hole has a defect that is recessed into the board.

5 is a cross-sectional view of the structure of the printed circuit board process defect inspection test board of FIG. 1 , wherein the external conductive circuit passes through the functional test hole on the edge of the board body and is electrically connected to the metal circuit pattern layer.

FIG. 6 is a cross-sectional view of the structure of the printed circuit board process defect inspection test board of FIG. 1 , wherein a second metal plating layer is formed on the first metal plating layer.

7 is a cross-sectional view of the structure of the printed circuit board defect inspection test board in FIG. 1. There is no defect in the first through hole. Even if the external conductive circuit is electrically connected to the metal circuit pattern layer, the second metal plating layer will not be formed.

Fig. 8 shows the result of inspecting the structure of the printed circuit board process defect inspection test board with only one prepreg set between the insulating boards or between the insulating board and the metal foil layer, and the prepreg has a resin content of 53%.

Fig. 9 shows the results of inspection of the printed circuit board process defect inspection test board structure with two prepregs arranged between insulating plates or between insulating plates and metal foil layers, and the prepregs have a resin content of 53%.

Fig. 10 shows the result of testing the structure of the printed circuit board process defect inspection test board with two prepregs arranged between the insulating boards or between the insulating boards and the metal foil layer, and the prepregs have a resin content of 75%.

FIG. 11 is a schematic diagram showing a plurality of printed circuit board process defect inspection test board structures of the present invention placed in the lamination equipment to test the lamination operation of the lamination equipment.

Please refer to FIG. 1 , FIG. 2 , FIG. 3 and FIG. 4 , which represent an embodiment of the structure of the printed circuit board process defect inspection test board of the present invention. Inspection and testing of printed circuit board process defects in this embodiment The plate structure 1 includes a plate body 10 . The board body 10 includes two insulating boards 11 and two metal foil layers 12 . The insulation board 11 is composed of polymer composite material (such as epoxy resin or polyphenylene ether) uniformly distributed in the glass fiber structure. Metal circuit pattern layers 111 are formed on both surfaces of each insulating board 11 , and the metal foil layer 12 in this embodiment is a copper foil layer. A prepreg 13 is arranged between the two insulating plates 11 , and a prepreg 13 is also arranged between the insulating plates 11 and the metal foil layer 12 . Then, the two insulation boards 11 are bonded through the prepreg 13 through a hot pressing process, and the prepreg 13 fills up the structure of the metal circuit pattern layer 111 of the adjacent insulation boards 11 . In addition, the insulating board 11 and the metal foil layer 12 are also bonded via the prepreg 13 , and the prepreg fills the space between the metal circuit pattern layer 111 of the insulating board 11 and the metal foil layer 12 . The prepreg 13 of this embodiment is formed by distributing glass fibers in a polyphenylene ether resin substrate.

A plurality of test areas 20 are set on the surface of the board body 10 . At least one of the test areas 20 includes a first sub-test area 21, a second sub-test area 22 and a third sub-test area 23, preferably each test area 20 includes a first sub-test area 21, a second sub-test area 22 and the third sub-test area 23. The first sub-test area 21 has a plurality of first through holes 211 , the second sub-test area 22 has a plurality of second through holes 221 , and the third sub-test area 23 has a plurality of third through holes 231 . A plurality of first through holes 211 form at least one array in the first sub-test area 21, preferably multiple arrays, such as a plurality of first arrays; a plurality of second through holes 221 form at least one array in the second sub-test area 22. array, preferably a plurality of arrays, such as a plurality of second arrays; the third through hole 231 forms at least one array in the third sub-test area 23, preferably a plurality of arrays, such as a plurality of third arrays, suitable for ball grid array package. In other words, the test area 20 includes a plurality of sub-test areas, such as the first sub-test area 21, the second sub-test area 22 and the third sub-test area 23, and each sub-test area has a plurality of through holes, such as the aforementioned first sub-test area. The test area 21 is provided with a plurality of first through holes 211, and the second sub-test area 22 has a plurality of second through holes 221. The three sub-test areas 23 have a plurality of third through-holes 231 , and the plurality of through-holes form multiple arrays in the sub-test area, and the aforementioned through-holes are not arranged between the multiple arrays. The aforementioned through holes, the first through hole 211 , the second through hole 221 and the third through hole 231 pass through the two insulating boards 11 , the prepreg 13 and the two metal foil layers 12 .

As shown in FIG. 3 , it is an array (first array) formed by a plurality of first through holes 211. Here, the array formed by the first through holes 211 is used as an example for illustration. The second through holes 221 and The arrays formed by the third through holes 231 (the second array and the third array) have similar properties to the array of the first through holes 211 (the first array), and the difference is that the first through holes 211 and the second through holes 221 It has the same aperture as the third through hole 231, and is arranged according to the difference between the center pitch (pitch) of the adjacent through holes and the first diameter D1 of the first annular isolation region 214 (see later and FIG. 4 ). Arrays of different sizes. In this embodiment, the centers of the adjacent first through holes 211 have a first pitch P1, and the adjacent second through holes 221 have a second pitch between them. The first pitch P1 is larger than the second pitch and thus different. In other words, among the plurality of through-holes in each sub-test area, the centers of two adjacent through-holes have a pitch, and the pitches in each sub-test area are different.

As shown in FIG. 4, both ends of the first through hole 211 are opened in the metal foil layer 12, and the two opening ends 212 of the first through hole 211 respectively form a first ring-shaped metal foil 213, and the first ring-shaped metal foil 213 and A first annular isolation region 214 insulated from each other is formed between the metal foil layers 12 . The first annular isolation region 214 has a first diameter D1. Similarly, although not shown in the figure, the two ends of the second through hole 221 are also opened in the metal foil layer 12, and the two opening ends of the second through hole 221 respectively form a second ring-shaped metal foil, and the second ring-shaped metal foil is connected with the metal foil. A second annular isolation region insulated from each other is formed between the foil layers. The second annular isolation region has a second diameter, and the first diameter D1 is greater than or equal to the second diameter and thus different or the same. In particular, the multiple arrays formed by a plurality of through holes in the sub-test area where they are located, the The diameters of the annular isolation regions of the vias in adjacent arrays are different. In other words, both ends of each of the through holes of each of the arrays in each of the sub-testing areas are opened on the metal foil layers 12 and a ring-shaped metal foil is respectively arranged at the opening, and the ring-shaped metal foil and the metal foil layer 12 An annular isolation area is formed therebetween, and the annular isolation area has a diameter, and the diameters of the arrays of the sub-test areas are different.

The printed circuit board process defect inspection test board structure 1 of this embodiment also includes a first metal coating 30, the first metal coating 30 can be formed on the metal foil layer 12, the inner wall of the first through hole 211 and the On the first annular metal foil 213 at both ends of the first through hole 211 . If the plate body 10 has defects such as air bubbles or wrinkles during the hot pressing process, usually after the first through hole 211 is drilled, the defects such as air bubbles or wrinkles will communicate with the first through hole 211 to form a first through hole. The inner wall of the hole 211 produces a defect D that is sunken into the plate body 10 . Therefore, when the first metal coating 30 is formed on the inner wall of the first through hole 211, the surface of the defect D recessed into the plate body 10 will also form the first metal coating 30 at the same time, and the first metal coating 30 will be in contact with the insulating plate. The metal circuit pattern layer 111 on the surface of 11 forms an electrical connection.

Then, as shown in FIG. 5 , the conductive circuit C extends into the board body 10 from the test function hole 15 at the edge of the board body 10 , and forms an electrical connection with the metal circuit pattern layer 111 . The test function hole 15 in this embodiment is set corresponding to the filling layer of the prepreg 13 . Next, as shown in FIG. 6 , an attempt is made to form a second metal plating layer 40 on the first metal plating layer 30 by electroplating. Since the first metal plating layer 30 on the surface of the defect D recessed into the board body 10 forms an electrical connection with the metal circuit pattern layer 111 on the surface of the insulating board 11, the inner wall of the first through hole 211 and the first ring-shaped metal The first metal plating layer 30 of the foil 213 forms an electrical connection with the metal circuit pattern layer 111, thereby forming a first metal plating layer 30 on the inner wall of the first through hole 211, the first annular metal foil 213 and the defect D. Two metal coatings 40 .

As shown in Figure 7, if there are no defects such as cavitation or wrinkles in the plate body 10, when the first through hole 211 is drilled, the inner wall of the first through hole 211 will not sag into the plate body 10. defect. The subsequently formed first metal plating layer 30 will not be electrically connected to the metal circuit pattern layer 111 , so the second metal plating layer will not be formed on the first metal plating layer 30 by electroplating.

The first metal coating 30 of the present embodiment is a copper coating, and the second metal coating 40 is a tin coating. The metal color of copper (copper red) is different from the metal color of tin (tin gray). The color of the second metal coating can determine whether there are defects such as voids or wrinkles in the plate body 10 .

Utilizing the printed circuit board process defect inspection test board structure 1 of the present creation, it is possible to quickly judge from the appearance of the board body 10 whether there are defects such as voids or wrinkles in the board body 10, so that various parameters of the hot-pressing process can be adjusted in real time, And achieve the predetermined yield.

FIG. 8 shows that only one prepreg 13 is provided between the insulating sheets 11 or between the insulating sheet 11 and the metal foil layer 12 and the prepreg 13 has a resin content of 53%. In the array of the first through holes 211, it can be seen that a large number of second metal coatings 40 appear at the first metal coating 30, so it can be judged that only one prepreg 13 is not easy to completely fill the structure of the metal circuit pattern layer 111. Numerous vacuoles or wrinkles occur.

FIG. 9 shows that two prepregs 13 are arranged between the insulating boards 11 or between the insulating boards 11 and the metal foil layer 12 and the prepregs 13 have a resin content of 53%. It can be seen from the printed circuit board process defect inspection test board structure 1 shown in the figure that the area of the second metal plating layer 40 is greatly reduced, indicating that the use of two prepregs 13 can more completely fill the structure of the metal circuit pattern layer 111. Cavitation or wrinkles occur only in a few places.

FIG. 10 shows that two prepregs 13 are arranged between the insulating plates 11 or between the insulating plates 11 and the metal foil layer 12 and the prepregs 13 have a resin content of 75%. From the inspection test board structure 1 shown in the figure, it can be seen that the second metal plating layer 40 does not appear at all, which means that the board body 10 has no voids or wrinkles at all.

Through the process shown in FIG. 8, FIG. 9 and FIG. 10, the printed circuit board process defect inspection test board structure 1 of the invention can be used to display the bonding structure of the board body 10 after adjusting the quantity and composition of the prepreg 13, In this way, the quantity and composition of the prepreg 13 can be adjusted step by step until the board body 10 does not have voids or wrinkles.

As shown in Figure 11, multiple printed circuit board process defect inspection test board structures 1 of this invention can be placed in multiple positions of the lamination equipment P, and after a lamination process, multiple printed circuit board process defect inspection The test board structure 1 forms the first metal coating and attempts to form the second metal coating respectively. By judging the area size and position of the second metal coating, it can be judged whether the pressure and temperature of the pressing equipment P at each position are appropriate. According to this Make adjustments.

The printed circuit board process defect inspection test board structure of this creation is completed by laminating the board body with the initial process parameters, by using the two metal foil layers on the board body, the inner wall of the first through hole and the first ring-shaped metal foil A first metal plating layer is formed. If the inner wall of the first through hole produces a defect that is sunken to the inside of the plate caused by voids or wrinkles, the first metal coating will be formed on the surface of the defect that is sunken to the inside of the plate at the same time, and the first metal coating It will form an electrical connection with the metal circuit pattern layer. Then a conductive line is passed through the test function hole on the edge of the board to connect the metal circuit pattern layer with an external power supply, and then attempt to form a second metal plating layer on the first metal plating layer. If the inner wall of the first through hole has a defect that is sunken to the inside of the plate body, a second metal plating layer will be formed on the first ring-shaped metal foil and the first metal plating layer on the inner wall of the first through hole there, by Whether the second metal coating is formed or not is used to determine whether there is production in the board. Defects are generated, so as to adjust various process parameters, such as the number and composition of prepregs or various conditions of machine operation, so as to obtain defect-free boards.

However, the above is only a preferred embodiment of this creation, and should not limit the scope of implementation of this creation, that is, all simple equivalent changes and modifications made according to the patent scope of this creation and the content of the new description, All still belong to the scope covered by this creation patent. In addition, any embodiment or patent scope of this creation does not need to achieve all the purposes or advantages or characteristics disclosed in this creation. In addition, the abstract part and the title are only used to assist in the search of patent documents, and are not used to limit the scope of rights of this creation. In addition, terms such as "first" and "second" mentioned in this specification or the scope of the patent application are only used to name elements (elements) or to distinguish different embodiments or ranges, and are not used to limit the number of elements. upper or lower limit.

11: Insulation sheet

12: Metal foil layer

13: Prepreg

30: The first metal coating

40: Second metal coating

111: metal circuit pattern layer

212: Open end

213: The first ring-shaped metal foil

214: The first circular isolation area

211: The first through hole

D: defect

D1: first diameter

Claims (14)

A printed circuit board process defect inspection test board structure, which includes: a board body (10), which includes two metal foil layers (12) and two insulating boards ( 11), two opposite surfaces of each insulating plate (11) respectively form a metal circuit pattern layer (111), between the two insulating plates (11) and between the insulating plate (11) and the metal foil layer (12) ) are respectively provided with at least half-cured sheets (13), the plate body (10) has a first sub-test area (21), and the first sub-test area (21) is provided with at least one first through hole (211), Both ends of the at least one first through hole (211) are opened in the metal foil layers (12), and a first ring-shaped metal foil (213) is respectively provided at the opening, and the first ring-shaped metal foil (213) A first annular isolation region (214) is formed between the metal foil layer (12), the first annular isolation region (214) has a first diameter (D1); a first metal plating layer (30), formed on the metal foil layers (12), the inner wall of the at least one first through hole (211), and the first annular metal foil (213); and a second metal plating layer (40) formed on the The inner wall of at least one first through hole (211) has a defect (D) recessed toward the plate body (10), so that the first metal coating (30) on the inner wall of at least one first through hole (211) On the first metal plating layer (30) electrically connected with the metal circuit pattern layer (111). As the printed circuit board process defect inspection test board structure described in claim 1, wherein the board body (10) further has a second sub-test area (22), and the second sub-test area (22) is provided with at least one first Two through holes (221), the two ends of the at least one second through hole (221) are opened in the metal foil layers (12) and there is a second ring-shaped metal foil at the opening, the second ring-shaped metal foil A second annular isolation zone is formed between the foil and the metal foil layer (12), the second annular isolation zone has a second diameter, the first diameter (D1) is different from the second diameter, the first A metal plating layer (30) is formed on the inner wall of the at least one second through hole (221) and the second annular metal foil, and the second metal plating layer (40) is formed on the at least one second through hole (221 ) has an inner wall facing The recessed defect (D) of the plate body (10) makes the first metal plating layer (30) on the inner wall of the at least one second through hole (221) form an electrical connection with the metal circuit pattern layer (111). On the first metallization layer (30) of the connection. The printed circuit board process defect inspection test board structure as described in claim 2, wherein the second sub-test area (22) has a plurality of the second through holes (221), and the second through holes (221) are arranged as A plurality of second arrays, the center of each second through hole (221) has a second pitch from the center of the adjacent second through hole (221); the first sub-test area (21) has a plurality of The first through holes (211), the first through holes (211) are arranged in a plurality of first arrays, the center of each first through hole (211) is connected to the adjacent first through hole (211) The center of has a first pitch (P1); and, the first pitch (P1) is different from the second pitch. The printed circuit board process defect inspection test board structure according to claim 1, wherein a plurality of the prepregs (13) are respectively arranged between the at least one insulating plate (11) and the metal foil layers (12). The printed circuit board process defect inspection test board structure as described in claim 1, wherein the board body (10) includes a plurality of the insulating boards (11), and at least one The prepreg (13). According to the printed circuit board process defect inspection test board structure described in claim 5, a plurality of the prepregs (13) are arranged between two adjacent insulating plates (11). The printed circuit board process defect inspection test board structure according to claim 1, wherein the first metal plating layer (30) and the second metal plating layer (40) have different metal colors. The printed circuit board process defect inspection test board structure according to claim 7, wherein the first metal plating layer (30) is a copper plating layer, and the second metal plating layer (40) is a tin plating layer. As the printed circuit board process defect inspection test board structure described in claim 1, wherein the edge of the board body (10) is provided with one or more test function holes (15) for passing an external conductive circuit to make the metal circuit The pattern layer (111) is electrically connected with an external power source. The printed circuit board process defect inspection test board structure according to Claim 9, wherein the test function holes (15) correspond to the prepregs (13). A printed circuit board process defect inspection test board structure, comprising: a board body (10), which includes two metal foil layers (12) and two insulating plates (11) arranged between the two metal foil layers (12) ), two opposite surfaces of each insulating sheet (11) form a metal circuit pattern layer (111) respectively, between the two insulating sheets (11) and between the insulating sheet (11) and the metal foil layer (12) At least half-cured sheets (13) are respectively arranged between them; wherein, the surface of the plate body (10) is provided with a plurality of test areas (20), and the test area (20) includes a plurality of sub-test areas, each of which has a plurality of sub-test areas. a through hole, the through hole runs through the insulating plate (11), the prepreg (13) and the two metal foil layers (12), a plurality of the through holes form a plurality of arrays in the sub-test area where they are located, The array is suitable for a ball grid array package, and the through holes are not provided between a plurality of the arrays; and the edge of the board (10) is provided with one or more test function holes (15) for passing through a The external conductive circuit makes the metal circuit pattern layer (111) form an electrical connection with an external power supply. As the printed circuit board process defect inspection test board structure described in claim 11, wherein the plurality of sub-test areas are a first sub-test area (21) and a second sub-test area (22), the through hole is It is a plurality of first through holes (211) and a plurality of second through holes (221); the first sub-test area (21) is provided with the first through holes (211), and the first through holes (211) Both ends are opened on the metal foil layers (12), and a first ring-shaped metal foil (213) is respectively provided at the opening, and a ring-shaped metal foil (213) is formed between the first ring-shaped metal foil (213) and the metal foil layer (12). a first annular isolation region (214), the first annular isolation region (214) having a first diameter (D1); And, the second sub-test area (22) is provided with the second through hole (221), and the two ends of the second through hole (221) are opened in the metal foil layers (12) and have a A second annular metal foil, a second annular isolation region is formed between the second annular metal foil and the metal foil layer (12), the second annular isolation region has a second diameter; and, the first annular isolation region has a second diameter; A diameter (D1) is different from the second diameter. The printed circuit board process defect inspection test board structure as described in claim 12, wherein the second through holes (221) are arranged in a plurality of second arrays, and the center of each second through hole (221) is adjacent to The centers of the second through-holes (221) have a second pitch; and, the first through-holes (211) are arranged in a plurality of first arrays, and the center of each of the first through-holes (211) and Centers of adjacent first through holes (211) have a first pitch (P1); and, the first pitch (P1) is different from the second pitch. The printed circuit board process defect inspection test board structure as described in claim 11, wherein among the plurality of through holes in each sub-test area, the centers of two adjacent through holes have a pitch, and each sub-test The pitches of the regions are different; and, the two ends of each through-hole of each of the arrays in each of the sub-test regions are opened on the metal foil layers (12), and a ring-shaped metal foil is respectively provided at the opening, the An annular isolation area is formed between the annular metal foil and the metal foil layer (12). The annular isolation area has a diameter, and the diameters of the arrays of the sub-test areas are different.

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