TWM622367U - Electronic component carrier - Google Patents

Electronic component carrier Download PDF

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Publication number
TWM622367U
TWM622367U TW110205933U TW110205933U TWM622367U TW M622367 U TWM622367 U TW M622367U TW 110205933 U TW110205933 U TW 110205933U TW 110205933 U TW110205933 U TW 110205933U TW M622367 U TWM622367 U TW M622367U
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Taiwan
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layers
electronic component
conductive pins
component carrier
board
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TW110205933U
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Chinese (zh)
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高耀華
陳建全
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環球聯通科技股份有限公司
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Priority to TW110205933U priority Critical patent/TWM622367U/en
Publication of TWM622367U publication Critical patent/TWM622367U/en

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Abstract

一種電子元件載板,包含複數沿上下方向彼此相間隔排列的層板、複數沿上下方向與該等層板交錯排列的絕緣層、複數穿設該等層板及該等絕緣層的導電銷,及複數連接該等導電銷外周面且線長及線徑相等的導線。由於該等導電銷的外徑及該等導線的長度及線徑皆相同,因此阻抗相等而不需另外調整,進而克服習知阻抗不均之問題,當該電子元件載板作為檢測載板使用時,可確保檢測精準性。An electronic component carrier board, comprising a plurality of laminates arranged at intervals along the up-down direction, a plurality of insulating layers arranged alternately with the laminates in the up-down direction, a plurality of conductive pins passing through the laminates and the insulating layers, and a plurality of wires connected to the outer peripheral surfaces of the conductive pins and having the same length and diameter. Since the outer diameters of the conductive pins and the lengths and diameters of the wires are the same, the impedances are equal without additional adjustment, thereby overcoming the problem of uneven impedance in the prior art. When the electronic component carrier is used as a detection carrier can ensure the detection accuracy.

Description

電子元件載板Electronic component carrier board

本新型是有關於一種載板,特別是指一種電子元件載板。 The present invention relates to a carrier board, in particular to an electronic component carrier board.

印刷電路板是現代科技產品中不可或缺的載板元件,其主要是用來搭載電子元件並導通特定電路,現時印刷電路板的佈線製程,是在塑膠板的單面或兩面上依照所需的電路印製出導電銅箔,若印刷電路板為雙層板,則需要在塑膠板的兩面上印製導電銅箔,並在塑膠板上開設導孔(via),使兩面的導電銅箔可以相連接。只要將各式電子元件安裝在完成後的印刷電路板上,導電銅箔就會將這些電子元件連接起來而組成完整的電路。 The printed circuit board is an indispensable carrier component in modern technology products. It is mainly used to carry electronic components and conduct specific circuits. The current wiring process of printed circuit boards is based on one or both sides of the plastic board as required. If the printed circuit board is a double-layer board, it is necessary to print conductive copper foil on both sides of the plastic board, and open vias on the plastic board to make the conductive copper foil on both sides. can be connected. As long as various electronic components are mounted on the finished printed circuit board, the conductive copper foil will connect these electronic components to form a complete circuit.

有鑑於科技不斷發展,電子產品功能日益複雜,印刷電路板的電路複雜度也不斷上升,單層板或雙層板的形式已然無法滿足需求,因此出現了多層板形式的印刷電路板。多層式印刷電路板是先準備多層表面印製有銅箔線路的層板,並依需求在層板上進行開孔,接著將這些層板與絕緣的膠片上下交錯疊合,並透過高溫高壓的壓合機將彼此緊密結合,前面所述的開孔會彼此相連而形成貫 通所有層板的導通孔(plate through hoe)、單向開通至外層層板的盲孔(blind via hole),以及僅在內層部分層板之間相連通的埋孔(beried via hole)。這些導通孔、盲孔及埋孔是透過內部電鍍銅的方式與各層板上的銅箔線路相連,從而完成佈線,這些銅箔線路會再與電子元件或連接器等進行連接。但這些銅箔線路的線長甚至是線徑往往並不相等,導致訊號傳輸時產生阻抗不均之問題,需要透過其他方式來調整阻抗匹配,且調整效果有限,此問題在高頻訊號傳輸時尤為嚴重。當測試載板(load board)等需要進行高精密檢測的載板出現此類問題時,將會大幅影響檢測結果的可信度。 In view of the continuous development of science and technology, the increasingly complex functions of electronic products, and the increasing circuit complexity of printed circuit boards, the form of single-layer board or double-layer board can no longer meet the demand, so printed circuit boards in the form of multi-layer boards have emerged. The multilayer printed circuit board is to prepare a multilayer board with copper foil circuit printed on the surface, and make holes on the board according to the requirements, and then stack these layers with the insulating film up and down, and pass through the high temperature and high pressure. The presses will be tightly combined with each other, and the aforementioned openings will be connected to each other to form a through-hole. There are plate through hoes that pass through all the layers, blind via holes that open unidirectionally to the outer layers, and buried vias that only communicate between some inner layers. These vias, blind vias and buried vias are connected to the copper foil circuits on each layer board through internal electroplating of copper to complete the wiring. These copper foil circuits will then be connected to electronic components or connectors. However, the wire lengths and even the wire diameters of these copper foil lines are often not equal, resulting in the problem of uneven impedance during signal transmission. It is necessary to adjust the impedance matching through other methods, and the adjustment effect is limited. This problem occurs when high-frequency signals are transmitted. especially serious. When such a problem occurs on a load board that requires high-precision testing, such as a load board, the reliability of the testing result will be greatly affected.

因此,本新型之目的,即在提供一種可避免阻抗不均而能提高訊號傳輸精確性的電子元件載板。 Therefore, the purpose of the present invention is to provide an electronic component carrier board which can avoid uneven impedance and improve the accuracy of signal transmission.

於是,本新型電子元件載板,包含複數沿上下方向彼此相間隔排列的層板、複數沿上下方向與該等層板交錯排列的絕緣層、複數穿設該等層板及該等絕緣層的導電銷,及複數連接該等導電銷且線長及線徑相等的導線。每一層板形成複數由頂面延伸至底面的貫孔,該層板的每一貫孔與相鄰層板的其中一貫孔對齊,沿上下方向相互對齊的該等貫孔相互連通而構成一插槽。每一絕緣層設置於兩相鄰層板之間。該等導電銷插置於該等插槽中。每一導線連 接其中一導電銷之外周面,且被包覆於其中一絕緣層中,從而位於相對應的兩個層板之間,該導線沿該等層板的水平方向延伸走線。 Therefore, the new electronic component carrier board includes a plurality of layers arranged at intervals along the up-down direction, a plurality of insulating layers arranged alternately with the layers in the up-down direction, and a plurality of layers passing through the layers and the insulating layers. Conductive pins, and a plurality of wires connecting the conductive pins and having the same length and diameter. Each layer plate forms a plurality of through holes extending from the top surface to the bottom surface, each through hole of the layer plate is aligned with one of the through holes of the adjacent layer plate, and the through holes aligned with each other in the up-down direction communicate with each other to form a slot . Each insulating layer is disposed between two adjacent layers. The conductive pins are inserted into the slots. Each wire is connected The conductive pins are connected to the outer peripheral surface of one of the conductive pins, and are covered in one of the insulating layers, so as to be located between the two corresponding layers, and the wires extend and route along the horizontal direction of the layers.

本新型之功效在於:該等導線連接該等導電銷的外周面,由於該等導電銷的外徑及該等導線的長度及線徑皆相同,因此阻抗相等而不需另外調整,進而克服習知阻抗不均之問題,當該電子元件載板作為檢測載板使用時,可確保檢測精準性。 The effect of the present invention is that the wires are connected to the outer peripheral surfaces of the conductive pins. Since the outer diameters of the conductive pins and the lengths and diameters of the wires are the same, the impedances are equal and do not need to be adjusted separately. Knowing the problem of uneven impedance, when the electronic component carrier is used as a detection carrier, the detection accuracy can be ensured.

11:前置步驟 11: Preliminary steps

12:穿置步驟 12: Threading steps

13:走線步驟 13: Trace steps

14:填層步驟 14: layer filling step

15:疊層步驟 15: Lamination step

2:層板 2: Laminate

21:貫孔 21: Through hole

3:導電銷 3: Conductive pins

4:導線 4: Wire

5:絕緣層 5: Insulation layer

6:電子元件載板 6: Electronic component carrier board

7:連接器 7: Connector

本新型之其它的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中:圖1是一流程圖,說明本新型電子元件載板的佈線方法;圖2是一立體圖,說明該佈線方法之一前置步驟;圖3是一立體圖,說明該佈線方法之一穿置步驟;圖4是一立體圖,說明該佈線方法之一走線步驟;圖5是一立體圖,說明該佈線方法之一填層步驟;及圖6是一立體圖,說明該佈線方法所製成之一電子元件載板,為本新型電子元件載板之一實施例。 Other features and effects of the present invention will be clearly presented in the embodiments with reference to the drawings, wherein: FIG. 1 is a flowchart illustrating the wiring method of the electronic component carrier of the present invention; FIG. 2 is a perspective view illustrating the One of the pre-steps of the wiring method; FIG. 3 is a perspective view illustrating a threading step of the wiring method; FIG. 4 is a perspective view illustrating a wiring step of the wiring method; FIG. 5 is a perspective view illustrating the wiring method. and FIG. 6 is a perspective view illustrating an electronic component carrier board made by the wiring method, which is an embodiment of the new electronic component carrier board.

參閱圖1與圖2,本新型電子元件載板的佈線方法,包含 一前置步驟11、一穿置步驟12、一走線步驟13、一填層步驟14,及一疊層步驟15。在該前置步驟11中,準備複數層板2,每一層板2上形成有複數排列成矩陣且各自由頂面延伸至底面的貫孔21。在本實施例中,該層板2可以是塑膠板或密集板。該等貫孔21也可視需求排列成不同形狀,不應以矩陣之排列方式為限。 Referring to FIG. 1 and FIG. 2, the wiring method of the electronic component carrier board of the present invention includes: A pre-processing step 11 , a threading step 12 , a wiring step 13 , a layer filling step 14 , and a stacking step 15 . In the pre-step 11, a plurality of layers 2 are prepared, and each layer 2 is formed with a plurality of through holes 21 arranged in a matrix and each extending from the top surface to the bottom surface. In this embodiment, the layer board 2 can be a plastic board or a dense board. The through holes 21 can also be arranged in different shapes according to requirements, and should not be limited by the arrangement of the matrix.

參閱圖1及圖3,在該穿置步驟12中,選擇一欲置於最底層的一個層板2,將該等導電銷3分別穿設該層板2之該等貫孔21。需要特別說明的是,本實施例中是以導電銷3數量與該等貫孔21數量相同為例,在實際考量走線等需求後,該等導電銷3的數量可以小於該等貫孔21之數量。 Referring to FIG. 1 and FIG. 3 , in the insertion step 12 , a laminate 2 to be placed on the bottommost layer is selected, and the conductive pins 3 are respectively inserted through the through holes 21 of the laminate 2 . It should be noted that, in this embodiment, the number of the conductive pins 3 is the same as the number of the through holes 21 as an example, after the actual requirements such as wiring are considered, the number of the conductive pins 3 can be smaller than the through holes 21. the quantity.

參閱圖1及圖4,在該走線步驟13中,將數條長度等長且線徑等寬的銅製導線4焊接在該等導電銷3之外周面上,且每一條導線4在該層板2的頂面及底面沿水平方向走線(圖4中的走線路徑僅是示意,實際路徑可繞可彎,不限於直線)。該等導線4的數量可視走線的線路需求決定,也就是不見得會與該等導電銷3的數量相等。參閱圖1及圖5,在該填層步驟14中,在該層板2的頂面覆蓋一層絕緣層5,該絕緣層5會包覆該等導線4。 Referring to FIG. 1 and FIG. 4 , in the routing step 13, several copper wires 4 with equal lengths and wire diameters are welded to the outer peripheral surfaces of the conductive pins 3, and each wire 4 is on the layer The top and bottom surfaces of the board 2 are routed in the horizontal direction (the route of the route in FIG. 4 is only a schematic diagram, and the actual route can be rounded or bent, and is not limited to a straight line). The number of the wires 4 may be determined by the line requirements of the wiring, that is, it may not necessarily be equal to the number of the conductive pins 3 . Referring to FIGS. 1 and 5 , in the layer filling step 14 , an insulating layer 5 is covered on the top surface of the laminate 2 , and the insulating layer 5 covers the wires 4 .

參閱圖1及圖6,在該疊層步驟15中,選擇下一個層板2,並重複進行該穿置步驟12、該走線步驟13,及該填層步驟14,也就是將該等導電銷3穿過該等貫孔21,使該層板2疊置於該絕緣層5 上,接著依照需求將複數導線4焊接於相對應的導電銷3上,且該等導線4在該層板2的頂面及底面(也可以僅在頂面或底面)沿水平方向走線,而後在該層板2的頂面再覆蓋一層絕緣層5以包覆該等導線4。如此不斷進行前述流程直至該等層板2全數上下疊層排列,最後透過壓合將該等層板2及該等絕緣層5壓合製成一電子元件載板6,即為本新型電子元件載板6之一實施例,該電子元件載板6包含複數沿上下方向彼此相間隔排列的層板2、複數沿上下方向與該等層板2交錯排列的絕緣層5、複數穿設該等層板2及該等絕緣層5的導電銷3,及複數連接該等導電銷3且線長及線徑相等的導線4。該電子元件載板6之每一層板2的每一個貫孔21,會與相鄰兩層板2的一個貫孔21對齊並相互連通,所有沿上下方向相互對齊的該等貫孔21相互連通而構成一插槽,該等導電銷3分別位於該等插槽中。 Referring to FIG. 1 and FIG. 6, in the lamination step 15, select the next layer 2, and repeat the threading step 12, the wiring step 13, and the filling step 14, that is, the conductive The pins 3 pass through the through holes 21 so that the laminate 2 is stacked on the insulating layer 5 Then, solder a plurality of wires 4 to the corresponding conductive pins 3 according to the requirements, and the wires 4 are routed in the horizontal direction on the top surface and the bottom surface (or only the top surface or the bottom surface) of the layer board 2, Then, an insulating layer 5 is covered on the top surface of the laminate 2 to cover the wires 4 . In this way, the aforementioned process is continuously performed until all the laminates 2 are stacked on top of each other, and finally the laminates 2 and the insulating layers 5 are pressed together to form an electronic component carrier 6, which is a new type of electronic component. One embodiment of the carrier board 6, the electronic component carrier board 6 includes a plurality of layers 2 arranged at intervals along the up-down direction, a plurality of insulating layers 5 arranged alternately with the layers 2 in the up-down direction, and a plurality of layers through the The conductive pins 3 of the laminate 2 and the insulating layers 5, and a plurality of wires 4 connected to the conductive pins 3 and having the same length and diameter. Each through hole 21 of each layer 2 of the electronic component carrier board 6 is aligned with and communicated with a through hole 21 of two adjacent layers 2, and all the through holes 21 aligned with each other in the up-down direction communicate with each other A slot is formed, and the conductive pins 3 are respectively located in the slot.

該等導線4是連接於該等導電銷3的外周面上,由於該等導電銷3的外徑相同,該等導線4的線長及線徑也相同,從而可確保阻抗相同以克服習知之問題。當該等導線4要與連接器7接合時,該等導線4會沿水平方向穿出該等層板2及該等絕緣層5之外,透過預先的走線設計,可使該等導線4的末端位於相同的平面位置上,以與連接器7接合。此外,該等導電銷3為實心結構,因此具有較佳之結構強度,可提升該電子元件載板6之耐用性。 The wires 4 are connected to the outer peripheral surfaces of the conductive pins 3. Since the outer diameters of the conductive pins 3 are the same, the lengths and diameters of the wires 4 are also the same, so that the same impedance can be ensured to overcome the conventional problem. When the wires 4 are to be joined with the connector 7, the wires 4 will pass out of the layers 2 and the insulating layers 5 in the horizontal direction. are located in the same planar position to engage with connector 7 . In addition, the conductive pins 3 are of solid structure, so they have better structural strength, which can improve the durability of the electronic component carrier board 6 .

綜上所述,本新型透過相同線長及線徑的該等導線4,連 接外徑相同的該等導電銷3,使阻抗值相同而可使訊號傳輸穩定,並可良好地應用於傳輸高頻信號,故確實能達成本新型之目的。 To sum up, the present invention can connect the wires 4 with the same wire length and wire diameter. The conductive pins 3 with the same outer diameter are connected, so that the impedance value is the same, the signal transmission can be stable, and the conductive pins 3 can be well applied to transmit high-frequency signals, so the purpose of the present invention can be achieved.

惟以上所述者,僅為本新型之實施例而已,當不能以此限定本新型實施之範圍,凡是依本新型申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本新型專利涵蓋之範圍內。 However, the above are only examples of the present invention, which should not limit the scope of the present invention. Any simple equivalent changes and modifications made according to the scope of the patent application for this new model and the contents of the patent specification are still within the scope of the present invention. within the scope of this new patent.

2:層板 2: Laminate

21:貫孔 21: Through hole

3:導電銷 3: Conductive pins

4:導線 4: Wire

5:絕緣層 5: Insulation layer

6:電子元件載板 6: Electronic component carrier board

7:連接器 7: Connector

Claims (2)

一種電子元件載板,包含: 複數層板,沿上下方向彼此相間隔排列,每一層板形成複數由頂面延伸至底面的貫孔,該層板的每一貫孔與相鄰層板的其中一貫孔對齊,沿上下方向相互對齊的該等貫孔相互連通而構成一插槽; 複數絕緣層,沿上下方向與該等層板交錯排列,每一絕緣層設置於兩相鄰層板之間; 複數導電銷,穿設該等層板及該等絕緣層,並插置於該等插槽中;及 複數導線,彼此線長及線徑相等,每一導線連接其中一導電銷之外周面,且被包覆於其中一絕緣層中,從而位於相對應的兩個層板之間,該導線沿該等層板的水平方向延伸走線。 An electronic component carrier board comprising: A plurality of laminates are arranged at intervals along the up-down direction, each laminate forms a plurality of through holes extending from the top surface to the bottom surface, each through-hole of the laminate is aligned with one of the through-holes of the adjacent laminates, and aligned with each other along the up-down direction The through-holes are connected to each other to form a slot; A plurality of insulating layers are alternately arranged with the layers in the up-down direction, and each insulating layer is arranged between two adjacent layers; a plurality of conductive pins, which pass through the layers and the insulating layers, and are inserted into the slots; and A plurality of wires, with the same length and diameter as each other, each wire is connected to the outer peripheral surface of one of the conductive pins, and is covered in one of the insulating layers, so as to be located between the corresponding two layers. Horizontally extending traces of the equal-layer board. 如請求項1所述的電子元件載板,其中,每一導線是以焊接方式連接相對應之導電銷。The electronic component carrier board of claim 1, wherein each wire is connected to the corresponding conductive pin by soldering.
TW110205933U 2021-05-24 2021-05-24 Electronic component carrier TWM622367U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI785621B (en) * 2021-05-24 2022-12-01 環球聯通科技股份有限公司 Electronic component carrier board and wiring method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI785621B (en) * 2021-05-24 2022-12-01 環球聯通科技股份有限公司 Electronic component carrier board and wiring method thereof

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