TWM615847U - Circuit board - Google Patents

Abstract

A circuit board includes a substrate, a first dielectric layer configured on the substrate, a second dielectric layer configured on the first dielectric layer, a pad with protrusion profile and a component. The pad with protrusion profile includes a flat section and protrusions. The flat section touches a top surface of the first dielectric layer on which the flat section is formed. The protrusions protrude into the first dielectric layer from the flat section. A width of single protrusion is in a range of about 15 micrometers to about 65 micrometers. The component is embedded in the second dielectric layer and touches the pad with protrusion profile.

Description

circuit board

The present invention relates to a circuit board, in particular to a circuit board with improved interlayer bonding force and heat dissipation structure.

With the vigorous development of the electronics industry, electronic products are moving towards the trend of multi-function and high performance. In order to reduce the size of the package and improve the degree of integration, components are embedded in the circuit board to reduce the size of the package. When the laser processing technology is used in the process of embedding the components in the circuit board, the laser processing process will generate heat energy inside the circuit board. If the heat energy cannot be effectively dissipated from the circuit board, the heterogeneous materials in the circuit board will cause delamination defects in the circuit board due to the mismatch of the thermal expansion coefficient, which will damage the yield of the circuit board.

The embodiment of the present invention provides a circuit board. The circuit board includes a substrate, a first dielectric layer disposed on the substrate, a second dielectric layer disposed on the first dielectric layer, a pad with a protrusion, and a component. The pad with protruding parts includes a flat part and a protruding part. The flat plate portion is disposed on the upper surface of the first dielectric layer and contacts the upper surface of the first dielectric layer. The protruding part protrudes from the flat part to the first Within the dielectric layer, and the width of each protrusion is between about 15 microns and about 65 microns. The device is embedded in the second dielectric layer and contacts the pad with the protrusion.

In the embodiment of the present invention, the contact area is increased by the engagement configuration of the protruding portion of the pad with the protruding portion and the dielectric layer, so that the dissimilar materials in the circuit board (between the pad with the protruding portion and the dielectric layer) The binding power has been improved. And the increased surface area of the protrusion helps to dissipate heat.

100: substrate

102: Seed layer

104: photoresist pattern

106: Material

108: The first circuit layer

110: first dielectric layer

112: The first opening

114: second opening

116: first conductive pillar

118: The second circuit layer

120: protrusion

120-1: Single protrusion

120-2: Single protrusion

120-3: Single protrusion

120-N: Single protrusion

122: Flat part

124: Pad with protrusions

126: The first dielectric material

128: Groove

130: Components

132: Pad

134: second dielectric layer

136: second dielectric material

138: The Third Opening

140: fourth opening

142: second conductive pillar

144: third circuit layer

146: third conductive pillar

147: Pad

148: Insulation protection layer

150: third dielectric layer

152: The fourth conductive pillar

154: The fourth circuit layer

156: The first build-up structure

158: Second build-up structure

158-1: bottom layer

158-2: Intermediate layer

158-3: Top floor

160: Fifth circuit layer

161: Pad

S100: upper surface

S110: upper surface

S126: Upper surface

S130: Upper surface

S134: Upper surface

S150: Upper surface

T1: thickness

T2: thickness

x,y,z: axis

Read the following implementation methods together with the accompanying drawings to clearly understand the viewpoints of the present invention.

It should be noted that according to industry standard practices, various features are not drawn to scale. In fact, in order to be able to discuss clearly, the size of various features may be arbitrarily enlarged or reduced.

Figures 1 to 8A are schematic cross-sectional diagrams of the circuit boards drawn in accordance with the embodiments of the present invention at various stages of the manufacturing process.

Fig. 8B, Fig. 8C, Fig. 8D, and Fig. 8E are schematic cross-sectional views of other embodiments of Fig. 8A drawn according to the embodiments of the present invention.

Figures 9 to 15 are schematic cross-sectional views of the circuit boards drawn in accordance with the embodiments of the present invention at various stages of the manufacturing process.

Figure 16 is a schematic cross-sectional view of a circuit board drawn according to an embodiment of the present invention.

Figure 17 is a schematic cross-sectional view of a circuit board drawn according to another embodiment of the present invention.

Figure 18 is a schematic cross-sectional view of a circuit board drawn according to another embodiment of the present invention.

Figure 19 is a schematic cross-sectional view of a circuit board drawn according to another embodiment of the present invention.

When an element is called "on", it can generally mean that the element is directly on other elements, or there can be other elements existing in both. Conversely, when an element is said to be "directly in" another element, it cannot have other elements in between. As used herein, the term "and/or" includes any combination of one or more of the listed associated items.

In this article, terms such as "first", "second" and "third" are used to distinguish elements or operations described in the same technical terms, and do not mean order or sequence. Moreover, the elements or operations should not be limited by these words. For example, the first element in the text can also be referred to as the second element without departing from the original intent of the present invention.

In this article, the use of words such as "include", "include", "have", etc., are all open terms, meaning including but not limited to.

In order to reduce the size of the package and improve the degree of integration, a groove is formed in the circuit board, and components are placed in the groove and embedded in the circuit board, thereby reducing the size of the package. When the groove is formed by laser processing, due to the large area of the groove formed, a high-energy laser will continue to act on the laser stop layer to generate heat. When the laser stop layer is unable to effectively dissipate heat, the material may be mismatched due to the thermal expansion coefficient. The defect of delamination between the laser stop layer and the dielectric layer in the circuit board will damage the yield of the circuit board. The embodiment of the present invention provides a laser stop layer with protrusions, and the laser stop layer with protrusions can be used as a liner with protrusions after the process is finished, and the protrusions can lift between the dielectric layer The bonding force and the improvement of the heat dissipation effect, thereby ensuring the production quality of the circuit board.

Fig. 1 to Fig. 8A and Fig. 9 to Fig. 15 are schematic cross-sectional views of various stages of the circuit board manufacturing process according to an embodiment of the present invention. It should be noted that when Figures 1 to 8A and Figures 9 to 15 are shown or described as a series of operations or events, the order in which these operations or events are described should not be limited. For example, some operations or events may take a different sequence from the embodiment of the present invention, some operations or events may occur simultaneously, some operations or events may not be used, and/or some operations or events may be repeated. In addition, the actual manufacturing process may require additional steps before, during, or after the manufacturing process shown in FIGS. 1 to 8A and 9 to 15 to complete the circuit board. Therefore, the present model may briefly explain some of the additional operating steps.

Referring to Figure 1, a substrate 100 is provided, which has an upper surface S100. The substrate 100 is a general term for a one-layer or multi-layer stacked structure. The substrate 100 may include a core layer, a dielectric layer, a circuit layer, a conductive pillar, other applicable elements, or a combination of the above. The upper surface S100 is the upper surface of the top layer in the stacked structure of the substrate 100. In one embodiment, the substrate 100 is a core layer with conductive pillars. In the embodiment where the substrate 100 includes a core layer, it further includes a dielectric layer formed on one or both sides of the core layer, and further includes a circuit layer, a conductive pillar, or a combination of the above. In one embodiment, the substrate 100 has no core layer, but has a dielectric layer, and further includes a circuit layer, a conductive pillar, or a combination of the above.

Referring to FIG. 2, a seed layer 102 is formed on the substrate 100. The seed layer 102 covers the upper surface S100 of the substrate 100. The material of the seed layer 102 includes metal or conductive material. In one embodiment, the material of the seed layer 102 is copper. The method of forming the seed layer 102 may include electroless plating (electroless plating), sputtering, other suitable methods, or a combination of the above.

Referring to FIG. 3, a photoresist pattern 104 is formed on the upper surface S100 of the substrate 100. The photoresist pattern 104 covers a part of the surface of the seed layer 102 and exposes another part of the surface of the seed layer 102. The photoresist pattern 104 can define the pattern of the circuit layer to be formed.

Referring to FIG. 4, an electroplating process is performed on the substrate 100. The material 106 formed by the electroplating process can cover the exposed surface of the photoresist pattern 104. The material 106 formed by the electroplating process includes metal or conductive material. In one embodiment, the material 106 formed by the electroplating process is copper. The pattern of the material 106 may correspond to the photoresist pattern 104.

Referring to FIG. 5, the photoresist pattern 104 and the seed layer 102 under the photoresist pattern 104 are removed. The seed layer 102 remaining under the material 106 and the material 106 together form the first circuit layer 108 on the substrate 100.

Referring to FIG. 6, a first dielectric layer 110 is formed on the substrate 100. The first dielectric layer 110 covers the first circuit layer 108 and fills the gaps between the first circuit layers 108. The first dielectric layer 110 includes a dielectric material, wherein the dielectric material may be formed of polymer or non-polymer, for example, prepreg, ABF (Ajinomoto Build-up Film), Epoxy, bismaleimide-triazine (BT), polyimide (PI), or photosensitive dielectric material (photoimageable dielectric), the present invention does not Limited to the above examples. The thickness of the first dielectric layer 110 is between about 10 microns and about 50 microns. It should be noted that the first circuit layer 108 shown in FIG. 6 already includes the seed layer 102 therein, so the seed layer 102 will not be drawn in FIGS. 6 to 19 any more.

Referring to FIG. 7, a first opening 112 is formed in the first dielectric layer 110 to expose a part of the surface of the first circuit layer 108. The forming method of the opening may include a laser processing method, a mechanical processing method, or other suitable methods. In one embodiment, laser processing is used for drilling. In the subsequent manufacturing process, the first circuit layer 108 is electrically connected to other components (not shown) through the first opening 112.

Referring to FIG. 8A, a second opening 114 is further formed in the first dielectric layer 110. The second opening 114 does not penetrate the first dielectric layer 110, so the second opening 114 does not expose any surface of the first circuit layer 108, and the first dielectric layer with a thickness T1 of at least about 5 microns is retained. For example, the thickness T1 between the bottom surface of the second opening 114 and the upper surface of the first circuit layer 108 is at least about 5 microns, that is, the first dielectric layer 110 with a thickness T1 of at least about 5 microns is located in the second opening. Between the bottom surface of 114 and the upper surface of the first circuit layer 108. On the other hand, if the first circuit layer 108 is not provided on the substrate 100, the thickness T2 between the bottom surface of the second opening 114 and the upper surface S100 of the substrate 100 is at least about 5 microns. That is, the first dielectric layer 110 with a thickness T2 of at least about 5 microns is located between the bottom surface of the second opening 114 and the upper surface S100 of the substrate 100.

The opening width of the second opening 114 is between about 10 micrometers and about 65 micrometers. The number and arrangement of the second openings 114 can be adjusted according to design requirements. Generally speaking, the distance between adjacent second openings 114 is at least about 20 microns. The cross-sectional area of each second opening 114 (for example, the cross-sectional area in the xz plane) is smaller than the cross-sectional area of the first opening 112 (for example, the cross-sectional area in the xz plane).

The forming method of the second opening 114 may include a laser processing method, a mechanical processing method, or other suitable methods. In one embodiment, laser processing, such as but not limited to picosecond laser, femtosecond laser, excimer laser, or any laser with adjustable depth, is used to form the second opening 114.

In some embodiments, the second opening 114 exhibits a shape that is wide at the top and narrow at the bottom in a cross-sectional side view (for example, the xz plane). In detail, when measuring the width of the second opening 114, as the measurement position is farther away from the upper surface S110 of the first dielectric layer 110, the resulting width of the second opening 114 gradually decreases. For example, in the cross-sectional side view (for example, the xz plane), the second opening 114 may appear as an inverted trapezoid (as shown in Fig. 8A), an inverted triangle (as shown in Fig. 8B), or a semicircle (as shown in Fig. 8C). As shown), or semi-elliptical (as shown in Figure 8D), the present invention is not limited to the above list. In other embodiments, the second opening 114 has a shape with the same width as the top and bottom in the cross-sectional side view (for example, the xz plane). In detail, when measuring the width of the second opening 114, as the measuring position is farther away from the upper surface S110 of the first dielectric layer 110, the width of the second opening 114 obtained is substantially the same. For example In other words, the second opening 114 may be rectangular in the cross-sectional side view (for example, the xz plane) (as shown in FIG. 8E).

8A to 8E are substantially the same, and the only difference lies in the shape of the second opening 114. Therefore, in order to simplify the drawings, FIGS. 9 to 18 will use the inverted trapezoidal second opening 114 shown in FIG. 8A as an example for subsequent descriptions.

Referring to FIG. 9, the first opening 112 and the second opening 114 are respectively filled with metal or conductive material to form the first conductive pillar 116 and the protrusion 120 in the first dielectric layer 110. Since part of the dielectric material of the first dielectric layer 110 is between the first conductive pillar 116 and the protrusion 120, the first conductive pillar 116 and the protrusion 120 are electrically isolated.

Similarly, the second circuit layer 118 and the flat plate portion 122 are formed on the upper surface S110 of the first dielectric layer 110 by using metal or conductive material. The second circuit layer 118 contacts the first conductive pillar 116, and the second circuit layer 118 is electrically connected to the first circuit layer 108 through the first conductive pillar 116. The flat portion 122 contacts the protruding portion 120, and the two are collectively referred to as a pad 124 with a protruding portion. In the process of forming the second circuit layer 118 and the plate portion 122 (described later), the second circuit layer 118 and the plate portion 122 can be disconnected by the design of the photoresist pattern, so the second circuit layer 118 is not connected to the plate portion 122. The section 122 is electrically connected.

In addition, the protruding portion 120 and the flat portion 122 are not electrically connected to other components. For example, the protrusion 120 is not electrically connected to the first circuit layer 108, but the present invention is not limited to this.

In one embodiment, the material of the first conductive pillar 116 and the second circuit layer 118 is copper. In one embodiment, the protrusion 120 and the flat portion 122 The material is copper.

The protrusion 120 protrudes from the flat portion 122 into the first dielectric layer 110, and a single protrusion 120-1, 120-2, 120-3 to 120-N in the protrusion 120 is engaged with the first dielectric layer 110 The configuration increases the contact area between the protrusion 120 and the first dielectric layer 110, thereby enhancing the bonding force between the two. In an embodiment where the material of the flat portion 122 and the protrusion 120 is copper and the first dielectric layer 110 is a dielectric material, the engagement configuration formed by such a protrusion structure facilitates the bonding force between the heterogeneous materials. In the embodiment using laser processing, the flat portion 122 can be used as a laser stop layer, and the protrusion 120 not only improves the bonding force with the first dielectric layer 110, but also provides heat dissipation effect (described later) .

The protrusion 120 corresponds to the configuration of the second opening 114 (refer to FIG. 8A). Therefore, the single protrusions 120-1, 120-2, 120-3 to 120-N in the protrusion 120 each have a width between about 10 microns and about 65 microns, and similarly, the distance between adjacent single protrusions At least about 20 microns. In addition, the shape of the protrusion 120 in the cross-sectional side view (for example, the xz plane) is substantially the same as the shape of the second opening 114 in the cross-sectional side view (for example, the xz plane). The description of the shape of the second opening 114 can be applied to the description of the shape of the protrusion 120, so it will not be repeated here.

The first conductive pillar 116, the protruding portion 120, the second circuit layer 118, or the flat portion 122 can be formed by the aforementioned processes, such as the processes shown in FIGS. 2 to 5. For example, first on the upper surface S110 of the first dielectric layer 110, the first opening 112 (refer to FIG. 8A), and the second opening 114 (refer to Fig. 8A) A conformal deposited seed layer above. Next, after the photoresist pattern is formed on the upper surface S110 of the first dielectric layer 110, an electroplating process is performed to cover the exposed surface of the photoresist pattern with metal or conductive material, including the upper surface S110 of the first dielectric layer 110 One part, the first opening 112, and the second opening 114. Finally, the photoresist pattern and the seed layer under the photoresist pattern are removed, leaving the second circuit layer 118 behind. It should be noted that the second circuit layer 118 shown in FIG. 9 already includes a seed layer therein, so the seed layer will not be additionally drawn in FIGS. 9 to 19.

The formation of the first conductive pillar 116, the protruding portion 120, the second circuit layer 118, or the flat portion 122 can be performed by a single electroplating process or a separate electroplating process. In one embodiment, a single electroplating process is used to fill the first opening 112 and the second opening 114 with metal or conductive material to form the first conductive pillar 116 and the protrusion 120 at the same time. Furthermore, in the foregoing embodiments, the same electroplating process can be continuously used to successively form the second circuit layer 118 on the first conductive pillar 116 and the flat portion 122 on the protrusion 120.

Referring to FIG. 10, a first dielectric material 126 is formed on the first dielectric layer 110. The first dielectric material 126 covers the second circuit layer 118 and the plate portion 122, and fills the gap between the second circuit layer 118, the plate portion 122, and/or a combination thereof. The first dielectric material 126 may be formed of polymer or non-polymer, for example, film, ABF, epoxy resin, dimaleimide resin, polyimide, or photosensitive dielectric material, The present invention is not limited to the above examples. In an embodiment, the first dielectric material 126 and the first dielectric layer 110 are made of the same material.

Referring to Figure 11, a groove is formed in the first dielectric material 126 128. The size of the groove 128 depends on the size of the component to be placed in the groove 128. Generally speaking, the length of a single side of the component to be placed may be between about 100 μm and about 10,000 μm. For example, the length of a single side of the component in the xy plane may be between about 100 μm and about 10,000 μm. The formation of the groove 128 may include a laser processing method, a mechanical processing method, or other suitable methods to remove a part of the first dielectric material 126 and expose the liner 124 with the protrusion.

When the method of forming the groove 128 is an embodiment of laser processing, the flat portion 122 can be used as a laser stop layer, so that the laser processing does not penetrate deep into the first dielectric layer 110, thereby controlling the bottom of the groove 128 location. Therefore, after the groove 128 is formed, the flat portion 122 becomes the bottom of the groove 128, and can be used as a gasket for the component to be placed.

Since the cross-sectional length of the groove 128 formed (for example, the length of the groove 128 in the xz plane) is greater than the cross-sectional length of the opening forming the conductive column (for example, refer to Figure 8A, the diameter of the first opening 112 in the xz plane), in order to reduce The working time, when the laser processing embodiment is used, the laser energy for forming the groove 128 will be greater than the laser energy for forming the first opening 112 as shown in FIG. 8A. Generally speaking, a high-energy laser can be used to form the groove 128 to improve the process efficiency. When a high-energy laser acts on the laser stop layer (ie, the plate portion 122) to generate thermal energy, the accumulated thermal energy can utilize the protrusion 120 to provide additional surface area for heat dissipation. In one embodiment, compared to using only the first surface area of the flat plate portion 122, the second surface area of the pad 124 with protrusions is increased by at least about 6% compared to the first surface area. In one embodiment, instead of using only the first surface area of the flat portion 122, a pad with a protruding portion The second surface area of 124 is increased by about 10% compared to the first surface area.

Referring to Figure 12, the component 130 is placed in the groove 128. In this case, the flat portion 122 of the gasket 124 with protrusions can serve as a gasket for the element 130, and the protrusion 120 provides additional surface area to help the element 130 dissipate heat. The element 130 contacts the pad 124 with protrusions and is electrically isolated from the pad 124 with protrusions. The upper surface S130 of the device 130 shown in FIG. 12 has pads 132. The device 130 can electrically connect the device 130 with other devices (not shown) through the pads 132, so the device 130 can be an electronic device, including Active components (such as but not limited to transistors, light-emitting diodes, or microelectromechanical systems) and passive components (such as but not limited to resistors or capacitors).

In other embodiments, the upper surface S130 of the element 130 may not have the pad 132, so the element 130 is not electrically connected to other elements (described later). The length of a single side of the element 130, for example, the length of a single side in the xy plane, may be between about 100 micrometers and about 10,000 micrometers. In one embodiment, the side length of the element 130 is greater than the diameter of the first conductive pillar 116, and the diameter of the first conductive pillar 116 ranges from about 10 microns to about 120 microns.

In the example shown in FIG. 12, the upper surface S130 of the element 130 is higher than the upper surface S126 of the first dielectric material 126. However, in fact, the upper surface S130 of the element 130 can also be substantially equal to or lower than the first dielectric material 126. The upper surface S126 of the dielectric material 126.

Referring to FIG. 13, a second dielectric layer 134 is formed on the first dielectric layer 110. The second dielectric layer 134 includes the original first dielectric material 126 and the second dielectric material 136 formed later, wherein the second dielectric material 136 It is formed on the first dielectric material 126. After the second dielectric layer 134 is formed, the device 130 is embedded in the second dielectric layer 134. In other words, the element 130 is embedded between the liner 124 with the protrusion and the upper surface S134 of the second dielectric layer 134.

The second dielectric material 136 may be formed of polymer or non-polymer, for example, film, ABF, epoxy resin, dimaleimide resin, polyimide, or photosensitive dielectric material, The present invention is not limited to the above examples. In one embodiment, the second dielectric material 136 may be formed by solidification of a liquid material. Therefore, before solidification, the second dielectric material 136 has fluidity and can flow into the groove 128 (refer to FIG. 12) and be filled The gap between the groove 128 and the device 130 is then cured to form the second dielectric material 136. In one embodiment, the second dielectric material 136 and the first dielectric material 126 are the same material.

Referring to FIG. 14, a third opening 138 and a fourth opening 140 are respectively formed in the second dielectric layer 134. The third opening 138 exposes a part of the surface of the second circuit layer 118, and the fourth opening 140 exposes a part of the surface of the pad 132. .

The forming method of the third opening 138 is similar to the aforementioned manufacturing process. As shown in the example of FIG. 7, it may include a laser processing method, a mechanical processing method, or other suitable methods. In one embodiment, laser processing is used for drilling. In the subsequent manufacturing process, the second circuit layer 118 is electrically connected to other components through the third opening 138.

The formation method of the fourth opening 140 may include a laser processing method, a mechanical processing method, or other suitable methods. In one embodiment, use Laser processing is performed to form the fourth opening 140. In another embodiment, when the second dielectric layer 134 is a photosensitive dielectric material, a photolithography process may be performed to form the fourth opening 140.

Referring to FIG. 15, the third opening 138 and the fourth opening 140 are filled with metal or conductive material to form the second conductive pillar 142 and the third conductive pillar 146 in the second dielectric layer 134, and the second dielectric Part of the dielectric material of the layer 134 is interposed between the second conductive pillar 142 and the third conductive pillar 146.

Similarly, the third circuit layer 144 is formed on the upper surface S134 of the second dielectric layer 134 by using metal or conductive material. The third circuit layer 144 contacts the second conductive pillar 142 and is electrically connected to the second circuit layer 118 through the second conductive pillar 142. The third circuit layer 144 also contacts the third conductive pillars 146 and is electrically connected to the pads 132 through the third conductive pillars 146, whereby the device 130 can be electrically connected to other devices (not shown) through the pads 132 , But this new model is not limited to this.

In an embodiment, the material of the second conductive pillar 142 and the third conductive pillar 146 is copper. In one embodiment, the material of the third circuit layer 144 is copper.

The second conductive pillars 142, the third conductive pillars 146, and the third circuit layer 144 can be formed by the aforementioned processes, such as the processes shown in FIGS. 2 to 5. For example, first, a seed layer is conformally deposited on the upper surface S134 of the second dielectric layer 134, on the third opening 138 (refer to FIG. 14), and above the fourth opening 140 (refer to FIG. 14). Next, after forming a photoresist pattern on the upper surface S134 of the second dielectric layer 134, an electroplating process is performed The surface exposed by the photoresist pattern is covered with metal or conductive material, including a part of the upper surface S134 of the second dielectric layer 134, the third opening 138, and the fourth opening 140. Finally, the photoresist pattern and the seed layer under the photoresist pattern are removed, leaving the third circuit layer 144 behind. It should be noted that the third circuit layer 144 shown in FIG. 15 already includes a seed layer therein, so the seed layer will not be additionally drawn in FIGS. 15 to 19.

The formation of the second conductive pillar 142, the third conductive pillar 146, or the third circuit layer 144 uses a single electroplating process or a separate electroplating process. In one embodiment, a single electroplating process is used to fill the third opening 138 and the fourth opening 140 with metal or conductive material to form the second conductive pillar 142 and the third conductive pillar 146 at the same time. In addition, in the foregoing embodiments, the same electroplating process can be continuously used to successively form the third circuit layer 144 on the second conductive pillar 142 and the third conductive pillar 146.

Figures 1 to 15 are schematic cross-sectional diagrams of each process stage of the circuit board according to the embodiment of the present invention, which are only examples of the process of manufacturing the minimum number of layers. When manufacturing a circuit board with a minimum number of layers, after the circuit board in FIG. 15 is completed, the process in FIG. 16 can be continued to form an insulating protective layer 148 on the second dielectric layer 134. The insulating protection layer 148 partially covers the third circuit layer 144 and fills the gaps between the third circuit layers 144. The insulating protection layer 148 further exposes the pad 147 of the third circuit layer 144. Thereby, the device 130 can be electrically connected to other devices (not shown) through the pad 132, the third conductive pillar 146, and the pad 147.

The embodiment depicted in FIG. 17 is an embodiment in which the element 130 does not have pads. For example, the element 130 is a metal for heat dissipation (such as a copper block), but this The new model is not limited to this. In the embodiment where the element 130 is a metal for heat dissipation, the protrusion 120 of the gasket 124 with protrusions provides additional surface area to facilitate heat dissipation. Except for the element 130, the other structure of the circuit board shown in FIG. 17 is similar to that of the embodiment in FIG. 16.

Since the element 130 has no pads and the element 130 has no requirement for electrical signal output, there is no conductive pillar formed on the element 130. In the embodiment of FIG. 17, when the device 130 is placed on the pad 124 with a protrusion and is completely embedded in the second dielectric layer 134, it is not electrically connected to other devices (not shown). In this embodiment, the length of a single side of the element 130, such as the length of a single side in the xy plane, may be between about 100 μm and about 10,000 μm, which is greater than the diameter of the first conductive pillar 116 or the second conductive pillar 142.

The embodiment depicted in FIG. 18 is a three-layer dielectric layer, which can be regarded as further providing a third dielectric layer 150 between the first dielectric layer 110 and the second dielectric layer 134.

The third dielectric layer 150 is disposed on the first dielectric layer 110 and covers the second circuit layer 118 and a portion of the plate portion 122 of the pad 124 with protrusions. The fourth conductive pillar 152 may be disposed in the third dielectric layer 150. The upper surface S150 of the third dielectric layer 150 can be configured with a fourth circuit layer 154, and the fourth circuit layer 154 is electrically connected to the second circuit layer 118 through the fourth conductive pillar 152.

The device 130 in FIG. 18 is placed on the pad 124 with a protrusion, and is embedded in the third dielectric layer 150 and the second dielectric layer 134. Therefore, the height of the element 130 will determine the third dielectric layer 150 of one or more layers. In other words, the height of the element 130 determines the first dielectric layer 110 and the second dielectric layer The number of dielectric layers between 134.

Except for the third dielectric layer 150, the fourth conductive pillar 152, and the fourth circuit layer 154, other structures in the circuit board shown in FIG. 18 are similar to the embodiment in FIG. 16. In other embodiments, components 130 without pads 132 are used.

Referring to FIG. 19, the build-up structure of the first dielectric layer 110 to the second dielectric layer 134 is regarded as the first build-up structure 156, and the second build-up structure 158 is formed on the first build-up structure 156 (ie , On the second dielectric layer 134). The second build-up structure 158 includes a dielectric layer, a conductive pillar, and a circuit layer. The conductive pillar is located in the dielectric layer, and the circuit layer is located on the upper surface of the dielectric layer. The number of layers of the second build-up structure 158 can be adjusted according to process requirements and design purposes. In the embodiment depicted in FIG. 19, the second build-up structure 158 is a three-layer structure, including a bottom layer 158-1, a middle layer 158-2, and a top layer 158-3, but the present invention is not limited to the three-layer structure. The insulating protection layer 148 is formed on the top layer 158-3 of the second build-up structure 158 and partially covers the fifth circuit layer 160 and fills up the gaps between the fifth circuit layers 160. The insulating protection layer 148 further exposes the pad 161 of the fifth circuit layer 160.

The conductive pillars and the circuit layer in the second build-up structure 158 can be electrically connected to the conductive pillars and the circuit layer in the first build-up structure 156. In one embodiment, the fifth circuit layer 160 and the third circuit layer 144 are electrically connected through the conductive pillars of the bottom layer 158-1, the middle layer 158-2, and the top layer 158-3. In addition, the insulating protection layer 148 exposes the pads 161 of the fifth circuit layer 160 to form electrical connections with other components (not shown).

The embodiment depicted in Figure 19 shows that the element 130 can be embedded in In any layer, it is not limited to the position closest to the insulating protection layer 148.

Based on the above content, the embodiment of the present invention describes a liner with protrusions formed at the bottom of the groove. The contact area is increased by the engagement of the protrusions of the liner with the protrusions and the dielectric layer, so that the contact area in the circuit board The bonding force between dissimilar materials (between the liner with the protrusion and the dielectric layer) is improved. In addition, the increased surface area of the protrusion can also improve the heat dissipation effect.

The above briefly describes the features of the several embodiments of the present invention, so that those with ordinary knowledge in the technical field can understand the present invention more easily. Anyone with ordinary knowledge in the relevant technical field should understand that this specification can easily be used as a basis for modification or design of other structures or processes to perform the same purpose and/or obtain the same advantages as the embodiments of the present invention. Anyone with ordinary knowledge in the technical field can also understand that the structure equivalent to the above-mentioned structure does not depart from the spirit and scope of protection of the present invention, and can be changed, substituted and modified without departing from the spirit and scope of the present invention.

100: substrate

108: The first circuit layer

110: first dielectric layer

116: first conductive pillar

118: The second circuit layer

120: protrusion

122: Flat part

124: Pad with protrusions

130: Components

132: Pad

134: second dielectric layer

142: second conductive pillar

144: third circuit layer

146: third conductive pillar

S134: Upper surface

Claims (11)

A circuit board, including: A substrate; A first dielectric layer disposed on the substrate; A second dielectric layer disposed on the first dielectric layer; A pad with a protrusion, including: A flat plate portion disposed on an upper surface of the first dielectric layer and contacting the upper surface of the first dielectric layer; and A protrusion protruding from the flat portion into the first dielectric layer, wherein each protrusion has a width, and the width is between about 15 micrometers and about 65 micrometers; and A device is embedded in the second dielectric layer and contacts the pad with the protrusion. The circuit board according to claim 1, wherein the protrusion is in the shape of an inverted trapezoid, an inverted triangle, a semicircle, or a semiellipse in a side view. The circuit board according to claim 1, wherein the bottom surface of the protruding portion of the pad with protruding portions is separated from the upper surface of the substrate by a thickness, and the thickness is at least about 5 micrometers. The circuit board according to claim 1, wherein the flat plate portion has a first surface area, the pad with a protruding portion has a second surface area, and the second surface area is increased by at least 6% compared to the first surface area. The circuit board according to claim 1, further comprising: A first circuit layer is arranged on the substrate, wherein the bottom surface of the protruding portion of the pad with protruding portions is separated from the upper surface of the first circuit layer by a thickness which is at least about 5 microns. The circuit board according to claim 5, wherein the pad with the protrusion is electrically isolated from the first circuit layer. The circuit board according to claim 1, further comprising: A second circuit layer is arranged on the first dielectric layer, wherein the pad with the protrusion is electrically isolated from the second circuit layer. The circuit board according to claim 1, further comprising: A conductive pillar is disposed in the first dielectric layer and has a diameter, wherein the length of one side of the element is greater than the diameter. The circuit board according to claim 1, wherein the pad with the protrusion is electrically isolated from the element. The circuit board according to claim 1, wherein the adjacent distance between each of the protrusions is at least about 20 microns. The circuit board according to claim 1, further comprising: A third circuit layer is disposed on the second dielectric layer, wherein the device is electrically connected to the third circuit layer.

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