TWI556382B - Packaging substrate and a method for fabricating the same - Google Patents

Packaging substrate and a method for fabricating the same Download PDF

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Publication number
TWI556382B
TWI556382B TW103129313A TW103129313A TWI556382B TW I556382 B TWI556382 B TW I556382B TW 103129313 A TW103129313 A TW 103129313A TW 103129313 A TW103129313 A TW 103129313A TW I556382 B TWI556382 B TW I556382B
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Taiwan
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layer
photosensitive dielectric
dielectric layer
package substrate
conductive
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TW103129313A
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Chinese (zh)
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TW201608684A (en
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孫銘成
林俊賢
沈子傑
邱士超
白裕呈
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矽品精密工業股份有限公司
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Priority to TW103129313A priority Critical patent/TWI556382B/en
Priority to CN201410538401.2A priority patent/CN105374692A/en
Publication of TW201608684A publication Critical patent/TW201608684A/en
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Publication of TWI556382B publication Critical patent/TWI556382B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Description

封裝基板及其製法 Package substrate and its preparation method

本發明係有關一種封裝基板及其製法,尤指一種使用感光型介電材料之封裝基板及其製法。 The present invention relates to a package substrate and a method of fabricating the same, and more particularly to a package substrate using a photosensitive dielectric material and a method of fabricating the same.

隨著電子產業的蓬勃發展,許多高階電子產品都逐漸朝往輕、薄、短、小等高集積度方向發展,且隨著封裝技術之演進,晶片的封裝技術也越來越多樣化,半導體封裝件之尺寸或體積亦隨之不斷縮小,藉以使該半導體封裝件達到輕薄短小之目的。 With the rapid development of the electronics industry, many high-end electronic products are gradually moving toward light, thin, short, and small high integration. With the evolution of packaging technology, the packaging technology of wafers is becoming more and more diversified. The size or volume of the package is also shrinking, so that the semiconductor package is light, thin and short.

一般封裝基板的結構係由堆疊之銅層與玻纖層(材質為FR-X,CEM-X)所組成,通常而言,要製作封裝基板的導電通孔或導電盲孔有下列兩種方式:第一種方式係先對第一層玻纖層進行機械鑽孔或雷射鑽孔,再電鍍出導電盲孔,接著壓合銅層,並將該銅層圖案化為線路,再重複壓合玻纖層、鑽孔、電鍍銅等步驟,而製得層疊之封裝基板。第二種方式係先堆疊玻纖層與銅層,再用機械鑽孔貫穿全部該玻纖層與銅層,之後電鍍出導電通孔。 Generally, the structure of the package substrate is composed of a stacked copper layer and a glass layer (material FR-X, CEM-X). Generally, there are two ways to make a conductive via or a conductive via for a package substrate. The first method is to mechanically drill or laser drill the first layer of glass fiber layer, then electroplating the conductive blind hole, then pressing the copper layer, and patterning the copper layer into a line, and then repeating the pressure. The laminated substrate is prepared by the steps of bonding a glass fiber layer, drilling, and electroplating copper. In the second method, the glass fiber layer and the copper layer are stacked first, and then the glass fiber layer and the copper layer are mechanically drilled, and then the conductive via holes are plated.

第1A至1H圖所示者係習知之封裝基板之製法的剖視 圖。 Sections 1A to 1H show a cross-sectional view of a conventional method of manufacturing a package substrate Figure.

如第1A圖所示,提供一核心板10,並以機械鑽孔或雷射鑽孔形成通孔100。 As shown in FIG. 1A, a core plate 10 is provided and the through holes 100 are formed by mechanical drilling or laser drilling.

再於該通孔100中電鍍銅以形成導電柱13,如第1B圖所示。 Copper is then electroplated in the via 100 to form the conductive pillars 13, as shown in FIG. 1B.

接著,壓合未經圖案化之銅層,並經蝕刻圖案化步驟以形成線路層11,如第1C圖所示。 Next, the unpatterned copper layer is pressed and the patterning step is etched to form the wiring layer 11, as shown in FIG. 1C.

如第1D圖所示,於該核心板10上壓合整包覆該線路層11之介電層12(材質如,玻璃纖維材料),並於該介電層12上壓合未經圖案化之銅層15,並於該銅層15上形成光阻劑,再經曝光顯影移除未為光硬化的光阻劑,而得到外露出部分該銅層15之光阻層14。 As shown in FIG. 1D, the dielectric layer 12 (material, such as glass fiber material) covering the circuit layer 11 is laminated on the core board 10, and is unpatterned on the dielectric layer 12. The copper layer 15 is formed on the copper layer 15, and the photoresist which is not photohardened is removed by exposure and development, and the photoresist layer 14 of the copper layer 15 is exposed.

如第1E圖所示,蝕刻去除未為該光阻層14所覆蓋的該銅層15,得到經圖案化之銅層15,並移除該光阻層14。 As shown in FIG. 1E, the copper layer 15 not covered by the photoresist layer 14 is removed by etching to obtain a patterned copper layer 15, and the photoresist layer 14 is removed.

再於經圖案化之該銅層15上形成阻銲層16,如第1F圖所示。 A solder resist layer 16 is formed on the patterned copper layer 15, as shown in FIG. 1F.

如第1G圖所示,以機械鑽孔或雷射鑽孔形成外露出部分該銅層15之阻銲層開口16a。 As shown in Fig. 1G, the solder resist opening 16a of the copper layer 15 is exposed by mechanical drilling or laser drilling.

如第1H圖所示,於該阻銲層開口16a中形成導電元件17。 As shown in FIG. 1H, a conductive member 17 is formed in the solder resist opening 16a.

然而,上述封裝基板之製法須先於核心板上形成未經圖案化之銅層,接著於該銅層上形成經圖案化之光阻層後,才可將該銅層圖案化。 However, the above package substrate must be formed by forming an unpatterned copper layer on the core substrate, and then forming a patterned photoresist layer on the copper layer before patterning the copper layer.

此外,上述製作方式係使用機械鑽孔或雷射鑽孔,機 械鑽孔雖然可以一次貫穿,具有節省工時的功效;惟,機械貫孔只能適用在尺寸大於100μm以上的孔徑,因此若欲製作高密度佈線產品或小於100μm之孔徑,則必須使用雷射鑽孔。 In addition, the above production method uses mechanical drilling or laser drilling, the machine Although the mechanical drilling can be penetrated once, it has the effect of saving man-hours; however, the mechanical through-hole can only be used for apertures larger than 100μm in size, so if you want to make high-density wiring products or apertures smaller than 100μm, you must use lasers. drilling.

雷射鑽孔雖有可以製作較小孔徑的優點,但是雷射鑽孔的費用昂貴,故一般製作基板時,都會盡量避免使用雷射鑽孔製程。 Although laser drilling has the advantage of making a smaller aperture, laser drilling is expensive, so laser drilling processes are generally avoided when making substrates.

但隨著電子產品微小化的需求增加,小孔徑的需求也日益增加,因此,如何以較低成本實現具有小孔徑孔洞的封裝基板,實為業界迫切待開發之方向。 However, as the demand for miniaturization of electronic products increases, the demand for small apertures increases. Therefore, how to implement package substrates with small apertures at a lower cost is an urgent development direction in the industry.

鑒於上述習知技術之缺失,本發明提供一種封裝基板之製法,係包括:提供具有相對之第一表面與第二表面之第一感光型介電層;於該第一感光型介電層中形成複數貫穿該第一表面與第二表面之導電柱;以及於該第一感光型介電層之第一表面形成電性連接該導電柱的線路層。 In view of the above-mentioned deficiencies of the prior art, the present invention provides a method of fabricating a package substrate, comprising: providing a first photosensitive dielectric layer having a first surface and a second surface; wherein the first photosensitive dielectric layer Forming a plurality of conductive pillars penetrating the first surface and the second surface; and forming a wiring layer electrically connected to the conductive pillar on the first surface of the first photosensitive dielectric layer.

本發明復提供一種封裝基板,係包括:具有相對之第一表面與第二表面之第一感光型介電層;複數貫穿該第一表面與第二表面之導電柱,且該導電柱係具有外露於該第二表面之端面;以及形成於該第一感光型介電層之第一表面上之線路層,且該線路層電性連接該導電柱。 The present invention further provides a package substrate comprising: a first photosensitive dielectric layer having a first surface and a second surface; a plurality of conductive pillars penetrating the first surface and the second surface, and the conductive pillar has An end surface exposed on the second surface; and a wiring layer formed on the first surface of the first photosensitive dielectric layer, and the wiring layer is electrically connected to the conductive pillar.

於本發明之封裝基板之製法的一實施方式中,提供該第一感光型介電層與形成複數該導電柱之步驟係包括:於一離型件上形成具有外露部分該離型件的複數開孔之第一 感光型介電層;於該等開孔中形成導電材料,以得到複數該導電柱;以及於形成該線路層之後,移除該離型件。 In an embodiment of the method for fabricating a package substrate of the present invention, the step of providing the first photosensitive dielectric layer and forming the plurality of conductive pillars comprises: forming a plurality of the release members with an exposed portion on a release member First opening a photosensitive dielectric layer; forming a conductive material in the openings to obtain a plurality of the conductive pillars; and after forming the wiring layer, removing the release member.

於本發明之封裝基板之製法的一實施方式中,形成該線路層之步驟係包括:於該第一感光型介電層上形成具有外露出部分該第一感光型介電層或導電柱的開口之經圖案化之第二感光型介電層;以及於該開口中形成導電材料,以得到該線路層。 In an embodiment of the method for fabricating a package substrate of the present invention, the step of forming the wiring layer includes: forming an exposed portion of the first photosensitive dielectric layer or a conductive pillar on the first photosensitive dielectric layer. Opening the patterned second photosensitive dielectric layer; and forming a conductive material in the opening to obtain the wiring layer.

於前述本發明之封裝基板中,復包括形成於該第一感光型介電層之第一表面上未形成有該線路層之區域之第二光型介電層。 In the package substrate of the present invention, the second optical type dielectric layer formed on the first surface of the first photosensitive dielectric layer in which the wiring layer is not formed is further included.

於本發明之封裝基板之製法的一實施方式中,形成經圖案化之該第二感光型介電層之步驟係包括:於該第一感光型介電層上形成整覆蓋於該第一感光型介電層之第二感光型介電層;以及以曝光製程圖案化該第二感光型介電層。 In an embodiment of the method for fabricating a package substrate of the present invention, the step of forming the patterned second photosensitive dielectric layer comprises: forming a full coverage on the first photosensitive dielectric layer a second photosensitive dielectric layer of the dielectric layer; and patterning the second photosensitive dielectric layer with an exposure process.

於本發明之封裝基板之製法的一實施方式中,於形成該第一感光型介電層前,復包括於該離型件上形成晶種層,該第一感光型介電層係形成於該晶種層上,且於移除該離型件之後,移除非位於該導電柱上的該晶種層。 In an embodiment of the method for fabricating a package substrate of the present invention, before forming the first photosensitive dielectric layer, a seed layer is formed on the release member, and the first photosensitive dielectric layer is formed on the substrate. On the seed layer, and after removing the release member, the seed layer not on the conductive post is removed.

由前述製法所製得之封裝基板中,該封裝基板復包括形成於該導電柱之端面上之晶種層。 In the package substrate produced by the above method, the package substrate further comprises a seed layer formed on an end surface of the conductive pillar.

於前述本發明之封裝基板及其製法中,於形成該線路層之後,復包括於該導電柱外露於該第二表面之端面上形成導電凸塊,且該導電凸塊係電性連接至該線路層。 In the package substrate of the present invention and the method for fabricating the same, after forming the circuit layer, the conductive pillar is exposed on the end surface of the second surface to form a conductive bump, and the conductive bump is electrically connected to the conductive substrate. Line layer.

於本發明之封裝基板及其製法的一實施方式中,該第 一感光型介電層之材質係為光固化材料。 In an embodiment of the package substrate of the present invention and the method of manufacturing the same, the The material of a photosensitive dielectric layer is a photocurable material.

於本發明之封裝基板及其製法的又一實施方式中,復包括於前述之封裝基板上設置並電性連接半導體元件。 In still another embodiment of the package substrate of the present invention and the method of fabricating the same, the semiconductor device is disposed and electrically connected to the package substrate.

由上可知,本發明藉由使用同時具有光阻與封裝之特性的感光型封裝材料,而無需另外使用光阻劑,達到簡化製程之效果。 As can be seen from the above, the present invention achieves a simplified process by using a photosensitive packaging material having both photoresist and package characteristics without using a photoresist.

再者,本發明係藉由圖案化感光型介電層來製作線路,得以在不需使用機械鑽孔或雷射鑽孔的情況下,達到細線路的需求,遂增加佈線密集度。 Furthermore, the present invention creates a circuit by patterning a photosensitive dielectric layer, thereby achieving the need for fine wiring without the use of mechanical drilling or laser drilling, and increasing the wiring density.

此外,由於本案所提供之封裝基板的製法係不需使用雷射鑽孔,更能簡化製程,達到降低生產成本之功效。 In addition, since the manufacturing method of the package substrate provided in the present case does not require the use of laser drilling, the process can be simplified and the production cost can be reduced.

另外,本案係一種不具有核心板的封裝基板,因此得以降低整體封裝基板的厚度,進而應用於厚度較小之電子產品。 In addition, the present invention is a package substrate that does not have a core board, so that the thickness of the entire package substrate can be reduced, and thus applied to an electronic product having a small thickness.

10‧‧‧核心板 10‧‧‧ core board

100‧‧‧通孔 100‧‧‧through hole

11‧‧‧線路層 11‧‧‧Line layer

12‧‧‧介電層 12‧‧‧Dielectric layer

13‧‧‧導電柱 13‧‧‧conductive column

14‧‧‧光阻層 14‧‧‧ photoresist layer

15‧‧‧銅層 15‧‧‧ copper layer

16‧‧‧阻銲層 16‧‧‧ solder mask

16a‧‧‧阻銲層開口 16a‧‧‧ solder mask opening

17‧‧‧導電元件 17‧‧‧Conducting components

20‧‧‧離型件 20‧‧‧ release parts

21‧‧‧晶種層 21‧‧‧ seed layer

3‧‧‧封裝基板 3‧‧‧Package substrate

30‧‧‧第一感光型介電層 30‧‧‧First photosensitive dielectric layer

30’‧‧‧第一感光型介電材料 30'‧‧‧First photosensitive dielectric material

30a‧‧‧第一表面 30a‧‧‧ first surface

30b‧‧‧第二表面 30b‧‧‧second surface

30c‧‧‧開孔 30c‧‧‧Opening

31‧‧‧導電柱 31‧‧‧conductive column

31a‧‧‧端面 31a‧‧‧ end face

32‧‧‧第二感光型介電層 32‧‧‧Second photosensitive dielectric layer

32’‧‧‧第二感光型介電材料 32'‧‧‧Second photosensitive dielectric material

32a‧‧‧第二開口 32a‧‧‧second opening

33‧‧‧線路層 33‧‧‧Line layer

34‧‧‧絕緣保護層 34‧‧‧Insulating protective layer

34a‧‧‧第一開口 34a‧‧‧First opening

35‧‧‧導電凸塊 35‧‧‧Electrical bumps

40‧‧‧半導體元件 40‧‧‧Semiconductor components

401‧‧‧銲球 401‧‧‧ solder balls

50‧‧‧光罩 50‧‧‧Photomask

第1A至1H圖係為習知封裝基板之製法的示意圖;第2A至2I圖係顯示本發明封裝基板之製法的示意圖,其中,第2A’係為第2A圖之另一實施態樣,第2I’圖係第2I圖之另一實施態樣;以及第3圖係顯示本發明封裝基板之又一實施態樣之剖視圖。 1A to 1H are schematic views showing a method of manufacturing a conventional package substrate; and FIGS. 2A to 2I are schematic views showing a method of manufacturing the package substrate of the present invention, wherein the 2A' is another embodiment of FIG. 2A, 2I' is another embodiment of FIG. 2I; and FIG. 3 is a cross-sectional view showing still another embodiment of the package substrate of the present invention.

以下係藉由特定的具體實例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地 瞭解本發明之其他優點與功效。本發明亦可藉由其他不同的具體實例加以施行或應用,本說明書中的各項細節亦可基於不同觀點與應用,在不悖離本發明之精神下進行各種修飾與變更。 The embodiments of the present invention are described below by way of specific specific examples, and those skilled in the art can easily easily disclose the contents disclosed in the present specification. Other advantages and effects of the present invention are understood. The present invention may be embodied or applied in various other specific embodiments, and various modifications and changes may be made without departing from the spirit and scope of the invention.

須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本創作可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本創作所能產生之功效及所能達成之目的下,均應仍落在本創作所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如「上」、「第一」、「第二」、「端面」等之用語,亦僅為便於敘述之明瞭,而非用以限定本創作可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本創作可實施之範疇。 It is to be understood that the structure, the proportions, the size and the like of the drawings are only used in conjunction with the disclosure of the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effectiveness and the purpose of the creation. The technical content revealed by the creation can be covered. In the meantime, the terms "upper", "first", "second", "end" and the like, as used in this specification, are for convenience only, and are not intended to limit the scope of the creation. Changes or adjustments in their relative relationship are considered to be within the scope of the creation of the creation of the product without substantial changes.

請參閱第2A至2I圖係顯示本發明封裝基板之製法的剖視圖。 2A to 2I are cross-sectional views showing a method of manufacturing the package substrate of the present invention.

如第2A圖所示,於一離型件20上形成第一感光型介電材料30’。 As shown in Fig. 2A, a first photosensitive dielectric material 30' is formed on a release member 20.

於本實施例中,係以表面形成有金屬層(例如,銅、)的承載板(如,鋼板、矽、玻璃承載板)做為離型件20。本實施例之第一感光型介電材料30’係以負型感光型介電材料為例,該第一感光型介電材料30’係形成於整該離型件20上,並使用光罩50遮蓋住欲形成盲孔、埋孔或貫孔之 位置,並曝光固化(通常係使用紫外光固化(UV Curing))該第一感光型介電材料30’。 In the present embodiment, a carrier plate (for example, a steel plate, a crucible, a glass carrier plate) having a metal layer (for example, copper,) formed on its surface is used as the release member 20. The first photosensitive dielectric material 30' of the present embodiment is exemplified by a negative photosensitive dielectric material, and the first photosensitive dielectric material 30' is formed on the release member 20, and a photomask is used. 50 covers the blind hole, buried hole or through hole The position, and exposure curing (usually using UV Curing) of the first photosensitive dielectric material 30'.

另外,於一實施例中,該離型件20上復可形成有晶種層21,如第2A’圖所示。於本實施例中,對於該晶種層21之材質並未有特殊限制,僅需為可被蝕刻圖案化之金屬即可。 In addition, in an embodiment, the release member 20 is formed with a seed layer 21 as shown in Fig. 2A'. In the present embodiment, the material of the seed layer 21 is not particularly limited, and only a metal that can be etched and patterned can be used.

如第2B圖所示,移除未經曝光固化的該第一感光型介電材料30’,以得到具有外露出部分該離型件20的複數開孔30c之第一感光型介電層30,該第一感光型介電層30係具有相對之第一表面30a與第二表面30b,且該第二表面30b連接該離型件20。 As shown in FIG. 2B, the first photosensitive dielectric material 30' that has not been cured by exposure is removed to obtain a first photosensitive dielectric layer 30 having a plurality of openings 30c of the release member 20 exposed outwardly. The first photosensitive dielectric layer 30 has an opposite first surface 30a and a second surface 30b, and the second surface 30b is connected to the release member 20.

於本實施例中對於移除該未經曝光固化的該第一感光型介電材料30’之方法並未有特殊限制,僅需使用一般移除光阻劑的方法即可。 In the present embodiment, there is no particular limitation on the method of removing the unexposedly cured first photosensitive dielectric material 30', and it is only necessary to use a method of generally removing the photoresist.

如第2C圖所示,於該等開孔30c中填充導電材料以形成導電柱31。 As shown in FIG. 2C, the openings 30c are filled with a conductive material to form the conductive pillars 31.

如第2D圖所示,於該第一感光型介電層30上形成第二感光型介電材料32’。 As shown in Fig. 2D, a second photosensitive dielectric material 32' is formed on the first photosensitive dielectric layer 30.

本實施例之第二感光型介電材料32’係為光固化材料,且於本實施例中,該第二感光型介電材料32’係以負型感光型介電材料做示例性說明,該第二感光型介電材料32’係形成於整該第一感光型介電層30與導電柱31上,並使用光罩50遮蓋住欲形成線路之位置,再曝光固化該第二感光型介電材料32’。 The second photosensitive dielectric material 32' of the present embodiment is a photocurable material, and in the embodiment, the second photosensitive dielectric material 32' is exemplified by a negative photosensitive dielectric material. The second photosensitive dielectric material 32' is formed on the first photosensitive dielectric layer 30 and the conductive pillar 31, and covers the position where the line is to be formed by using the mask 50, and then exposes and cures the second photosensitive type. Dielectric material 32'.

如第2E圖所示,移除未經曝光固化的該第二感光型介電材料32’,而得到第二感光型介電層32,且該第二感光型介電層32係具有外露出部分該第一感光型介電層30或導電柱31的第二開口32a。 As shown in FIG. 2E, the second photosensitive dielectric material 32' is cured without exposure, and the second photosensitive dielectric layer 32 is obtained, and the second photosensitive dielectric layer 32 is exposed. A portion of the first photosensitive dielectric layer 30 or the second opening 32a of the conductive pillar 31.

於本實施例中,係藉由曝光顯影製程配合光罩50(如第2D圖所示)之設計,以得到經圖案化之感光型介電層32。此外,本實施例對於移除未經曝光固化的該第二感光型介電材料32’之方法並未有特殊限制,僅需使用一般移除光阻劑的方法即可。 In the present embodiment, the design of the photosensitive dielectric layer 32 is obtained by an exposure and development process in conjunction with the design of the mask 50 (as shown in FIG. 2D). Further, the method for removing the second photosensitive type dielectric material 32' which is not exposed and cured is not particularly limited, and only a method of generally removing the photoresist is used.

如第2F圖所示,於該第二感光型介電層32之第二開口32a中填充導電材料以形成電性連接該導電柱31的線路層33。 As shown in FIG. 2F, a conductive material is filled in the second opening 32a of the second photosensitive dielectric layer 32 to form a wiring layer 33 electrically connected to the conductive pillar 31.

於本實施例中,係以曝光顯影方式圖案化該第二感光型介電層32,再於該第二開口32a中填充導電材料,而可直接於該第一感光型介電層30上形成該線路層33,且由於本案係使用同時具有光阻及封裝特性之感光型介電材料,因此於形成該線路層33後不需進行移除該等感光型介電材料與壓合封裝膠體等製程,而得以簡化製程,有效減少生產所需的步驟。 In this embodiment, the second photosensitive dielectric layer 32 is patterned by exposure and development, and the second opening 32a is filled with a conductive material, and can be directly formed on the first photosensitive dielectric layer 30. The circuit layer 33, and since the present invention uses a photosensitive dielectric material having both photoresist and package characteristics, it is not necessary to remove the photosensitive dielectric material and the press-fit encapsulant after forming the wiring layer 33. Process, which simplifies the process and effectively reduces the steps required for production.

如第2G圖所示,於該線路層33上形成具有外露出部份該線路層33之第一開口34a的絕緣保護層34,該絕緣保護層34係例如防銲層。 As shown in FIG. 2G, an insulating protective layer 34 having a first opening 34a exposing a portion of the wiring layer 33 is formed on the wiring layer 33, and the insulating protective layer 34 is, for example, a solder resist layer.

於本實施例中,於該線路層33上形成該絕緣保護層34之方法係為依據習知製程即能完成者,於此便不再贅 述。 In the embodiment, the method for forming the insulating protective layer 34 on the circuit layer 33 is completed according to the conventional process, and the method is no longer performed. Said.

如第2H圖所示,移除該離型件20,得到二本發明之封裝基板3。本發明之封裝基板3係包括:具有相對之第一表面30a與第二表面30b之第一感光型介電層30;複數貫穿該第一表面30a與第二表面30b之導電柱31,且該導電柱31係具有外露於該第二表面30b之端面31a;形成於該第一感光型介電層30之第一表面30a上之線路層33,且該線路層33電性連接該導電柱;以及形成於該線路層33上之絕緣保護層34,且該絕緣保護層34係具有外露出部分該線路層33之第一開口34a。 As shown in Fig. 2H, the release member 20 is removed to obtain two package substrates 3 of the present invention. The package substrate 3 of the present invention comprises: a first photosensitive dielectric layer 30 having a first surface 30a and a second surface 30b opposite thereto; and a plurality of conductive pillars 31 extending through the first surface 30a and the second surface 30b, and The conductive pillar 31 has an end surface 31a exposed on the second surface 30b; a circuit layer 33 formed on the first surface 30a of the first photosensitive dielectric layer 30, and the wiring layer 33 is electrically connected to the conductive pillar; And an insulating protective layer 34 formed on the wiring layer 33, and the insulating protective layer 34 has a first opening 34a exposing a portion of the wiring layer 33.

於本實施例中,該封裝基板3復包括形成於該第一感光型介電層30之第一表面30a上之第二感光型介電層32,該第二感光型介電層32係形成於該第一表面30a上未形成有該線路層33之區域。 In this embodiment, the package substrate 3 further includes a second photosensitive dielectric layer 32 formed on the first surface 30a of the first photosensitive dielectric layer 30. The second photosensitive dielectric layer 32 is formed. A region of the wiring layer 33 is not formed on the first surface 30a.

如第2I圖所示,於該導電柱31之端面31a上形成導電凸塊35,且該導電凸塊35係藉由該導電柱31電性連接至該線路層33。 As shown in FIG. 2I, a conductive bump 35 is formed on the end surface 31a of the conductive pillar 31, and the conductive bump 35 is electrically connected to the wiring layer 33 by the conductive pillar 31.

如第2I’圖所示,若如第2A’圖所示地形成有該晶種層21,則此時復包括形成於該導電柱31之端面31a上之晶種層21,且該晶種層21係夾置於該導電柱31與導電凸塊35之間。於前揭實施例中,更藉由該晶種層21增加該導電柱31與導電凸塊35間的電鍍效果,遂能提升整體封裝基板的可靠度。 As shown in FIG. 2I', if the seed layer 21 is formed as shown in FIG. 2A', the seed layer 21 formed on the end surface 31a of the conductive post 31 is further included, and the seed crystal is The layer 21 is sandwiched between the conductive pillars 31 and the conductive bumps 35. In the foregoing embodiment, the plating effect between the conductive pillars 31 and the conductive bumps 35 is increased by the seed layer 21, and the reliability of the entire package substrate can be improved.

參閱第3圖,係接續第2I圖,本發明復復包括於前述 之封裝基板3上設置並電性連接半導體元件40,以得到具有半導體元件40之封裝基板。 Referring to Figure 3, which is continued from Figure 2I, the present invention is included in the foregoing The semiconductor device 40 is disposed and electrically connected to the package substrate 3 to obtain a package substrate having the semiconductor device 40.

於本實施例中,該封裝基板,係包括:具有相對之第一表面30a與第二表面30b之第一感光型介電層30;複數貫穿該第一表面30a與第二表面30b之導電柱31,且該導電柱31係具有外露於該第二表面30b之端面31a;形成於該第一感光型介電層30之第一表面30a上之線路層33,且該線路層33電性連接該導電柱31;以及設置於該第一感光型介電層30之第二表面30b上的半導體元件40,且該半導體元件40係藉銲球401電性連接該導電凸塊35,並藉由該導電柱31電性連接至該線路層33。 In this embodiment, the package substrate includes: a first photosensitive dielectric layer 30 having a first surface 30a and a second surface 30b opposite thereto; and a plurality of conductive pillars penetrating the first surface 30a and the second surface 30b 31, and the conductive pillar 31 has an end surface 31a exposed on the second surface 30b; a circuit layer 33 formed on the first surface 30a of the first photosensitive dielectric layer 30, and the wiring layer 33 is electrically connected The conductive pillar 31; and the semiconductor component 40 disposed on the second surface 30b of the first photosensitive dielectric layer 30, and the semiconductor component 40 is electrically connected to the conductive bump 35 by solder balls 401, and The conductive pillar 31 is electrically connected to the wiring layer 33.

由上可知,於本發明之封裝基板及其製法中,係藉由感光型介電材料形成埋孔、盲孔、貫孔或通孔,而無需使用機械鑽孔或雷射鑽孔的製程;此外,該感光型介電材料不僅可用於進行孔的形成,亦可藉由圖案化該感光型介電材料形成線路層,以提升封裝基板的佈線密度;再者,本發明之封裝基板無需額外設置核心板,可降低整體封裝基板之厚度,更利用感光型介電層同時具有光阻特性與絕緣封裝特性,而得以無需另外使用光阻,進而達到簡化製程之效果。 As can be seen from the above, in the package substrate of the present invention and the method of manufacturing the same, the buried via, the blind via, the through via or the via is formed by the photosensitive dielectric material without using a process of mechanical drilling or laser drilling; In addition, the photosensitive dielectric material can be used not only for forming holes, but also for forming a wiring layer by patterning the photosensitive dielectric material to increase the wiring density of the package substrate; further, the package substrate of the present invention does not need additional The core board is provided to reduce the thickness of the whole package substrate, and the photosensitive dielectric layer has both photoresist characteristics and insulating package characteristics, thereby eliminating the need for additional photoresist, thereby simplifying the process.

上述實施例僅例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修飾與改變。因此,本發明之權利保護範圍,應如後述之申請專利 範圍所列。 The above-described embodiments are merely illustrative of the principles of the invention and its effects, and are not intended to limit the invention. Modifications and variations of the above-described embodiments can be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be patented as described later. Listed in the scope.

3‧‧‧封裝基板 3‧‧‧Package substrate

30‧‧‧第一感光型介電層 30‧‧‧First photosensitive dielectric layer

30a‧‧‧第一表面 30a‧‧‧ first surface

30b‧‧‧第二表面 30b‧‧‧second surface

31‧‧‧導電柱 31‧‧‧conductive column

31a‧‧‧端面 31a‧‧‧ end face

32‧‧‧第二感光型介電層 32‧‧‧Second photosensitive dielectric layer

32a‧‧‧第二開口 32a‧‧‧second opening

33‧‧‧線路層 33‧‧‧Line layer

34‧‧‧絕緣保護層 34‧‧‧Insulating protective layer

34a‧‧‧第一開口 34a‧‧‧First opening

Claims (13)

一種封裝基板之製法,係包括:提供具有相對之第一表面與第二表面之第一感光型介電層;於該第一感光型介電層中形成複數貫穿該第一表面與第二表面之導電柱;以及於該第一感光型介電層之第一表面形成電性連接該導電柱的線路層。 A method for manufacturing a package substrate, comprising: providing a first photosensitive dielectric layer having a first surface and a second surface; and forming a plurality of first and second surfaces in the first photosensitive dielectric layer And a conductive layer; and forming a circuit layer electrically connected to the conductive pillar on the first surface of the first photosensitive dielectric layer. 如申請專利範圍第1項所述之封裝基板之製法,其中,提供該第一感光型介電層與形成複數該導電柱之步驟係包括:於一離型件上形成具有外露部分該離型件的複數開孔之第一感光型介電層;於該等開孔中形成導電材料,以得到複數該導電柱;以及於形成該線路層之後,移除該離型件。 The method for manufacturing a package substrate according to claim 1, wherein the step of providing the first photosensitive dielectric layer and forming the plurality of conductive pillars comprises: forming an exposed portion on a release member. a plurality of first photosensitive dielectric layers of openings; forming a conductive material in the openings to obtain a plurality of the conductive pillars; and after forming the wiring layer, removing the release member. 如申請專利範圍第1項所述之封裝基板之製法,其中,形成該線路層之步驟係包括:於該第一感光型介電層上形成具有外露出部分該第一感光型介電層或導電柱的開口之經圖案化之第二感光型介電層;以及於該開口中形成導電材料,以得到該線路層。 The method for manufacturing a package substrate according to claim 1, wherein the step of forming the circuit layer comprises: forming an exposed portion of the first photosensitive dielectric layer on the first photosensitive dielectric layer or a patterned second photosensitive dielectric layer of the opening of the conductive pillar; and a conductive material is formed in the opening to obtain the wiring layer. 如申請專利範圍第3項所述之封裝基板之製法,其中,形成經圖案化之該第二感光型介電層之步驟係包括: 於該第一感光型介電層上形成整覆蓋於該第一感光型介電層之第二感光型介電層;以及以曝光製程圖案化該第二感光型介電層。 The method for manufacturing a package substrate according to claim 3, wherein the step of forming the patterned second photosensitive dielectric layer comprises: Forming a second photosensitive dielectric layer overlying the first photosensitive dielectric layer on the first photosensitive dielectric layer; and patterning the second photosensitive dielectric layer by an exposure process. 如申請專利範圍第1項所述之封裝基板之製法,於形成該線路層之後,復包括於該導電柱外露於該第二表面之端面形成導電凸塊,且該導電凸塊係電性連接至該線路層。 The method for manufacturing a package substrate according to claim 1, wherein after forming the circuit layer, the conductive pillar is exposed on an end surface of the second surface to form a conductive bump, and the conductive bump is electrically connected. To the circuit layer. 如申請專利範圍第2項所述之封裝基板之製法,其中,於形成該第一感光型介電層前,復包括於該離型件上形成晶種層,該第一感光型介電層係形成於該晶種層上,且於移除該離型件之後,移除非位於該導電柱上的該晶種層。 The method for manufacturing a package substrate according to claim 2, wherein before forming the first photosensitive dielectric layer, forming a seed layer on the release member, the first photosensitive dielectric layer The seed layer is formed on the seed layer, and after the release member is removed, the seed layer not located on the conductive post is removed. 如申請專利範圍第1項所述之封裝基板之製法,其中,該第一感光型介電層之材質係為光固化材料。 The method of manufacturing a package substrate according to claim 1, wherein the material of the first photosensitive dielectric layer is a photocurable material. 如申請專利範圍第1項所述之封裝基板之製法,復包括於該封裝基板上設置並電性連接半導體元件。 The method for manufacturing a package substrate according to claim 1, wherein the package substrate is disposed on the package substrate and electrically connected to the semiconductor device. 一種封裝基板,係包括:第一感光型介電層,係具有相對之第一表面與第二表面;複數導電柱,係貫穿該第一表面與第二表面,且具有外露於該第二表面之端面;以及線路層,係形成於該第一感光型介電層之第一表面上,且電性連接該導電柱。 A package substrate includes: a first photosensitive dielectric layer having opposite first and second surfaces; and a plurality of conductive pillars extending through the first surface and the second surface and having an exposed surface And a circuit layer formed on the first surface of the first photosensitive dielectric layer and electrically connected to the conductive pillar. 如申請專利範圍第9項所述之封裝基板,復包括第二 光型介電層,係形成於該第一感光型介電層之第一表面上未形成有該線路層之區域。 The package substrate as described in claim 9 of the patent application, including the second The light-type dielectric layer is formed on a first surface of the first photosensitive dielectric layer where the wiring layer is not formed. 如申請專利範圍第9項所述之封裝基板,復包括導電凸塊,係形成於該導電柱之端面,且該導電凸塊係電性連接至該線路層。 The package substrate according to claim 9 , wherein the conductive bump is formed on an end surface of the conductive pillar, and the conductive bump is electrically connected to the circuit layer. 如申請專利範圍第9項所述之封裝基板,其中,該第一感光型介電層之材質係為光固化材料。 The package substrate according to claim 9, wherein the material of the first photosensitive dielectric layer is a photocurable material. 如申請專利範圍第9項所述之封裝基板,復包括半導體元件,係設置並電性連接於該封裝基板。 The package substrate according to claim 9 is further characterized in that the semiconductor device is provided and electrically connected to the package substrate.
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