TWM593656U - Chip package structure and chip package module - Google Patents

Chip package structure and chip package module Download PDF

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TWM593656U
TWM593656U TW108214381U TW108214381U TWM593656U TW M593656 U TWM593656 U TW M593656U TW 108214381 U TW108214381 U TW 108214381U TW 108214381 U TW108214381 U TW 108214381U TW M593656 U TWM593656 U TW M593656U
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thermally conductive
chip
circuit board
disposed
component
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TW108214381U
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Chinese (zh)
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張嘉帥
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同欣電子工業股份有限公司
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Publication of TWM593656U publication Critical patent/TWM593656U/en

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Abstract

一種晶片封裝模組,適用於電連接一電路板,晶片封裝模組包含一電子部件及一晶片封裝結構。晶片封裝結構包括一電路基板、一晶片、一第一導熱部件及一封裝層。電路基板具有一朝向電路板的第一面,及一相反於第一面且供電子部件設置的第二面,且電路基板電連接電路板。晶片設置於電路基板的第一面。第一導熱部件位於晶片與電路板之間,並設置於晶片遠離電路基板的表面,且其導熱率大於晶片。封裝層位於電路基板與電路板之間,並包覆晶片及第一導熱部件的一部分而使第一導熱部件之部分裸露出封裝層。A chip packaging module is suitable for electrically connecting a circuit board. The chip packaging module includes an electronic component and a chip packaging structure. The chip packaging structure includes a circuit substrate, a chip, a first thermally conductive component and a packaging layer. The circuit substrate has a first surface facing the circuit board, and a second surface opposite to the first surface and provided with the electronic component, and the circuit substrate is electrically connected to the circuit board. The chip is disposed on the first surface of the circuit board. The first thermally conductive component is located between the wafer and the circuit board, and is disposed on the surface of the wafer away from the circuit substrate, and its thermal conductivity is greater than that of the wafer. The encapsulation layer is located between the circuit substrate and the circuit board, and covers the wafer and a part of the first heat-conducting component to expose the part of the first heat-conducting component to the encapsulation layer.

Description

晶片封裝結構及晶片封裝模組Chip packaging structure and chip packaging module

本新型是有關於一種封裝結構,特別是指一種晶片封裝結構,以及晶片封裝模組。The present invention relates to a packaging structure, particularly a chip packaging structure and a chip packaging module.

隨著電子產品朝向輕、薄、短、小等面向發展,並且沿著多功能及高效能的方向前進,在系統級封裝(System in package)領域中,其元件或系統的大小從微米μm(10 -6公尺)到毫米(10 -3公尺)。其中,有一系統級封裝模組包含一晶片及一電子元件,在尺寸縮小同時執行高功率運算的過程中,將導致該晶片以及該電子元件所產生的廢熱隨著增加,(而且因尺寸小的關係,其散熱面積有限以致於大量廢熱將存留在該晶片及該電子元件),進而將影響該晶片封裝模組的運作效能。是以,如何提升晶片封裝模組的運作效能誠為業界所欲達成的課題。 With the development of electronic products toward light, thin, short, small, etc., and along the direction of multi-function and high performance, in the field of system in package (System in package), the size of its components or systems ranges from micrometers to μm ( 10 -6 meters) to millimeters (10 -3 meters). Among them, a system-in-package module contains a chip and an electronic component. In the process of reducing the size and performing high-power calculations, the waste heat generated by the chip and the electronic component will increase as a result (and because of the small size Relationship, its heat dissipation area is limited so that a large amount of waste heat will remain in the chip and the electronic component), which in turn will affect the operating efficiency of the chip package module. Therefore, how to improve the operation efficiency of the chip package module is a subject that the industry wants to achieve.

因此,本新型之目的,即在提供一種提升晶片散熱效率的晶片封裝結構。Therefore, the purpose of the present invention is to provide a chip package structure that improves the chip heat dissipation efficiency.

因此,本新型之目的,即在提供一種提升晶片散熱效率的晶片封裝模組。Therefore, the purpose of the present invention is to provide a chip package module that improves the chip heat dissipation efficiency.

於是,本新型晶片封裝結構,適用於供一電子部件設置,該晶片封裝結構包含一電路基板、一晶片、一第一導熱部件及一封裝層。該電路基板包括一第一面,及一相反於該第一面且供該電子部件設置的第二面。該晶片設置於該電路基板的該第一面。該第一導熱部件設置於該晶片遠離該電路基板的表面,且其導熱率大於該晶片。該封裝層包覆該晶片及該第一導熱部件的一部分而使該第一導熱部件之部分裸露出該封裝層。Therefore, the new chip packaging structure is suitable for an electronic component. The chip packaging structure includes a circuit substrate, a chip, a first thermally conductive component, and a packaging layer. The circuit board includes a first surface and a second surface opposite to the first surface and provided for the electronic component. The wafer is disposed on the first surface of the circuit board. The first thermally conductive component is disposed on the surface of the wafer away from the circuit substrate, and its thermal conductivity is greater than that of the wafer. The encapsulation layer wraps the chip and a portion of the first thermally conductive component so that the portion of the first thermally conductive component exposes the encapsulation layer.

在一些實施態樣中,該第一導熱部件包括一設置在該晶片遠離該電路基板的表面的第一導熱接著層,及一設置於該第一導熱接著層且部分裸露出該封裝層的第一導熱結構。In some embodiments, the first thermally conductive component includes a first thermally conductive adhesive layer disposed on the surface of the chip away from the circuit substrate, and a first thermally conductive adhesive layer disposed on the first thermally conductive adhesive layer and partially exposing the packaging layer A thermally conductive structure.

在一些實施態樣中,該電子部件包括一設置於該第二面的電子元件,其中,該晶片封裝結構還包含一設置於該第一面的第二導熱部件,該第二導熱部件設置於該第一面的位置與該電子元件垂直投影至該第一面的位置至少部分重疊,該第二導熱部件的導熱率大於該電路基板,該第二導熱部件的一部分被該封裝層包覆而使該第二導熱部件之部分裸露出該封裝層。In some embodiments, the electronic component includes an electronic component disposed on the second surface, wherein the chip package structure further includes a second thermally conductive component disposed on the first surface, and the second thermally conductive component is disposed on The position of the first surface and the position of the vertical projection of the electronic component onto the first surface at least partially overlap, the thermal conductivity of the second thermally conductive component is greater than that of the circuit substrate, and a portion of the second thermally conductive component is covered by the encapsulation layer The part of the second heat conducting component is exposed to the encapsulation layer.

在一些實施態樣中,該第二導熱部件包括一設置在該電路基板的該第一面的第二導熱接著層,及一設置於該第二導熱接著層且部分裸露出該封裝層的第二導熱結構。In some embodiments, the second thermally conductive component includes a second thermally conductive adhesive layer disposed on the first surface of the circuit substrate, and a second thermally conductive adhesive layer disposed on the second thermally conductive adhesive layer and partially exposing the packaging layer 2. Thermally conductive structure.

於是,本新型晶片封裝模組,適用於電連接一電路板,該晶片封裝模組包含一電子部件及一晶片封裝結構。該晶片封裝結構包括一電路基板、一晶片、一第一導熱部件及一封裝層。該電路基板具有一朝向該電路板的第一面,及一相反於該第一面且供該電子部件設置的第二面,且該電路基板電連接該電路板。該晶片設置於該電路基板的該第一面。該第一導熱部件位於該晶片與該電路板之間,並設置於該晶片遠離該電路基板的表面,且其導熱率大於該晶片。該封裝層位於該電路基板與該電路板之間,並包覆該晶片及該第一導熱部件的一部分而使該第一導熱部件之部分裸露出該封裝層。Therefore, the new chip packaging module is suitable for electrically connecting a circuit board. The chip packaging module includes an electronic component and a chip packaging structure. The chip packaging structure includes a circuit substrate, a chip, a first thermally conductive component and a packaging layer. The circuit board has a first surface facing the circuit board, and a second surface opposite to the first surface and provided for the electronic component, and the circuit board is electrically connected to the circuit board. The wafer is disposed on the first surface of the circuit board. The first thermally conductive component is located between the wafer and the circuit board, and is disposed on the surface of the wafer away from the circuit substrate, and its thermal conductivity is greater than that of the wafer. The encapsulation layer is located between the circuit substrate and the circuit board, and covers the chip and a part of the first heat-conducting component to expose the part of the first heat-conducting component to the encapsulation layer.

在一些實施態樣中,該第一導熱結構裸露於該封裝層的表面為平整面。In some embodiments, the surface of the first thermal conductive structure exposed on the encapsulation layer is a flat surface.

在一些實施態樣中,該晶片封裝模組還包含一個至少部分被該封裝層包覆的導線架,該導線架的一端凸伸於該封裝層之外而電連接該電路板,另一端電連接該電路基板。In some embodiments, the chip package module further includes a lead frame at least partially covered by the encapsulation layer, one end of the lead frame protrudes beyond the encapsulation layer to electrically connect the circuit board, and the other end electrically Connect the circuit board.

本新型之功效在於:藉由在該晶片的表面增設一層狀的第一導熱結構,並透過該封裝層將該第一導熱結構包覆以提升固定及保護效果,使該第一導熱結構能穩定地吸收該晶片產生的廢熱並將廢熱排除,進而提升該晶片的運作效能。再者,藉由將該第二導熱部件與該電子元件設置於該電路基板的位置相互對應,以使得該電子元件所產生的廢熱能以最短路徑傳導至該第二導熱部件,進而減少廢熱殘留於該電子元件與該電路基板。The effect of the present invention lies in: by adding a layered first heat conductive structure on the surface of the chip, and covering the first heat conductive structure through the encapsulation layer to improve the fixing and protection effect, so that the first heat conductive structure can Stably absorb the waste heat generated by the chip and remove the waste heat, thereby improving the operation efficiency of the chip. Furthermore, by positioning the second heat-conducting component and the electronic component on the circuit board to correspond to each other, the waste heat energy generated by the electronic component is transmitted to the second heat-conducting component in the shortest path, thereby reducing waste heat residue The electronic component and the circuit board.

參閱圖1,本新型晶片封裝模組之一實施例,該晶片封裝模組是一種系統級封裝結構,適用於電連接一電路板9,該晶片封裝模組包含一晶片封裝結構1及一電子部件2,其中,該晶片封裝結構1和該電子部件2皆為毫米等級。在本實施例中,該晶片封裝模組舉例為一光學模組,該光學模組例如作為3D影像辨識使用。Referring to FIG. 1, an embodiment of the new chip packaging module is a system-level packaging structure suitable for electrically connecting a circuit board 9. The chip packaging module includes a chip packaging structure 1 and an electronics Component 2, wherein the chip packaging structure 1 and the electronic component 2 are all in the millimeter scale. In this embodiment, the chip package module is an optical module, for example, which is used for 3D image recognition.

該晶片封裝結構1包括一電路基板11、一晶片12、一第一導熱部件13、一第二導熱部件14、一導線架15及一封裝層16。The chip packaging structure 1 includes a circuit substrate 11, a chip 12, a first thermally conductive component 13, a second thermally conductive component 14, a lead frame 15 and a packaging layer 16.

該電路基板11具有一朝向該電路板9的第一面111,及一相反於該第一面111且供該電子部件2設置的第二面112,且該電路基板11電連接該電路板9。在本實施例中,該電路基板11舉例為雙面電路基板11(Double Layer circuit board),亦即該電路基板11的該第一面111與該第二面112皆設有導線線路而可供電子零件電連接,且設置於該第一面111的電子零件以及設置於該第二面112的電子零件能藉由該電路基板11的導線電連接,藉此有效利用該電路基板11上的空間,進而減少電路基板11的面積,以縮小整體體積。在本實施例中,該電路基板11間隔該電路板9且由該第一面111朝向該電路板9。再者,該電路基板11是以陶瓷材料(例如:氮化鋁或氧化鋁)製作而成,且該電路基板11具有較該等電子零件更多與空氣接觸的表面積,透過陶瓷材料具有高導熱的特性以及較電子零件多的散熱面積,藉以即時吸收並散出電子零件運作時所產生的廢熱而讓電子零件保持適當的運作效能。The circuit board 11 has a first surface 111 facing the circuit board 9 and a second surface 112 opposite to the first surface 111 and provided for the electronic component 2, and the circuit board 11 is electrically connected to the circuit board 9 . In this embodiment, the circuit board 11 is exemplified by a double layer circuit board 11 (Double Layer Circuit Board), that is, the first surface 111 and the second surface 112 of the circuit substrate 11 are provided with wire circuits for The electronic components are electrically connected, and the electronic components disposed on the first surface 111 and the electronic components disposed on the second surface 112 can be electrically connected by the wires of the circuit board 11, thereby effectively utilizing the space on the circuit board 11 , And further reduce the area of the circuit board 11 to reduce the overall volume. In this embodiment, the circuit board 11 is spaced from the circuit board 9 and faces the circuit board 9 from the first surface 111. Furthermore, the circuit board 11 is made of a ceramic material (for example, aluminum nitride or aluminum oxide), and the circuit board 11 has a surface area that is more in contact with air than the electronic components, and has high thermal conductivity through the ceramic material Features and more heat dissipation area than electronic parts, so as to absorb and dissipate the waste heat generated during the operation of electronic parts in real time, so that electronic parts maintain proper operating performance.

該晶片12設置於該電路基板11的該第一面111。在本實施例中,該晶片12舉例為一顆覆晶式的晶片,用於控制設置於該第二面112的電子部件2。該晶片12具有一電連接該第一面111的上連接表面121,及一相反於該上連接表面121且間隔於該電路板9的下連接表面122。The wafer 12 is disposed on the first surface 111 of the circuit substrate 11. In this embodiment, the wafer 12 is, for example, a flip chip wafer, which is used to control the electronic component 2 disposed on the second surface 112. The chip 12 has an upper connection surface 121 electrically connected to the first surface 111, and a lower connection surface 122 opposite to the upper connection surface 121 and spaced apart from the circuit board 9.

該第一導熱部件13設置於該晶片12遠離該電路基板11的表面,且其導熱率大於該晶片12。更清楚地說,該第一導熱部件13具有一第一導熱接著層131及一第一導熱結構132。其中,該第一導熱接著層131舉例為含有金屬成分的接著劑,例如銀膠或錫膏,以銀膠而言,其導熱係數大於30(W/mK),該第一導熱接著層131完整地塗佈於該晶片12的該下連接表面122以使該下連接表面122不顯露於外且使空氣無法殘留於該第一導熱接著層131與該下連接表面122之間,藉此能提供一定程度的黏著力度。另外,該第一導熱結構132設置於該第一導熱接著層131,換言之,該第一導熱結構132藉由該第一導熱接著層131的黏著性與該晶片12連接,該第一導熱結構132舉例是由銅製作而成的金屬層且完全覆蓋住該第一導熱接著層131背向於該晶片12的一側面,藉此使該第一導熱接著層131能支撐且能在狹窄的空間內達到散熱效果。該第一導熱結構132具有一連接於該第一導熱接著層131的第一頂面133,及一相反於該第一頂面133且間隔於該電路板9的第一底面134。藉此,該第一導熱接著層131能吸收該晶片12的廢熱並傳導至該第一導熱結構132,在此情況下能降低廢熱對該晶片12所造成的影響,使該晶片12維持應有的運作效能。值得提出的是,該第一底面134為平整表面,且該第一底面134並不以間隔於該電路板9為限,在另一實施態樣中,由於該第一底面134為平整表面,因此,該第一底面134也可以直接貼合該電路板9上的導熱結構,且透過平整表面來增加接觸面積,進而提升散熱效率。The first heat-conducting member 13 is disposed on the surface of the wafer 12 away from the circuit substrate 11, and its thermal conductivity is greater than that of the wafer 12. More specifically, the first thermally conductive component 13 has a first thermally conductive adhesive layer 131 and a first thermally conductive structure 132. The first thermally conductive adhesive layer 131 is, for example, an adhesive containing metal components, such as silver glue or solder paste. In terms of silver adhesive, the thermal conductivity is greater than 30 (W/mK), and the first thermally conductive adhesive layer 131 is complete Coated on the lower connection surface 122 of the wafer 12 so that the lower connection surface 122 is not exposed and air cannot remain between the first thermally conductive adhesive layer 131 and the lower connection surface 122, thereby providing A certain degree of adhesion. In addition, the first thermally conductive structure 132 is disposed on the first thermally conductive adhesive layer 131, in other words, the first thermally conductive structure 132 is connected to the chip 12 by the adhesiveness of the first thermally conductive adhesive layer 131, and the first thermally conductive structure 132 An example is a metal layer made of copper and completely covering a side of the first thermally conductive adhesive layer 131 facing away from the wafer 12, thereby enabling the first thermally conductive adhesive layer 131 to be supported and in a narrow space To achieve the cooling effect. The first thermally conductive structure 132 has a first top surface 133 connected to the first thermally conductive adhesive layer 131 and a first bottom surface 134 opposite to the first top surface 133 and spaced apart from the circuit board 9. In this way, the first thermally conductive adhesive layer 131 can absorb the waste heat of the wafer 12 and conduct it to the first thermally conductive structure 132. In this case, the influence of the waste heat on the wafer 12 can be reduced, and the wafer 12 can be maintained as it should. Operating efficiency. It is worth mentioning that the first bottom surface 134 is a flat surface, and the first bottom surface 134 is not limited to being spaced apart from the circuit board 9, in another embodiment, since the first bottom surface 134 is a flat surface, Therefore, the first bottom surface 134 can also directly adhere to the heat conducting structure on the circuit board 9 and increase the contact area through the flat surface, thereby improving the heat dissipation efficiency.

該第二導熱部件14設置於該第一面111,該第二導熱部件14的導熱率大於該電路基板11。其中,該第二導熱部件14間隔於該晶片12與該第一導熱部件13,並包括一第二導熱接著層141及一第二導熱結構142。進一步而言,該第二導熱接著層141舉例為含有金屬成分的接著劑,例如銀膠或錫膏,該第二導熱接著層141塗佈於該第一面111的一部份但不與該晶片12的設置位置重疊。該第二導熱結構142設置於該第二導熱接著層141,並藉由該第二導熱接著層141的黏著性與該電路基板11連接,該第二導熱結構142舉例是由銅製作而成的金屬塊且完全覆蓋住該第二導熱接著層141背向於該電路基板11的一側面。該第二導熱結構142具有一連接於該第二導熱接著層141的第二頂面143,及一相反於該第二頂面143且高度與該第一底面134相等的第二底面144。藉此,該第二導熱接著層141能吸收該電路基板11的廢熱並傳導至該第二導熱結構142,在此情況下能降低廢熱對設置於該電路基板11上的電子零件所造成的影響,使該等電子零件維持應有的運作效能。當然,上述第一導熱部件13與該第二導熱部件14的材質能依照實際需求而對應調整,並不以上述為限。值得提出的是,該第二底面144亦為平整表面,且該第二底面144可以間隔於該電路板9,藉由空氣流動達到散熱效果,也可以直接貼合該電路板9上的導熱結構,透過平整表面來增加接觸面積,進而提升散熱效率。The second thermally conductive member 14 is disposed on the first surface 111. The thermal conductivity of the second thermally conductive member 14 is greater than that of the circuit board 11. The second heat-conducting component 14 is spaced apart from the chip 12 and the first heat-conducting component 13 and includes a second thermally conductive adhesive layer 141 and a second thermally conductive structure 142. Further, the second thermally conductive adhesive layer 141 is, for example, an adhesive containing a metal component, such as silver glue or solder paste, and the second thermally conductive adhesive layer 141 is applied to a portion of the first surface 111 but not with the The installation positions of the wafers 12 overlap. The second thermally conductive structure 142 is disposed on the second thermally conductive adhesive layer 141 and is connected to the circuit substrate 11 by the adhesiveness of the second thermally conductive adhesive layer 141. The second thermally conductive structure 142 is made of copper, for example The metal block completely covers a side of the second thermal conductive adhesive layer 141 facing away from the circuit substrate 11. The second thermally conductive structure 142 has a second top surface 143 connected to the second thermally conductive adhesive layer 141 and a second bottom surface 144 opposite to the second top surface 143 and having the same height as the first bottom surface 134. Thereby, the second heat conductive adhesive layer 141 can absorb the waste heat of the circuit substrate 11 and conduct to the second heat conductive structure 142, in this case, the influence of the waste heat on the electronic components disposed on the circuit substrate 11 can be reduced , So that these electronic parts maintain their due operational efficiency. Of course, the materials of the first heat-conducting member 13 and the second heat-conducting member 14 can be adjusted according to actual needs, and are not limited to the above. It is worth mentioning that the second bottom surface 144 is also a flat surface, and the second bottom surface 144 can be spaced apart from the circuit board 9 to achieve the heat dissipation effect by air flow, and can also be directly attached to the heat conduction structure on the circuit board 9 , Increase the contact area by flattening the surface, thereby improving the heat dissipation efficiency.

該導線架15具有多個位於該電路基板11與該電路板9之間的引腳151,其中,每一引腳151的兩相反端分別電連接該電路基板11與該電路板9。The lead frame 15 has a plurality of pins 151 between the circuit substrate 11 and the circuit board 9, wherein the two opposite ends of each pin 151 are electrically connected to the circuit substrate 11 and the circuit board 9 respectively.

在本實施例中,該封裝層16的成分包含環氧樹脂,並藉由模具填充於該電路基板11的該第一面111,並包覆該晶片12、該第一導熱部件13的一部分、該第二導熱部件14的一部分及每一引腳151的一部分而使該第一導熱部件13之該第一底面134、該第二導熱部件14之該第二底面144,及該等引腳151電連接該電路板9的部分裸露於外。透過該封裝層16能同時達到保護及固定該晶片12、該第一導熱部件13、該第二導熱部件14及該導線架15之功效。該封裝層16具有一連接於該第一面111的接觸面161,及一相反於該接觸面161且高度與該第一底面134等高或略低的非接觸面162,當該電路板9電連接該等引腳151時使該第一底面134與該第二底面144與該電路板9相間隔一間隙,進而讓空氣能在該間隙內流動並與該第一底面134、該第二底面144接觸。當然,該非接觸面162與該電路板9間的接觸可視設計需求對應調整,並不以上述相間隔為限。In this embodiment, the composition of the encapsulation layer 16 includes epoxy resin, which is filled on the first surface 111 of the circuit board 11 by a mold, and covers the chip 12 and a part of the first heat-conducting member 13, A portion of the second thermally conductive member 14 and a portion of each pin 151 make the first bottom surface 134 of the first thermally conductive member 13, the second bottom surface 144 of the second thermally conductive member 14, and the pins 151 The portion electrically connected to the circuit board 9 is exposed. The encapsulation layer 16 can simultaneously protect and fix the chip 12, the first heat-conducting component 13, the second heat-conducting component 14 and the lead frame 15. The encapsulation layer 16 has a contact surface 161 connected to the first surface 111, and a non-contact surface 162 opposite to the contact surface 161 and having a height equal to or slightly lower than the first bottom surface 134, when the circuit board 9 When the pins 151 are electrically connected, the first bottom surface 134 and the second bottom surface 144 are separated from the circuit board 9 by a gap, so that air can flow in the gap and communicate with the first bottom surface 134 and the second The bottom surface 144 contacts. Of course, the contact between the non-contact surface 162 and the circuit board 9 can be adjusted according to design requirements, and is not limited to the above-mentioned interval.

該電子部件2包括一設置於該第二面112且受該晶片12控制的電子元件21。在本實施例中,該電子元件21舉例為一種光學元件,且在其中一實施態樣,該電子元件21電連接於該第二面112的位置對應於該第二導熱部件14,意即該電子元件21垂直投影至該第一面111的位置至少部分與該第二導熱部件14設置於該第一面111的位置重疊。藉此,該電子元件21所產生的廢熱能以最短路徑經由該電路基板11傳導至該第二導熱部件14,以維持在最佳運作效能。當然,該電子元件21垂直投影至該第一面111的位置也可以完全與該第二導熱部件14設置於該第一面111的位置重疊,藉此使大部分廢熱直接被該第二導熱部件14吸收,進而降低對該晶片12以及其他電子零件的影響。The electronic component 2 includes an electronic component 21 disposed on the second surface 112 and controlled by the wafer 12. In this embodiment, the electronic component 21 is exemplified as an optical component, and in one embodiment, the position where the electronic component 21 is electrically connected to the second surface 112 corresponds to the second heat-conducting member 14, meaning that the The position where the electronic component 21 is vertically projected onto the first surface 111 at least partially overlaps with the position where the second heat conducting member 14 is disposed on the first surface 111. In this way, the waste heat energy generated by the electronic component 21 is transmitted to the second heat-conducting component 14 through the circuit substrate 11 in the shortest path to maintain the optimal operating performance. Of course, the position where the electronic component 21 is vertically projected onto the first surface 111 can also completely overlap with the position where the second heat-conducting component 14 is disposed on the first surface 111, so that most of the waste heat is directly caused by the second heat-conducting component 14 Absorption, thereby reducing the impact on the wafer 12 and other electronic components.

當該第一底面134、該第二底面144及該非接觸面162間隔於該電路板9時,對於該晶片12運作時所產生的廢熱將傳導至該第一導熱部件13,並經由空氣的流動由該第一底面134散出,藉此降低廢熱對該晶片12造成的影響。另外,對於該電子元件21或其他電子元件產生的廢熱能傳導至該電路基板11,再傳導至該第二導熱部件14,並經由空氣的流動由該第二底面144散出,藉此使該電子元件21與其他電子零件維持在較佳的運作效能。此外,當該第一導熱部件13與該第二導熱部件14直接貼合於該電路板9上的導熱結構時,該晶片12運作時所產生的廢熱將經由該第一導熱部件13一路傳導至該電路板9,而該電子元件21與其他電子零件產生的廢熱亦經由該第二導熱部件14傳導至該電路板9,由該電路板9上的導熱結構進行散熱作用。When the first bottom surface 134, the second bottom surface 144 and the non-contact surface 162 are spaced apart from the circuit board 9, the waste heat generated during the operation of the wafer 12 will be conducted to the first heat-conducting member 13 and flow through the air The first bottom surface 134 dissipates, thereby reducing the influence of waste heat on the wafer 12. In addition, the waste heat energy generated by the electronic component 21 or other electronic components is conducted to the circuit substrate 11 and then to the second heat-conducting member 14 and is radiated from the second bottom surface 144 via the flow of air, thereby causing the The electronic component 21 and other electronic components maintain better operating performance. In addition, when the first heat-conducting component 13 and the second heat-conducting component 14 are directly attached to the heat-conducting structure on the circuit board 9, the waste heat generated during the operation of the chip 12 will be conducted all the way through the first heat-conducting component 13 to The circuit board 9, and the waste heat generated by the electronic component 21 and other electronic components are also conducted to the circuit board 9 via the second heat-conducting member 14, and the heat conduction structure on the circuit board 9 dissipates heat.

在另一實施態樣中,該電子部件2可被省略,並僅提供該晶片封裝結構1讓使用者自行設計該電子部件2的配置。In another embodiment, the electronic component 2 can be omitted, and only the chip packaging structure 1 is provided for users to design the configuration of the electronic component 2 by themselves.

綜上所述,本新型藉由在該晶片12的表面增設一層狀的第一導熱結構132,並透過該封裝層16將該第一導熱結構132包覆以提升固定及保護效果,使該第一導熱結構132能穩定地吸收該晶片12產生的廢熱並將廢熱排除,進而提升該晶片12的運作效能。再者,藉由將該第二導熱部件14與該電子元件21設置於該電路基板11的位置相互對應,以使得該電子元件21所產生的廢熱能以最短路徑傳導至該第二導熱部件14,進而減少廢熱殘留於該電子元件21與該電路基板11,故確實能達成本新型之目的。To sum up, in the present invention, by adding a layered first heat conductive structure 132 on the surface of the chip 12 and covering the first heat conductive structure 132 through the encapsulation layer 16 to improve the fixing and protection effect, the new The first heat conducting structure 132 can stably absorb the waste heat generated by the chip 12 and remove the waste heat, thereby improving the operation efficiency of the chip 12. Furthermore, by positioning the second heat-conducting member 14 and the electronic component 21 on the circuit board 11 to correspond to each other, the waste heat energy generated by the electronic component 21 is transmitted to the second heat-conducting member 14 in the shortest path In order to reduce the waste heat remaining in the electronic component 21 and the circuit board 11, it can really achieve the purpose of new cost.

惟以上所述者,僅為本新型之實施例而已,當不能以此限定本新型實施之範圍,凡是依本新型申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本新型專利涵蓋之範圍內。However, the above are only examples of the new model. When the scope of the new model cannot be limited by this, any simple equivalent changes and modifications made according to the patent application scope and patent specification content of the new model are still regarded as Within the scope of this new patent.

1:晶片封裝結構 11:電路基板 111:第一面 112:第二面 12:晶片 121:上連接表面 122:下連接表面 13:第一導熱部件 131:第一導熱接著層 132:第一導熱結構 133:第一頂面 134:第一底面 14:第二導熱部件 141:第二導熱接著層 142:第二導熱結構 143:第二頂面 144:第二底面 15:導線架 151:引腳 16:封裝層 161:接觸面 162:非接觸面 2:電子部件 21:電子元件 9:電路板1: chip package structure 11: Circuit board 111: first side 112: second side 12: Wafer 121: Upper connection surface 122: Lower connection surface 13: The first heat conduction component 131: The first thermally conductive adhesive layer 132: The first heat conduction structure 133: first top surface 134: the first bottom 14: Second heat conduction component 141: Second thermally conductive adhesive layer 142: Second heat conduction structure 143: Second top surface 144: second bottom 15: lead frame 151: Pin 16: Encapsulation layer 161: contact surface 162: Non-contact surface 2: Electronic components 21: Electronic components 9: Circuit board

本新型之其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中: 圖1是本新型之一實施例的一剖面示意圖。 Other features and functions of the present invention will be clearly presented in the embodiments with reference to the drawings, in which: FIG. 1 is a schematic cross-sectional view of an embodiment of the present invention.

1:晶片封裝結構 1: chip package structure

11:電路基板 11: Circuit board

111:第一面 111: first side

112:第二面 112: second side

12:晶片 12: Wafer

121:上連接表面 121: Upper connection surface

122:下連接表面 122: Lower connection surface

13:第一導熱部件 13: The first heat conduction component

131:第一導熱接著層 131: The first thermally conductive adhesive layer

141:第二導熱接著層 141: Second thermally conductive adhesive layer

142:第二導熱結構 142: Second heat conduction structure

143:第二頂面 143: Second top surface

144:第二底面 144: second bottom

15:導線架 15: lead frame

151:引腳 151: Pin

16:封裝層 16: Encapsulation layer

161:接觸面 161: contact surface

162:非接觸面 162: Non-contact surface

132:第一導熱結構 132: The first heat conduction structure

133:第一頂面 133: first top surface

134:第一底面 134: the first bottom

14:第二導熱部件 14: Second heat conduction component

2:電子部件 2: Electronic components

21:電子元件 21: Electronic components

9:電路板 9: Circuit board

Claims (10)

一種晶片封裝結構,適用於供一電子部件設置,該晶片封裝結構包含: 一電路基板,包括一第一面,及一相反於該第一面且供該電子部件設置的第二面; 一晶片,設置於該電路基板的該第一面; 一第一導熱部件,設置於該晶片遠離該電路基板的表面,且其導熱率大於該晶片;及 一封裝層,包覆該晶片及該第一導熱部件的一部分而使該第一導熱部件之部分裸露出該封裝層。 A chip packaging structure is suitable for setting an electronic component. The chip packaging structure includes: A circuit board including a first surface and a second surface opposite to the first surface and provided for the electronic component; A chip disposed on the first surface of the circuit substrate; A first thermally conductive component disposed on the surface of the chip away from the circuit substrate and having a thermal conductivity greater than that of the chip; and An encapsulation layer encapsulates the chip and a portion of the first thermally conductive component so that the portion of the first thermally conductive component exposes the encapsulation layer. 如請求項1所述的晶片封裝結構,其中,該第一導熱部件包括一設置在該晶片遠離該電路基板的表面的第一導熱接著層,及一設置於該第一導熱接著層且部分裸露出該封裝層的第一導熱結構。The chip package structure as claimed in claim 1, wherein the first thermally conductive component includes a first thermally conductive adhesive layer disposed on a surface of the chip away from the circuit substrate, and a partially exposed thermally conductive adhesive layer disposed on the first thermally conductive adhesive layer The first heat conduction structure of the encapsulation layer. 如請求項1所述的晶片封裝結構,該電子部件包括一設置於該第二面的電子元件,其中,該晶片封裝結構還包含一設置於該第一面的第二導熱部件,該第二導熱部件設置於該第一面的位置與該電子元件垂直投影至該第一面的位置至少部分重疊,該第二導熱部件的導熱率大於該電路基板,該第二導熱部件的一部分被該封裝層包覆而使該第二導熱部件之部分裸露出該封裝層。The chip packaging structure according to claim 1, the electronic component includes an electronic component disposed on the second surface, wherein the chip packaging structure further includes a second thermally conductive component disposed on the first surface, the second The position where the heat conduction member is disposed on the first surface and the position where the electronic component is vertically projected onto the first surface at least partially overlap, the thermal conductivity of the second heat conduction member is greater than that of the circuit substrate, and a part of the second heat conduction member is encapsulated The cladding layer exposes a portion of the second thermally conductive component to the encapsulation layer. 如請求項3所述的晶片封裝結構,其中,該第二導熱部件包括一設置在該電路基板的該第一面的第二導熱接著層,及一設置於該第二導熱接著層且部分裸露出該封裝層的第二導熱結構。The chip package structure according to claim 3, wherein the second thermally conductive component includes a second thermally conductive adhesive layer disposed on the first surface of the circuit substrate, and a partially exposed thermally conductive adhesive layer disposed on the second thermally conductive adhesive layer The second heat conduction structure of the encapsulation layer. 一種晶片封裝模組,適用於電連接一電路板,該晶片封裝模組包含: 一電子部件;及 一晶片封裝結構,包括 一電路基板,具有一朝向該電路板的第一面,及一相反於該第一面且供該電子部件設置的第二面,且該電路基板電連接該電路板, 一晶片,設置於該電路基板的該第一面, 一第一導熱部件,位於該晶片與該電路板之間,並設置於該晶片遠離該電路基板的表面,且其導熱率大於該晶片,及 一封裝層,位於該電路基板與該電路板之間,並包覆該晶片及該第一導熱部件的一部分而使該第一導熱部件之部分裸露出該封裝層。 A chip packaging module is suitable for electrically connecting a circuit board. The chip packaging module includes: An electronic component; and A chip package structure, including A circuit board having a first surface facing the circuit board and a second surface opposite to the first surface and provided for the electronic component, and the circuit board is electrically connected to the circuit board, A chip disposed on the first surface of the circuit board, A first thermally conductive component, located between the chip and the circuit board, and disposed on the surface of the chip away from the circuit board, and having a thermal conductivity greater than that of the chip, and An encapsulation layer is located between the circuit substrate and the circuit board, and covers the chip and a part of the first heat-conducting component to expose the part of the first heat-conducting component to the encapsulation layer. 如請求項5所述的晶片封裝模組,其中,該第一導熱部件具有一設置在該晶片遠離該電路基板的表面的第一導熱接著層,及一設置於該第一導熱接著層且部分裸露出該封裝層的第一導熱結構。The chip package module according to claim 5, wherein the first thermally conductive component has a first thermally conductive adhesive layer disposed on a surface of the chip away from the circuit substrate, and a partially disposed portion of the first thermally conductive adhesive layer The first heat conducting structure of the encapsulation layer is exposed. 如請求項6所述的晶片封裝模組,其中,該第一導熱結構裸露於該封裝層的表面為平整面。The chip packaging module according to claim 6, wherein the surface of the first heat conductive structure exposed on the packaging layer is a flat surface. 如請求項5所述的晶片封裝模組,其中,該電子部件包括一設置於該第二面的電子元件;該晶片封裝結構還包含一設置於該第一面的第二導熱部件,該第二導熱部件設置於該第一面的位置與該電子元件垂直投影至該第一面的位置至少部分重疊,該第二導熱部件的導熱率大於該電路基板,該第二導熱部件的一部分被該封裝層包覆而使該第二導熱部件之部分裸露出該封裝層。The chip packaging module according to claim 5, wherein the electronic component includes an electronic component disposed on the second surface; the chip packaging structure further includes a second thermally conductive component disposed on the first surface, the first The position where the two heat-conducting components are disposed on the first surface and the position where the electronic component is vertically projected onto the first surface at least partially overlap. The thermal conductivity of the second heat-conducting component is greater than that of the circuit substrate, and a part of the second heat-conducting component is The encapsulation layer is covered to expose a part of the second heat-conducting component to the encapsulation layer. 如請求項8所述的晶片封裝模組,其中,該第二導熱部件包括一設置在該電路基板的該第一面的第二導熱接著層,及一設置於該第二導熱接著層且部分裸露出該封裝層的第二導熱結構。The chip package module according to claim 8, wherein the second thermally conductive component includes a second thermally conductive adhesive layer disposed on the first surface of the circuit substrate, and a partially disposed thermally conductive adhesive layer The second heat conducting structure of the encapsulation layer is exposed. 如請求項5所述的晶片封裝模組,還包含一個至少部分被該封裝層包覆的導線架,該導線架的一端凸伸於該封裝層之外而電連接該電路板,另一端電連接該電路基板。The chip packaging module according to claim 5, further comprising a lead frame at least partially covered by the packaging layer, one end of the lead frame protruding out of the packaging layer is electrically connected to the circuit board, and the other end is electrically connected Connect the circuit board.
TW108214381U 2019-10-31 2019-10-31 Chip package structure and chip package module TWM593656U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI722633B (en) * 2019-10-31 2021-03-21 同欣電子工業股份有限公司 Chip packaging structure and chip packaging module

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI722633B (en) * 2019-10-31 2021-03-21 同欣電子工業股份有限公司 Chip packaging structure and chip packaging module

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