TWM587825U - Photosensitive device - Google Patents

Abstract

A photosensitive device having an active area and a trace area is provided. The photosensitive device includes a scan line, a read line, an active component, a photodiode layer, an auxiliary line, a common electrode line, a stacked structure and a protective layer. The scan line and the read line are disposed in the active area. The scan line is extended toward a first direction. The read line is extended toward a second direction. The active component is disposed in the active area. The active component is electrically connected to the corresponding scan line and the corresponding read line. The photodiode layer is disposed in the active area. The photodiode layer is electrically connected to the active component. The auxiliary line and the common electrode line are disposed in the active area. The auxiliary line is extended toward the second direction and is electrically connected to the read line. The common electrode line is extended toward the second direction and is electrically connected to the photodiode layer. The stacked structure is disposed in the trace area. The stacked structure includes a trace wire, a first insulating structure, a semiconductor structure, a first conductive structure. The protective layer covers the photodiode layer and the stacked structure.

Description

Photosensitive device

The novel creation relates to a photosensitive device, and more particularly, to a photosensitive device that reduces a leakage current generated by a photodiode layer disposed near a boundary between an active area and a routing area.

Please refer to FIG. 1A and FIG. 1B together, which illustrate a conventional photosensitive device 1. The photosensitive device 1 has an active area 1a and a wiring area 1b. The photodiode layer 10 is disposed on the substrate 2 and is located in the active area 1a. The wiring 20 is located in the wiring area 1b. Since the photodiode layer 10 and the trace 20 each have a thickness of about 10,000 angstroms and 2000 angstroms, and the photodiode layer 10 is disposed on the first conductor layer 30 (for forming the gate electrode 32, the scan line 34, and the trace 20) and Above the second conductor layer 40 (for forming the source electrode 42, the drain electrode 44, and the read line 46), based on this, the photodiode layer 10 near the boundary of the active region 1 a and the routing region 1 b is disposed on the The difference in vertical distance d _p between the traces 20 of the line area 1b will be extremely large (at least more than 14000 angstroms), which makes the light two near the junction of the active area 1a and the trace area 1b (the edge area 1a 'of the active area). When the polar body layer 10 is subsequently covered by the insulating layer, a problem of stress imbalance is easy to occur, thereby increasing the leakage current generated by the photodiode layer 10 disposed near the boundary between the active area 1a and the wiring area 1b.

The novel creation provides a photosensitive device that can reduce the leakage current generated by a photodiode layer disposed near the junction of the active area and the routing area.

The novel photosensitive device has an active area and a routing area, and includes a scanning line, a reading line, an active element, a photodiode layer, an auxiliary line, a common electrode line, a stacked structure, and a protective layer. The scanning lines and the reading lines are arranged in the active area. The scanning line extends in a first direction. The read line extends in the second direction. The active element is disposed in the active area. The active element is electrically connected to the corresponding scanning line and the corresponding reading line. The photodiode layer is disposed in the active area. The photodiode layer is electrically connected to the active element. The auxiliary line and the common electrode line are disposed in the active area. The auxiliary line extends along the second direction and is electrically connected to the read line. The common electrode line extends along the second direction and is electrically connected to the photodiode layer. The stacked structure is disposed in the routing area. The stacked structure includes sequentially stacked traces, a first insulation structure, a semiconductor structure, and a first conductive structure. The protective layer covers the photodiode layer and the stacked structure.

In an embodiment of the present invention, the active device includes a gate, a channel layer, a source, and a drain. The gate is separated from the channel layer, the source, and the drain by a first insulating layer covering the gate. The gate, scan lines and traces are on the same layer. The channel layer is the same layer as the semiconductor structure. The source, drain, and read lines are on the same layer as the first conductive structure.

In an embodiment of the present invention, the above-mentioned photosensitive device further includes a transparent electrode. The transparent electrode is disposed on the photodiode layer and is electrically connected to the photodiode layer.

In an embodiment of the novel creation, the vertical distance between the top surface of the photodiode layer and the top surface of the stacked structure is 4000 angstroms to 13,500 angstroms.

In one embodiment of the novel creation, the auxiliary line and the read line overlap.

In an embodiment of the novel creation, the above-mentioned auxiliary line shields the channel layer.

In an embodiment of the present invention, the above-mentioned stacked structure further includes a second insulation structure and a second conductive structure. The second insulation structure and the second conductive structure are sequentially stacked on the first insulation structure.

In an embodiment of the present invention, the second conductive structure, the auxiliary line, and the common electrode line are in the same layer.

In an embodiment of the novel creation, the vertical distance between the top surface of the photodiode layer and the top surface of the stacked structure is> 14000 angstroms.

Based on the above, by creating a stacked structure in the routing area of the novel light-sensitive device, the height difference between the photodiode layer near the junction of the active area and the routing area and the structure provided in the routing area can be reduced. The structure of the photodiode layer near the boundary of the active area and the routing area and the structure disposed in the routing area can avoid the problem of stress imbalance when it is subsequently covered by the insulating layer, thereby reducing the placement near the active area and the routing area. Leakage current from the photodiode layer at the boundary of the line area.

In order to make the above-mentioned features and advantages of the novel creation more comprehensible, embodiments are described below in detail with the accompanying drawings as follows.

FIG. 2A is a schematic top view of a photosensitive device according to an embodiment of the novel creation. FIG. 2B is a schematic cross-sectional view of the photosensitive device according to the section line A1-A1 'and the section line B1-B1' of FIG. 2A.

Please refer to FIG. 2A and FIG. 2B together. The photosensitive device 100 of this embodiment includes a substrate SB, a first conductive layer M1, a gate insulating layer GI, a patterned semiconductor layer SE, a second conductive layer M2, a first insulating layer IL1, The photodiode layer LD, the second insulating layer IL2, the third conductive layer M3, and the third insulating layer IL3. From another perspective, the photosensitive device 100 of this embodiment has an active area 100a and a wiring area 100b.

The substrate SB may be, for example, a flexible substrate, which may be a polymer substrate or a plastic substrate, but the present invention is not limited thereto. In other embodiments, the substrate SB may also be, for example, a rigid substrate, which may be a glass substrate, a quartz substrate, or a silicon substrate.

The first conductive layer M1 is provided on the substrate SB, for example. Based on considerations of electrical conductivity, the first conductive layer M1 is generally made of a metal material. However, the new creation is not limited to this. The first conductive layer M1 may also include other conductive materials other than metal materials, such as: alloys, nitrides of metal materials, oxides of metal materials, oxynitrides of metal materials, graphite Ethylene, carbon nanotubes or stacked layers of metallic materials and other conductive materials. The method for forming the first conductive layer M1 is, for example, formed by using a physical vapor deposition method or a metal chemical vapor deposition method and then performing a lithography etching process. The first conductive layer M1 may include a plurality of scan lines SL, a plurality of gates G, and a plurality of traces F. For convenience of explanation, only a part of the scan lines SL, the gates G, and the traces F are shown here. Creation is not limited to this. In this embodiment, multiple scan lines SL, multiple gates G, and multiple traces F may be formed simultaneously. The plurality of scan lines SL and the plurality of gates G are located, for example, in the active area 100a, and the plurality of lines F are located, for example, in the line area 100b. Each gate G is electrically connected to the corresponding scan line SL, and multiple traces F are electrically connected to a part of the scan line SL, and are used to transmit the scanning signal provided by the driving chip (such as the gate driving chip) to the scanning line SL. . The thickness of the first conductive layer M1 is, for example, 2000 angstroms to 4000 angstroms. In this embodiment, the thickness of the first conductive layer M1 is 3000 angstroms.

The gate insulating layer GI is provided on the first conductive layer M1, for example. The gate insulating layer GI may cover the scan lines SL, the gate G, and the trace F. The gate insulating layer GI is formed by, for example, a physical vapor deposition method or a chemical vapor deposition method. In this embodiment, the material of the gate insulating layer GI may be an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two materials mentioned above), an organic material (for example, polyfluorene) Amine resin, epoxy resin or acrylic resin) or a combination of the above, but the new creation is not limited to this. The gate insulation layer GI can be a single-layer structure, but this new creation is not limited to this. In other embodiments, the gate insulating layer GI may have a multilayer structure.

The patterned semiconductor layer SE is disposed on the first conductive layer M1, for example. The method for forming the patterned semiconductor layer SE is, for example, formed using a lithographic etching process. In this embodiment, the material of the patterned semiconductor layer SE is amorphous silicon, but the novel creation is not limited thereto. The material of the patterned semiconductor layer SE may also be polycrystalline silicon, microcrystalline silicon, single crystal silicon, nanocrystalline silicon, or other semiconductor materials or metal oxide semiconductor materials with different lattice arrangements. In this embodiment, the patterned semiconductor layer SE includes a channel layer SE1 disposed in the active region 100a and a semiconductor structure SE2 disposed in the wiring region 100b. The channel layer SE1 is provided corresponding to the gate G, for example. The semiconductor structure SE2 is substantially provided corresponding to, for example, the trace F. In detail, the semiconductor structure SE2 is disposed on the insulation structure IS1 covered with the trace F, where the insulation structure IS1 is part of the gate insulation layer GI. The thickness of the patterned semiconductor layer SE is, for example, 3500 to 4000 angstroms. In this embodiment, the thickness of the patterned semiconductor layer SE is 4000 Angstroms.

The second conductive layer M2 is disposed on the gate insulating layer M1, for example. Based on the consideration of conductivity, the second conductive layer M2 is generally made of a metal material. However, the new creation is not limited to this, and the second conductive layer M2 may also include other conductive materials other than metal materials, such as: alloys, nitrides of metal materials, oxides of metal materials, oxynitrides of metal materials, graphite Ethylene, carbon nanotubes or stacked layers of metallic materials and other conductive materials. The formation method of the second conductive layer M2 is, for example, formed by using a physical vapor deposition method or a metal chemical vapor deposition method and then performing a lithography etching process. The second conductive layer M2 includes multiple read lines DL, multiple sources S, multiple drains D, multiple drain extensions D ′, and multiple conductive structures C1. For convenience of explanation, only a part of The read line DL, the source S, the drain D, the drain extension D ′, and the conductive structure C1 are not limited thereto. In this embodiment, multiple read lines DL, multiple sources S, multiple drains D, multiple drain extensions D ', and multiple conductive structures C1 may be formed simultaneously. The plurality of read lines DL, the plurality of sources S, the plurality of drains D, and the plurality of drain extensions D 'are, for example, located in the active region 100a, and the plurality of conductive structures C1 are, for example, located in the wiring region 100b. The source S is electrically connected to the corresponding read line DL, for example. The drain extension D 'is, for example, a portion extending outward from the drain D, that is, the drain extension D' is directly connected to the drain D, for example. In this embodiment, the gate G, the channel layer SE1, the source S, and the drain D may constitute an active device T. In this embodiment, the active device T is any bottom-gate thin film transistor known to those skilled in the art. However, although the present embodiment takes the bottom gate type thin film transistor as an example, the novel creation is not limited to this. In other embodiments, the active device T may also be a top-gate thin film transistor or other suitable type of thin film transistor. The conductive structure C1 is provided substantially corresponding to the trace F, for example. In detail, the conductive structure C1 is provided on the semiconductor structure SE2 and substantially overlaps the semiconductor structure SE2. The thickness of the second conductive layer M2 is, for example, 2000 angstroms to 4000 angstroms. In this embodiment, the thickness of the second conductive layer M2 is 3000 Angstroms.

The first insulating layer IL1 is disposed on the second conductive layer M2, for example. In this embodiment, the first insulating layer IL1 partially covers the second conductive layer M2. In detail, the first insulating layer IL1 has an opening OP1 and an opening OP2, wherein the opening OP1 exposes a part of the drain extension D ', and the opening OP2 exposes a part of the read line DL. The first insulating layer IL1 is formed by, for example, a physical vapor deposition method or a chemical vapor deposition method, and then a lithographic etching process. In this embodiment, the material of the first insulating layer IL1 may be an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two materials described above), an organic material (for example, polyfluorene) Amine resin, epoxy resin or acrylic resin) or a combination of the above, but the new creation is not limited to this. The first insulation layer IL1 may be a single-layer structure, but the novel creation is not limited thereto. In other embodiments, the first insulating layer IL1 may have a multilayer structure. In one embodiment, the first insulating layer IL1 is also disposed in the routing area 100b and covers the conductive structure C1.

The photodiode layer LD is provided corresponding to the opening OP1, for example. For example, the photodiode layer LD may be disposed in the opening OP1 without contacting the first insulating layer IL1, or the photodiode layer LD may fill the opening OP1 and be partially disposed on the first insulating layer IL1. This is limited. In detail, the photodiode layer LD is disposed on, for example, the drain extension D 'exposed through the opening OP1, and is electrically connected to the active device T through the drain extension D'. In one embodiment, the photodiode layer LD includes an N-type semiconductor layer, an intrinsic semiconductor layer, and a P-type semiconductor layer that are sequentially stacked, but the present invention is not limited thereto. The method of forming the photodiode layer LD is, for example, a lithography process. The thickness of the photodiode layer LD is, for example, 10,000 angstroms to 15,000 angstroms. In this embodiment, the thickness of the photodiode layer LD is 10,000 Angstroms.

The photosensitive device 100 of this embodiment further includes a transparent electrode TE. The transparent electrode TE is provided on the photodiode layer LD, for example. The method for forming the transparent electrode TE is formed by, for example, a physical vapor deposition method or a metal chemical vapor deposition method and then performing a lithography etching process. The material of the transparent electrode TE can be indium tin oxide, indium zinc oxide, zinc aluminum oxide, indium aluminum oxide, indium oxide, gallium oxide, carbon nanotubes, silver nanoparticles, metals or alloys with a thickness of less than 60 nm, organic Transparent conductive materials or other suitable transparent conductive materials.

In this embodiment, the drain extension D ', the photodiode layer LD, and the transparent electrode TE may constitute a photosensitive unit PSU. In detail, a portion of the drain extension D 'that is in contact with the photodiode layer LD is used as a lower electrode of the photosensitive unit PSU, and a transparent electrode TE is used as an upper electrode of the photosensitive unit PSU. In this embodiment, the photodiode layer LD can be used to receive X-rays and convert the X-rays into electrical signals. That is, the photosensitive unit PSU in this embodiment can be, for example, an X-ray sensor. However, the present invention is not limited to this. In other embodiments, the photosensitive unit PSU can also be used to detect light with other wavelength ranges.

In this embodiment, the trace F provided in the trace area 100b, the insulation structure IS1, the semiconductor structure SE2, and the conductive structure C1 constitute a stacked structure W1. The vertical distance d _p1 between the top surface S1 of the stacked structure W1 and the top surface S2 of the photodiode layer LD is, for example, 4000 angstroms to 13500 angstroms. Based on this, it is disposed near the junction of the active area 100a and the routing area 100b (active The photodiode layer LD of the edge region 100a ′) of the region may not have a large difference due to the height of the photodiode layer LD from the structure provided in the routing region 100b, and it can avoid the problem of stress imbalance when it is subsequently covered by the insulating layer, thereby making it possible to The leakage current generated by the photodiode layer LD disposed near the boundary between the active area 100a and the routing area 100b (the edge area 100a 'of the active area) is reduced.

The second insulating layer IL2 is provided on the photosensitive unit PSU, for example. In this embodiment, the second insulating layer IL2 partially covers the photosensitive unit PSU. In detail, the second insulating layer IL2 has an opening OP2 'and an opening OP3, wherein the opening OP2' is disposed corresponding to the opening OP2 and exposes a part of the read line DL, and the opening OP3 exposes a part of the transparent electrode TE. The method for forming the second insulating layer IL2 is, for example, first formed by using a physical vapor deposition method or a chemical vapor deposition method, and then using a lithography etching process. In this embodiment, the material of the second insulating layer IL2 may be an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two materials mentioned above), and an organic material (for example, polyfluorene) Amine resin, epoxy resin or acrylic resin) or a combination of the above, but the new creation is not limited to this. The second insulation layer IL2 may be a single-layer structure, but the new creation is not limited to this. In other embodiments, the second insulating layer IL2 may also have a multilayer structure. In one embodiment, the second insulation layer IL2 is also disposed in the routing area 100b and is located on the first insulation layer IL1.

The third conductive layer M3 is disposed on the second insulating layer IL2, for example. The material of the third conductive layer M3 may be, for example, a metal material, an alloy, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, graphene, a carbon nanotube, or a metal material and other conductive materials. Conductive materials such as stacked layers. The third conductive layer M3 is formed by, for example, a physical vapor deposition method or a metal chemical vapor deposition method and then performing a lithography etching process. The third conductive layer M3 includes a plurality of auxiliary lines AL and a plurality of common electrode lines CEL. For convenience of explanation, only a part of the auxiliary lines AL and the common electrode lines CEL are shown here, but the present invention is not limited thereto. In this embodiment, a plurality of auxiliary lines AL and a plurality of common electrode lines CEL may be formed at the same time. The plurality of auxiliary lines AL and the plurality of common electrode lines CEL are located, for example, in the active area 100a. In detail, the auxiliary line AL is electrically connected to the read line DL through the opening OP2 and the opening OP2 ', for example. In addition, in order to avoid the problem that the channel layer SE1 is irradiated with light to make the channel conductive and the active element T loses the switching function, the auxiliary line AL needs to overlap at least the channel layer SE1 of the active element T in the vertical projection direction Z to Used to shield the channel layer SE1. The common electrode line CEL is electrically connected to the transparent electrode TE of the photosensitive unit PSU through the opening OP3, for example. The common electrode line CEL can be used as a connection line for connection with an external driving circuit for driving the photosensitive unit PSU. The thickness of the third conductive layer M3 is, for example, 3000 angstroms to 6000 angstroms. In this embodiment, the thickness of the third conductive layer M3 is 3500 angstroms.

The third insulating layer IL3 is provided on the third conductive layer M3, for example. In detail, the third insulating layer IL3 covers the third conductive layer M3 located in the active region 100a, the active element T and the photosensitive element PSU, and the stacked structure W1 located in the wiring region 100b. The method for forming the third insulating layer IL3 is, for example, first formed by using a physical vapor deposition method or a chemical vapor deposition method, and then using a lithography etching process. In this embodiment, the material of the third insulating layer IL3 may be an inorganic material (for example, silicon oxide, silicon nitride, silicon oxynitride, or a stacked layer of at least two materials mentioned above), an organic material (for example, polyfluorene) Amine resin, epoxy resin or acrylic resin) or a combination of the above, but the new creation is not limited to this. The third insulating layer IL3 may be a single-layer structure, but the new creation is not limited to this. In other embodiments, the third insulating layer IL3 may also have a multilayer structure. Since the third insulating layer IL3 covers the active element T and the photosensitive element PSU, it can prevent the active element T and the photosensitive element PSU from being affected by moisture, heat, and noise from the environment, and can protect the active element T and the photosensitive element PSU. Impacted by external forces. In this embodiment, the third insulating layer IL3 is also used as a protective layer, which can prevent the auxiliary line AL and the common electrode line CEL from being damaged by the environment.

The photosensitive device of this embodiment maintains a semiconductor structure and a conductive structure that substantially overlap the wiring in the routing area to form a stacked structure, which can reduce the photodiode layer and the photodiode layer located near the junction of the active area and the routing area. Based on the difference in the structure of the routing area, based on this, the photodiode layer near the junction of the active area and the routing area and the structure arranged in the routing area can avoid the problem of stress imbalance when it is subsequently covered by the insulating layer. This can reduce the leakage current generated by the photodiode layer disposed near the boundary between the active area and the routing area.

FIG. 3A is a schematic top view of a photosensitive device according to another embodiment of the novel creation. FIG. 3B is a schematic cross-sectional view of the photosensitive device according to the section line A2-A2 'and the section line B2-B2' of FIG. 3A. It must be noted here that the embodiments of FIG. 3A and FIG. 3B respectively follow the component numbers and parts of the embodiments of FIG. 2A and FIG. 2B, wherein the same or similar reference numerals are used to indicate the same or similar components, and the same is omitted Explanation of the same technical content. For the description of the omitted parts, reference may be made to the description and effects of the foregoing embodiments. The following embodiments are not repeated, and for descriptions that are not omitted in at least a part of the embodiments of FIG. 3A and FIG. 3B, refer to the subsequent content.

Please refer to FIG. 3A and FIG. 3B at the same time. In the embodiment shown in FIG. 3A and FIG. 3B, the difference between the photosensitive device 200 and the photosensitive device 100 is that the stacked structure W2 of the photosensitive device 200 further includes sequentially stacked on the conductive structure C1. Is the insulating structure IS2 and the conductive structure C2. In detail, the conductive structure C2 belongs to a part of the third conductive layer M3, that is, the conductive structure C2 is, for example, a third conductive layer formed in the wiring region 100b. In addition, the insulating structure IS2 belongs to a part of the first insulating layer IL1 and the second insulating layer IL2. In this embodiment, the wiring F, the insulating structure IS1, the semiconductor structure SE2, and the conductive structure C1, the insulating structure IS2, and the conductive structure C2 provided in the wiring area 100b constitute a stacked structure W2. The vertical distance d _p2 between the top surface S1 ′ of the stacked structure W2 and the top surface S2 of the photodiode layer LD is, for example,> 14000 angstroms. Based on this, it is disposed near the junction of the active area 100 a and the routing area 100 b (the active area The photodiode layer LD in the edge region 100a ′) may not have a large difference from the height of the photodiode layer LD and the structure provided in the routing area 100b, and it can avoid the problem of stress imbalance when it is subsequently covered by the insulating layer, thereby reducing the setting. Leakage current generated by the photodiode layer LD near the boundary between the active area 100a and the routing area 100b (the edge area 100a 'of the active area).

The photosensitive device of this embodiment maintains a semiconductor structure and two conductive structures that substantially overlap the wiring in the wiring area to form a stacked structure, which can reduce the photodiode layer and the junction near the active area and the wiring area. Based on the difference in the height of the structure provided in the routing area, based on this, the photodiode layer near the junction of the active area and the routing area and the structure located in the routing area can avoid stress imbalance when it is subsequently covered by the insulation layer. This can reduce the leakage current generated by the photodiode layer disposed near the boundary between the active area and the routing area.

To sum up, the newly-created photosensitive device can form a stacked structure by forming a conductive structure and a semiconductor structure on the wiring provided in the wiring area. These conductive structures and semiconductor structures are in the active area. When necessary components are formed together in the same process, no additional manufacturing costs are required. With the formation of the stacked structure, the newly-created photosensitive device can reduce the height difference between the photodiode layer near the junction of the active area and the routing area and the structure provided in the routing area. The structure of the photodiode layer at the boundary of the line area and the routing area can avoid the problem of stress imbalance when it is subsequently covered by the insulating layer, thereby reducing the risk of being placed near the boundary of the active area and the routing area. Leakage current from the photodiode layer.

Although this new type of creation has been disclosed as above by way of example, it is not intended to limit the new type of creation. Any person with ordinary knowledge in the technical field can make some changes without departing from the spirit and scope of this new type of creation Retouching, so the protection scope of this new type of creation shall be determined by the scope of the attached patent application.

1, 100, 200‧‧‧‧ Photosensitive devices
1a, 100a‧‧‧active zone
1a ', 100a'‧‧‧ fringe area of active area
1b, 100b‧‧‧route area
2.SB‧‧‧ substrate
10.LD‧‧‧photodiode layer
20.F‧‧‧route
30.M1‧‧‧First conductor layer
32.G‧‧‧Gate
34.SL‧‧‧Scan line
40.M2‧‧‧Second Conductor Layer
42.S‧‧‧Source
44 D‧‧‧ Drain
46 、 DL‧‧‧Read line
A-A ', A1-A1', A2-A2 ', B-B', B1-B1 ', B2-B2'‧‧‧
AL‧‧‧Auxiliary line
C1, C2‧‧‧ conductive structure
CEL‧‧‧Common electrode wire
D'‧‧‧ Drain extension
D1‧‧‧ first direction
D2‧‧‧ Second direction
d _p , d _p1 , d _p2 ‧‧‧ vertical distance
GI‧‧‧Gate insulation
IL1‧‧‧First insulation layer
IL2‧‧‧Second insulation layer
IL3‧‧‧Third insulation layer
IS1, IS2‧‧‧Insulation structure
M3‧‧‧ third conductor layer
OP1, OP2, OP2 ', OP3‧‧‧open
PSU‧‧‧Photosensitive unit
S1, S1 ', S2‧‧‧ Top surface
SE‧‧‧Patterned semiconductor layer
SE1‧‧‧Channel layer
SE2‧‧‧Semiconductor Structure
T‧‧‧active element
TE‧‧‧Transparent electrode
W1, W2‧‧‧ stacked structure
Z‧‧‧ vertical projection direction

FIG. 1A is a schematic top view of a conventional photosensitive device.
FIG. 1B is a schematic cross-sectional view of a photosensitive device according to a section line AA ′ and a section line B-B ′ of FIG. 1A.
FIG. 2A is a schematic top view of a photosensitive device according to an embodiment of the novel creation.
FIG. 2B is a schematic cross-sectional view of the photosensitive device according to the section line A1-A1 'and the section line B1-B1' of FIG. 2A.
FIG. 3A is a schematic top view of a photosensitive device according to another embodiment of the novel creation.
FIG. 3B is a schematic cross-sectional view of the photosensitive device according to the section line A2-A2 'and the section line B2-B2' of FIG. 3A.

Claims (9)

A photosensitive device having an active area and a routing area includes:
Scan lines and read lines are disposed in the active area, wherein the scan lines extend in a first direction, and the read lines extend in a second direction;
An active element is disposed in the active region, wherein the active element is electrically connected to the corresponding scan line and the corresponding read line; and a photodiode layer is disposed in the active region, wherein The photodiode layer is electrically connected to the active element;
An auxiliary line and a common electrode line are disposed in the active area, wherein the auxiliary line extends along the second direction and is electrically connected to the read line, and the common electrode line extends along the second direction. And is electrically connected to the photodiode layer;
A stacked structure is disposed in the wiring area, wherein the stacked structure includes sequentially stacked wiring, a first insulating structure, a semiconductor structure, and a first conductive structure; and a protective layer covering the photodiode layer and the semiconductor layer. The stacked structure is described. The photosensitive device according to item 1 of the patent application scope, wherein the active element includes a gate electrode, a channel layer, a source electrode, and a drain electrode, and the gate electrode and the channel layer, the source electrode, and the drain electrode The electrodes are separated by a first insulating layer covering the gate electrode, and the gate electrode, the scan line, and the trace are the same layer, the channel layer is the same layer as the semiconductor structure, and the source Electrode, the drain electrode, the read line and the first conductive structure are in the same layer. The photosensitive device according to item 1 of the patent application scope, further comprising a transparent electrode, wherein the transparent electrode is disposed on the photodiode layer and is electrically connected to the photodiode layer. The photosensitive device according to item 1 of the scope of patent application, wherein a vertical distance between a top surface of the photodiode layer and a top surface of the stacked structure is 4000 angstroms to 13,500 angstroms. The photosensitive device according to item 1 of the scope of patent application, wherein the auxiliary line overlaps the reading line. The photosensitive device according to item 2 of the scope of patent application, wherein the auxiliary line covers the channel layer. The photosensitive device according to item 1 of the scope of patent application, wherein the stacked structure further includes a second insulating structure and a second conductive structure, and the second insulating structure and the second conductive structure are sequentially stacked on the first On an insulating structure. The photosensitive device according to item 7 of the scope of patent application, wherein the second conductive structure, the auxiliary line, and the common electrode line are in the same layer. The photosensitive device according to item 7 of the scope of patent application, wherein a vertical distance between a top surface of the photodiode layer and a top surface of the stacked structure is> 14000 angstroms.