TWM580803U - Semiconductor package structure - Google Patents

Abstract

A semiconductor package structure includes a chip, a redistribution layer, an encapsulant, a substrate, a plurality of solder balls, and a thermally conductive structure. The chip has a first surface and a second surface. The redistribution layer is disposed on the first surface of the chip and electrically connected to the chip. The encapsulant is disposed between the redistribution layer and the chip. The substrate is disposed beside to the chip and faces the second surface. The solder balls are disposed between the redistribution layer and the substrate to electrically connect the redistribution layer to the substrate. A thermally conductive structure is disposed between the second surface of the chip and the substrate to thermally couple the chip to the substrate. Heat generated from the chip is adapted to be transferred to the substrate via the thermally conductive structure and is adapted to be transferred to the substrate via the redistribution layer and the solder balls.

Description

Semiconductor package structure

The novel creation relates to a semiconductor package structure, and in particular to a semiconductor package structure having a good heat dissipation effect.

In order to meet the demand for thin and light electronic products, semiconductor packages, which are the core components of electronic products, are also moving toward miniaturization. In general, the current miniaturized package structure has the disadvantage that the heat dissipation path is relatively simple and the heat dissipation area of the heat dissipation path is small, so that the heat energy generated during the operation of the wafer cannot be efficiently conducted to the surrounding components, so that the temperature of the wafer Raise and reduce the efficiency of the wafer even if it is not working.

The novel creation provides a semiconductor package structure with good heat dissipation effect.

The novel semiconductor package structure includes a wafer, a reconfigurable circuit layer, an encapsulant, a substrate, a plurality of solder balls, and a heat conducting structure. The wafer has a first surface and a second surface. The reconfiguration circuit layer is disposed on the first surface of the wafer and electrically connected to the wafer. The encapsulant is disposed between the reconfigurable circuit layer and the wafer. The substrate is disposed adjacent to the wafer and faces the second surface. A plurality of solder balls are disposed between the reconfiguration circuit layer and the substrate to electrically connect the reconfiguration circuit layer to the substrate. A thermally conductive structure is disposed between the second surface of the wafer and the substrate to thermally couple the wafer to the substrate, wherein the thermal energy generated by the wafer is adapted to be transferred to the substrate via the thermally conductive structure and is adapted to be transferred via the reconfigured wiring layer and the solder balls To the substrate.

In an embodiment of the present invention, the substrate has an inner surface facing the wafer, the inner surface is a solder mask at a portion corresponding to the heat conductive structure, and the heat conductive structure contacts the solder mask.

In an embodiment of the present invention, the substrate has a metal thermal pad at a portion corresponding to the heat conducting structure, the metal thermal pad is insulated from the solder balls, and the heat conducting structure is in contact with the metal thermal pad.

In an embodiment of the present invention, the substrate has a metal thermal pad at a portion corresponding to the heat conducting structure, and the substrate further includes a grounding surface, and the metal thermal pad is electrically connected to the grounding surface.

In an embodiment of the present invention, the heat conducting structure is an insulator.

In an embodiment of the present invention, the heat conducting structure is a conductor.

In an embodiment of the present invention, the heat conducting structure is an insulator, and the substrate has a line at a portion corresponding to the heat conducting structure, and the line is electrically connected to at least one of the solder balls, and the heat conducting structure contacts the line.

In an embodiment of the present invention, the semiconductor package structure further includes a thermally conductive layer disposed on a side of the reconfiguration wiring layer facing away from the wafer.

In an embodiment of the present invention, the semiconductor package structure further includes an adhesive layer disposed between the second surface of the reconfigurable circuit layer and the thermally conductive layer to bond the thermally conductive layer and the reconfigured wiring layer.

In an embodiment of the present invention, the heat conducting layer is a conductor.

The semiconductor package structure of the present invention comprises a wafer, a reconfigurable circuit layer, an encapsulant, a thermally conductive layer, a substrate and a plurality of solder balls. The reconfiguration circuit layer is disposed on the wafer and electrically connected to the wafer, and the reconfiguration circuit layer has a first surface and a second surface, wherein the first surface faces the wafer. The encapsulant is disposed between the reconfigurable circuit layer and the wafer. The heat conducting layer is disposed beside the second side of the reconfigurable circuit layer. The substrate is disposed beside the first side of the reconfiguration wiring layer, and the wafer is interposed between the substrate and the reconfiguration wiring layer. A plurality of solder balls are disposed between the first surface of the reconfigurable circuit layer and the substrate to electrically connect the reconfigured wiring layer to the substrate, wherein the thermal energy generated by the wafer is adapted to be transferred to the thermally conductive layer via the reconfigured wiring layer, and Suitable for transfer to the substrate via the reconfigured wiring layer and the solder balls.

In an embodiment of the present invention, the heat conducting layer is disposed on the entire second surface of the reconfigurable circuit layer.

In an embodiment of the present invention, the semiconductor package structure further includes an adhesive layer disposed between the second surface of the reconfigurable circuit layer and the thermally conductive layer to bond the thermally conductive layer and the reconfigured wiring layer.

In an embodiment of the present invention, the heat conducting layer is a conductor.

Based on the above, the semiconductor package structure of an embodiment of the present invention includes a heat conducting structure disposed between the second surface of the wafer and the substrate, so that the thermal energy generated by the wafer can be transmitted through the heat conducting structure in addition to the original heat dissipation path. To the substrate. In addition, the semiconductor package structure of another embodiment of the present invention includes a thermally conductive layer disposed on the reconfigured wiring layer to increase a heat dissipation area of the semiconductor package structure. Therefore, the semiconductor package structure created by the novel has a good heat dissipation effect.

The above described features and advantages of the present invention will become more apparent and understood from the following description.

1A to 1D are schematic cross-sectional views showing a process of fabricating a semiconductor package structure according to an embodiment of the present invention. First, referring to FIG. 1A, in the embodiment, a heat conducting layer 140 is disposed on a film 30, and a second adhesive layer 20 is disposed between the film 30 and the heat conducting layer 140 to bond the film 30 and the heat conducting layer. 140. In the present embodiment, the film 30 can serve as a substrate to support a reconfigured wiring layer 120. A first adhesive layer 160 is disposed between the reconfigurable wiring layer 120 and the thermally conductive layer 140 to bond the thermally conductive layer 140 and the reconfigurable wiring layer 120.

In this embodiment, the reconfiguration circuit layer 120 has a first surface 121 and a second surface 122 opposite to each other. A wafer 110 is disposed on the reconfiguration wiring layer 120. The first surface 121 of the reconfiguration wiring layer 120 faces the wafer 110, and the second surface 122 of the reconfiguration wiring layer 120 faces the thin film 30 and the heat conductive layer 140. A plurality of solder balls 150 (four are shown) are disposed on the first surface 121 of the reconfiguration circuit layer 120. The wafer 110 is electrically connected to the solder balls 150 through the reconfiguration wiring layer 120. An encapsulant 130 is disposed between the reconfiguration wiring layer 120 and the wafer 110.

In the present embodiment, the film 30 is made of, for example, a polymer material of Polyimide or an electrically insulating tape or the like having other suitable stretchable properties, and is not limited thereto. Further, in the present embodiment, the heat conductive layer 140 is a conductor such as a metal layer. In other embodiments, the heat conductive layer 140 can also be an insulating thermal conductive adhesive, such as a non-conductive heat-dissipating adhesive, and is not limited thereto.

Next, referring to FIG. 1B, the solder balls 150 are disposed on a substrate 170. The substrate 170 includes a plurality of pads 171 (four are shown). The solder balls 150 are disposed between the first surface 121 of the rearrangement circuit layer 120 and the substrate 170 such that the wafer 110 is electrically connected to the substrate 170 through the re-distribution circuit layer 120 and the solder balls 150.

Next, a peeling process of the film 30 and the second adhesive layer 20 is performed, as shown in FIG. 1B and FIG. 1C. In this embodiment, an ultraviolet light device 40 (FIG. 1B) illuminates the second adhesive layer 20 and causes the second adhesive layer 20 to lose its viscosity so that the film 30 can be peeled off along with the second adhesive layer 20. It is separated from the heat conductive layer 140. Of course, in other embodiments, the second adhesive layer 20 may also be a hot melt adhesive layer, and the viscosity of the second adhesive layer 20 may be lowered after heating to the softening temperature, and the film 30 is peeled off from the heat conductive layer 140. , not limited to the above.

As shown in FIG. 1D, after the film 30 and the second adhesive layer 20 are peeled off from the heat conductive layer 140, the fabrication of the semiconductor package structure 100A is completed. Of course, in other embodiments, the manner in which the semiconductor package structure 100A is fabricated is not limited to the above. It should be noted that the semiconductor package structure 100A illustrated in FIG. 1D is only schematically schematically showing the relative positions of the components, and is for reference only, and the actual number and size ratio are not limited by FIG. 1D.

In addition, in the embodiment, in order to improve the heat conduction effect of the semiconductor package structure 100A, the heat conduction layer 140 is disposed on the entire second surface 122 of the reconfiguration circuit layer 120, but in other embodiments, the heat conduction layer 140 may also be disposed on The second surface 122 of the portion of the reconfiguration circuit layer 120 is not limited thereto.

The thermal energy generated by the wafer 110 of the semiconductor package structure 100A of the present invention can be transferred to the substrate 170 via the reconfiguration wiring layer 120 and the solder balls 150, since the heat conduction layer 140 is disposed on the second surface 122 of the reconfiguration wiring layer 120. The thermal energy generated by the wafer 110 can also be transferred to the thermally conductive layer 140 via the reconfigured wiring layer 120. That is to say, the heat conduction layer 140 disposed on the second surface 122 of the reconfiguration circuit layer 120 can additionally increase the heat dissipation channel and the heat dissipation area. Therefore, the semiconductor package structure 100A created by the present invention has a good heat dissipation effect, thereby reducing the possibility that the wafer 110 of the semiconductor package structure 100A cannot operate due to poor heat dissipation.

Other embodiments are listed below for illustration. It is to be noted that the following embodiments use the same reference numerals and parts of the above-mentioned embodiments, and the same reference numerals are used to refer to the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, and the following embodiments are not repeated.

2A-2D are cross-sectional views of a semiconductor package structure of various embodiments of the present invention. It should be noted that the semiconductor package structure illustrated in FIG. 2A to FIG. 2D only schematically shows the relative positions of the components, and is for reference only, and the actual number and size ratio thereof are not the same as FIG. 2A to FIG. 2D. The figures are similar.

Referring to FIG. 2A, in the present embodiment, the semiconductor package structure 100B is slightly different from the semiconductor package structure 100A of FIG. 1D, with the difference that the semiconductor package structure 100A of FIG. 1D is by the second side of the reconfiguration circuit layer 120. The heat dissipation layer 140 is disposed to enhance the heat dissipation effect of the semiconductor package structure 100A. The semiconductor package structure 100B of the present embodiment enhances the heat dissipation effect of the semiconductor package structure 100B by a heat conduction structure 180 disposed between the wafer 110 and the substrate 170B. .

In detail, in the embodiment, the wafer 110 has a first surface 111 and a second surface 112 opposite to each other. The reconfiguration wiring layer 120 is disposed on the first surface 111 of the wafer 110. The substrate 170B is disposed beside the wafer 110 and faces the second surface 112.

In the present embodiment, the thermally conductive structure 180 is disposed between the second surface 112 of the wafer 110 and the substrate 170B to thermally couple the wafer 110 to the substrate 170B, wherein thermal energy generated by the wafer 110 can be transferred to the substrate 170B via the thermally conductive structure 180. And can be transferred to the substrate 170B via the reconfiguration circuit layer 120 and the solder balls 150.

Generally, a wafer of a conventional semiconductor package structure is suspended on a substrate, and the wafer and the substrate are not directly thermally conductive. Therefore, when the wafer is in operation, the heat generated by the wafer must be transferred to the substrate via the reconfigured wiring layer and the solder balls, so that the heat dissipation effect is poor. Compared to conventional semiconductor package structures, the novel semiconductor package structure 100B has a thermally conductive structure 180 disposed between the wafer 110 and the substrate 170B. When the wafer 110 is in operation, a thermally conductive path (shown by a thin dashed arrow in the figure) can be additionally added by the thermally conductive structure 180.

That is to say, the thermal energy generated by the wafer 100 can be directly transmitted to the substrate 170B through the heat conducting structure 180, so that the semiconductor package structure 100B has a good heat dissipation effect, thereby reducing the possibility that the wafer 110 of the semiconductor package structure 100B cannot operate due to poor heat dissipation. .

On the other hand, in the present embodiment, the substrate 170B has an inner surface 172 facing the wafer 110. The inner surface 172 is a solder resist 172a at a portion corresponding to the heat conducting structure 180, and the heat conducting structure 180 is in contact with the solder resist 172a. To allow thermal energy of the wafer 110 to be conducted to the substrate 170B via the solder mask 172a. Here, the solder resist region 172a is a region on the substrate 170B that is not electrically connected to the pad 171, for example, a portion of the green lacquer, but is not limited thereto. In this embodiment, the heat conducting structure 180 is an insulator, such as a non-conductive heat sink. However, in other embodiments, the heat conducting structure 180 can also be a conductor, and is not limited thereto.

Referring to FIG. 2B , in the embodiment, the semiconductor package structure 100C is slightly different from the semiconductor package structure 100B of FIG. 2A . The difference is that the substrate 170C of the semiconductor package structure 100C has a metal thermal pad at a portion corresponding to the heat conductive structure 180 . 173, the metal thermal pad 173 is insulated from the solder balls 150, and the heat conducting structure 180 is in contact with the metal thermal pad 173.

The substrate 170C of the present embodiment has the advantage that the metal thermal pad 173 has a better thermal conductivity, which can enhance the thermal conductivity of the semiconductor package structure 100C. In this embodiment, the heat conducting structure 180 is an insulator, such as a non-conductive heat sink, but in other embodiments, since the metal heat conductive pad 173 is insulated from the solder balls 150, the heat conducting structure 180 can also be a conductor to improve The heat conduction effect of the semiconductor package structure 100C does not affect the circuit, and the type of the heat conduction structure 180 is not limited to the above.

Referring to FIG. 2C , in the present embodiment, the semiconductor package structure 100D is slightly different from the semiconductor package structure 100C of FIG. 2B . The difference is that the substrate 170D further includes a ground plane 174 , and the metal thermal pad 173 is electrically connected to the ground plane 174 . . The substrate 170D of the present embodiment includes the ground plane 174 with the advantage of being able to balance the charge and protect the semiconductor package structure 100D from damage due to excessive charge. In this embodiment, the heat-conducting structure 180 can be an insulator, such as a non-conductive heat-dissipating glue. However, in other embodiments, the heat-conducting structure 180 can also be a conductor to further enhance the heat-conducting effect of the semiconductor package structure 100D. The category is not limited to the above.

Referring to FIG. 2D, in the embodiment, the semiconductor package structure 100E is slightly different from the semiconductor package structure 100B of FIG. 2A. The difference is that the heat conduction structure 180 of the semiconductor package structure 100B of FIG. 2A is in contact with the solder resist area 172a. The thermally conductive structure 180 of the semiconductor package structure 100E of the embodiment contacts a line 175.

In detail, in the embodiment, the substrate 170E has a line 175 at a portion corresponding to the heat conducting structure 180, and the line 175 is electrically connected to at least one of the solder balls 150, and the heat conducting structure 180 is in contact with the line 175. In this embodiment, the heat conducting structure 180 is an insulator, such as a non-conductive heat sink. Therefore, the configuration of the line 175 of the substrate 170E is not configured to avoid the heat conducting structure 180, that is, the layout of the line 175 is not caused by heat conduction. Structure 180 is limited.

3 is a cross-sectional view showing a semiconductor package structure of another embodiment of the present invention. It should be noted that the semiconductor package structure 100F illustrated in FIG. 3 is only schematically schematically showing the relative positions of the components, and is for reference only, and the actual number and size ratio thereof are not limited to FIG. 3.

Referring to FIG. 3 , in the embodiment, the semiconductor package structure 100F is slightly different from the semiconductor package structure 100A of FIG. 1D . The difference is that the semiconductor package structure 100F further includes the heat conductive structure 180 . The thermally conductive structure 180 is disposed between the second surface 112 of the wafer 110 and the substrate 170 to thermally couple the wafer 110 to the substrate 170. In this embodiment, the heat conducting structure 180 is an insulator, such as a non-conductive heat sink. However, in other embodiments, the heat conducting structure 180 can also be a conductor, and is not limited thereto.

In the present embodiment, the semiconductor package structure 100F has various heat conduction paths (shown by thin dashed arrows in the figure), and the thermal energy generated by the wafer 110 can be transferred to the heat conduction layer 140 via the reconfiguration circuit layer 120 to dissipate thermal energy to In the air, it can also be transferred to the substrate 170 via the reconfigurable wiring layer 120 and the solder balls 150, and can also be directly transferred to the substrate 170 via the thermally conductive structure 180. The above design has the advantage that the semiconductor package structure 100F can achieve the heat dissipation area of the heat conduction path by the heat conduction layer 140, and can also achieve the effect of shortening the heat conduction path by the heat conduction structure 180.

In summary, the semiconductor package structure of an embodiment of the present invention includes a heat conducting structure disposed between the wafer and the substrate, so that the thermal energy generated by the wafer can be transferred to the substrate through the heat conducting structure in addition to the original heat dissipation path. . In addition, the semiconductor package structure of another embodiment of the present invention includes a thermally conductive layer disposed on the reconfigured wiring layer to increase a heat dissipation area of the semiconductor package structure. Therefore, the semiconductor package structure created by the novel has a good heat dissipation effect.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the novel creation, and any person skilled in the art can make some changes without departing from the spirit and scope of the novel creation. Retouching, the scope of protection of this new creation is subject to the definition of the scope of the patent application attached.

20‧‧‧Second adhesive layer  30‧‧‧film  40‧‧‧UV device  100A, 100B, 100C, 100D, 100E, 100F‧‧‧ semiconductor package structure  110‧‧‧ wafer  111‧‧‧ first surface  112‧‧‧ second surface  120‧‧‧Reconfigure the circuit layer  121‧‧‧ first side  122‧‧‧ second side  130‧‧‧Package colloid  140‧‧‧thermal layer  150‧‧‧ solder balls  160‧‧‧First adhesive layer  170, 170B, 170C, 170D, 170E‧‧‧ substrates  171‧‧‧ pads  172‧‧‧ inner surface  172a‧‧‧Anti-welding zone  173‧‧‧Metal thermal pad  174‧‧‧ ground plane  175‧‧‧ lines  180‧‧‧thermal structure  

1A to 1D are schematic cross-sectional views showing a process of fabricating a semiconductor package structure according to an embodiment of the present invention.  2A-2D are cross-sectional views of a semiconductor package structure of various embodiments of the present invention.  3 is a cross-sectional view showing a semiconductor package structure of another embodiment of the present invention.  

Claims (14)

A semiconductor package structure comprising:  a wafer having a first surface and a second surface;  a reconfigured circuit layer disposed on the first surface of the wafer and electrically connected to the wafer;  An encapsulant disposed between the reconfigured wiring layer and the wafer;  a substrate disposed adjacent to the wafer and facing the second surface;  a plurality of solder balls disposed between the reconfigured wiring layer and the substrate to electrically connect the reconfigured wiring layer to the substrate;  a thermally conductive structure disposed between the second surface of the wafer and the substrate to thermally couple the wafer to the substrate, wherein thermal energy generated by the wafer is adapted to be transferred to the substrate via the thermally conductive structure and is adapted to The substrate is transferred to the substrate via the reconfigured wiring layer and the solder balls.   The semiconductor package structure of claim 1, wherein the substrate has an inner surface facing the wafer, the inner surface being a solder mask at a portion corresponding to the heat conducting structure, and the heat conducting structure is in contact with the Solder mask area. The semiconductor package structure of claim 1, wherein the substrate has a metal thermal pad at a portion corresponding to the heat conductive structure, the metal thermal pad is insulated from the solder balls, and the heat conductive structure is in contact with the metal heat conduction. pad. The semiconductor package structure of claim 1, wherein the substrate has a metal thermal pad at a portion corresponding to the thermally conductive structure, the substrate further comprising a ground plane, the metal thermal pad electrically connected to the ground plane . The semiconductor package structure according to any one of claims 2 to 4, wherein the heat conductive structure is an insulator. The semiconductor package structure according to any one of claims 2 to 4, wherein the heat conductive structure is a conductor. The semiconductor package structure of claim 1, wherein the heat conducting structure is an insulator, the substrate having a line at a portion corresponding to the heat conducting structure, the line being electrically connected to at least one of the solder balls The heat conducting structure is in contact with the line. The semiconductor package structure as claimed in claim 1, further comprising:  A thermally conductive layer disposed on a side of the reconfigurable wiring layer facing away from the wafer.   The semiconductor package structure as claimed in claim 8 further includes:  An adhesive layer disposed between the second surface of the reconfigurable wiring layer and the thermally conductive layer to bond the thermally conductive layer and the reconfigured wiring layer.   The semiconductor package structure of claim 8, wherein the heat conductive layer is a conductor. A semiconductor package structure comprising:  a wafer;  a reconfigured circuit layer disposed on the chip and electrically connected to the wafer, the reconfigured circuit layer having a first surface and a second surface, wherein the first surface faces the wafer;  An encapsulant disposed between the reconfigured wiring layer and the wafer;  a heat conducting layer disposed beside the second side of the reconfigurable circuit layer;  a substrate disposed adjacent the first side of the reconfiguration wiring layer, and the wafer is interposed between the substrate and the reconfigured wiring layer;  a plurality of solder balls disposed between the first surface of the reconfigurable circuit layer and the substrate to electrically connect the reconfigured wiring layer to the substrate, wherein thermal energy generated by the wafer is adapted to be via the reconfiguration The circuit layer is transferred to the thermally conductive layer and is adapted to be transferred to the substrate via the reconfigured wiring layer and the solder balls.   The semiconductor package structure of claim 11, wherein the heat conducting layer is disposed on the entire second surface of the reconfigured wiring layer. The semiconductor package structure as claimed in claim 11, further comprising:  An adhesive layer disposed between the second surface of the reconfigurable wiring layer and the thermally conductive layer to bond the thermally conductive layer and the reconfigured wiring layer.   The semiconductor package structure of claim 11, wherein the heat conductive layer is a conductor.