TWM561916U - Diode structure - Google Patents

Diode structure Download PDF

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TWM561916U
TWM561916U TW106214356U TW106214356U TWM561916U TW M561916 U TWM561916 U TW M561916U TW 106214356 U TW106214356 U TW 106214356U TW 106214356 U TW106214356 U TW 106214356U TW M561916 U TWM561916 U TW M561916U
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Taiwan
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diode
diode structure
insulating layer
recess
layer
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TW106214356U
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Chinese (zh)
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徐涵
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英屬開曼群島商虹揚發展科技股份有限公司
大陸商揚州虹揚科技發展有限公司
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Abstract

The present utility model provides a diode structure, characterized in that a deeper second concave portion is formed in a first concave portion in order to have at least two concave portions formed thereon having different depths, thereby reducing the electric field intensity of a reverse bias voltage junction and thus electric leakages. Further, the two concave portions having different depths are used in conjunction with the thickness of first and second insulating layers to adjust the reverse bias voltage multi-peak structure, thereby enhancing the performance of the diode structure in reverse resistance to collapse and thus the capability of resistance to lightning.

Description

二極體結構 Dipolar structure

本創作係有關一種二極體結構,尤指一種蕭特基二極體。 This creation is about a diode structure, especially a Schottky diode.

蕭特基二極體係為一種導通電壓降較低、允許高速切換的二極體,其導通電壓極低,故能提升如電源供應器之電子產品的效率。目前溝槽式蕭特基二極體係藉由凹部(trench)設計以降低與傳統平面式蕭特基相同電壓表現下所使用晶片阻抗,而得以實現低正向導通電壓(VF)。 The Schottky diode system is a diode with a low turn-on voltage drop and allows high-speed switching. Its turn-on voltage is extremely low, which can improve the efficiency of electronic products such as power supplies. Currently, the trench Schottky two-pole system achieves a low forward voltage (VF) by designing a trench to reduce the impedance of the wafer used in the same voltage performance as a conventional planar Schottky.

第1A至1E圖係為習知具有凹部100之溝槽式蕭特基二極體1之製法之剖視示意圖。 1A to 1E are schematic cross-sectional views showing a conventional method of manufacturing a trench type Schottky diode 1 having a recess 100.

如第1A圖所示,於一個二極體本體10之表面10a上利用圖案化光罩(圖略)形成至少一凹部100。 As shown in FIG. 1A, at least one recess 100 is formed on the surface 10a of one of the diode bodies 10 by using a patterned mask (not shown).

如第1B圖所示,待移除該光罩後,於該二極體本體10之表面10a上並沿該凹部100之壁面100a與底面100b形成二氧化矽層(SiO2)11。 As shown in FIG. 1B, after the photomask is removed, a ceria layer (SiO 2 ) 11 is formed on the surface 10a of the dipole body 10 along the wall surface 100a and the bottom surface 100b of the recess 100.

如第1C圖所示,於該二氧化矽層11上形成一多晶矽(polysilicon)層12。 As shown in FIG. 1C, a polysilicon layer 12 is formed on the ceria layer 11.

如第1D圖所示,移除該二極體本體10之表面10a上 之二氧化矽層11與多晶矽層12,而僅保留該凹部100中之二氧化矽層11與多晶矽層12。 Removing the surface 10a of the diode body 10 as shown in FIG. 1D The ruthenium dioxide layer 11 and the polysilicon layer 12 retain only the ruthenium dioxide layer 11 and the polysilicon layer 12 in the recess 100.

如第1E圖所示,形成一蕭特基金屬層15於該二極體本體10之表面10a、二氧化矽層11與多晶矽層12上,以完成溝槽金屬氧化半導體蕭特基(Trench MOS Barrier Schottky,簡稱TMBS)二極體1。 As shown in FIG. 1E, a Schottky metal layer 15 is formed on the surface 10a of the diode body 10, the ceria layer 11 and the polysilicon layer 12 to complete the trench metal oxide semiconductor Schottky (Trench MOS). Barrier Schottky, referred to as TMBS) diode 1.

惟,習知溝槽式蕭特基二極體1中,由於該凹部100挖深程度不足(目前溝槽式蕭特基產品製程之溝槽深度約1~5um),無法有效降低蕭特基元件反向使用下金屬與矽接面的電場強度,故反向表面電場之強度將造成有效能障之降低(Barrier Lowering)及漏電之增大。 However, in the conventional grooved Schottky diode 1 , since the depth of the recessed portion 100 is insufficient (the groove depth of the grooved Schottky product process is about 1 to 5 um), the Schottky cannot be effectively reduced. The reverse phase uses the electric field strength of the metal and the junction surface, so the strength of the reverse surface electric field will cause an effective barrier reduction (Barrier Lowering) and an increase in leakage.

因此,如何克服上述習知技術的問題,實已成目前亟欲解決的問題。 Therefore, how to overcome the problems of the above-mentioned prior art has become a problem that is currently being solved.

鑑於上述習知技術之種種缺失,本創作提供一種二極體結構,係包括:二極體本體,其表面上形成有第一凹部;第一絕緣層,係形成於該第一凹部之壁面與底面上;第一導體層,係形成於該第一絕緣層上,且於該第一絕緣層與該第一導體層上形成第一開口,使該第一凹部之部分底面外露於該第一開口,以於該第一凹部外露於該第一開口之底面上形成第二開口,令該第一開口與第二開口作為第二凹部;第二絕緣層,係形成於該第二凹部之壁面與底面上;以及第二導體層,係形成於該第二絕緣層上。 In view of the above-mentioned various deficiencies of the prior art, the present invention provides a diode structure comprising: a diode body having a first recess formed on a surface thereof; and a first insulating layer formed on a wall surface of the first recess a first conductive layer is formed on the first insulating layer, and a first opening is formed on the first insulating layer and the first conductive layer, so that a part of the bottom surface of the first concave portion is exposed to the first surface Opening, the first recess is exposed on the bottom surface of the first opening to form a second opening, the first opening and the second opening are used as a second recess; and the second insulating layer is formed on the wall surface of the second recess And a bottom surface; and a second conductor layer formed on the second insulating layer.

應可理解地,以相同的程序可繼續進行第三凹部或更 多凹部的製作,凹部的數量由第一凹部開口大小及製程的參數所限定。 It should be understood that the third recess or more can be continued in the same procedure. The fabrication of the multi-recesses, the number of recesses is defined by the size of the first recess opening and the parameters of the process.

本創作亦提供一種二極體結構之製法,係包括:於二極體本體之表面上形成第一凹部,且沿該第一凹部之壁面與底面形成第一絕緣層;於該第一絕緣層上形成第一導體層;形成第一開口於該第一絕緣層與該第一導體層上,以令該第一凹部之部分底面外露於該第一開口;於該第一凹部外露於該第一開口之底面上形成第二開口,以令該第一開口與第二開口作為第二凹部;沿該第二凹部之壁面與底面形成第二絕緣層;以及於該第二絕緣層上形成第二導體層。 The present invention also provides a method for fabricating a diode structure, comprising: forming a first recess on a surface of the body of the diode, and forming a first insulating layer along a wall surface and a bottom surface of the first recess; and the first insulating layer Forming a first conductive layer thereon; forming a first opening on the first insulating layer and the first conductive layer to expose a portion of the bottom surface of the first recess to the first opening; and exposing the first recess to the first opening Forming a second opening on a bottom surface of an opening such that the first opening and the second opening serve as a second recess; forming a second insulating layer along a wall surface and a bottom surface of the second recess; and forming a second layer on the second insulating layer Two conductor layers.

應可理解地,以相同的程序可繼續進行第三凹部或更多凹部的製作。 It should be understood that the fabrication of the third recess or more recesses can be continued in the same procedure.

前述之二極體結構及其製法中,該二極體結構係為蕭特基二極體。 In the foregoing diode structure and its manufacturing method, the diode structure is a Schottky diode.

前述之二極體結構及其製法中,該第一絕緣層之厚度小於該第二絕緣層之厚度。應可理解地,該第二絕緣層之厚度可小於該第三絕緣層之厚度,以此類推。 In the foregoing diode structure and the method of manufacturing the same, the thickness of the first insulating layer is smaller than the thickness of the second insulating layer. It should be understood that the thickness of the second insulating layer may be less than the thickness of the third insulating layer, and so on.

前述之二極體結構及其製法中,該二極體本體係為半導體材。 In the foregoing diode structure and the method of manufacturing the same, the diode system is a semiconductor material.

前述之二極體結構及其製法中,該第一絕緣層係為介電材料,如二氧化矽或氮化矽材。 In the foregoing diode structure and the method of manufacturing the same, the first insulating layer is a dielectric material such as cerium oxide or tantalum nitride.

前述之二極體結構及其製法中,該第二絕緣層係為介電材料,如二氧化矽或氮化矽材。 In the foregoing diode structure and the method of manufacturing the same, the second insulating layer is a dielectric material such as ceria or tantalum nitride.

前述之二極體結構及其製法中,該第一導體層係為導電材料,如多晶矽或金屬材。 In the foregoing diode structure and the method of manufacturing the same, the first conductor layer is a conductive material such as a polysilicon or a metal material.

前述之二極體結構及其製法中,該第二導體層係為導電材料,如多晶矽或金屬材。 In the foregoing diode structure and the method of manufacturing the same, the second conductor layer is a conductive material such as a polysilicon or a metal material.

前述之二極體結構及其製法中,復包括形成金屬層於該二極體本體之表面、第一與第二絕緣層及第一與第二導體層上。例如,該金屬層係為蕭特基金屬,如鈦材。 In the foregoing diode structure and method of manufacturing the same, the method further includes forming a metal layer on the surface of the diode body, the first and second insulating layers, and the first and second conductor layers. For example, the metal layer is a Schottky metal such as a titanium material.

由上可知,本創作之二極體結構及其製法,主要藉由在該第一凹部中自主對位形成第二凹部,以產生深淺不同之第一與第二凹部,因而於反向之情況下,本創作之二極體結構之內部電場強度會重新分配,且能降低表面電場,故相較於習知技術,本創作之製法能進一步降低漏電。 It can be seen from the above that the diode structure of the present invention and its manufacturing method mainly form a second concave portion by autonomously aligning in the first concave portion to generate first and second concave portions having different depths, and thus in the reverse direction The internal electric field strength of the created diode structure is redistributed and the surface electric field can be reduced. Therefore, compared with the conventional technology, the method of the present invention can further reduce leakage.

另,藉由深淺不同兩凹部及第一及第二絕緣層厚度的搭配調整反向偏壓下電場分布切線為多峰結構,提升同一原材料下的製作之二極體反向耐崩電壓表現。 In addition, by adjusting the thickness of the two recesses and the thickness of the first and second insulating layers, the tangential line of the electric field distribution under the reverse bias is multi-peak structure, and the reverse breakdown voltage performance of the fabricated diode under the same raw material is improved.

又,由於二極體於反向突波(雷擊)能量進入時會於崩潰電壓下將能量轉化為電流及崩潰電壓及時間的乘積(E=Pxt=VxIxt),且過大的電流通過為二極體內微結構的實質破壞原因,而可通過電流與原材料阻抗厚度有絕對關聯。因此,在以相同原材料製作元件面臨相同的突波(雷擊)電流下,較高的元件崩潰電壓者可進一步提升二極體原件反向突波(雷擊)衝擊電流下抗雷擊能力表現。 Moreover, since the diode enters the reverse surge (lightning strike) energy, the energy is converted into a product of the current and the breakdown voltage and time at the breakdown voltage (E=Pxt=VxIxt), and the excessive current passes through the pole. The reason for the substantial destruction of the microstructure in the body is that the current is absolutely related to the thickness of the raw material impedance. Therefore, in the case of components with the same raw materials facing the same surge (lightning strike) current, the higher component breakdown voltage can further improve the performance of the lightning strike capability of the reverse surge (lightning strike) of the diode original.

1‧‧‧蕭特基二極體 1‧‧‧Schottky diode

10,20‧‧‧二極體本體 10,20‧‧‧dipole body

10a,20a‧‧‧表面 10a, 20a‧‧‧ surface

100‧‧‧凹部 100‧‧‧ recess

100a,201a,202a‧‧‧壁面 100a, 201a, 202a‧‧‧ wall

100b,201b,202b‧‧‧底面 100b, 201b, 202b‧‧‧ bottom

11‧‧‧二氧化矽層 11‧‧‧ cerium oxide layer

12‧‧‧多晶矽層 12‧‧‧Polysilicon layer

15‧‧‧蕭特基金屬層 15‧‧‧Schottky metal layer

2‧‧‧二極體結構 2‧‧‧Diode structure

20b‧‧‧隔離層 20b‧‧‧Isolation

201‧‧‧第一凹部 201‧‧‧First recess

202‧‧‧第二凹部 202‧‧‧Second recess

21‧‧‧第一絕緣層 21‧‧‧First insulation

22‧‧‧第一導體層 22‧‧‧First conductor layer

23‧‧‧第二絕緣層 23‧‧‧Second insulation

24‧‧‧第二導體層 24‧‧‧Second conductor layer

25‧‧‧金屬層 25‧‧‧metal layer

W1,W2‧‧‧寬度 W1, W2‧‧‧ width

t,t’,d,d’‧‧‧厚度 t,t’,d,d’‧‧‧ thickness

A‧‧‧第一開口 A‧‧‧first opening

B‧‧‧第二開口 B‧‧‧second opening

C1,C2,C3‧‧‧曲線 C1, C2, C3‧‧‧ curves

D,E‧‧‧電場曲線 D, E‧‧‧ electric field curve

F1,F2‧‧‧電場 F1, F2‧‧‧ electric field

G1,G2‧‧‧電壓 G1, G2‧‧‧ voltage

H1,H2‧‧‧漏電流 H1, H2‧‧‧ leakage current

第1A至1E圖係為習知二極體結構之製法之剖面示意 圖;第2A至2F圖係為本創作之二極體結構之製法之剖視示意圖;第3圖係為本創作之二極體結構與習知溝槽式蕭特基二極體之IV曲線圖;第4A圖係為習知溝槽式蕭特基二極體於反向偏壓下之電場分布圖;第4B圖係為本創作之二極體結構於反向偏壓下之電場分布圖;第5A圖係為習知溝槽式蕭特基二極體於反向偏壓下之電場分布切線圖;第5B圖係為本創作之二極體結構於反向偏壓下之電場分布切線圖,其具特徵雙峰結構,且電場切線峰數由等量的凹部數量決定;第5C圖係為本創作之二極體結構與習知蕭特基二極體於反向偏壓下之電場分布切線比對圖;第6A圖係為本創作之二極體結構之兩種實施例於相同反向偏壓下之電場分布比對圖;第6B圖係為本創作之二極體結構之兩種實施例於相同反向偏壓下之電場分布切線比對圖;第6C圖係為本創作之二極體結構之兩種實施例之崩潰電壓比對曲線圖;以及第6D圖係為本創作之二極體結構之兩種實施例之漏電行為比對曲線圖。 Figures 1A to 1E are schematic cross-sectional views of a conventional diode structure Figure 2A to 2F is a schematic cross-sectional view of the manufacturing method of the diode structure of the creation; Figure 3 is the IV curve of the created diode structure and the conventional grooved Schottky diode. Fig. 4A is an electric field distribution diagram of a conventional trench Schottky diode under reverse bias; and Fig. 4B is an electric field distribution of a diode structure under reverse bias Figure 5A is a tangential diagram of the electric field distribution of a conventional trench Schottky diode under reverse bias; Figure 5B is the electric field of the created diode structure under reverse bias. Distribution tangential diagram, which has a characteristic bimodal structure, and the number of tangential peaks of the electric field is determined by the number of equal recesses; the 5C diagram is the reverse bias of the created diode structure and the conventional Schottky diode. The electric field distribution tangential alignment diagram; the 6A diagram is the electric field distribution comparison diagram of the two embodiments of the created diode structure under the same reverse bias; the 6B diagram is the second pole of the creation The tangential alignment diagram of the electric field distribution of the two embodiments of the bulk structure under the same reverse bias; the 6C diagram is the two realities of the diode structure of the present invention. Than the breakdown voltage versus the embodiment; FIG. 6D and a second graph based on the ratio of the drain behavior of the embodiment of the two kinds of diode structure of the present embodiment Creation.

以下藉由特定的具體實施例說明本創作之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本創作之其他優點及功效。 The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily appreciate other advantages and functions of the present invention from the disclosure of the present disclosure.

須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本創作可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本創作所能產生之功效及所能達成之目的下,均應仍落在本創作所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如“上”、“第一”、“第二”、及“一”等之用語,亦僅為便於敘述之明瞭,而非用以限定本創作可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本創作可實施之範疇。 It is to be understood that the structure, the proportions, the size and the like of the drawings are only used in conjunction with the disclosure of the specification for the understanding and reading of those skilled in the art, and are not intended to limit the implementation of the present invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effectiveness and the purpose of the creation. The technical content revealed by the creation can be covered. In the meantime, the terms “upper”, “first”, “second”, “one” and “the” are used in this specification for the convenience of description, and are not intended to limit the scope of the creation. Changes or adjustments in their relative relationship are considered to be within the scope of the creation of the creation of the product without substantial changes.

第2A至2F圖係為本創作之二極體結構2之製法之剖視示意圖。於本實施例中,該二極體結構2係為蕭特基二極體。 2A to 2F are schematic cross-sectional views showing the manufacturing method of the diode structure 2 of the present invention. In this embodiment, the diode structure 2 is a Schottky diode.

如第2A圖所示,於一個二極體本體20之表面20a上利用圖案化光罩(圖略)形成第一凹部201,且待移除該光罩後,於該二極體本體20之表面20a上並沿該第一凹部201之壁面201a與底面201b形成第一絕緣層21,再於該第一絕緣層21上形成第一導體層22。 As shown in FIG. 2A, a first recess 201 is formed on the surface 20a of a diode body 20 by using a patterned mask (not shown), and after the mask is removed, the diode body 20 is A first insulating layer 21 is formed on the surface 20a along the wall surface 201a and the bottom surface 201b of the first recess 201, and a first conductor layer 22 is formed on the first insulating layer 21.

於本實施例中,該二極體本體20係為半導體材,如矽 (silicon),且該第一絕緣層21係為介電層,如二氧化矽(SiO2)材,而該第一導體層22係為多晶矽(polysilicon)材。 In this embodiment, the diode body 20 is a semiconductor material, such as silicon, and the first insulating layer 21 is a dielectric layer, such as a cerium oxide (SiO 2 ) material, and the first The conductor layer 22 is a polysilicon material.

再者,可藉由雷射、蝕刻或其它適合方式移除該二極體本體20之材質以形成該第一凹部201,且以塗佈方式或其它適合方式形成該第一絕緣層21與該第一導體層22。 Furthermore, the material of the diode body 20 can be removed by laser, etching or other suitable means to form the first recess 201, and the first insulating layer 21 can be formed by coating or other suitable manner. First conductor layer 22.

又,該二極體本體20之表面20a上可選擇性形成隔離層20b。 Moreover, the isolation layer 20b is selectively formed on the surface 20a of the diode body 20.

如第2B圖所示,移除部分該二極體本體20之表面20a上之第一絕緣層21與第一導體層22,且移除該第一凹部201之底面201b上之第一絕緣層21與第一導體層22,以形成第一開口A於該第一絕緣層21與該第一導體層22上,以令該第一凹部201之部分底面201b外露於該第一開口A。 As shown in FIG. 2B, a portion of the first insulating layer 21 and the first conductive layer 22 on the surface 20a of the diode body 20 are removed, and the first insulating layer on the bottom surface 201b of the first recess 201 is removed. 21 and the first conductor layer 22 to form a first opening A on the first insulating layer 21 and the first conductor layer 22 such that a portion of the bottom surface 201b of the first recess 201 is exposed to the first opening A.

於本實施例中,可藉由雷射、蝕刻或其它適合方式移除該第一絕緣層21與該第一導體層22。 In this embodiment, the first insulating layer 21 and the first conductive layer 22 may be removed by laser, etching or other suitable means.

如第2C圖所示,利用該第一絕緣層21與該第一導體層22作為光罩,於該第一凹部201外露於該第一開口A之底面201b上自主對位形成第二開口B,以令該第一開口A與第二開口B作為第二凹部202。 As shown in FIG. 2C, the first insulating layer 21 and the first conductive layer 22 are used as a photomask, and the first recess 201 is exposed on the bottom surface 201b of the first opening A to form a second opening B. The first opening A and the second opening B are used as the second recess 202.

於本實施例中,可藉由雷射、蝕刻或其它適合方式移除該二極體本體20(即該第一凹部201之底面201b處)之材質以形成該第二凹部202。 In this embodiment, the material of the diode body 20 (ie, the bottom surface 201b of the first recess 201) may be removed by laser, etching or other suitable means to form the second recess 202.

再者,應可理解地,該第一凹部201之寬度W1係大於該第二凹部202之寬度W2,使該第二凹部202位於該第 一凹部201中。 Moreover, it should be understood that the width W1 of the first concave portion 201 is greater than the width W2 of the second concave portion 202, so that the second concave portion 202 is located at the first In a recess 201.

應可理解地,以相同方法可進行第三凹部或更多凹部結構的製造。 It should be understood that the fabrication of the third recess or more recess structures can be performed in the same manner.

如第2D圖所示,於該二極體本體20之表面20a上沿該第一絕緣層21、該第一導體層22及該第二凹部202之壁面202a與底面202b形成第二絕緣層23,再於該第二絕緣層23上形成第二導體層24。 As shown in FIG. 2D, a second insulating layer 23 is formed on the surface 20a of the diode body 20 along the wall surface 202a and the bottom surface 202b of the first insulating layer 21, the first conductor layer 22, and the second recess 202. A second conductor layer 24 is formed on the second insulating layer 23.

於本實施例中,該第二絕緣層23係為介電層,如二氧化矽材,且該第二導體層24係為多晶矽材。 In this embodiment, the second insulating layer 23 is a dielectric layer, such as a cerium oxide material, and the second conductive layer 24 is a polycrystalline bismuth material.

再者,以塗佈方式或其它適合方式形成該第二絕緣層23與該第二導體層24。 Furthermore, the second insulating layer 23 and the second conductor layer 24 are formed by coating or other suitable means.

如第2E圖所示,移除位於該二極體本體20之表面20a上、該第一絕緣層21上方與該第一導體層22上方之第二絕緣層23與第二導體層24,而僅保留該第二凹部202中之第二絕緣層23與第二導體層24。 As shown in FIG. 2E, the second insulating layer 23 and the second conductive layer 24 on the surface 20a of the diode body 20, above the first insulating layer 21 and above the first conductor layer 22 are removed. Only the second insulating layer 23 and the second conductor layer 24 in the second recess 202 are retained.

於本實施例中,該第一絕緣層21於橫向之厚度t小於該第二絕緣層23於橫向之厚度d,且該第一絕緣層21於縱向之厚度t’小於該第二絕緣層23於縱向之厚度d’。 In this embodiment, the thickness t of the first insulating layer 21 in the lateral direction is smaller than the thickness d of the second insulating layer 23 in the lateral direction, and the thickness t' of the first insulating layer 21 in the longitudinal direction is smaller than the second insulating layer 23 The thickness d' in the longitudinal direction.

如第2F圖所示,移除隔離層20b,再形成一金屬層25於該二極體本體20之表面20a、第一與第二絕緣層21,23及第一與第二導體層22,24上。於本實施例中,該金屬層25係為鈦材或其它金屬材。 As shown in FIG. 2F, the isolation layer 20b is removed, and a metal layer 25 is formed on the surface 20a of the diode body 20, the first and second insulating layers 21, 23, and the first and second conductor layers 22, 24 on. In the present embodiment, the metal layer 25 is made of titanium or other metal.

於本實施例中,該隔離層20b之材料亦可為製程常用絕緣材料,如二氧化矽材。藉由厚度與各絕緣層不同及製 程的控制,可於該第二絕緣層23去除之同時,去除該隔離層20b。 In this embodiment, the material of the isolation layer 20b may also be a common insulating material for the process, such as a cerium oxide material. By thickness and different insulation layers The control of the process can remove the isolation layer 20b while the second insulating layer 23 is removed.

因此,本創作之製法係藉由在該第一凹部201中自主對位形成第二凹部202,以產生深淺不同之第一與第二凹部201,202(或更多凹部)。因而於外加反向偏壓之情況下,該二極體本體20內部電場強度會重新分配,且能降低表面電場,故相較於習知技術,本創作之製法能進一步降低漏電,亦即能製作出超低漏電表現之二極體結構2。 Therefore, the method of the present invention is to form the second concave portion 202 by autonomously aligning the first concave portion 201 to produce first and second concave portions 201, 202 (or more concave portions) having different depths. Therefore, in the case of applying a reverse bias, the electric field intensity of the diode body 20 is redistributed and the surface electric field can be reduced. Therefore, compared with the prior art, the method of the present invention can further reduce leakage, that is, A diode structure 2 with ultra-low leakage performance is produced.

再者,本創作之製法係利用自主對位產生深淺不同之凹部,故相較於習知技術,本創作之製法所用之光罩數量相同,因而不會增加製作成本。 Furthermore, the method of the creation of this creation uses the autonomous orientation to produce different shades of recesses. Therefore, compared with the conventional technique, the number of masks used in the creation method of this creation is the same, and thus the production cost is not increased.

第3圖係為本創作之二極體結構2與習知溝槽式蕭特基二極體1之反向IV(電流電壓)曲線圖。如第3圖所示,本創作之二極體結構2之曲線C1之位置高於習知溝槽式蕭特基二極體1之曲線C3之位置,其中,X軸代表反向電壓,其單位為伏特(V),Y軸代表電流密度,其單位為安培/面積(A/um2)。於本實施例中,本創作之二極體結構2之第一絕緣層21之厚度t,t’可減薄0.05微米(μm),使其曲線C2之位置略低於本創作之原本曲線C1之位置,但仍高於習知溝槽式蕭特基二極體1之曲線C3之位置。 Fig. 3 is a reverse IV (current-voltage) graph of the diode structure 2 of the present invention and the conventional trench Schottky diode 1. As shown in FIG. 3, the position of the curve C1 of the diode structure 2 of the present invention is higher than the position of the curve C3 of the conventional trench Schottky diode 1, wherein the X axis represents a reverse voltage, The unit is volts (V) and the Y-axis represents current density in amps/area (A/um 2 ). In this embodiment, the thickness t, t' of the first insulating layer 21 of the diode structure 2 of the present invention can be reduced by 0.05 micrometers (μm), so that the position of the curve C2 is slightly lower than the original curve C1 of the present creation. The position is still higher than the position of the curve C3 of the conventional grooved Schottky diode 1 .

第4A圖係為習知蕭特基二極體1之反向偏壓下電場分布圖,且第4B圖係為本創作之二極體結構2之反向偏壓下電場分布圖,其中,X軸代表寬度,其單位為微米(um),Y軸代表長度,其單位為微米(um)。如第4A及4B 圖所示,本創作之二極體結構2之表面電場係低於習知溝槽式蕭特基二極體1之表面電場,故本創作之二極體結構2有效減低漏電情況。 4A is a distribution diagram of the electric field under the reverse bias of the conventional Schottky diode 1 , and FIG. 4B is a map of the electric field under the reverse bias of the diode structure 2 of the present invention, wherein The X axis represents the width in microns (um) and the Y axis represents the length in microns (um). Like 4A and 4B As shown in the figure, the surface electric field of the diode structure 2 of the present invention is lower than that of the conventional trench type Schottky diode 1 , so the diode structure 2 of the present invention effectively reduces the leakage.

第5A圖係為習知溝槽式蕭特基二極體1之反向偏壓下電場分布切線圖,且第5B圖係為本創作之二極體結構2之反向偏壓下電場分布切線圖,其中,X軸代表沿Y方向切線位置,其單位為微米(um),Y軸代表電場強度,其單位係為伏特/公分(V/cm)。 Figure 5A is a tangential diagram of the electric field distribution under the reverse bias of the conventional trench Schottky diode 1 and Fig. 5B is the electric field distribution under the reverse bias of the diode structure 2 of the present invention. A tangential diagram in which the X-axis represents a tangent position in the Y direction, the unit is in micrometers (um), and the Y-axis represents electric field strength, the unit of which is in volts/cm (V/cm).

如第5A及5B圖所示,習知溝槽式蕭特基二極體1反向偏壓下之電場分布切線D係顯示其於金屬與半導體材接觸表面(X=0)處之電場明顯較高,且本創作之二極體結構2之電場曲線E係顯示其於金屬與半導體材接觸表面處之電場明顯較低。 As shown in FIGS. 5A and 5B, the electric field distribution tangent D of the conventional trench type Schottky diode 1 under reverse bias shows that the electric field at the contact surface of the metal and the semiconductor material (X=0) is obvious. The electric field curve E of the diode structure 2 of the present invention is higher, and the electric field at the contact surface of the metal and the semiconductor material is significantly lower.

於本實施例中,如第5C圖所示,將兩電場曲線D,E重疊比對後,特別能顯示本創作之二極體結構2反向偏壓下之電場分布切線E於金屬與半導體材接觸表面處之電場低於習知溝槽式蕭特基二極體1之電場曲線D於金屬與半導體材接觸表面處之電場,故本創作之二極體結構2有效減低蕭特基有效能障之降低(Barrier Lowering)及漏電情況。 In the present embodiment, as shown in FIG. 5C, after the two electric field curves D and E are overlapped, the electric field distribution tangent E under the reverse bias of the diode structure 2 of the present invention can be specifically shown in the metal and the semiconductor. The electric field at the contact surface of the material is lower than the electric field curve D of the conventional trench Schottky diode 1 at the contact surface between the metal and the semiconductor material. Therefore, the diode structure 2 of the present invention effectively reduces the effectiveness of the Schottky. Barrier Lowering and leakage.

具體地,從100伏特(V)晶粒的電性模擬情況,在使用完全相同的半導體材磊晶(epitaxy)原材料基礎上,習知溝槽式蕭特基二極體1之漏電密度為5.75(E-12A/μm2),而本創作之二極體結構2之漏電密度為1.56(E-12A/μm2),亦即 本創作降低約3倍,本創作之二極體結構2依據此漏電調降方式,於相同的使用溫度下反向的功耗為習知溝槽式蕭特基二極體1的三分之一。故於相同的散熱條件下,本創作之二極體結構2可將安全可操作溫度範圍較習知溝槽式蕭特基二極體1提升約10至15℃,且因可於相同原材料上進一步提升電壓造成原材料的節約而能提升效率。 Specifically, from the electrical simulation of 100 volt (V) grains, the leakage density of the conventional trench Schottky diode 1 is 5.75 based on the use of identical semiconductor material epitaxy materials. (E-12A/μm 2 ), and the leakage density of the diode structure 2 of the present invention is 1.56 (E-12A/μm 2 ), that is, the creation is reduced by about 3 times, and the diode structure 2 of the present invention is based on In this leakage reduction mode, the power consumption reversed at the same use temperature is one-third that of the conventional trench Schottky diode 1. Therefore, under the same heat dissipation conditions, the diode structure 2 of the present invention can raise the safe operable temperature range by about 10 to 15 ° C compared with the conventional grooved Schottky diode 1 and can be used on the same raw materials. Further increase in voltage results in savings in raw materials and can increase efficiency.

第6A至6D圖係為本創作之二極體結構之兩種實施例之比對圖,其中,第一實施例係為本創作之二極體結構2,而第二實施例係為第一絕緣層21之厚度t,t’減薄0.05微米。 6A to 6D are alignment diagrams of two embodiments of the created diode structure, wherein the first embodiment is the created diode structure 2, and the second embodiment is the first The thickness t, t' of the insulating layer 21 is reduced by 0.05 μm.

如第6A圖所示反向偏壓下之電場分布比對圖,本創作之第一與第二實施例之反向偏壓下電場分布部分不同,其中,X軸代表寬度,其單位為微米(um),Y軸代表長度,其單位為微米(um)。 As shown in Fig. 6A, the electric field distribution ratio map under reverse bias is different from the electric field distribution portion under the reverse bias of the first and second embodiments of the present invention, wherein the X axis represents the width and the unit is micron. (um), the Y axis represents the length, and its unit is micron (um).

如第6B圖所示之反向偏壓下電場切線比對圖,第一實施例於金屬與半導體接觸表面處之電場F1略高於第二實施例於金屬與半導體接觸表面處之電場F2,其中,X軸代表沿Y方向切線位置,其單位為微米(um),Y軸代表電場強度,其單位係為伏特/公分(V/cm)。 As shown in FIG. 6B, the electric field tangential alignment diagram under reverse bias, the electric field F1 at the metal-semiconductor contact surface of the first embodiment is slightly higher than the electric field F2 at the metal-semiconductor contact surface of the second embodiment, Wherein, the X axis represents a tangent position along the Y direction, the unit is micrometer (um), and the Y axis represents electric field strength, and the unit is volts/cm (V/cm).

如第6C圖所示之電壓比對曲線圖,因第二實施例之第一絕緣層21之厚度較薄,故第二實施例之電壓G2略低於第一實施例之電壓G1,其中,X軸代表反向偏壓,其單位為伏特(V),Y軸代表電流密度,其單位為安培/面積(A/um2)。 As shown in FIG. 6C, the voltage G2 of the second embodiment is slightly lower than the voltage G1 of the first embodiment, because the thickness of the first insulating layer 21 of the second embodiment is relatively thin. The X axis represents the reverse bias voltage in volts (V) and the Y axis represents the current density in amps/area (A/um 2 ).

如第6D圖所示之反向偏壓下漏電行為比對曲線圖,於電壓25至70伏特時,第二實施例之漏電流H2係低於第一實施例之漏電流H1,其中,X軸代表反向偏壓,其單位為伏特(V),Y軸代表電流密度,其單位為安培/面積(A/um2)。 As shown in FIG. 6D, the leakage behavior of the reverse bias is shown in FIG. 6D. When the voltage is 25 to 70 volts, the leakage current H2 of the second embodiment is lower than the leakage current H1 of the first embodiment, wherein X The axis represents the reverse bias voltage in volts (V) and the Y axis represents the current density in amps/area (A/um 2 ).

綜上所述,本創作之二極體結構及其製法,係藉由在該第一凹部中自主對位形成第二凹部,以產生深淺不同之第一與第二凹部,配合厚度不同之第一及第二絕緣層因而能降低金屬與半導體接觸表面電場強度,故本創作之二極體結構及其製法能提升產品耐壓性,且降低反向偏壓下漏電表現。 In summary, the diode structure of the present invention is formed by abutting a second recess in the first recess to create first and second recesses of different depths, with different thicknesses. The first and second insulating layers can thereby reduce the electric field strength of the metal-semiconductor contact surface. Therefore, the diode structure and the method of the same can improve the pressure resistance of the product and reduce the leakage performance under reverse bias.

上述實施例係用以例示性說明本創作之原理及其功效,而非用於限制本創作。任何熟習此項技藝之人士均可在不違背本創作之精神及範疇下,對上述實施例進行修改。因此本創作之權利保護範圍,應如後述之申請專利範圍所列。 The above embodiments are intended to illustrate the principles of the present invention and its effects, and are not intended to limit the present invention. Anyone who is familiar with the art may modify the above embodiments without departing from the spirit and scope of the creation. Therefore, the scope of protection of this creation should be as listed in the scope of patent application described later.

Claims (10)

一種二極體結構,係包括:二極體本體,其表面上形成有第一凹部;第一絕緣層,係形成於該第一凹部之壁面與底面上;第一導體層,係形成於該第一絕緣層上,且於該第一絕緣層與該第一導體層上形成第一開口,使該第一凹部之部分底面外露於該第一開口,以於該第一凹部外露於該第一開口之底面上形成第二開口,令該第一開口與第二開口形成為第二凹部;第二絕緣層,係形成於該第二凹部之壁面與底面上;以及第二導體層,係形成於該第二絕緣層上。 A diode structure includes: a diode body having a first recess formed on a surface thereof; a first insulating layer formed on a wall surface and a bottom surface of the first recess; a first conductor layer formed on the body Forming a first opening on the first insulating layer and the first insulating layer, and exposing a portion of the bottom surface of the first recess to the first opening, so that the first recess is exposed to the first opening a second opening is formed on a bottom surface of an opening, the first opening and the second opening are formed as a second recess; a second insulating layer is formed on the wall surface and the bottom surface of the second recess; and the second conductor layer is Formed on the second insulating layer. 如申請專利範圍第1項所述之二極體結構,其中,該二極體結構係為蕭特基二極體。 The diode structure of claim 1, wherein the diode structure is a Schottky diode. 如申請專利範圍第1項所述之二極體結構,其中,該第一絕緣層之厚度小於該第二絕緣層之厚度。 The diode structure of claim 1, wherein the first insulating layer has a thickness smaller than a thickness of the second insulating layer. 如申請專利範圍第1項所述之二極體結構,其中,該二極體本體係為半導體材。 The diode structure according to claim 1, wherein the diode system is a semiconductor material. 如申請專利範圍第1項所述之二極體結構,其中,該第一絕緣層係為二氧化矽材或氮化矽。 The diode structure of claim 1, wherein the first insulating layer is cerium oxide or tantalum nitride. 如申請專利範圍第1項所述之二極體結構,其中,該第二絕緣層係為二氧化矽材或氮化矽。 The diode structure of claim 1, wherein the second insulating layer is cerium oxide or tantalum nitride. 如申請專利範圍第1項所述之二極體結構,其中,該第 一導體層係為多晶矽材或金屬。 Such as the diode structure described in claim 1, wherein the A conductor layer is a polycrystalline tantalum or metal. 如申請專利範圍第1項所述之二極體結構,其中,該第二導體層係為多晶矽材或金屬。 The diode structure of claim 1, wherein the second conductor layer is a polycrystalline tantalum or a metal. 如申請專利範圍第1項所述之二極體結構,復包括金屬層,係形成於該二極體本體之表面、第一與第二絕緣層及第一與第二導體層上。 The diode structure according to claim 1, wherein the metal layer is formed on the surface of the diode body, the first and second insulating layers, and the first and second conductor layers. 如申請專利範圍第9項所述之二極體結構,其中,該金屬層係為鈦材或蕭特基金屬。 The diode structure of claim 9, wherein the metal layer is a titanium material or a Schottky metal.
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