TWM553496U - Light-emitting device - Google Patents
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本創作係關於一種發光元件,且特別係關於一種發光元件,其包含一電極墊及一延伸電極延伸自電極墊。The present invention relates to a light-emitting element, and in particular to a light-emitting element comprising an electrode pad and an extension electrode extending from the electrode pad.
發光二極體(LED)為一廣泛使用之固態發光元件。發光二極體(LED)包含一p型半導體層,一n型半導體層,以及一活性層位於p型半導體層及n型半導體層之間以發出一光線。LED的原理為提供一電流予LED以將電子及電洞注入於活性層中,並於活性層中結合以發出光線,使電能轉為光能。A light-emitting diode (LED) is a widely used solid-state light-emitting element. The light emitting diode (LED) comprises a p-type semiconductor layer, an n-type semiconductor layer, and an active layer between the p-type semiconductor layer and the n-type semiconductor layer to emit a light. The principle of LED is to provide a current to the LED to inject electrons and holes into the active layer, and combine them in the active layer to emit light to convert the electrical energy into light energy.
一發光元件包含一半導體疊層具有一第一半導體層、一第二半導體層及一活性層位於第一半導體層及第二半導體層之間;一電極墊位於第二半導體層上;一電流阻障層具有一第一開口位於第二半導體層上以環繞電極墊,電流阻障層係與第二半導體層直接接觸;一透明導電層位於電流阻障層上,透明導電層具有一第二開口以環繞電極墊;以及一延伸電極自電極墊向外延伸,其中延伸電極包含一第一部份位於第一開口及第二開口中,以及一第二部份位於透明導電層及電流阻障層上。A light emitting device comprises a semiconductor stack having a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; an electrode pad on the second semiconductor layer; a current resistance The barrier layer has a first opening on the second semiconductor layer to surround the electrode pad, and the current blocking layer is in direct contact with the second semiconductor layer; a transparent conductive layer is on the current blocking layer, and the transparent conductive layer has a second opening And surrounding the electrode pad; and an extending electrode extending outward from the electrode pad, wherein the extending electrode comprises a first portion in the first opening and the second opening, and a second portion is located in the transparent conductive layer and the current blocking layer on.
一發光元件包含一半導體疊層具有一第一半導體層、一第二半導體層及一活性層位於第一半導體層及第二半導體層之間;一電極墊位於第二半導體層上;一電流阻障層具有一第一開口位於第二半導體層上以露出第二半導體層之一表面,電流阻障層係與第二半導體層直接接觸;一透明導電層位於電流阻障層上,透明導電層具有一第二開口以露出第二半導體層之表面;以及一延伸電極連接至電極墊,其中電極墊包含一金屬層具有一功函數大於4 eV以與第二半導體層形成蕭特基接觸。A light emitting device comprises a semiconductor stack having a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; an electrode pad on the second semiconductor layer; a current resistance The barrier layer has a first opening on the second semiconductor layer to expose one surface of the second semiconductor layer, the current blocking layer is in direct contact with the second semiconductor layer; a transparent conductive layer is on the current blocking layer, and the transparent conductive layer Having a second opening to expose a surface of the second semiconductor layer; and an extension electrode coupled to the electrode pad, wherein the electrode pad comprises a metal layer having a work function greater than 4 eV to form a Schottky contact with the second semiconductor layer.
一發光元件包含一半導體疊層具有一第一半導體層、一第二半導體層及一活性層位於第一半導體層及第二半導體層之間;一電極墊位於第二半導體層上;一電流阻障層具有一第一開口位於第二半導體層上以露出第二半導體層之一表面;以及一透明導電層位於電流阻障層上,透明導電層具有一第二開口以露出第二半導體層之表面,其中第一開口包含一第一側邊,第二開口包含一第二側邊,電極墊包含一第三側邊,第一側邊及第三側邊之間包含一距離大於3μm或第二側邊及第三側邊之間包含一距離大於3μm。A light emitting device comprises a semiconductor stack having a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; an electrode pad on the second semiconductor layer; a current resistance The barrier layer has a first opening on the second semiconductor layer to expose a surface of the second semiconductor layer; and a transparent conductive layer on the current blocking layer, the transparent conductive layer having a second opening to expose the second semiconductor layer a surface, wherein the first opening comprises a first side, the second opening comprises a second side, the electrode pad comprises a third side, and the first side and the third side comprise a distance greater than 3 μm or The distance between the two sides and the third side is greater than 3 μm.
一發光元件包含一半導體疊層具有一第一半導體層、一第二半導體層及一活性層位於第一半導體層及第二半導體層之間;一電極墊位於第二半導體層上;一電流阻障層具有一第一開口位於第二半導體層上以露出第二半導體層之一表面;以及一透明導電層位於電流阻障層上,透明導電層具有一第二開口以露出第二半導體層之表面,其中第一開口包含一第一寬度,第二開口包含一第二寬度,電極墊包含一第三寬度,第一寬度大於第三寬度或第二寬度大於第三寬度。A light emitting device comprises a semiconductor stack having a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; an electrode pad on the second semiconductor layer; a current resistance The barrier layer has a first opening on the second semiconductor layer to expose a surface of the second semiconductor layer; and a transparent conductive layer on the current blocking layer, the transparent conductive layer having a second opening to expose the second semiconductor layer The surface, wherein the first opening comprises a first width, the second opening comprises a second width, and the electrode pad comprises a third width, the first width being greater than the third width or the second width being greater than the third width.
為了使本創作之敘述更加詳盡與完備,請參照下列實施例之描述並配合相關圖示。惟,以下所示之實施例係用於例示本創作之發光元件,並非將本創作限定於以下之實施例。又,本說明書記載於實施例中的構成零件之尺寸、材質、形狀、相對配置等在沒有限定之記載下,本創作之範圍並非限定於此,而僅是單純之說明而已。且各圖示所示構件之大小或位置關係等,會由於為了明確說明有加以誇大之情形。更且,於以下之描述中,為了適切省略詳細說明,對於同一或同性質之構件用同一名稱、符號顯示。In order to make the description of the present invention more detailed and complete, please refer to the description of the following embodiments and the related diagrams. However, the embodiments shown below are used to exemplify the light-emitting elements of the present invention, and the present invention is not limited to the following embodiments. In addition, the dimensions, materials, shapes, relative arrangements, and the like of the components described in the present specification are not limited to the description, and the scope of the present invention is not limited thereto, and is merely illustrative. Further, the size, positional relationship, and the like of the members shown in the drawings may be exaggerated for clarity of explanation. Further, in the following description, in order to omit the detailed description, the same or similar members are denoted by the same names and symbols.
第1圖係本創作一實施例中所揭示之一發光元件1的結構透視圖。第2圖係第1圖之沿著A-A’線的發光元件1的剖面圖。如第1圖及第2圖所示,發光元件1包含一基板10,一半導體疊層12位於基板10上,其中半導體疊層12包含一第一半導體層121,一第二半導體層122,以及一活性層123位於第一半導體層121及第二半導體層122之間,以及一透明導電層22位於第二半導體層122上。Fig. 1 is a perspective view showing the structure of a light-emitting element 1 disclosed in an embodiment of the present invention. Fig. 2 is a cross-sectional view of the light-emitting element 1 taken along the line A-A' in Fig. 1. As shown in FIG. 1 and FIG. 2, the light-emitting element 1 includes a substrate 10, and a semiconductor layer 12 is disposed on the substrate 10. The semiconductor layer 12 includes a first semiconductor layer 121, a second semiconductor layer 122, and An active layer 123 is located between the first semiconductor layer 121 and the second semiconductor layer 122, and a transparent conductive layer 22 is disposed on the second semiconductor layer 122.
第一半導體層121及第二半導體層122具有不同的導電型態、電性、極性,或摻雜的元素以提供電子或電洞。具體而言,第一半導體層121包含n型或p型半導體,當第一半導體層121為n型半導體時,第二半導體層122可為p型半導體,或是當第一半導體層121為p型半導體時,第二半導體層122可為n型半導體。活性層123係形成於第一半導體層121及第二半導體層122之間。活性層123可將電能轉換成光能。改變半導體疊層12之一層或多層的物理及化學組成以調整光線的波長。半導體疊層12的材料包含鋁鎵銦磷(AlGaInP)或鋁鎵銦氮(AlGaInN)。活性層123包含單異質結構(single heterostructure, SH),雙異質結構(double heterostructure, DH),雙側雙異質結構( double-side double heterostructure, DDH),或多層量子井結構(multi-quantum well, MQW)。具體而言,活性層123之材料可為中性、p型或n型電性的半導體。當一電流通過半導體疊層12時,活性層123可發出一光線。當活性層123包含鋁鎵銦磷(AlGaInP)系列之材料時,活性層123發出琥珀色系列之光線,例如紅光、橘光、或黃光;當活性層123包含鋁鎵銦氮(AlGaInN)系列之材料時,活性層123發出藍光、綠光、或紫外光。本實施例係以具有鋁鎵銦氮(AlGaInN)系列之材料的半導體疊層12為例示。此疊層可藉由多種方法形成,例如有機金屬化學氣相沉積法(MOCVD)、分子束磊晶法(MBE)、氫化物氣相沉積法(HVPE)。The first semiconductor layer 121 and the second semiconductor layer 122 have different conductivity types, electrical properties, polarities, or doped elements to provide electrons or holes. Specifically, the first semiconductor layer 121 includes an n-type or p-type semiconductor, and when the first semiconductor layer 121 is an n-type semiconductor, the second semiconductor layer 122 may be a p-type semiconductor or when the first semiconductor layer 121 is p In the case of a type semiconductor, the second semiconductor layer 122 may be an n-type semiconductor. The active layer 123 is formed between the first semiconductor layer 121 and the second semiconductor layer 122. The active layer 123 converts electrical energy into light energy. The physical and chemical composition of one or more layers of the semiconductor stack 12 is varied to adjust the wavelength of the light. The material of the semiconductor stack 12 comprises aluminum gallium indium phosphorus (AlGaInP) or aluminum gallium indium nitride (AlGaInN). The active layer 123 comprises a single heterostructure (SH), a double heterostructure (DH), a double-side double heterostructure (DDH), or a multi-quantum well structure. MQW). Specifically, the material of the active layer 123 may be a neutral, p-type or n-type semiconductor. When a current is passed through the semiconductor stack 12, the active layer 123 emits a light. When the active layer 123 comprises a material of the aluminum gallium indium phosphorus (AlGaInP) series, the active layer 123 emits amber light, such as red light, orange light, or yellow light; when the active layer 123 contains aluminum gallium indium nitride (AlGaInN) In the case of a series of materials, the active layer 123 emits blue light, green light, or ultraviolet light. This embodiment is exemplified by a semiconductor laminate 12 having a material of an aluminum gallium indium nitride (AlGaInN) series. The laminate can be formed by a variety of methods, such as organometallic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), hydride vapor deposition (HVPE).
如第1圖所示,發光元件1於一上視圖上包含一矩形,具有一長邊及一短邊。發光元件1包含一第一電極14及一第二電極16,第一電極14包含一第一電極墊141;以及一或多個第一延伸電極142延伸自第一電極墊141,且以沿著平行於發光元件1之長邊的方向上朝第二電極墊161延伸。第二電極16包含一第二電極墊161;以及一或多個第二延伸電極162延伸自第二電極墊161,且以沿著發光元件1之長邊的方向上朝第一電極墊141延伸。於一實施例中,相對於通過發光元件1之中心點的水平線、垂直線、或是對角線上,第一電極14及第二電極16可以配置為一對稱結構。As shown in Fig. 1, the light-emitting element 1 includes a rectangle in a top view having a long side and a short side. The light-emitting element 1 includes a first electrode 14 and a second electrode 16, the first electrode 14 includes a first electrode pad 141, and one or more first extension electrodes 142 extend from the first electrode pad 141, and along The second electrode pad 161 extends in a direction parallel to the long side of the light-emitting element 1. The second electrode 16 includes a second electrode pad 161; and one or more second extension electrodes 162 extend from the second electrode pad 161 and extend toward the first electrode pad 141 in a direction along the long side of the light emitting element 1. . In one embodiment, the first electrode 14 and the second electrode 16 may be configured in a symmetrical structure with respect to a horizontal line, a vertical line, or a diagonal line passing through a center point of the light-emitting element 1.
第一電極14及第二電極16可位於基板10的相同側或是基板10的相對側。第1圖、第2圖係揭示第一電極14及第二電極16位於基板10之相同側的實施例。The first electrode 14 and the second electrode 16 may be located on the same side of the substrate 10 or on the opposite side of the substrate 10. FIGS. 1 and 2 show an embodiment in which the first electrode 14 and the second electrode 16 are located on the same side of the substrate 10.
半導體疊層12可藉由蝕刻移除部分第二半導體層122及活性層123,以露出第一半導體層121之一表面。第一電極14係形成於第一半導體層121露出之表面,並與第一半導體層121形成電連接。第二電極16係形成於第二半導體層122之表面,並與第二半導體層122形成電連接。The semiconductor stack 12 can remove a portion of the second semiconductor layer 122 and the active layer 123 by etching to expose one surface of the first semiconductor layer 121. The first electrode 14 is formed on the exposed surface of the first semiconductor layer 121 and is electrically connected to the first semiconductor layer 121. The second electrode 16 is formed on the surface of the second semiconductor layer 122 and is electrically connected to the second semiconductor layer 122.
如第1-2圖所示,發光元件1包含一第一電流阻障層211位於第一電極墊141及第一半導體層121之間,一或多個第一電流阻障層211’ 位於第一延伸電極142及第一半導體層121之間,以及一第二電流阻障層212位於第二半導體層122及第二延伸電極162之間。第一電流阻障層211具有一上表面積包含一周邊2110位於第一電極墊141之外側以環繞第一電極墊141。As shown in FIG. 1-2, the light-emitting element 1 includes a first current blocking layer 211 between the first electrode pad 141 and the first semiconductor layer 121, and one or more first current blocking layers 211' are located at the first An extension electrode 142 and the first semiconductor layer 121 are disposed, and a second current blocking layer 212 is disposed between the second semiconductor layer 122 and the second extension electrode 162. The first current blocking layer 211 has an upper surface area including a periphery 2110 on the outer side of the first electrode pad 141 to surround the first electrode pad 141.
藉由設置第一電流阻障層211,211’ 以及第二電流阻障層212於第一電極14及第二電極16之下方,避免注入於第一電極14及第二電極16之電流聚集於第一電極墊141、第一延伸電極142及第二延伸電極162之下方。第一電流阻障層211,211’ 以及第二電流阻障層212之材料包含絕緣材料,例如氧化矽,氮化矽,或氧化鋁。第一電流阻障層211,211’ 以及第二電流阻障層212之結構可為單層或是多層交疊,例如布拉格反射層(DBR)。第一電流阻障層211,211’ 以及第二電流阻障層212之材料可為與第一電極14及第二電極16之接面形成高阻值接面或與第一半導體層121及第二半導體層122之接面形成高阻值接面的材料,例如半導體材料。於ㄧ實施例中,第一電流阻障層211,211’ 以及第二電流阻障層212之材料選擇非摻雜的半導體材料或摻雜濃度較第一半導體層121及第二半導體層122低的材料,例如非摻雜或低摻雜鋁鎵銦氮系列之材料。The first current blocking layer 211, 211' and the second current blocking layer 212 are disposed under the first electrode 14 and the second electrode 16, so that the current injected into the first electrode 14 and the second electrode 16 is prevented from being concentrated. Below the first electrode pad 141, the first extension electrode 142, and the second extension electrode 162. The materials of the first current blocking layers 211, 211' and the second current blocking layer 212 comprise an insulating material such as hafnium oxide, tantalum nitride, or aluminum oxide. The structures of the first current blocking layers 211, 211' and the second current blocking layer 212 may be a single layer or a plurality of layers, such as a Bragg reflection layer (DBR). The material of the first current blocking layer 211, 211 ′ and the second current blocking layer 212 may form a high resistance junction or a first semiconductor layer 121 and a junction with the junction of the first electrode 14 and the second electrode 16 . The junction of the two semiconductor layers 122 forms a material of high resistance junction, such as a semiconductor material. In the embodiment, the materials of the first current blocking layer 211, 211 ′ and the second current blocking layer 212 are selected to be undoped or have a lower doping concentration than the first semiconductor layer 121 and the second semiconductor layer 122 . Materials such as undoped or low-doped aluminum gallium indium nitride series materials.
透明導電層22包含一第一部份及一第二部分。透明導電層22之第一部份係位於電流阻障層212上,且不與第二半導體層122之表面直接接觸。透明導電層22之第二部分係與第二半導體層122之表面直接接觸,以使注入於第二電極16之電流均勻地擴散至第二半導體層122之整層表面。透明導電層22之第二部分包含一表面積大於第一部分之一表面積。由於透明導電層22位於發光元件1之光摘出面上,較佳地選擇具有透光性的導電材料以做為透明導電層22。具體而言,透明導電層22較佳地選擇一金屬氧化物,其至少包含一元素選自於鋅、銦、或錫,例如氧化鋅(ZnO)、氧化銦(InO)、氧化錫(SnO)、銦錫氧化物(ITO)、銦鋅氧化物(IZO)、或鎵鋅氧化物(GZO)。一金屬薄膜亦可以做為透明導電層22。較佳地,透明導電層22對於活性層123所發出的光線具有高透光性,例如60%以上、70%以上、75%以上、80%以上,或更高,以及為具有高導電性的材料。The transparent conductive layer 22 includes a first portion and a second portion. The first portion of the transparent conductive layer 22 is on the current blocking layer 212 and is not in direct contact with the surface of the second semiconductor layer 122. The second portion of the transparent conductive layer 22 is in direct contact with the surface of the second semiconductor layer 122 to uniformly diffuse the current injected into the second electrode 16 to the entire surface of the second semiconductor layer 122. The second portion of the transparent conductive layer 22 includes a surface area that is greater than a surface area of the first portion. Since the transparent conductive layer 22 is located on the light extraction surface of the light-emitting element 1, a light-transmitting conductive material is preferably selected as the transparent conductive layer 22. Specifically, the transparent conductive layer 22 is preferably selected from a metal oxide containing at least one element selected from the group consisting of zinc, indium, or tin, such as zinc oxide (ZnO), indium oxide (InO), and tin oxide (SnO). Indium tin oxide (ITO), indium zinc oxide (IZO), or gallium zinc oxide (GZO). A metal film can also be used as the transparent conductive layer 22. Preferably, the transparent conductive layer 22 has high light transmittance to the light emitted from the active layer 123, for example, 60% or more, 70% or more, 75% or more, 80% or more, or higher, and has high conductivity. material.
如第2圖所示,發光元件1包含一保護層20具有多個開口201,202以部分露出第一電極墊141以及第二電極墊161之上表面。保護層20覆蓋第一電極墊141以及第二電極墊161之部分上表面及一側表面,並完全包覆半導體疊層12之一側表面。保護層20包含一端以接觸基板10之一上表面。基板10與保護層20相接之上表面包含一粗化面。As shown in FIG. 2, the light-emitting element 1 includes a protective layer 20 having a plurality of openings 201, 202 for partially exposing the upper surface of the first electrode pad 141 and the second electrode pad 161. The protective layer 20 covers a portion of the upper surface and one side surface of the first electrode pad 141 and the second electrode pad 161, and completely covers one side surface of the semiconductor laminate 12. The protective layer 20 includes one end to contact an upper surface of the substrate 10. The surface of the substrate 10 adjacent to the protective layer 20 includes a roughened surface.
於本創作之另一實施例中,基板10與第一半導體層121相接之上表面包含一第一粗化型態,基板10與保護層20相接之上表面包含一第二粗化型態,第一粗化型態與第二粗化型態具有不同的粗化圖案或是不同的粗化高度、粗化寬度。In another embodiment of the present invention, the surface of the substrate 10 adjacent to the first semiconductor layer 121 includes a first roughened state, and the surface of the substrate 10 adjacent to the protective layer 20 includes a second roughened type. The first roughening type and the second roughening type have different roughening patterns or different roughening heights and roughening widths.
於本創作之另一實施例中,保護層20包含開口201,202以部份或完全露出第一電極墊141及第二電極墊161之上表面。當保護層20之開口201,202完全露出第一電極墊141及第二電極墊161之上表面時,保護層20分別與第一電極墊141及第二電極墊161相隔一距離以分別露出第一半導體層121及第二半導體層122之表面。In another embodiment of the present invention, the protective layer 20 includes openings 201, 202 to partially or completely expose the upper surfaces of the first electrode pad 141 and the second electrode pad 161. When the openings 201, 202 of the protective layer 20 completely expose the upper surfaces of the first electrode pad 141 and the second electrode pad 161, the protective layer 20 is separated from the first electrode pad 141 and the second electrode pad 161 by a distance to respectively expose the first A surface of the semiconductor layer 121 and the second semiconductor layer 122.
保護層20包含絕緣材料,例如氧化矽,氮化矽,或氧化鋁。保護層20可為單層結構或是多層結構。保護層20的厚度介於500Å~5000Å之間,更佳的是介於1000Å~3000Å之間。The protective layer 20 contains an insulating material such as hafnium oxide, tantalum nitride, or aluminum oxide. The protective layer 20 may be a single layer structure or a multilayer structure. The thickness of the protective layer 20 is between 500 Å and 5,000 Å, and more preferably between 1000 Å and 3,000 Å.
於本創作之另一實施例中,第一電極14可包含複數個第一電極墊141;以及一或多個第一延伸電極142延伸自每一個第一電極墊141。多個第一延伸電極142可彼此相連或彼此分隔一距離。第二電極16可包含複數個第二電極墊161;以及一或多個第二延伸電極162延伸自每一個第二電極墊161。多個第二延伸電極162可彼此相連或分隔。於本創作之一實施例中,彼此分隔之多個第一延伸電極142為彼此相連之第二延伸電極162所環繞。In another embodiment of the present invention, the first electrode 14 may include a plurality of first electrode pads 141; and one or more first extension electrodes 142 extend from each of the first electrode pads 141. The plurality of first extension electrodes 142 may be connected to each other or separated from each other by a distance. The second electrode 16 may include a plurality of second electrode pads 161; and one or more second extension electrodes 162 extend from each of the second electrode pads 161. The plurality of second extension electrodes 162 may be connected or separated from each other. In one embodiment of the present invention, the plurality of first extension electrodes 142 separated from each other are surrounded by second extension electrodes 162 that are connected to each other.
於本創作之一實施例中,第一電極墊141以及第二電極墊161各包含一尺寸,例如寬度,其大於第一延伸電極142以及第二延伸電極162之寬度,以使得第一電極墊141以及第二電極墊161可連接至一導線,焊料凸點或其他可替換之結構。第一電極墊141以及第二電極墊161位於發光元件1之光摘出面的相對側或角落。第一延伸電極142以及第二延伸電極162分別自第一電極墊141以及第二電極墊161向外延伸以使注入之電流均勻地擴散至發光元件1之整體。In one embodiment of the present invention, the first electrode pad 141 and the second electrode pad 161 each include a size, such as a width, which is greater than the widths of the first extension electrode 142 and the second extension electrode 162, such that the first electrode pad 141 and the second electrode pad 161 can be connected to a wire, solder bump or other alternative structure. The first electrode pad 141 and the second electrode pad 161 are located on opposite sides or corners of the light extraction surface of the light-emitting element 1. The first extension electrode 142 and the second extension electrode 162 extend outward from the first electrode pad 141 and the second electrode pad 161, respectively, to uniformly diffuse the injected current to the entirety of the light-emitting element 1.
於本創作之一實施例中,第一電極墊141、第二電極墊161各包含一打線層用以接合打線,一傳導層位於打線層之下,一阻障層位於打線層及傳導層之間,一黏著層用以增加傳導層與透明導電層22或者第二半導體層122之間的黏著力。打線層包含一第一金屬,例如金(Au)。打線層的厚度介於1000Å~42000Å之間,較佳的是介於5000Å~10000Å之間。傳導層包含一第二金屬不同於第一金屬,第二金屬可為鋁(Al)、銀(Ag)或銅(Cu)。阻障層包含第三金屬層及第四金屬層,或是複數個第三金屬層以及複數個第四金屬層互相交疊,例如鈦(Ti)/鉑(Pt)/鈦(Ti)/鉑(Pt)或者鈦(Ti)/鉑(Pt)/鈦(Ti)/鉑(Pt)/鈦(Ti)/鉑(Pt)。第三金屬層較佳的是比第四金屬層厚1倍到3倍。第三金屬層的厚度介於500 Å~1500 Å之間,第四金屬層的厚度介於250 Å~750 Å之間。第三金屬層與第四金屬層各包含一材料選自鉻(Cr)、鉑(Pt)、鈦(Ti)、鈦鎢(TiW)、鎢(W)及鋅(Zn)的群組。黏著層較佳的包含鉻(Cr)或銠(Rh)。黏著層的厚度較佳的是介於5Å~500Å之間,更佳的是介於50Å~150Å之間,使得黏著層薄得足以讓活性層123發出的光線穿透。於本創作之另一實施例中,第一電極墊141、第二電極墊161各包含一障壁層(圖未示),其具有抗濕及抗蝕性的金屬,例如鈦(Ti),位於第一電極墊141、第一延伸電極142、第二電極墊161、第二延伸電極162之最外側,包覆電極墊內部之其它金屬。障壁層僅於第一電極墊141及第二電極墊161上分別形成一開口以露出打線層,做為金屬打線的位置。障壁層的厚度介於50Å~5000Å之間,較佳的是介於100Å~1000Å之間,較佳的是介於50Å~200Å之間。In one embodiment of the present invention, the first electrode pad 141 and the second electrode pad 161 each include a wire layer for bonding the wire, a conductive layer under the wire layer, and a barrier layer at the wire layer and the conductive layer. An adhesive layer is used to increase the adhesion between the conductive layer and the transparent conductive layer 22 or the second semiconductor layer 122. The wire layer comprises a first metal, such as gold (Au). The thickness of the wire layer is between 1000 Å and 42,000 Å, preferably between 5,000 Å and 10,000 Å. The conductive layer comprises a second metal different from the first metal, and the second metal may be aluminum (Al), silver (Ag) or copper (Cu). The barrier layer comprises a third metal layer and a fourth metal layer, or a plurality of third metal layers and a plurality of fourth metal layers overlapping each other, such as titanium (Ti) / platinum (Pt) / titanium (Ti) / platinum (Pt) or titanium (Ti) / platinum (Pt) / titanium (Ti) / platinum (Pt) / titanium (Ti) / platinum (Pt). The third metal layer is preferably one to three times thicker than the fourth metal layer. The thickness of the third metal layer is between 500 Å and 1500 Å, and the thickness of the fourth metal layer is between 250 Å and 750 Å. The third metal layer and the fourth metal layer each comprise a material selected from the group consisting of chromium (Cr), platinum (Pt), titanium (Ti), titanium tungsten (TiW), tungsten (W), and zinc (Zn). The adhesive layer preferably contains chromium (Cr) or rhodium (Rh). The thickness of the adhesive layer is preferably between 5 Å and 500 Å, more preferably between 50 Å and 150 Å, so that the adhesive layer is thin enough to allow light from the active layer 123 to penetrate. In another embodiment of the present invention, the first electrode pad 141 and the second electrode pad 161 each include a barrier layer (not shown) having a moisture and corrosion resistant metal such as titanium (Ti). The outermost sides of the first electrode pad 141, the first extension electrode 142, the second electrode pad 161, and the second extension electrode 162 cover other metals inside the electrode pad. The barrier layer is formed with an opening on the first electrode pad 141 and the second electrode pad 161 to expose the wire bonding layer as a metal wire. The thickness of the barrier layer is between 50 Å and 5,000 Å, preferably between 100 Å and 1000 Å, preferably between 50 Å and 200 Å.
第一電極墊141、第二電極墊161之障壁層位於打線層及保護層20之間。The barrier layer of the first electrode pad 141 and the second electrode pad 161 is located between the wire bonding layer and the protective layer 20.
於本創作之一實施例中,發光元件1包含具有抗濕及抗蝕性的絕緣層(圖未示),例如氮化矽(SiNx),並包覆於第一電極墊141、第一延伸電極142、第二電極墊161、第二延伸電極162及半導體疊層12之最外側。發光元件1更包含保護層20位於絕緣層上,其中保護層20包含一材料與絕緣層之材料不同,例如保護層20包含氧化矽,絕緣層包含氮化矽(SiNx)。由氮化矽(SiNx)所構成的絕緣層位於包含氧化矽之保護層20及打線層之間。由氮化矽(SiNx)所構成的絕緣層僅於第一電極墊141及第二電極墊161上分別形成一開口以露出第一電極墊141及第二電極墊161,做為金屬打線的位置。In one embodiment of the present invention, the light-emitting element 1 includes an insulating layer (not shown) having moisture and corrosion resistance, such as tantalum nitride (SiNx), and is coated on the first electrode pad 141, the first extension. The outermost sides of the electrode 142, the second electrode pad 161, the second extension electrode 162, and the semiconductor laminate 12. The light-emitting element 1 further comprises a protective layer 20 on the insulating layer, wherein the protective layer 20 comprises a material different from the material of the insulating layer, for example, the protective layer 20 comprises ruthenium oxide and the insulating layer comprises tantalum nitride (SiNx). An insulating layer composed of tantalum nitride (SiNx) is located between the protective layer 20 containing germanium oxide and the wiring layer. An insulating layer made of tantalum nitride (SiNx) forms an opening on the first electrode pad 141 and the second electrode pad 161 to expose the first electrode pad 141 and the second electrode pad 161 as metal wiring positions. .
於本創作之一實施例中,第一電極墊141、第二電極墊161、第一延伸電極142及第二延伸電極162係於同一步驟或是不同步驟中形成於發光元件1之光摘出面上。第一電極墊141、第二電極墊161、第一延伸電極142及第二延伸電極162包含一厚度位於0.5 μm及5 μm之間。In one embodiment of the present invention, the first electrode pad 141, the second electrode pad 161, the first extension electrode 142, and the second extension electrode 162 are formed on the light extraction surface of the light-emitting element 1 in the same step or in different steps. on. The first electrode pad 141, the second electrode pad 161, the first extension electrode 142, and the second extension electrode 162 comprise a thickness between 0.5 μm and 5 μm.
如第1 圖所示,第一電極14包含第一電極墊141;以及第一延伸電極142延伸自第一電極墊141。第一電極墊141可做為封裝製程的打線墊或焊墊,包含一周界1410。於發光元件1的上視圖上,第一電極墊141之周界1410可為圓形、橢圓形、或矩形,其中矩形可包含一或多個圓弧角。第二電極16包含第二電極墊161;以及第二延伸電極162延伸自第二電極墊161。第二電極墊161包含一周界1610,於發光元件1的上視圖上,第二電極墊161之周界1610可為圓形、橢圓形、或矩形,其中矩形可包含一或多個圓弧角。As shown in FIG. 1, the first electrode 14 includes a first electrode pad 141; and the first extension electrode 142 extends from the first electrode pad 141. The first electrode pad 141 can be used as a wire pad or pad for the packaging process, including a perimeter 1410. In a top view of the light-emitting element 1, the perimeter 1410 of the first electrode pad 141 can be circular, elliptical, or rectangular, wherein the rectangle can include one or more arcuate corners. The second electrode 16 includes a second electrode pad 161; and the second extension electrode 162 extends from the second electrode pad 161. The second electrode pad 161 includes a perimeter 1610. The upper boundary 1610 of the second electrode pad 161 may be circular, elliptical, or rectangular, wherein the rectangle may include one or more arc angles. .
於本創作之一實施例中,第二電極墊161以及第二延伸電極162包含相同之材料,第二電極墊161包含一金屬層以與第二半導體層122直接接觸。金屬層具有一功函數大於4 eV或包含一金屬材料選自由鈦(Ti)、鎢(W)、鈮(Nb)、鋁(A1)、錫(Sn)、鉿(Hf)、釔(Y)、鐵(Fe)、鋯(Zr)、釩(V)、錳(Mn)、釓(Gd)、銥(Ir)、鉑(Pt)、釕(Ru)、鉭(Ta)及鉻(Cr)所構成之一群組。當第二半導體層122 為p型半導體時,金屬層與第二半導體層係形成高阻值接觸,例如蕭特基接觸。經由第二電極墊161而注入之一電流,不會或相對其他電流路徑較少由第二電極墊161直接注入第二半導體層122,主要是經由第二延伸電極162及透明導電層22擴散至第二半導體層122。In one embodiment of the present invention, the second electrode pad 161 and the second extension electrode 162 comprise the same material, and the second electrode pad 161 comprises a metal layer to be in direct contact with the second semiconductor layer 122. The metal layer has a work function greater than 4 eV or comprises a metal material selected from the group consisting of titanium (Ti), tungsten (W), niobium (Nb), aluminum (A1), tin (Sn), hafnium (Hf), and niobium (Y). , iron (Fe), zirconium (Zr), vanadium (V), manganese (Mn), gadolinium (Gd), iridium (Ir), platinum (Pt), ruthenium (Ru), ruthenium (Ta) and chromium (Cr) Which constitutes a group. When the second semiconductor layer 122 is a p-type semiconductor, the metal layer forms a high resistance contact with the second semiconductor layer, such as a Schottky contact. One current is injected through the second electrode pad 161, and is not directly injected into the second semiconductor layer 122 by the second electrode pad 161 with respect to other current paths, mainly through the second extension electrode 162 and the transparent conductive layer 22 to be diffused to The second semiconductor layer 122.
於本創作之一實施例中,第一電極墊141及第二電極墊161包含相同之金屬材料。第一電極墊141包含一金屬層以與第一半導體層121直接接觸,第一電極墊141之金屬層包含一金屬材料選自由鈦(Ti)、鎢(W)、鈮(Nb)、鋁(A1)、錫(Sn)、鉿(Hf)、釔(Y)、鐵(Fe)、鋯(Zr)、釩(V)、錳(Mn)、釓(Gd)、銥(Ir)、鉑(Pt)、釕(Ru)、鉭(Ta)及鉻(Cr)所構成之一群組。當第一半導體層121為n型半導體時,第一電極墊141之金屬層與第一半導體層係形成低阻值接觸,例如歐姆接觸。In one embodiment of the present invention, the first electrode pad 141 and the second electrode pad 161 comprise the same metal material. The first electrode pad 141 includes a metal layer to be in direct contact with the first semiconductor layer 121. The metal layer of the first electrode pad 141 comprises a metal material selected from the group consisting of titanium (Ti), tungsten (W), niobium (Nb), aluminum ( A1), tin (Sn), hafnium (Hf), yttrium (Y), iron (Fe), zirconium (Zr), vanadium (V), manganese (Mn), gadolinium (Gd), iridium (Ir), platinum ( A group consisting of Pt), ruthenium (Ru), tantalum (Ta), and chromium (Cr). When the first semiconductor layer 121 is an n-type semiconductor, the metal layer of the first electrode pad 141 forms a low resistance contact with the first semiconductor layer, such as an ohmic contact.
第3圖係第1圖之沿著B-B’線的發光元件1的部分放大圖。於本創作之一實施例中,如第1圖、第3圖所示,第二電流阻障層212位於透明導電層22及第二半導體層122之間,其包含一第一開口2120以露出第二半導體層122之表面,覆蓋於第二電流阻障層212上的透明導電層22包含一第二開口220以露出第二半導體層122之表面,透明導電層22之第二開口220包含一第二寬度與第二電流阻障層212之第一開口2120的第一寬度相同。第二電極墊161包含一第三寬度,第二延伸電極162包含一第四寬度,第一寬度大於第三寬度或第二寬度大於第三寬度,及第三寬度大於第四寬度。換言之,如第3圖所示,第二電流阻障層212之一側表面2120s與透明導電層22之一側表面220s大致齊平,位於同一面上。透明導電層22之側表面220s與第二電極墊161之側表面161s之間包含一距離和第二電流阻障層212之側表面2120s與第二電極墊161之側邊161s之間的一距離大致相同。Fig. 3 is a partially enlarged view of the light-emitting element 1 taken along the line B-B' in Fig. 1. In one embodiment of the present invention, as shown in FIG. 1 and FIG. 3, the second current blocking layer 212 is located between the transparent conductive layer 22 and the second semiconductor layer 122, and includes a first opening 2120 to be exposed. The surface of the second semiconductor layer 122, the transparent conductive layer 22 covering the second current blocking layer 212 includes a second opening 220 to expose the surface of the second semiconductor layer 122, and the second opening 220 of the transparent conductive layer 22 includes a second opening 220. The second width is the same as the first width of the first opening 2120 of the second current blocking layer 212. The second electrode pad 161 includes a third width, and the second extension electrode 162 includes a fourth width, the first width is greater than the third width or the second width is greater than the third width, and the third width is greater than the fourth width. In other words, as shown in FIG. 3, one side surface 2120s of the second current blocking layer 212 is substantially flush with one side surface 220s of the transparent conductive layer 22, and is located on the same plane. A distance between the side surface 220s of the transparent conductive layer 22 and the side surface 161s of the second electrode pad 161 and a distance between the side surface 2120s of the second current blocking layer 212 and the side edge 161s of the second electrode pad 161 Roughly the same.
第4圖為第3圖之一變化例,如第4圖所示,第二電流阻障層212位於透明導電層22及第二半導體層122之間,其包含一第一開口2120以露出第二半導體層122之表面,覆蓋於第二電流阻障層212上的透明導電層22包含一第二開口220以露出第二半導體層122之表面,第二電流阻障層212之第一開口2120包含一第一寬度大於透明導電層22之第二開口220所包含之一第二寬度。換言之,如第3圖所示,第二電流阻障層212之一側表面2120s為透明導電層22所包覆。透明導電層22之側表面220s較第二電流阻障層212之側表面2120s更靠近第二電極墊161之側邊161s。透明導電層22之側表面220s與第二電流阻障層212之側表面2120s之間包含一距離大於3μm或是位於1μm及6μm之間。4 is a modification of FIG. 3. As shown in FIG. 4, the second current blocking layer 212 is located between the transparent conductive layer 22 and the second semiconductor layer 122, and includes a first opening 2120 to expose the first The surface of the second semiconductor layer 122, the transparent conductive layer 22 covering the second current blocking layer 212 includes a second opening 220 to expose the surface of the second semiconductor layer 122, and the first opening 2120 of the second current blocking layer 212. A second width including a first width greater than the second opening 220 of the transparent conductive layer 22 is included. In other words, as shown in FIG. 3, one side surface 2120s of the second current blocking layer 212 is covered by the transparent conductive layer 22. The side surface 220s of the transparent conductive layer 22 is closer to the side 161s of the second electrode pad 161 than the side surface 2120s of the second current blocking layer 212. The side surface 220s of the transparent conductive layer 22 and the side surface 2120s of the second current blocking layer 212 comprise a distance greater than 3 μm or between 1 μm and 6 μm.
第5圖為第3圖之一變化例,如第5圖所示,第二電流阻障層212位於透明導電層22及第二半導體層122之間,其包含一第一開口2120以露出第二半導體層122之表面,覆蓋於第二電流阻障層212上的透明導電層22包含一第二開口220以露出第二半導體層122之表面及第二電流阻障層212之一部份上表面,第二電流阻障層212之第一開口2120包含一第一寬度小於透明導電層22之第二開口220所包含之一第二寬度。換言之,如第5圖所示,第二電流阻障層212之一側表面2120s與透明導電層22之一側表面220s為錯置。第二電流阻障層212之側表面2120s較透明導電層22之側表面220s更靠近第二電極墊161之側邊161s。透明導電層22之側表面220s與第二電流阻障層212之側表面2120s之間包含一距離大於3μm或是位於1μm及6μm之間。FIG. 5 is a modification of FIG. 3. As shown in FIG. 5, the second current blocking layer 212 is located between the transparent conductive layer 22 and the second semiconductor layer 122, and includes a first opening 2120 to expose the first The surface of the second semiconductor layer 122, the transparent conductive layer 22 overlying the second current blocking layer 212 includes a second opening 220 to expose the surface of the second semiconductor layer 122 and a portion of the second current blocking layer 212. The first opening 2120 of the second current blocking layer 212 includes a first width that is smaller than a second width of the second opening 220 of the transparent conductive layer 22. In other words, as shown in FIG. 5, one side surface 2120s of the second current blocking layer 212 and one side surface 220s of the transparent conductive layer 22 are misaligned. The side surface 2120s of the second current blocking layer 212 is closer to the side edge 161s of the second electrode pad 161 than the side surface 220s of the transparent conductive layer 22. The side surface 220s of the transparent conductive layer 22 and the side surface 2120s of the second current blocking layer 212 comprise a distance greater than 3 μm or between 1 μm and 6 μm.
於本創作之另一實施例中,上述第3、4、5圖之實施例中,第二電極墊161位於透明導電層22之第二開口220及第二電流阻障層212之第一開口2120中,更可延伸至第一開口2120及/或第二開口220外,覆蓋於透明導電層22及/或電流阻障層212上。In another embodiment of the present invention, in the embodiment of the third, fourth, and fifth embodiments, the second electrode pad 161 is located at the first opening 220 of the transparent conductive layer 22 and the first opening of the second current blocking layer 212. In 2120, the first opening 2120 and/or the second opening 220 may be extended to cover the transparent conductive layer 22 and/or the current blocking layer 212.
於本創作之另一實施例中,透明導電層22之側表面220s係為一斜面(圖未示),側表面220s與第二半導體層122的表面之間的夾角為一銳角。In another embodiment of the present invention, the side surface 220s of the transparent conductive layer 22 is a slope (not shown), and the angle between the side surface 220s and the surface of the second semiconductor layer 122 is an acute angle.
本創作之另一實施例中,第二電流阻障層212之側表面2120s係為一斜面(圖未示),側表面2120s與第二半導體層122的表面之間的夾角為一銳角。In another embodiment of the present invention, the side surface 2120s of the second current blocking layer 212 is a slope (not shown), and the angle between the side surface 2120s and the surface of the second semiconductor layer 122 is an acute angle.
於本創作之另一實施例中,第二電流阻障層212之側表面2120s包含兩個不同斜率的表面區(圖未示),其中較接近第二半導體層122之表面的一表面區具有一斜率大於另一表面區。In another embodiment of the present invention, the side surface 2120s of the second current blocking layer 212 includes two surface regions of different slopes (not shown), wherein a surface region closer to the surface of the second semiconductor layer 122 has One slope is greater than the other surface area.
於本創作之另一實施例中,如第1圖所示,第二延伸電極162包含一第一部份1621位於第二電流阻障層212之第一開口2120及透明導電層22之第二開口220中,以及一第二部份1622位於透明導電層22及第二電流阻障層212上。In another embodiment of the present invention, as shown in FIG. 1, the second extension electrode 162 includes a first portion 1621 located at the first opening 2120 of the second current blocking layer 212 and a second of the transparent conductive layer 22. The opening 220 and a second portion 1622 are located on the transparent conductive layer 22 and the second current blocking layer 212.
於本創作之另一實施例中,如第1圖所示,第二延伸電極162包含一第一部份1621及一第二部份1622,第一部份1621包含一第一端直接連接至第二電極墊161及一第二端連接至第二延伸電極162之第二部份1622,第一端包含一寬度大於第二端之一寬度。In another embodiment of the present invention, as shown in FIG. 1, the second extension electrode 162 includes a first portion 1621 and a second portion 1622. The first portion 1621 includes a first end directly connected to The second electrode pad 161 and a second end are connected to the second portion 1622 of the second extension electrode 162. The first end includes a width greater than a width of the second end.
於本創作之另一實施例中,如第1圖所示,第二延伸電極162包含一第一部份1621及一第二部份1622,第一部份1621包含一厚度或一寬度自第二電極墊161往第二延伸電極162之第二部份1622之方向上逐漸變小。In another embodiment of the present invention, as shown in FIG. 1, the second extension electrode 162 includes a first portion 1621 and a second portion 1622. The first portion 1621 includes a thickness or a width. The two electrode pads 161 gradually become smaller toward the second portion 1622 of the second extension electrode 162.
於本創作之另一實施例中,如第1圖所示,於半導體疊層12之一堆疊方向上,第二延伸電極162之第一部份1621之一上表面及第二部份1622之一上表面之間包含一階差。In another embodiment of the present invention, as shown in FIG. 1, in the stacking direction of one of the semiconductor layers 12, the upper surface of the first portion 1621 of the second extension electrode 162 and the second portion 1622 A first step difference is included between the upper surfaces.
於本創作之另一實施例中,第二電流阻障層212之側表面2120s與第二電極墊161之一側邊161s之間包含一距離大於3μm及/或透明導電層22之側表面220s與第二電極墊161之側邊161s之間包含一距離大於3μm。In another embodiment of the present invention, a side surface 2120s of the second current blocking layer 212 and a side edge 161s of the second electrode pad 161 include a side surface 220s having a distance greater than 3 μm and/or the transparent conductive layer 22. A distance greater than 3 μm is included between the side edges 161s of the second electrode pad 161.
於本創作之另一實施例中,第二電流阻障層212之側表面2120s與第二電極墊161之一側邊161s之間包含一距離大於3μm,並且小於10μm。透明導電層22之側表面220s與第二電極墊161之側邊161s之間包含一距離大於3μm,並且小於10μm。In another embodiment of the present invention, a side surface 2120s of the second current blocking layer 212 and a side edge 161s of the second electrode pad 161 comprise a distance greater than 3 [mu]m and less than 10 [mu]m. The side surface 220s of the transparent conductive layer 22 and the side edge 161s of the second electrode pad 161 comprise a distance greater than 3 μm and less than 10 μm.
於本創作之另一實施例中,如第1圖所示,第一電極墊141和第一延伸電極142為第二半導體層122所環繞,第一電極墊141和第二半導體層122之一側邊之間包含一第一最短距離,第一延伸電極142和第二半導體層122之一側邊之間包含一第二最短距離,第一最短距離大於或小於第二最短距離。於本創作之另一實施例中,第一最短距離與第二最短距離相同。In another embodiment of the present invention, as shown in FIG. 1, the first electrode pad 141 and the first extension electrode 142 are surrounded by the second semiconductor layer 122, and one of the first electrode pad 141 and the second semiconductor layer 122 A first shortest distance is included between the side edges, and a second shortest distance is included between the first extension electrode 142 and one of the sides of the second semiconductor layer 122. The first shortest distance is greater than or less than the second shortest distance. In another embodiment of the present creation, the first shortest distance is the same as the second shortest distance.
於本創作之另一實施例中,如第1圖所示,第一電極墊141和第一延伸電極142為第二半導體層122所環繞,第一延伸電極142之一第一邊1421和第二半導體層122之一第一邊1221之間包含一第三最短距離,第一延伸電極142之一第二邊1422和第二半導體層122之一第二邊1222之間包含一第四最短距離,第三最短距離與第四最短距離可相同或不同。第三最短距離或第四最短距離包含一距離位於1μm及10μm之間,較佳位於1μm及6μm之間。In another embodiment of the present invention, as shown in FIG. 1, the first electrode pad 141 and the first extension electrode 142 are surrounded by the second semiconductor layer 122, and the first side 1421 and the first side of the first extension electrode 142 A first shortest distance is included between the first side 1221 of the second semiconductor layer 122, and a fourth shortest distance is included between the second side 1422 of the first extension electrode 142 and the second side 1222 of the second semiconductor layer 122. The third shortest distance and the fourth shortest distance may be the same or different. The third shortest distance or the fourth shortest distance comprises a distance between 1 μm and 10 μm, preferably between 1 μm and 6 μm.
於本創作之另一實施例中,如第1圖所示,第二半導體層122之一第一邊1221與透明導電層22之一第一邊S1之間包含一第五最短距離,其中第五最短距離包含一距離位於1μm及15μm之間,較佳位於3μm及8μm之間。In another embodiment of the present invention, as shown in FIG. 1, a first short side of the first side 1221 of the second semiconductor layer 122 and the first side S1 of the transparent conductive layer 22 includes a fifth shortest distance, wherein The five shortest distances comprise a distance between 1 μm and 15 μm, preferably between 3 μm and 8 μm.
於本創作之另一實施例中,如第1圖所示,第一延伸電極142之一第一邊1421和第二半導體層122之一第一邊1221之間包含一第三最短距離,第二半導體層122之一第一邊1221與透明導電層22之一第一邊S1之間包含一第五最短距離,其中第三最短距離可與第五最短距離相同、第三最短距離大於第五最短距離或是第三最短距離小於第五最短距離。In another embodiment of the present invention, as shown in FIG. 1, a first shortest distance is included between the first side 1421 of the first extension electrode 142 and the first side 1221 of the second semiconductor layer 122. The first short side of one of the first side 1221 of the second semiconductor layer 122 and the first side S1 of the transparent conductive layer 22 includes a fifth shortest distance, wherein the third shortest distance is the same as the fifth shortest distance, and the third shortest distance is greater than the fifth The shortest distance or the third shortest distance is less than the fifth shortest distance.
如第1 圖、第2圖所示,複數個電流阻障層211’係不連續地形成於第一半導體層121之表面上。複數個電流阻障層211’及電流阻障層211係不連續地形成於第一半導體層121之表面上。第一電極墊141及第一延伸電極142覆蓋電流阻障層211及複數個電流阻障層211’。As shown in Figs. 1 and 2, a plurality of current blocking layers 211' are discontinuously formed on the surface of the first semiconductor layer 121. A plurality of current blocking layers 211' and current blocking layers 211 are discontinuously formed on the surface of the first semiconductor layer 121. The first electrode pad 141 and the first extension electrode 142 cover the current blocking layer 211 and the plurality of current blocking layers 211'.
第6圖係為依本創作另一實施例之一燈泡4之結構示意圖。燈泡4包括一燈罩602、一反射鏡604、一發光模組610、一燈座612、一散熱片614、一連接部616以及一電連接元件618。發光模組610包含一承載部606,以及一或複數個發光單元608位於承載部606上,其中一或複數個發光單元608可為前述實施例中的發光元件1。Figure 6 is a schematic view showing the structure of a bulb 4 according to another embodiment of the present invention. The light bulb 4 includes a lamp cover 602, a mirror 604, a light emitting module 610, a lamp holder 612, a heat sink 614, a connecting portion 616, and an electrical connection member 618. The light emitting module 610 includes a carrying portion 606, and one or more light emitting units 608 are located on the carrying portion 606. One or a plurality of the light emitting units 608 can be the light emitting elements 1 in the foregoing embodiments.
本創作所列舉之各實施例僅用以說明本創作,並非用以限制本創作之範圍。任何人對本創作所作之任何顯而易知之修飾或變更皆不脫離本創作之精神與範圍。The examples are set forth to illustrate the present invention and are not intended to limit the scope of the present invention. Any changes or modifications to this creation that are made by anyone without departing from the spirit and scope of this creation.
1‧‧‧發光元件
10‧‧‧基板
12‧‧‧半導體疊層
121‧‧‧第一半導體層
122‧‧‧第二半導體層
1221‧‧‧第一邊
1222‧‧‧第二邊
123‧‧‧活性層
14‧‧‧第一電極
141‧‧‧第一電極墊
142‧‧‧第一延伸電極
1421‧‧‧第一邊
1422‧‧‧第二邊
16‧‧‧第二電極
161‧‧‧第二電極墊
161s‧‧‧側邊
162‧‧‧第二延伸電極
1621‧‧‧第一部份
1622‧‧‧第二部份
20‧‧‧保護層
201‧‧‧開口
202‧‧‧開口
211‧‧‧第一電流阻障層
2120‧‧‧開口
2120s‧‧‧側表面
211’‧‧‧第一電流阻障層
212‧‧‧第二電流阻障層
22‧‧‧透明導電層
220‧‧‧開口
220s‧‧‧側表面
S1‧‧‧第一邊
S2‧‧‧第二邊
4‧‧‧燈泡
602‧‧‧燈罩
604‧‧‧反射鏡
606‧‧‧承載部
608‧‧‧發光單元
610‧‧‧發光模組
612‧‧‧燈座
614‧‧‧散熱片
616‧‧‧連接部
618‧‧‧電連接元件1‧‧‧Lighting elements
10‧‧‧Substrate
12‧‧‧Semiconductor laminate
121‧‧‧First semiconductor layer
122‧‧‧Second semiconductor layer
1221‧‧‧ first side
1222‧‧‧ second side
123‧‧‧Active layer
14‧‧‧First electrode
141‧‧‧First electrode pad
142‧‧‧First extended electrode
1421‧‧‧ first side
1422‧‧‧ second side
16‧‧‧second electrode
161‧‧‧Second electrode pad
161s‧‧‧ side
162‧‧‧Second extension electrode
1621‧‧‧ first part
1622‧‧‧Part 2
20‧‧‧Protective layer
201‧‧‧ openings
202‧‧‧ openings
211‧‧‧First current barrier layer
2120‧‧‧ openings
2120s‧‧‧ side surface
211'‧‧‧First current barrier layer
212‧‧‧Second current blocking layer
22‧‧‧Transparent conductive layer
220‧‧‧ openings
220s‧‧‧ side surface
S1‧‧‧ first side
S2‧‧‧ second side
4‧‧‧Light bulb
602‧‧‧shade
604‧‧‧Mirror
606‧‧‧Loading Department
608‧‧‧Lighting unit
610‧‧‧Lighting Module
612‧‧‧ lamp holder
614‧‧‧ Heat sink
616‧‧‧Connecting Department
618‧‧‧Electrical connection elements
第1圖係本創作一實施例所揭示之一發光元件1的透視圖。Fig. 1 is a perspective view of a light-emitting element 1 disclosed in an embodiment of the present invention.
第2圖係第1圖之沿著A-A’線的發光元件1的剖面圖。Fig. 2 is a cross-sectional view of the light-emitting element 1 taken along the line A-A' in Fig. 1.
第3圖係第1圖之沿著B-B’線的發光元件1的部分放大圖。Fig. 3 is a partially enlarged view of the light-emitting element 1 taken along the line B-B' in Fig. 1.
第4圖係本創作一實施例中,第1圖所揭示之發光元件1的部分放大圖。Fig. 4 is a partially enlarged view of the light-emitting element 1 disclosed in Fig. 1 in an embodiment of the present invention.
第5圖係本創作一實施例中,第1圖所揭示之發光元件1的部分放大圖。Fig. 5 is a partially enlarged view of the light-emitting element 1 disclosed in Fig. 1 in an embodiment of the present invention.
第6圖係本創作一實施例所揭示之一燈泡4之結構示意圖。Figure 6 is a schematic view showing the structure of a bulb 4 disclosed in an embodiment of the present invention.
122‧‧‧第二半導體層 122‧‧‧Second semiconductor layer
161‧‧‧第二電極墊 161‧‧‧Second electrode pad
161s‧‧‧側表面 161s‧‧‧ side surface
212‧‧‧電流阻障層 212‧‧‧ Current Barrier
2120s‧‧‧側表面 2120s‧‧‧ side surface
2120‧‧‧第一開口 2120‧‧‧ first opening
22‧‧‧透明導電層 22‧‧‧Transparent conductive layer
220s‧‧‧側表面 220s‧‧‧ side surface
220‧‧‧第二開口 220‧‧‧second opening
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