TWM547673U - Improved structure of wafer testing probe - Google Patents
Improved structure of wafer testing probe Download PDFInfo
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- TWM547673U TWM547673U TW105213842U TW105213842U TWM547673U TW M547673 U TWM547673 U TW M547673U TW 105213842 U TW105213842 U TW 105213842U TW 105213842 U TW105213842 U TW 105213842U TW M547673 U TWM547673 U TW M547673U
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- wafer
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- 239000000523 sample Substances 0.000 title claims description 70
- 238000012360 testing method Methods 0.000 title claims description 42
- 239000000758 substrate Substances 0.000 claims description 70
- 239000002184 metal Substances 0.000 claims description 16
- 230000004888 barrier function Effects 0.000 claims description 14
- 230000000903 blocking effect Effects 0.000 claims description 4
- 238000001514 detection method Methods 0.000 claims description 4
- 238000003780 insertion Methods 0.000 claims description 4
- 230000037431 insertion Effects 0.000 claims description 4
- 230000003014 reinforcing effect Effects 0.000 claims description 4
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 229920001343 polytetrafluoroethylene Polymers 0.000 claims description 2
- -1 polytetrafluoroethylene Polymers 0.000 claims 1
- 239000004810 polytetrafluoroethylene Substances 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 44
- 238000004519 manufacturing process Methods 0.000 description 13
- 238000013461 design Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000006378 damage Effects 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000007689 inspection Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000005489 elastic deformation Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 239000004809 Teflon Substances 0.000 description 1
- 229920006362 Teflon® Polymers 0.000 description 1
- 238000012550 audit Methods 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Measuring Leads Or Probes (AREA)
Description
本創作係提供一種晶圓測試針座結構改良，尤指針座之上基材及下基材間表面分別穿設有供複數探針以斜向插設之複數第一穿孔及複數第二穿孔，其二相鄰探針一側穿過之二第一穿孔的間距為大於另側穿過之二第二穿孔的間距，以使基板易於設計、製造，進而降低整體成本。 The present invention provides a wafer test needle holder structure improvement, in particular, a plurality of first perforations and a plurality of second perforations are respectively disposed on the surface between the substrate and the lower substrate on the pointer base for the plurality of probes to be obliquely inserted. The distance between the two first through holes on one side of the adjacent probes is greater than the distance between the second through holes on the other side, so that the substrate is easy to design and manufacture, thereby reducing the overall cost.
現代半導體的製造包含了複數步驟，係包括微影、物質沈積與蝕刻步驟，以在一片單獨的半導體矽晶圓上形成出複數半導體裝置或積體電路晶片；目前所製造常用的半導體晶圓的直徑可以是六吋或六吋以上，其中直徑十二吋的晶圓為一種常見的尺寸；然而，在半導體製造的製程中，該晶圓上之晶片可能會因複雜的製造程序而產生變異、毀損等問題以具有一些缺陷。 The fabrication of modern semiconductors involves multiple steps, including lithography, material deposition, and etching steps to form a plurality of semiconductor devices or integrated circuit wafers on a single semiconductor germanium wafer; currently used semiconductor wafers are commonly fabricated. The diameter can be six or more, and the 12-inch diameter wafer is a common size; however, in the semiconductor manufacturing process, the wafer on the wafer may be mutated due to complicated manufacturing procedures. Problems such as damage have some drawbacks.
所以在將積體電路晶片利用晶圓切割方式從半導體晶圓分離之前，會對複數晶片進行電性表現與可靠度的測試，並同時在一既定期間對其進行激發(如晶圓級燒入測試)，而這些測試通常可能包含佈局與線路圖對比(layout versus schematic；LVS)的確認、靜態電流測試(IDDq testing)等，進而藉由測試電路系統的自動測試設備(automatic test equipment；ATE)來捕捉與分析從每個晶片或受測裝置(device under test；DUT)所產生之測試結果電性訊號，以判定所測式之晶片是否具有缺陷。 Therefore, before the integrated circuit chip is separated from the semiconductor wafer by wafer dicing, the electrical performance and reliability of the plurality of wafers are tested, and at the same time, they are excited during a predetermined period (such as wafer level burning). Test), and these tests may usually include layout versus schematic (LVS) verification, IDDq testing, etc., and then test the automatic test equipment of the circuit system (automatic test) Equipment; ATE) to capture and analyze the electrical signal of the test result generated from each wafer or device under test (DUT) to determine whether the tested wafer has defects.
再者，為了幫助晶圓級燒入測試(burn-in testing)與同時捕捉來自晶圓上的多個晶片的電性訊號，是使用習知的DUT板或探針卡，其探針卡通常是安裝於自動測試設備中，並作為晶片或受測裝置與自動測試設備之間的界面，而探針卡在本質上為印刷電路板(printed circuit board；PCB)，為包含複數金屬電性探針，用以與晶圓之半導體晶片上所對應之複數電性接點(contact)或接頭(terminal)接觸，由於每一個晶片具有複數接點或接頭，且每一個接點或接頭皆必須進行測試，所以，一般的晶圓級測試需要進行遠超過1000個晶片接點或接頭來與ATE測試電路系統間形成電性連接以進行測試，因此，為了實施精確地晶圓級測試，必須將大量的探針卡接點與晶圓上的晶片接點精確對準及形成確實的電性連接。 Furthermore, in order to assist in wafer-level burn-in testing and simultaneous capture of electrical signals from multiple wafers on a wafer, a conventional DUT board or probe card is used, and the probe card is usually Is installed in the automatic test equipment, and serves as the interface between the wafer or the device under test and the automatic test equipment, and the probe card is essentially a printed circuit board (PCB), which is composed of a plurality of metal electrical probes. a pin for contacting a plurality of electrical contacts or terminals on a semiconductor wafer of a wafer, since each wafer has a plurality of contacts or connectors, and each contact or connector must be Testing, therefore, general wafer-level testing requires far more than 1000 wafer contacts or connectors to make electrical connections to the ATE test circuitry for testing, so in order to perform accurate wafer-level testing, a large number of The probe card contacts are precisely aligned with the wafer contacts on the wafer and form a positive electrical connection.
然而，請參閱第四圖所示，係為習用側視剖面之使用狀態圖，由圖中可清楚看出，該電路基板A一側表面為裝設有安裝環B，並於安裝環B內部形成有收納空間B1，且收納空間B1內裝設有電性連接於電路基板A一側表面並具預設複數接點(圖中未示出)之板體B2，再於安裝環B相對於電路基板A另側表面上裝設有探針固定裝置C，而探針固定裝置C為由上基座C1及下基座C2所組成，其上基座C1及下基座C2表面上分別穿設有相對應之複數第一通孔C11及複數第二通孔C21 ，再於複數第一通孔C11及複數第二通孔C21中分別穿設有複數測試探針D，其複數測試探針D一端為分別穿過複數第一通孔C11，以接觸至板體B2表面之預設複數接點，而複數測試探針D另端則分別穿過複數第二通孔C21，以供電性接觸至待測晶圓E上所對應之複數測試點E1上，即可對待測晶圓E進行測試之作業，以檢測該待測晶圓E是否具有缺陷。 However, please refer to the fourth figure, which is a state diagram of the use of the side view of the conventional one. It can be clearly seen from the figure that the surface of one side of the circuit substrate A is provided with a mounting ring B and is inside the mounting ring B. The storage space B1 is formed, and the storage space B1 is provided with a plate body B2 electrically connected to the surface of the circuit board A side and having a predetermined plurality of contacts (not shown), and then the mounting ring B is opposite to the mounting ring B. The probe substrate C is mounted on the other side surface of the circuit board A, and the probe fixing device C is composed of the upper base C1 and the lower base C2, and the upper base C1 and the lower base C2 are respectively worn on the surface. A corresponding plurality of first through holes C11 and a plurality of second through holes C21 are provided And a plurality of test probes D are respectively inserted into the plurality of first through holes C11 and the plurality of second through holes C21. The plurality of test probes D are respectively passed through the plurality of first through holes C11 to contact the plate body. The preset plurality of contacts on the surface of the B2, and the other ends of the plurality of test probes D respectively pass through the plurality of second through holes C21 to electrically contact the plurality of test points E1 corresponding to the wafer E to be tested, The test of the wafer to be tested E is performed to detect whether the wafer E to be tested has defects.
由於電子科技及半導體製程技術的日新月異且朝輕、薄、短、小化發展，以致於待測晶圓E越做越小，而待測晶圓E上之複數測試點E1間的距離也隨之縮減，所以複數測試探針D間的距離必須愈排愈密，導致用於傳遞電路基板A與測試探針D間之電性測試訊號與電源訊號的板體B2上的預設複數接點之間距亦須縮減，但是，目前板體B2所發生的技術瓶頸是其若要支援過小的複數測試點E1間距，則需耗費高額的製造成本才可製作出板體B2，以致於造成製程上諸多不便之處。 Due to the rapid development of electronic technology and semiconductor process technology and the development of light, thin, short and small, the wafer E to be tested is getting smaller and smaller, and the distance between the multiple test points E1 on the wafer E to be tested is also Therefore, the distance between the plurality of test probes D must be more and more dense, resulting in a predetermined complex contact on the board B2 for transmitting the electrical test signal between the circuit board A and the test probe D and the power signal. The distance between the two must also be reduced. However, the current technical bottleneck of the board B2 is that if it wants to support the small test point E1 spacing, it will cost a lot of manufacturing cost to make the board B2, so that the process is on the process. Many inconveniences.
是以，要如何設法解決上述習用之缺失與不便，即為相關業者所亟欲研究改善之方向所在。 Therefore, how to solve the above-mentioned lack of inconvenience and inconvenience is the direction that the relevant industry is eager to study and improve.
故，創作人有鑑於上述缺失，乃搜集相關資料，經由多方評估及考量，並以從事於此行業累積之多年經驗，經由不斷試作及修改，始設計出此種晶圓測試針座結構改良的新型專利者。 Therefore, in view of the above-mentioned shortcomings, the creators have collected relevant information, and through multi-party evaluation and consideration, and through years of experience in the industry, through continuous trial and modification, the design of such wafer test probe holders has been designed. New patents.
本創作之主要目的乃在於該電路板底面電性接觸有基板，並於基板相對電路板另側面設置有針座，其針座所具之上基材及下基材間表面分別穿設有複數第一穿孔及複數第二穿孔，以供複數探針以斜向方式 穿設，而二相鄰探針一側穿過之二第一穿孔的間距為大於另側穿過之二第二穿孔的間距，便可使二探針於基板上的間距亦大於二探針於晶圓上的間距，以增加基板尺寸，進而提高複數探針接觸至基板準確度，達到產品良率之效果，且因間距增長亦可使基板線路佈局更易於設計，藉此使基板達到較易製作、降低設計及降低製造成本之目的。 The main purpose of the present invention is that the bottom surface of the circuit board is electrically connected to the substrate, and the needle holder is disposed on the other side of the substrate opposite to the circuit board, and the surface between the upper substrate and the lower substrate of the needle holder is respectively provided with a plurality of surfaces. a first perforation and a plurality of second perforations for the plurality of probes in an oblique manner The spacing between the two first through holes on one side of the two adjacent probes is greater than the distance between the second through holes on the other side, so that the distance between the two probes on the substrate is greater than that of the two probes. The spacing on the wafer increases the size of the substrate, thereby improving the accuracy of the plurality of probes contacting the substrate, achieving the effect of the product yield, and the spacing of the substrate can also make the layout of the substrate easier to design, thereby making the substrate more Easy to make, reduce design and reduce manufacturing costs.
本創作之次要目的乃在於該針座之複數探針表面為塗佈有供阻隔電磁訊號之阻隔層，當利用外部檢測儀器來對晶圓進行檢測作業時，即可透過阻隔層來避免相鄰探針間相互接觸而產生短路現象，且亦可有效防止傳輸的過程中所產生之電磁波、靜電或雜訊等來影響各構件間相互干擾之缺失發生，藉此確保整體訊號傳輸的穩定性與可靠度，進而達到提升整體穩定使用性及不易毀損之目的。 The secondary purpose of this creation is that the surface of the plurality of probes of the needle holder is coated with a barrier layer for blocking electromagnetic signals. When an external inspection instrument is used to detect the wafer, the barrier layer can be used to avoid the phase. The short-circuit phenomenon occurs when the adjacent probes are in contact with each other, and the electromagnetic waves, static electricity, or noise generated during the transmission process can be effectively prevented from affecting the mutual interference between the components, thereby ensuring the stability of the overall signal transmission. And the reliability, and thus achieve the purpose of improving the overall stability of use and not easy to damage.
本創作之另一目的乃在於該針座之複數探針為以斜插的方式插設於上基材及下基材間，當利用外部檢測儀器來對晶圓進行檢測作業時，其複數探針二端之複數第一端部及複數第二端部便會受到抵壓而使第一端部及複數第二端部間產生彈性變形，以確保複數探針與待檢測晶圓上之複數檢測點間保持穩定接觸狀態，進而達到使整體訊號穩定傳輸之目的。 Another purpose of the present invention is that the plurality of probes of the needle holder are inserted obliquely between the upper substrate and the lower substrate, and when the external inspection instrument is used to detect the wafer, the multiple probes are used. The first end portion and the second plurality of end portions of the two ends of the needle are pressed to elastically deform between the first end portion and the plurality of second end portions to ensure a plurality of complex probes and a plurality of wafers to be inspected The stable contact state is maintained between the detection points, thereby achieving the purpose of stably transmitting the overall signal.
本創作之再一目的乃在於該針座以斜插的方式穿設有複數探針，其具有彈性變形之特性，即可省略使用諸多複雜結構、外觀設計來使複數探針產生彈性變形之特性，藉以降低複數探針製造、加工的流程，進而達到減少複數探針製造成本之目的。 A further object of the present invention is that the needle holder is provided with a plurality of probes in a diagonal insertion manner, and has the characteristics of elastic deformation, thereby omitting the use of many complicated structures and designs to elastically deform the plurality of probes. In order to reduce the manufacturing process and processing of the complex probes, thereby reducing the manufacturing cost of the complex probes.
1‧‧‧電路板 1‧‧‧ boards
11‧‧‧第一金屬接點 11‧‧‧First metal joint
12‧‧‧第二金屬接點 12‧‧‧Second metal joint
13‧‧‧加強環墊 13‧‧‧Enhanced ring mat
14‧‧‧固定環墊 14‧‧‧Fixed ring pad
140‧‧‧容置空間 140‧‧‧ accommodating space
2‧‧‧基板 2‧‧‧Substrate
21‧‧‧第一接點 21‧‧‧First contact
211‧‧‧錫球 211‧‧‧ solder balls
22‧‧‧第二接點 22‧‧‧second junction
3‧‧‧針座 3‧‧‧ needle seat
30‧‧‧穿置空間 30‧‧‧Place space
31‧‧‧上基材 31‧‧‧Upper substrate
311‧‧‧第一穿孔 311‧‧‧First perforation
32‧‧‧下基材 32‧‧‧Substrate
321‧‧‧第二穿孔 321‧‧‧Second perforation
33‧‧‧探針 33‧‧‧Probe
331‧‧‧第一端部 331‧‧‧ first end
332‧‧‧第二端部 332‧‧‧ second end
333‧‧‧阻隔層 333‧‧‧Barrier
34‧‧‧夾持片 34‧‧‧Clamping piece
4‧‧‧晶圓 4‧‧‧ Wafer
41‧‧‧檢測點 41‧‧‧Checkpoints
A‧‧‧電路基板 A‧‧‧ circuit board
B‧‧‧安裝環 B‧‧‧Installation ring
B1‧‧‧收納空間 B1‧‧‧ storage space
B2‧‧‧板體 B2‧‧‧ board
C‧‧‧探針固定裝置 C‧‧‧ probe fixture
C1‧‧‧上基座 C1‧‧‧Upper base
C11‧‧‧第一通孔 C11‧‧‧ first through hole
C2‧‧‧下基座 C2‧‧‧ lower base
C21‧‧‧第二通孔 C21‧‧‧Second through hole
D‧‧‧探針 D‧‧‧ probe
E‧‧‧待測晶圓 E‧‧‧ wafer under test
E1‧‧‧測試點 E1‧‧‧ test points
第一圖 係為本創作之側視剖面圖。 The first figure is a side profile view of the creation.
第二圖 係為本創作之a部份放大圖。 The second picture is a partial enlargement of this creation.
第三圖 係為本創作側視剖面之使用狀態圖。 The third figure is a state diagram of the use of the side profile of the creation.
第四圖 係為習用側視剖面之使用狀態圖。 The fourth figure is a state diagram of the use of the conventional side profile.
為達成上述目的及功效，本創作所採用之技術手段及其構造，茲繪圖就本創作之較佳實施例詳加說明其特徵與功能如下，俾利完全瞭解。 In order to achieve the above objectives and effects, the technical means and structure of the present invention are described in detail in the preferred embodiment of the present invention, and the features and functions are as follows.
請參閱第一、二圖所示，係為本創作之側視剖面圖及a部份放大圖，由圖中所示可以清楚看出，本創作係包括電路板1、基板2及針座3，其中：該電路板1內部為具有預設線路佈局，並於電路板1表面設有複數第一金屬接點11，而電路板1底面則設有複數第二金屬接點12。 Please refer to the first and second figures for a side view and a partial enlarged view of the creation. As can be clearly seen from the figure, the creation includes the circuit board 1, the substrate 2 and the header 3 The inside of the circuit board 1 has a preset circuit layout, and a plurality of first metal contacts 11 are disposed on the surface of the circuit board 1, and a plurality of second metal contacts 12 are disposed on the bottom surface of the circuit board 1.
該基板2內部為具有預設線路佈局且電性接觸於電路板1底面處，並於基板2相鄰於電路板1一側表面設有透過複數錫球211來與複數第二金屬接點12形成電性接觸之複數第一接點21，而基板2相對於複數第一接點21另側表面則設有複數第二接點22。 The substrate 2 has a predetermined circuit layout and is electrically connected to the bottom surface of the circuit board 1. The substrate 2 is provided with a plurality of solder balls 211 and a plurality of second metal contacts 12 adjacent to the surface of the circuit board 1. A plurality of first contacts 21 are formed to be electrically contacted, and a plurality of second contacts 22 are provided on the other side of the substrate 2 with respect to the plurality of first contacts 21.
該針座3為設置於基板2相對電路板1另側面且包括上基材31、下基材32及複數探針33，其中該上基材31及下基材32之間形成有穿置空間30，且上基材31表面穿設有複數第一穿孔311， 而下基材32表面則穿設有複數第二穿孔321，再於複數第一穿孔311及複數第二穿孔321中以斜向插設方式穿設有導電材質所製成之複數探針33，其複數探針33一側設有穿過複數第一穿孔311並與基板2之複數第二接點22形成電性接觸之複數第一端部331，而複數探針33另側則設有穿過複數第二穿孔321處之複數第二端部332，且複數探針33位於穿置空間30內之表面上塗佈有供阻隔電磁訊號之阻隔層333，其二相鄰探針33一側穿過之二第一穿孔311的間距為大於另側穿過之二第二穿孔321的間距。 The needle holder 3 is disposed on the other side of the substrate 2 opposite to the circuit board 1 and includes an upper substrate 31, a lower substrate 32, and a plurality of probes 33. The insertion space is formed between the upper substrate 31 and the lower substrate 32. 30, and the surface of the upper substrate 31 is provided with a plurality of first through holes 311, On the surface of the lower substrate 32, a plurality of second through holes 321 are formed, and a plurality of probes 33 made of a conductive material are inserted into the plurality of first through holes 311 and the plurality of second through holes 321 in an oblique manner. The plurality of probes 33 are provided with a plurality of first ends 331 passing through the plurality of first through holes 311 and making electrical contact with the plurality of second contacts 22 of the substrate 2, and the plurality of probes 33 are provided on the other side. The plurality of second ends 332 of the plurality of second through holes 321 are disposed, and the surface of the plurality of probes 33 located in the wearing space 30 is coated with a barrier layer 333 for blocking electromagnetic signals, and two adjacent probes 33 are on one side. The spacing of the first through holes 311 passing through the two is greater than the spacing of the second through holes 321 passing through the other side.
上述之電路板1表面且位於複數第一金屬接點11相對內側處裝設有加強環墊13，再於電路板1底面且位於複數第二金屬接點12外側處裝設有固定環墊14(mounting ring)，且固定環墊14內部形成有供基板2置入之容置空間140，其加強環墊13、電路板1及固定環墊14為依序疊層，並利用鎖固元件(如螺絲)穿設結合定位，即可透過加強環墊13及固定環墊14來增加電路板1整體強度，以避免電路板1於高溫或外力環境下產生彎折或變形等情況；而該針座3之上基材31及下基材32間夾持有內部鏤空之夾持片34，且夾持片34可透過鎖固元件穿設固定於固定環墊14上呈一結合定位，藉以提高上基材31及下基材32間的支撐力。 A reinforcing ring pad 13 is disposed on the surface of the circuit board 1 and opposite to the inner side of the plurality of first metal contacts 11 , and a fixing ring pad 14 is disposed on the bottom surface of the circuit board 1 and outside the plurality of second metal contacts 12 . A mounting ring 140 is formed in the fixing ring pad 14 , and the reinforcing ring pad 13 , the circuit board 1 and the fixing ring pad 14 are sequentially stacked and the locking component is used ( If the screw is worn and combined, the reinforcing ring pad 13 and the fixing ring pad 14 can be used to increase the overall strength of the circuit board 1 to avoid bending or deformation of the circuit board 1 under high temperature or external force; The clamping piece 34 of the inner hollow is sandwiched between the base material 31 and the lower base material 32 of the seat 3, and the clamping piece 34 can be fixedly fixed to the fixing ring pad 14 through the locking component to form a combined position, thereby improving The supporting force between the upper substrate 31 and the lower substrate 32.
再者，上述複數探針33表面塗佈之阻隔層333可為聚四氟乙烯(Polytetrafluoroethene)，俗稱鐵氟龍，且阻隔層333的厚度較佳為介於3μm~5μm之間。 Furthermore, the barrier layer 333 coated on the surface of the plurality of probes 33 may be polytetrafluoroethene, commonly known as Teflon, and the thickness of the barrier layer 333 is preferably between 3 μm and 5 μm.
再請參閱第三圖，係為本創作側視剖面之使用狀態圖，由 圖中可清楚看出，本創作使用時，該電路板1為可藉由複數第一金屬接點11來與外部檢測儀器(圖中未示出)形成電性連接，同時，其整體可受外部檢測儀器驅動而使複數探針33之複數第二端部332抵觸至待檢測晶圓4表面之複數檢測點41上以形成電性連接狀態，以供進行檢測作業，且複數探針33獲取之電性測試訊號與電源訊號可透過基板2傳遞至電路板1，再傳輸至電路板1外部檢測儀器來得知待檢測晶圓4是否具有缺陷，藉以完成本創作之使用。 Please refer to the third figure, which is the use state diagram of the side profile of the creation. As can be clearly seen from the figure, when the present invention is used, the circuit board 1 can be electrically connected to an external detecting instrument (not shown) by a plurality of first metal contacts 11 and at the same time, the whole can be affected by The external detecting instrument is driven to cause the plurality of second ends 332 of the plurality of probes 33 to abut against the plurality of detecting points 41 on the surface of the wafer 4 to be detected to form an electrical connection state for performing the detecting operation, and the plurality of probes 33 are acquired. The electrical test signal and the power signal can be transmitted to the circuit board 1 through the substrate 2, and then transmitted to the external detecting device of the circuit board 1 to know whether the wafer 4 to be inspected has defects, thereby completing the use of the present invention.
本創作針座3之上基材31及下基材32中為斜向穿設有複數探針33，而複數探針33二側則分別電性接觸於基板2之複數第二接點22及待檢測晶圓4表面之複數檢測點41，由於二相鄰探針33一側穿過之二第一穿孔311的間距為大於另側穿過之二第二穿孔321的間距，所以基板2與二探針33形成接觸之二第二接點22的間距亦大於晶圓4與二探針33形成接觸之二檢測點41的間距，以致於二第二接點22的間距相較於習用間距更為增長，且使基板2尺寸可供增大，藉以提高複數探針33接觸至複數第二接點22準確度，進而提升產品良率，且因間距增長亦可使基板2上蝕刻出複數第二接點22較容易，以使基板2的線路佈局更易於設計，藉此使基板2達到較易製作、降低設計及降低製造成本之效用。 In the substrate 31 and the lower substrate 32 of the present invention, a plurality of probes 33 are obliquely disposed, and the two sides of the plurality of probes 33 are electrically connected to the plurality of second contacts 22 of the substrate 2, respectively. The plurality of detecting points 41 of the surface of the wafer 4 to be inspected, because the spacing of the two first through holes 311 passing through the two adjacent probes 33 is greater than the spacing of the second through holes 321 passing through the other side, the substrate 2 and The spacing between the second contacts 22 forming the contacts 2 and the second contacts 22 is also greater than the spacing between the wafers 4 and the two detecting points 41 where the two probes 33 are in contact, so that the spacing of the second contacts 22 is smaller than the conventional spacing. The growth of the substrate 2 is increased, so that the accuracy of the plurality of probes 33 contacting the plurality of second contacts 22 is improved, thereby improving the product yield, and the substrate 2 can be etched by the pitch. The second contact 22 is easier to make the layout of the substrate 2 easier to design, thereby making the substrate 2 easier to manufacture, lowering the design, and reducing the manufacturing cost.
再者，本創作針座3之複數探針33表面上為塗佈有供阻隔電磁訊號之阻隔層333，當利用外部檢測儀器來對晶圓4進行檢測作業時，即可透過阻隔層333來避免二相鄰探針33間相互接觸而產生短路現象，且由於阻隔層333可阻隔電磁訊號，便可有效防止本創作傳輸 的過程中所產生之電磁波、靜電或雜訊等來影響本創作構件間相互干擾之缺失發生，藉此確保整體訊號傳輸的穩定性與可靠度，進而達到本創作穩定使用及不易毀損之效用。 Furthermore, the surface of the plurality of probes 33 of the present needle holder 3 is coated with a barrier layer 333 for blocking electromagnetic signals. When the wafer 4 is detected by an external detecting device, the barrier layer 333 can be transmitted through the barrier layer 333. The short-circuit phenomenon occurs when the two adjacent probes 33 are in contact with each other, and since the barrier layer 333 can block the electromagnetic signal, the creative transmission can be effectively prevented. The electromagnetic waves, static electricity or noise generated during the process affect the occurrence of mutual interference between the components of the creation, thereby ensuring the stability and reliability of the overall signal transmission, thereby achieving the effect of stable use and non-destruction of the creation.
然而，本創作針座3之複數探針33為以斜插的方式插設於上基材31及下基材32間，由於複數探針33為呈傾斜狀，所以當利用外部檢測儀器來對晶圓4進行檢測作業時，其複數探針33二端之複數第一端部331及複數第二端部332便會受到抵壓而使第一端部331及複數第二端部332間產生彈性變形，以確保複數探針33與待檢測晶圓4上之複數檢測點41間保持穩定接觸狀態，進而使整體訊號穩定傳輸，且因複數探針33為以斜插的方式便可具有彈性變形之特性，即可省略使用諸多複雜結構、外觀設計來使複數探針33產生彈性變形之特性，以降低複數探針33製造、加工的流程，藉此達到降低複數探針33製造成本之效用。 However, the plurality of probes 33 of the present needle holder 3 are inserted between the upper substrate 31 and the lower substrate 32 in a diagonally inserted manner. Since the plurality of probes 33 are inclined, they are used by an external detecting device. When the wafer 4 performs the inspection operation, the plurality of first end portions 331 and the plurality of second end portions 332 at the two ends of the plurality of probes 33 are pressed to generate the first end portion 331 and the plurality of second end portions 332. Elastic deformation to ensure stable contact between the plurality of probes 33 and the plurality of detection points 41 on the wafer 4 to be inspected, thereby stably transmitting the overall signal, and the plurality of probes 33 can be elasticized by oblique insertion. The characteristics of the deformation can omit the use of many complicated structures and designs to elastically deform the plurality of probes 33, thereby reducing the flow of manufacturing and processing of the plurality of probes 33, thereby achieving the utility of reducing the manufacturing cost of the plurality of probes 33. .
是以，本創作為主要針對該電路板1底面電性接觸有基板2，而基板2相對電路板1另側面設置有針座3，其針座3之上基材31及下基材32間表面分別穿設有供複數探針33以斜向方式插設之複數第一穿孔311及複數第二穿孔321，由於二相鄰探針33一側穿過之二第一穿孔311的間距為大於另側穿過之二第二穿孔321的間距，便可使基板2更易於設計、製造，進而達到降低整體成本之效用，故舉凡可達成前述效果之結構、裝置皆應受本創作所涵蓋，此種簡易修飾及等效結構變化，均應同理包含於本創作之專利範圍內，合予陳明。 Therefore, the present invention is mainly for the bottom surface of the circuit board 1 to be electrically contacted with the substrate 2, and the substrate 2 is provided with a needle holder 3 on the other side of the circuit board 1, and between the substrate 31 and the lower substrate 32 of the needle holder 3 The plurality of first through holes 311 and the plurality of second through holes 321 are inserted through the surface of the plurality of probes 33 in an oblique manner, and the distance between the first through holes 311 passing through the two adjacent probes 33 is greater than The other side passes through the spacing of the second through holes 321 to make the substrate 2 easier to design and manufacture, thereby achieving the effect of reducing the overall cost. Therefore, the structures and devices that can achieve the aforementioned effects should be covered by the present invention. Such simple modifications and equivalent structural changes shall be included in the scope of the patent of this creation and shall be combined with Chen Ming.
綜上所述，本創作上述晶圓測試針座結構改良於使用時， 為確實能達到其功效及目的，故本創作誠為一實用性優異之創作，為符合新型專利之申請要件，爰依法提出申請，盼 審委早日賜准本案，以保障創作人之辛苦創作，倘若 鈞局審委有任何稽疑，請不吝來函指示，創作人定當竭力配合，實感德便。 In summary, the above-mentioned wafer test probe holder structure is improved in use. In order to achieve its efficacy and purpose, the creation is a practical and excellent creation. In order to meet the application requirements of the new patent, the application is submitted in accordance with the law, and the audit committee is expected to grant the case as soon as possible to protect the creator's hard work. If there is any doubt in the arbitral tribunal, please do not hesitate to give instructions to the creator, and the creator will try his best to cooperate with him.
1‧‧‧電路板 1‧‧‧ boards
12‧‧‧第二金屬接點 12‧‧‧Second metal joint
14‧‧‧固定環墊 14‧‧‧Fixed ring pad
140‧‧‧容置空間 140‧‧‧ accommodating space
2‧‧‧基板 2‧‧‧Substrate
21‧‧‧第一接點 21‧‧‧First contact
22‧‧‧第二接點 22‧‧‧second junction
3‧‧‧針座 3‧‧‧ needle seat
30‧‧‧穿置空間 30‧‧‧Place space
31‧‧‧上基材 31‧‧‧Upper substrate
311‧‧‧第一穿孔 311‧‧‧First perforation
32‧‧‧下基材 32‧‧‧Substrate
321‧‧‧第二穿孔 321‧‧‧Second perforation
33‧‧‧探針 33‧‧‧Probe
331‧‧‧第一端部 331‧‧‧ first end
332‧‧‧第二端部 332‧‧‧ second end
333‧‧‧阻隔層 333‧‧‧Barrier
Claims (8)
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| TW105213842U TWM547673U (en) | 2016-09-08 | 2016-09-08 | Improved structure of wafer testing probe |
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| Application Number | Priority Date | Filing Date | Title |
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| TW105213842U TWM547673U (en) | 2016-09-08 | 2016-09-08 | Improved structure of wafer testing probe |
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| Publication Number | Publication Date |
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| TWM547673U true TWM547673U (en) | 2017-08-21 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI689731B (en) * | 2019-03-18 | 2020-04-01 | 中華精測科技股份有限公司 | Probe card testing device and signal switching module thereof |
| TWI704357B (en) * | 2018-11-02 | 2020-09-11 | 旺矽科技股份有限公司 | Suitable for probe modules with multiple units to be tested with inclined conductive contacts |
-
2016
- 2016-09-08 TW TW105213842U patent/TWM547673U/en not_active IP Right Cessation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI704357B (en) * | 2018-11-02 | 2020-09-11 | 旺矽科技股份有限公司 | Suitable for probe modules with multiple units to be tested with inclined conductive contacts |
| TWI689731B (en) * | 2019-03-18 | 2020-04-01 | 中華精測科技股份有限公司 | Probe card testing device and signal switching module thereof |
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