TWM524561U - Light emitting device - Google Patents

Light emitting device Download PDF

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Publication number
TWM524561U
TWM524561U TW105202892U TW105202892U TWM524561U TW M524561 U TWM524561 U TW M524561U TW 105202892 U TW105202892 U TW 105202892U TW 105202892 U TW105202892 U TW 105202892U TW M524561 U TWM524561 U TW M524561U
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Taiwan
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semiconductor layer
light
electrode
peripheral portion
substrate
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TW105202892U
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Chinese (zh)
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Wen-Wei Yang
Cheng-Chieh Chang
Kang-Hung Liu
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Au Optronics Corp
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Priority to TW105202892U priority Critical patent/TWM524561U/en
Priority to CN201620441127.1U priority patent/CN205863214U/en
Publication of TWM524561U publication Critical patent/TWM524561U/en

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Description

發光裝置Illuminating device

本新型係關於一種發光裝置,特別是有關於一種光場型趨於對稱之發光裝置。The present invention relates to a light-emitting device, and more particularly to a light-emitting device in which a light field type tends to be symmetrical.

照明的手段隨著時代的演進,從以燃燒物品的方式做為光源的火把、油燈及蠟燭等光源,演進成以通電方式發光的白熾燈泡、日光燈管、省電燈泡及發光二極體等光源。其中,發光二極體形之發光裝置由於體積小且耗電量低,故現在有許多相關業者投入相關領域的發展。With the evolution of the times, the means of illumination evolved from light sources such as torches, oil lamps and candles that use light-burning articles as light sources to incandescent light bulbs, fluorescent tubes, power-saving bulbs, and light-emitting diodes that emit light. Among them, the light-emitting diode-shaped light-emitting device has a small volume and low power consumption, so many related companies are now investing in related fields.

發光二極體之發光裝置中,可藉由對發光晶片之不同類型的半導體層通電,而令不同類型的半導體層之間的發光半導體層發出光線。現有的發光裝置之結構中,第一類型之半導體層設置於基板上,第二類型之半導體層偏移設置於第一類型之半導體層之一側,介於二者之間之發光半導體層隨著第二類型之半導體層而偏於第一類型之半導體層之一側。二個電極分別覆蓋於發光晶片之兩側以分別電性連接於第一類型之半導體層及第二類型之半導體層。In a light-emitting device of a light-emitting diode, light-emitting semiconductor layers between different types of semiconductor layers emit light by energizing different types of semiconductor layers of the light-emitting chip. In the structure of the existing light-emitting device, the first type of semiconductor layer is disposed on the substrate, and the second type of semiconductor layer is offset on one side of the first type of semiconductor layer, and the light-emitting semiconductor layer interposed therebetween The second type of semiconductor layer is biased to one side of the first type of semiconductor layer. The two electrodes respectively cover the two sides of the light emitting chip to be electrically connected to the first type of semiconductor layer and the second type of semiconductor layer, respectively.

然而,如此之發光裝置由於發光晶片之結構兩側不對稱,故所發出之光線之光場型亦不對稱。However, such a light-emitting device has an asymmetrical optical field pattern due to the asymmetrical nature of the structure of the light-emitting chip.

有鑑於以上的問題,本新型提出一種發光裝置,其發出之光線之光場型可趨於對稱。In view of the above problems, the present invention proposes a light-emitting device in which the light field pattern of the emitted light can be symmetrical.

本新型提出一種發光裝置,其包括基板、第一半導體層、第二半導體層、第一電極及第二電極。第一半導體層設置於基板上。第一半導體層包括相連之本體部及周圍部,本體部凸出周圍部。周圍部以鏡像對稱的方式環繞本體部。第二半導體層設置於本體部上,且第二半導體層圖案與本體部實質相同。第一電極至少部分設置於周圍部上且電性連接於第一半導體層。第二電極至少部分設置於第二半導體層上且電性連接於第二半導體層。The present invention provides a light emitting device including a substrate, a first semiconductor layer, a second semiconductor layer, a first electrode, and a second electrode. The first semiconductor layer is disposed on the substrate. The first semiconductor layer includes a connected body portion and a peripheral portion, and the body portion protrudes from the surrounding portion. The surrounding portion surrounds the body portion in a mirror symmetrical manner. The second semiconductor layer is disposed on the body portion, and the second semiconductor layer pattern is substantially the same as the body portion. The first electrode is at least partially disposed on the peripheral portion and electrically connected to the first semiconductor layer. The second electrode is at least partially disposed on the second semiconductor layer and electrically connected to the second semiconductor layer.

根據本新型之發光裝置,藉由第一半導體層及第二半導體層之形狀為對稱配置,而使得形成於第一半導體層及第二半導體層之間之發光接面所所產生之光線亦可趨於對稱。此外,藉由本體部凸出周圍部,沿發光接面之側向發散之光線中至少部分光線可經由位於周圍部之第一電極之反射而遠離基板,以利此光線之應用,藉此還可提升發光裝置之光取出率。According to the light-emitting device of the present invention, the shape of the first semiconductor layer and the second semiconductor layer are symmetrically arranged, so that the light generated by the light-emitting junction formed between the first semiconductor layer and the second semiconductor layer can be It tends to be symmetrical. In addition, by projecting the surrounding portion of the body portion, at least part of the light ray diverging along the lateral direction of the illuminating junction can be separated from the substrate by reflection of the first electrode located at the surrounding portion, thereby facilitating the application of the light. The light extraction rate of the light-emitting device can be improved.

以上之關於本新型內容之說明及以下之實施方式之說明係用以示範與解釋本新型之精神與原理,並且提供本新型之專利申請範圍更進一步之解釋。The above description of the present invention and the following description of the embodiments are intended to illustrate and explain the spirit and principles of the present invention, and to provide further explanation of the scope of the present patent application.

以下在實施方式中詳細敘述本新型之詳細特徵以及優點,其內容足以使任何本領域中具通常知識者了解本新型之技術內容並據以實施,且根據本說明書所揭露之內容、申請專利範圍及圖式,任何本領域中具通常知識者可輕易地理解本新型相關之目的及優點。以下之實施例係進一步詳細說明本新型之觀點,但非以任何觀點限制本新型之範疇。此外,本案之圖式中之元件比例關係僅為示意以便於說明,而非用以限制本新型之範疇。The detailed features and advantages of the present invention are described in detail in the following detailed description of the embodiments of the present invention. And the drawings, any one of ordinary skill in the art can readily understand the related objects and advantages of the present invention. The following examples are intended to describe the present invention in further detail, but do not limit the scope of the present invention in any way. In addition, the component ratios in the drawings are merely illustrative for the purpose of illustration and are not intended to limit the scope of the present invention.

請參照圖1A、圖1B及圖1C,圖1A繪示依照本新型之一實施例之發光裝置100之俯視示意圖,圖1B繪示圖1A之發光裝置100沿B-B剖面之側視剖面示意圖,圖1C繪示圖1A之發光裝置100沿C-C剖面之側視剖面示意圖。1A, FIG. 1B and FIG. 1C, FIG. 1A is a top plan view of a light-emitting device 100 according to an embodiment of the present invention, and FIG. 1B is a side cross-sectional view of the light-emitting device 100 of FIG. 1A along a BB cross-section. 1C is a side cross-sectional view of the light emitting device 100 of FIG. 1A taken along the CC section.

於本實施例中,發光裝置100包括基板110、第一半導體層121、第二半導體層122、絕緣層130、第一電極141及第二電極142。基板110具有第一表面S1,且可為導體或非導體。第一半導體層121設置於基板110之第一表面S1上,以令第一表面S1鄰接第一半導體層121。In the embodiment, the light emitting device 100 includes a substrate 110, a first semiconductor layer 121, a second semiconductor layer 122, an insulating layer 130, a first electrode 141, and a second electrode 142. The substrate 110 has a first surface S1 and may be a conductor or a non-conductor. The first semiconductor layer 121 is disposed on the first surface S1 of the substrate 110 such that the first surface S1 abuts the first semiconductor layer 121.

其中,第一半導體層121包括相連之本體部1211及周圍部1212。第一半導體層121之周圍部1212形成於第一半導體層121之本體部1211周圍,且本體部1211凸出周圍部1212。亦即本體部1211相對於基板110之高度大於周圍部1212相對於基板110之高度。第一半導體層121之本體部1211於俯視時可為方形,但並非限定於此,亦可為矩形或其他邊長數量之多邊形。第一半導體層121之周圍部1212具有背向基板110之一周圍部上表面1212a以及位於第一半導體層121之周圍部1212外圍之一周圍部側表面1212b。The first semiconductor layer 121 includes a connected body portion 1211 and a peripheral portion 1212. The peripheral portion 1212 of the first semiconductor layer 121 is formed around the body portion 1211 of the first semiconductor layer 121, and the body portion 1211 protrudes from the peripheral portion 1212. That is, the height of the body portion 1211 relative to the substrate 110 is greater than the height of the peripheral portion 1212 relative to the substrate 110. The main body portion 1211 of the first semiconductor layer 121 may have a square shape in plan view, but is not limited thereto, and may be a rectangle or a number of other sides. The peripheral portion 1212 of the first semiconductor layer 121 has a peripheral portion upper surface 1212a facing away from the substrate 110 and a peripheral side surface 1212b located at a periphery of the peripheral portion 1212 of the first semiconductor layer 121.

第一半導體層121之周圍部1212以鏡像對稱的方式環繞第一半導體層121之本體部1211。以圖1A為例,第一半導體層121之本體部1211具有對應於俯視時之形狀中心P0。第一軸線L1平行於X軸方向且穿越形狀中心P0。第一軸線L1與周圍部側表面1212b相交於第一點P1及第二點P2。形狀中心P0到第一點P1的距離為D1,形狀中心P0到第二點P2的距離為D2,其中D1=D2。The peripheral portion 1212 of the first semiconductor layer 121 surrounds the body portion 1211 of the first semiconductor layer 121 in a mirror-symmetrical manner. Taking FIG. 1A as an example, the body portion 1211 of the first semiconductor layer 121 has a shape center P0 corresponding to a plan view. The first axis L1 is parallel to the X-axis direction and passes through the shape center P0. The first axis L1 intersects the peripheral portion side surface 1212b at the first point P1 and the second point P2. The distance from the shape center P0 to the first point P1 is D1, and the distance from the shape center P0 to the second point P2 is D2, where D1 = D2.

於另一方向上,第二軸線L2不平行於第一軸線L1。第二軸線例如平行於Y軸方向且穿越形狀中心P0。第二軸線L2與周圍部側表面1212b相交於第三點P3及第四點P4。形狀中心P0到第三點P3的距離為D3,形狀中心P0到第四點P4的距離為D4,其中D3=D4。因此,周圍部1212相對於穿過形狀中心P0且平行於XZ平面之對稱面可為鏡像對稱。周圍部1212相對於穿過形狀中心P0且平行於YZ平面之對稱面亦可為鏡像對稱。In the other direction, the second axis L2 is not parallel to the first axis L1. The second axis is, for example, parallel to the Y-axis direction and passes through the shape center P0. The second axis L2 intersects the peripheral portion side surface 1212b at the third point P3 and the fourth point P4. The distance from the shape center P0 to the third point P3 is D3, and the distance from the shape center P0 to the fourth point P4 is D4, where D3 = D4. Therefore, the peripheral portion 1212 may be mirror symmetrical with respect to a plane of symmetry passing through the shape center P0 and parallel to the XZ plane. The symmetry plane of the peripheral portion 1212 with respect to the center of the shape P0 and parallel to the YZ plane may also be mirror symmetrical.

第一半導體層121之周圍部上表面1212a傾斜於基板110之第一表面S1。周圍部上表面1212a接近本體部1211之位置至基板110之第一表面S1之距離D5小於周圍部上表面1212a之外圍至基板110之第一表面S1之距離D6。The peripheral portion upper surface 1212a of the first semiconductor layer 121 is inclined to the first surface S1 of the substrate 110. The distance D5 from the position of the peripheral portion upper surface 1212a close to the body portion 1211 to the first surface S1 of the substrate 110 is smaller than the distance D6 from the periphery of the peripheral portion upper surface 1212a to the first surface S1 of the substrate 110.

第二半導體層122設置於本體部1211上,且第二半導體層122之圖案與本體部1211之圖案實質相同。第二半導體層122具有第二表面S2,第二表面S2鄰接第一半導體層121之本體部1211。詳細而言,第二半導體層122之第二表面S2位於第一半導體層121及第二半導體層122之間之交接面。第一半導體層121可為n型半導體及p型半導體之其中一者,第二半導體層122可為其中另一者。第一半導體層121之本體部1211以及第二半導體層122之間之第二表面S2可形成p-n接面(p-n junction),以做為發光接面。周圍部上表面1212a 與第二表面S2 具有一夾角θ,且夾角θ之範圍可為45°≦θ≦70°。第二表面S2可實質上平行於基板110之第一表面S1。The second semiconductor layer 122 is disposed on the body portion 1211, and the pattern of the second semiconductor layer 122 is substantially the same as the pattern of the body portion 1211. The second semiconductor layer 122 has a second surface S2 that abuts the body portion 1211 of the first semiconductor layer 121. In detail, the second surface S2 of the second semiconductor layer 122 is located at the interface between the first semiconductor layer 121 and the second semiconductor layer 122. The first semiconductor layer 121 may be one of an n-type semiconductor and a p-type semiconductor, and the second semiconductor layer 122 may be the other of them. The second surface S2 between the body portion 1211 of the first semiconductor layer 121 and the second semiconductor layer 122 may form a p-n junction as a light-emitting junction. The peripheral upper surface 1212a has an included angle θ with the second surface S2, and the included angle θ may range from 45° ≦ θ ≦ 70°. The second surface S2 may be substantially parallel to the first surface S1 of the substrate 110.

絕緣層130覆蓋部分第一半導體層121。詳言之,於本實施例中,絕緣層130可覆蓋本體部1211未形成第二半導體層122之表面,以及覆蓋部分周圍部1212之周圍部上表面1212a及周圍部側表面1212b。絕緣層130還覆蓋第二半導體層122,且絕緣層130具有開口131以露出部分第二半導體層122,也就是露出部分第二半導體層122的上表面S2’,其中第二半導體層122的上表面S2’和第二半導體122的第二表面S2相對應。換句話說,第二表面S2在上表面S2’之對側。絕緣層130之材質可為光穿透絕緣材質。The insulating layer 130 covers a portion of the first semiconductor layer 121. In detail, in the present embodiment, the insulating layer 130 may cover the surface of the body portion 1211 where the second semiconductor layer 122 is not formed, and cover the peripheral portion upper surface 1212a and the peripheral portion side surface 1212b of the peripheral portion 1212. The insulating layer 130 also covers the second semiconductor layer 122, and the insulating layer 130 has an opening 131 to expose a portion of the second semiconductor layer 122, that is, expose an upper surface S2' of a portion of the second semiconductor layer 122, wherein the upper portion of the second semiconductor layer 122 The surface S2' corresponds to the second surface S2 of the second semiconductor 122. In other words, the second surface S2 is on the opposite side of the upper surface S2'. The material of the insulating layer 130 may be a light penetrating insulating material.

第一電極141之一部分設置於未被絕緣層130所覆蓋的周圍部1212上,且電性連接至周圍部1212。第一電極141之此部分可設置於周圍部上表面1212a及周圍部側表面1212b。絕緣層130中斷第一電極141而使第一電極141並未圍繞第一半導體層121完整一周。也就是說,第一電極141部分覆蓋第一半導體層121。第一電極141之其他部分可延伸至基板110上,本新型不以此為限。第一電極141於周圍部上表面1212a之部分具有第三表面S3及第四表面S4。第三表面S3鄰接第一半導體層121。第四表面S4位於第三表面S3之對側。第一電極141之第四表面S4至基板110之第一表面S1的最大距離D7小於第二半導體層122之第二表面S2至基板110之第一表面S1的距離D8。第一電極141之材質可為光反射導電材質。One of the first electrodes 141 is partially disposed on the peripheral portion 1212 not covered by the insulating layer 130, and is electrically connected to the peripheral portion 1212. This portion of the first electrode 141 may be disposed on the peripheral portion upper surface 1212a and the peripheral portion side surface 1212b. The insulating layer 130 interrupts the first electrode 141 such that the first electrode 141 does not completely surround the first semiconductor layer 121. That is, the first electrode 141 partially covers the first semiconductor layer 121. The other portion of the first electrode 141 may extend onto the substrate 110, and the present invention is not limited thereto. The first electrode 141 has a third surface S3 and a fourth surface S4 at a portion of the peripheral portion upper surface 1212a. The third surface S3 is adjacent to the first semiconductor layer 121. The fourth surface S4 is located on the opposite side of the third surface S3. The maximum distance D7 of the fourth surface S4 of the first electrode 141 to the first surface S1 of the substrate 110 is smaller than the distance D8 of the second surface S2 of the second semiconductor layer 122 to the first surface S1 of the substrate 110. The material of the first electrode 141 may be a light reflective conductive material.

第二電極142之一部分設置於第二半導體層122上,且經由開口131電性連接至第二半導體層122。第二電極142之其他部分可設置於絕緣層130上,且可延伸至基板110上。第一半導體層121及第二電極142可藉由絕緣層130電性絕緣。第二電極142之材質可為光穿透導電材質。A portion of the second electrode 142 is disposed on the second semiconductor layer 122 and electrically connected to the second semiconductor layer 122 via the opening 131. Other portions of the second electrode 142 may be disposed on the insulating layer 130 and may extend onto the substrate 110. The first semiconductor layer 121 and the second electrode 142 may be electrically insulated by the insulating layer 130. The material of the second electrode 142 may be a light transmissive conductive material.

利用第一電極141及第二電極142分別對於第一半導體層121及第二半導體層122施加偏壓時,第一半導體層121及第二半導體層122之間的發光接面可發出光線。由於第一半導體層121及第二半導體層122本身形狀為對稱,故發光接面所發出之光線亦趨於對稱。此外,發光接面所發出之光線中,除了沿遠離基板110之方向發散之光線可直接供使用者使用以外,沿發光接面之側向發散之光線中至少部分光線可經由位於周圍部上表面1212a之第一電極141之反射而遠離基板110,以供使用者使用。藉此可提升發光裝置100之光取出率。When the first electrode 141 and the second electrode 142 are biased to the first semiconductor layer 121 and the second semiconductor layer 122, respectively, the light-emitting junction between the first semiconductor layer 121 and the second semiconductor layer 122 emits light. Since the shapes of the first semiconductor layer 121 and the second semiconductor layer 122 are symmetrical, the light emitted by the light-emitting junctions tends to be symmetrical. In addition, in the light emitted by the light-emitting junction, except that the light diverging in the direction away from the substrate 110 can be directly used by the user, at least part of the light diverging along the lateral direction of the light-emitting junction can pass through the upper surface of the surrounding portion. The first electrode 141 of 1212a is reflected away from the substrate 110 for use by the user. Thereby, the light extraction rate of the light-emitting device 100 can be improved.

請參照圖2A至圖8A、圖2B至圖8B及圖2C至圖8C,圖2A至圖8A繪示製造圖1A之發光裝置100之俯視流程示意圖,圖2B至圖8B繪示圖2A至圖8A沿B-B剖面之製造發光裝置100之側視流程示意圖,圖2C至圖8C繪示圖2A至圖8A沿C-C剖面之製造發光裝置100之側視流程示意圖。2A to FIG. 8A, FIG. 2B to FIG. 8B and FIG. 2C to FIG. 8C, FIG. 2A to FIG. 8A are schematic diagrams showing a planar view of the light-emitting device 100 of FIG. 1A, and FIG. 2B to FIG. 8A is a schematic side view of the manufacturing of the light-emitting device 100 along the BB section, and FIGS. 2C to 8C are schematic side views of the manufacturing of the light-emitting device 100 along the CC section of FIGS. 2A to 8A.

如圖2A、圖2B及圖2C所示,於基板110上設置半導體元件1200。此半導體元件1200可由依序堆疊有第一半導體層1210及第二半導體層1220之半導體晶圓經過晶圓切割(dicing)而獲得。故半導體元件1200亦可包括依序堆疊之第一半導體層1210及第二半導體層1220。其中,第一半導體層1210較第二半導體層1220接近基板110。As shown in FIGS. 2A, 2B, and 2C, a semiconductor element 1200 is provided on the substrate 110. The semiconductor device 1200 can be obtained by wafer dicing of semiconductor wafers in which the first semiconductor layer 1210 and the second semiconductor layer 1220 are sequentially stacked. Therefore, the semiconductor device 1200 may further include a first semiconductor layer 1210 and a second semiconductor layer 1220 stacked in sequence. The first semiconductor layer 1210 is closer to the substrate 110 than the second semiconductor layer 1220.

如圖3A、圖3B及圖3C所示或者如圖4A、圖4B及圖4C所示,於第二半導體層1220上設置用以形成抗蝕層150之光阻材料(photoresist)。使用者可利用掩膜161或掩膜162及特定波長之光線圖案化此光阻材料而形成具有指定圖案之抗蝕層150。掩膜161及掩膜162之圖案可為鏡像對稱。於圖3A、圖3B及圖3C之場合中,可將正性光阻材料均勻設置於第二半導體層1220上。掩膜161於中央部分R1即預計形成圖1B之第一半導體層121之本體部1211之位置為配置成遮避光線,於周圍部分R2即預計形成圖1B之第一半導體層121之周圍部1212之位置為配置成可供部分光線通過。掩膜161於周圍部分R2為漸層配置,其中於周圍部分R2之掩膜161愈接近中央部分R1則可供愈多光線通過,於周圍部分R2之掩膜161愈遠離中央部分R1則可供愈少光線通過。As shown in FIG. 3A, FIG. 3B and FIG. 3C or as shown in FIGS. 4A, 4B and 4C, a photoresist for forming the resist layer 150 is provided on the second semiconductor layer 1220. The user can use the mask 161 or the mask 162 and the light of a specific wavelength to pattern the photoresist material to form the resist layer 150 having the specified pattern. The pattern of the mask 161 and the mask 162 may be mirror symmetrical. In the case of FIGS. 3A, 3B, and 3C, a positive photoresist material may be uniformly disposed on the second semiconductor layer 1220. The mask 161 is disposed at a central portion R1 at a position where the body portion 1211 of the first semiconductor layer 121 of FIG. 1B is expected to be disposed so as to be shielded from light, and the peripheral portion 1212 of the first semiconductor layer 121 of FIG. 1B is expected to be formed in the peripheral portion R2. The position is configured to allow partial light to pass. The mask 161 is in a gradation configuration in the peripheral portion R2, wherein the closer the mask 161 of the peripheral portion R2 is to the central portion R1, the more light is allowed to pass, and the mask 161 of the peripheral portion R2 is further away from the central portion R1. The less light passes.

因此,將掩膜161放置於光阻材料上方且照射特定波長之光線後,受遮光之光阻材料可被保留於第二半導體層1220上,受到愈多光線照射之光阻材料其保留於第二半導體層1220上之厚度愈薄,受到愈少光線照射之光阻材料其保留於第二半導體層1220上之厚度愈厚。因此由光阻材料形成之抗蝕層150中,相應於中央部分R1之厚度最厚,相應於周圍部分R2愈接近中央部分R1之厚度最薄,相應於周圍部分R2愈遠離中央部分R1之厚度則逐漸增厚。而抗蝕層150之抗蝕能力隨著厚度愈厚則愈強,厚度愈薄則愈弱。Therefore, after the mask 161 is placed over the photoresist material and irradiated with light of a specific wavelength, the light-shielding photoresist material can be retained on the second semiconductor layer 1220, and the photoresist material that is exposed to more light remains in the first The thinner the thickness of the second semiconductor layer 1220, the thicker the photoresist which is less irradiated with light remains on the second semiconductor layer 1220. Therefore, in the resist layer 150 formed of the photoresist material, the thickness corresponding to the central portion R1 is the thickest, and the thickness of the peripheral portion R2 which is closer to the central portion R1 is the thinnest, corresponding to the thickness of the peripheral portion R2 from the thickness of the central portion R1. It gradually thickens. The corrosion resistance of the resist layer 150 is stronger as the thickness is thicker, and the thinner the thickness, the weaker.

另外,於圖4A、圖4B及圖4C之場合中,可將負性光阻材料均勻設置於第二半導體層1220上。掩膜162於中央部分R1即預計形成圖1B之第一半導體層121之本體部1211之位置為配置成不遮避光線而可令最多光線通過,於周圍部分R2即預計形成圖1B之第一半導體層121之周圍部1212之位置為配置成可供部分光線通過。掩膜161於周圍部分R2為漸層配置,其中於周圍部分R2之掩膜161愈接近中央部分R1則可供愈少光線通過,於周圍部分R2之掩膜161愈遠離中央部分R1則可供愈多光線通過。In addition, in the case of FIGS. 4A, 4B, and 4C, the negative photoresist material may be uniformly disposed on the second semiconductor layer 1220. The mask 162 is disposed at the central portion R1, that is, the body portion 1211 of the first semiconductor layer 121 of FIG. 1B is expected to be disposed so as not to block the light, so that the most light can pass, and the surrounding portion R2 is expected to form the first portion of FIG. 1B. The peripheral portion 1212 of the semiconductor layer 121 is positioned to allow a portion of the light to pass therethrough. The mask 161 is in a gradation configuration in the peripheral portion R2, wherein the closer the mask 161 of the peripheral portion R2 is to the central portion R1, the less light is allowed to pass, and the mask 161 at the peripheral portion R2 is further away from the central portion R1. The more light passes through.

因此,將掩膜162放置於光阻材料上方且照射特定波長之光線後,受到充足光線照射之光阻材料可被保留於第二半導體層1220上,受到愈少光線照射之光阻材料其保留於第二半導體層1220上之厚度愈薄,受到愈多光線照射之光阻材料其保留於第二半導體層1220上之厚度愈厚。因此與圖3B及圖3C相似地,由光阻材料形成之抗蝕層150中,相應於中央部分R1之厚度最厚,相應於周圍部分R2愈接近中央部分R1之厚度最薄,相應於周圍部分R2愈遠離中央部分R1之厚度則逐漸增厚。而抗蝕層150之抗蝕能力隨著厚度愈厚則愈強,厚度愈薄則愈弱。Therefore, after the mask 162 is placed over the photoresist material and irradiated with light of a specific wavelength, the photoresist material irradiated with sufficient light can be retained on the second semiconductor layer 1220, and the photoresist is retained by the less light. The thinner the thickness on the second semiconductor layer 1220, the thicker the photoresist is exposed to the second semiconductor layer 1220. Therefore, similarly to FIG. 3B and FIG. 3C, in the resist layer 150 formed of the photoresist material, the thickness corresponding to the central portion R1 is the thickest, and the thickness of the peripheral portion R2 corresponding to the central portion R1 is the thinnest, corresponding to the periphery. The portion R2 is gradually thicker as it goes away from the thickness of the central portion R1. The corrosion resistance of the resist layer 150 is stronger as the thickness is thicker, and the thinner the thickness, the weaker.

如圖5A、圖5B及圖5C所示,藉由抗蝕層150之抗蝕能力差異對圖2A、圖2B及圖2C中之半導體元件1200進行蝕刻,以將其加工為具有本實施例之形狀之第一半導體層121及第二半導體層122,且移除剩餘之圖3B及圖3C或圖4B及圖4C中所示之抗蝕層150。所蝕刻而成之第一半導體層121及第二半導體層122中,相應於中央部分R1之半導體材料厚度最厚,相應於周圍部分R2愈接近中央部分R1之半導體材料厚度最薄,相應於周圍部分R2愈遠離中央部分R1之半導體材料厚度則逐漸增厚。As shown in FIGS. 5A, 5B, and 5C, the semiconductor device 1200 of FIGS. 2A, 2B, and 2C is etched by the difference in resist resistance of the resist layer 150 to be processed to have the present embodiment. The first semiconductor layer 121 and the second semiconductor layer 122 are shaped, and the remaining resist layer 150 shown in FIGS. 3B and 3C or 4B and 4C is removed. In the first semiconductor layer 121 and the second semiconductor layer 122 which are etched, the thickness of the semiconductor material corresponding to the central portion R1 is the thickest, and the thickness of the semiconductor material corresponding to the central portion R1 corresponding to the peripheral portion R2 is the thinnest, corresponding to the periphery. The thickness of the semiconductor material in which the portion R2 is farther away from the central portion R1 is gradually thickened.

因此,所形成之第一半導體層121可包括相連之本體部1211及周圍部1212。周圍部1212可以鏡像對稱的方式形成於本體部1211周圍,且本體部1211凸出周圍部1212。周圍部上表面1212a為斜面。周圍部上表面1212a之外圍至基板110之距離大於周圍部上表面1212a接近本體部1211之位置至基板110之距離。第二半導體層122設置於本體部1211上,且其圖案與本體部1211實質相同。本體部1211以及第二半導體層122之間可形成發光接面。Therefore, the formed first semiconductor layer 121 may include the connected body portion 1211 and the peripheral portion 1212. The peripheral portion 1212 can be formed around the body portion 1211 in a mirror symmetrical manner, and the body portion 1211 protrudes from the peripheral portion 1212. The peripheral portion upper surface 1212a is a sloped surface. The distance from the periphery of the peripheral portion upper surface 1212a to the substrate 110 is greater than the distance from the position of the peripheral portion upper surface 1212a to the body portion 1211 to the substrate 110. The second semiconductor layer 122 is disposed on the body portion 1211 and has a pattern substantially the same as the body portion 1211. A light-emitting junction may be formed between the body portion 1211 and the second semiconductor layer 122.

如圖6A、圖6B及圖6C所示,形成絕緣層130覆蓋第一半導體層121及第二半導體層122。其中,絕緣層130可藉由沉積絕緣材料而形成,亦可對於第一半導體層121及第二半導體層122本身之半導體材料進行鈍化而形成。As shown in FIGS. 6A, 6B, and 6C, the insulating layer 130 is formed to cover the first semiconductor layer 121 and the second semiconductor layer 122. The insulating layer 130 may be formed by depositing an insulating material, or may be formed by passivating the semiconductor material of the first semiconductor layer 121 and the second semiconductor layer 122 itself.

如圖7A、圖7B及圖7C所示,去除部分絕緣層130以露出部分周圍部1212,且於絕緣層130上形成開口131。開口131可露出部分第二半導體層122。詳細而言,開口131可露出部分第二半導體層122之上表面S2’。至少一部分的絕緣層130自第二半導體層122延伸至基板110。As shown in FIGS. 7A, 7B, and 7C, a portion of the insulating layer 130 is removed to expose a portion of the peripheral portion 1212, and an opening 131 is formed on the insulating layer 130. The opening 131 may expose a portion of the second semiconductor layer 122. In detail, the opening 131 may expose a portion of the upper surface S2' of the second semiconductor layer 122. At least a portion of the insulating layer 130 extends from the second semiconductor layer 122 to the substrate 110.

如圖8A、圖8B及圖8C所示,形成第一電極141及第二電極142。第一電極141之一部分設置於周圍部1212上,且電性連接至周圍部1212。第一電極141之其他部分可延伸至基板110上。第二電極142之一部分設置於第二半導體層122上,且經由開口131電性連接至第二半導體層122。第二電極142之其他部分可設置於絕緣層130上,且可延伸至基板110上。第一半導體層121及第二電極142可藉由絕緣層130電性絕緣。As shown in FIGS. 8A, 8B, and 8C, the first electrode 141 and the second electrode 142 are formed. One of the first electrodes 141 is partially disposed on the peripheral portion 1212 and electrically connected to the peripheral portion 1212. Other portions of the first electrode 141 may extend onto the substrate 110. A portion of the second electrode 142 is disposed on the second semiconductor layer 122 and electrically connected to the second semiconductor layer 122 via the opening 131. Other portions of the second electrode 142 may be disposed on the insulating layer 130 and may extend onto the substrate 110. The first semiconductor layer 121 and the second electrode 142 may be electrically insulated by the insulating layer 130.

另外,請參照圖9A、9B及圖9C,圖9A繪示依照本新型之另一實施例之發光裝置200之俯視示意圖,圖9B繪示圖9A之發光裝置200沿B-B剖面之側視剖面示意圖,圖9C繪示圖9A之發光裝置200沿C-C剖面之側視剖面示意圖。9A, 9B and 9C, FIG. 9A is a schematic top view of a light-emitting device 200 according to another embodiment of the present invention, and FIG. 9B is a side cross-sectional view of the light-emitting device 200 of FIG. 9A along a BB cross-section. 9C is a side cross-sectional view of the light emitting device 200 of FIG. 9A along the CC cross section.

本實施例之發光裝置200與圖1A、圖1B及圖1C所示之發光裝置100相似,因此針對相異處加以說明,且相同的符號代表相似的元件。The illuminating device 200 of the present embodiment is similar to the illuminating device 100 shown in FIGS. 1A, 1B, and 1C, and therefore, the differences will be described, and the same reference numerals denote like elements.

本實施例之發光裝置200與圖1A、圖1B及圖1C所示之發光裝置100之差異,在於本實施例中,第一電極241設置於周圍部1212上之部分可圍繞第一半導體層121完整一周,而非發光裝置100中,第一電極141並未圍繞第一半導體層121完整一周。絕緣層230覆蓋第一半導體層121、第二半導體層122及第一電極241。絕緣層230之一部分位於第一電極241及第二電極242之間。第一電極241及第二電極242可藉由絕緣層230電性絕緣。於本實施例中,絕緣層230雖可覆蓋第一半導體層121及第一電極241及部分覆蓋第二半導體層122,但並非限定於此。於其他實施例中,絕緣層230亦可在第二電極242能夠電性絕緣第一半導體層121及第一電極241的前提下,僅覆蓋部分第一半導體層121及部分第一電極241。The difference between the illuminating device 200 of the present embodiment and the illuminating device 100 shown in FIG. 1A, FIG. 1B and FIG. 1C is that the portion of the first electrode 241 disposed on the peripheral portion 1212 can surround the first semiconductor layer 121. In the entire week, instead of the light-emitting device 100, the first electrode 141 is not completely around the first semiconductor layer 121. The insulating layer 230 covers the first semiconductor layer 121, the second semiconductor layer 122, and the first electrode 241. One portion of the insulating layer 230 is located between the first electrode 241 and the second electrode 242. The first electrode 241 and the second electrode 242 can be electrically insulated by the insulating layer 230. In the present embodiment, the insulating layer 230 covers the first semiconductor layer 121 and the first electrode 241 and partially covers the second semiconductor layer 122, but is not limited thereto. In other embodiments, the insulating layer 230 may cover only a portion of the first semiconductor layer 121 and a portion of the first electrode 241 under the premise that the second electrode 242 can electrically insulate the first semiconductor layer 121 and the first electrode 241.

請參照圖10A至圖15A、圖10B至圖15B及圖10C至圖15C,圖10A至圖15A繪示製造圖9A之發光裝置200之俯視流程示意圖,圖10B至圖15B繪示圖10A至圖15A沿B-B剖面之製造發光裝置200之側視流程示意圖,圖10C至圖15C繪示圖10A至圖15A沿C-C剖面之製造發光裝置200之側視流程示意圖。10A to FIG. 15A, FIG. 10B to FIG. 15B, and FIG. 10C to FIG. 15C, FIG. 10A to FIG. 15A are schematic diagrams showing the top view of the light-emitting device 200 of FIG. 9A, and FIG. 10B to FIG. 15A is a schematic side view of the manufacturing of the light-emitting device 200 along the BB section, and FIGS. 10C to 15C are schematic side views of the manufacturing of the light-emitting device 200 along the CC section of FIGS. 10A to 15A.

其中,圖10A至圖11A、圖10B至圖11B及圖10C至圖11C之流程與圖2A至圖5A、圖2B至圖5B及圖2C至圖5C相似。如圖10A、圖10B及圖10C所示,於基板110上設置半導體元件1200。此半導體元件1200可包括依序堆疊之第一半導體層1210及第二半導體層1220。其中,第一半導體層1210較第二半導體層1220接近基板110。The flow of FIGS. 10A to 11A, 10B to 11B, and 10C to 11C is similar to FIGS. 2A to 5A, 2B to 5B, and 2C to 5C. As shown in FIGS. 10A, 10B, and 10C, a semiconductor element 1200 is provided on the substrate 110. The semiconductor device 1200 can include a first semiconductor layer 1210 and a second semiconductor layer 1220 stacked in sequence. The first semiconductor layer 1210 is closer to the substrate 110 than the second semiconductor layer 1220.

如圖11A、圖11B及圖11C所示,對圖10A、圖10B及圖10C中之半導體元件1200進行蝕刻,以將具有本實施例之形狀之第一半導體層121及第二半導體層122。所蝕刻而成之第一半導體層121及第二半導體層122中,相應於中央部分R1之半導體材料厚度最厚,相應於周圍部分R2愈接近中央部分R1之半導體材料厚度最薄,相應於周圍部分R2愈遠離中央部分R1之半導體材料厚度則逐漸增厚。As shown in FIGS. 11A, 11B, and 11C, the semiconductor element 1200 of FIGS. 10A, 10B, and 10C is etched to have the first semiconductor layer 121 and the second semiconductor layer 122 having the shape of the present embodiment. In the first semiconductor layer 121 and the second semiconductor layer 122 which are etched, the thickness of the semiconductor material corresponding to the central portion R1 is the thickest, and the thickness of the semiconductor material corresponding to the central portion R1 corresponding to the peripheral portion R2 is the thinnest, corresponding to the periphery. The thickness of the semiconductor material in which the portion R2 is farther away from the central portion R1 is gradually thickened.

如圖12A、圖12B及圖12C所示,形成第一電極241。第一電極241之一部分設置於周圍部上表面1212a上及周圍部側表面1212b上,且電性連接至周圍部1212。此部分之第一電極241可圍繞第一半導體層121之周圍部1212完整一周。第一電極241之其他部分可延伸至基板110上。As shown in FIGS. 12A, 12B, and 12C, the first electrode 241 is formed. One of the first electrodes 241 is partially disposed on the peripheral upper surface 1212a and the peripheral side surface 1212b, and is electrically connected to the peripheral portion 1212. The first electrode 241 of this portion may be completely around the peripheral portion 1212 of the first semiconductor layer 121. Other portions of the first electrode 241 may extend onto the substrate 110.

如圖13A、圖13B及圖13C所示,形成絕緣層230覆蓋第一半導體層121、第二半導體層122及第一電極241。其中,絕緣層230可藉由沉積絕緣材料而形成。於此實施例中,絕緣層230雖覆蓋第一半導體層121、第二半導體層122及第一電極241,但並非限定於此。於其他實施例中,絕緣層230亦可覆蓋部分第一半導體層121及部分第一電極241相應於後續將形成第二電極241之位置。As shown in FIGS. 13A, 13B, and 13C, the insulating layer 230 is formed to cover the first semiconductor layer 121, the second semiconductor layer 122, and the first electrode 241. Wherein, the insulating layer 230 can be formed by depositing an insulating material. In this embodiment, the insulating layer 230 covers the first semiconductor layer 121, the second semiconductor layer 122, and the first electrode 241, but is not limited thereto. In other embodiments, the insulating layer 230 may also cover a portion of the first semiconductor layer 121 and a portion of the first electrode 241 corresponding to a position at which the second electrode 241 will be formed later.

如圖14A、圖14B及圖14C所示,於絕緣層230設置開口231,開口231可露出部分第二半導體層122,也就是露出部分第二半導體層122之上表面S2’。As shown in Figs. 14A, 14B and 14C, an opening 231 is provided in the insulating layer 230, and the opening 231 exposes a portion of the second semiconductor layer 122, that is, exposes a portion of the upper surface S2' of the second semiconductor layer 122.

如圖15A、圖15B及圖15C所示,形成第二電極242。第二電極242之一部分設置於第二半導體層122上,且經由開口231電性連接至第二半導體層122。第二電極242之其他部分可設置於絕緣層230上,且可延伸至基板110上。第一半導體層121及第二電極242可藉由絕緣層230電性絕緣。絕緣層230之一部分位於第一電極241及第二電極242之間,故第一電極241及第二電極242亦可藉由絕緣層230電性絕緣。As shown in FIGS. 15A, 15B, and 15C, the second electrode 242 is formed. A portion of the second electrode 242 is disposed on the second semiconductor layer 122 and electrically connected to the second semiconductor layer 122 via the opening 231 . Other portions of the second electrode 242 may be disposed on the insulating layer 230 and may extend onto the substrate 110. The first semiconductor layer 121 and the second electrode 242 may be electrically insulated by the insulating layer 230. One portion of the insulating layer 230 is located between the first electrode 241 and the second electrode 242. Therefore, the first electrode 241 and the second electrode 242 can also be electrically insulated by the insulating layer 230.

另外,請參照圖16A、16B及圖16C,圖16A繪示依照本新型之另一實施例之發光裝置300之俯視示意圖,圖16B繪示圖16A之發光裝置300沿B-B剖面之側視剖面示意圖,圖16C繪示圖16A之發光裝置300沿C-C剖面之側視剖面示意圖。16A, FIG. 16B and FIG. 16C, FIG. 16A is a schematic top plan view of a light-emitting device 300 according to another embodiment of the present invention, and FIG. 16B is a side cross-sectional view of the light-emitting device 300 of FIG. 16A along a BB cross-section. FIG. 16C is a side cross-sectional view of the light emitting device 300 of FIG. 16A taken along the CC section.

本實施例之發光裝置300與圖1A、圖1B及圖1C所示之發光裝置100相似,二者差異在於本實施例之發光裝置300之周圍部上表面3212a實質上平行於基板110之第一表面S1。因此使得位於周圍部上表面3212a之絕緣層330之一部分、位於周圍部上表面3212a之第一電極341之一部分及位於周圍部上表面3212a之第二電極342之一部分亦皆實質上平行於基板110之第一表面S1。The illuminating device 300 of the present embodiment is similar to the illuminating device 100 shown in FIGS. 1A, 1B, and 1C, and the difference is that the peripheral portion upper surface 3212a of the illuminating device 300 of the present embodiment is substantially parallel to the first of the substrate 110. Surface S1. Therefore, a portion of the insulating layer 330 located on the upper surface 3212a of the peripheral portion, a portion of the first electrode 341 at the upper surface 3212a of the peripheral portion, and a portion of the second electrode 342 at the upper surface 3212a of the peripheral portion are also substantially parallel to the substrate 110. The first surface S1.

另外,請參照圖17A、17B及圖17C,圖17A繪示依照本新型之另一實施例之發光裝置400之俯視示意圖,圖17B繪示圖17A之發光裝置400沿B-B剖面之側視剖面示意圖,圖17C繪示圖17A之發光裝置400沿C-C剖面之側視剖面示意圖。17A, 17B and 17C, FIG. 17A is a schematic top view of a light-emitting device 400 according to another embodiment of the present invention, and FIG. 17B is a side cross-sectional view of the light-emitting device 400 of FIG. 17A along a BB cross-section. FIG. 17C is a side cross-sectional view of the light emitting device 400 of FIG. 17A taken along the CC section.

本實施例之發光裝置400與圖9A、圖9B及圖9C所示之發光裝置200相似,二者差異在於本實施例之發光裝置400之周圍部上表面4212a實質上平行於基板110。因此使得位於周圍部上表面4212a之絕緣層430之一部分、位於周圍部上表面4212a之第一電極441之一部分及位於周圍部上表面4212a之第二電極442之一部分亦實質上平行於基板110。The light-emitting device 400 of the present embodiment is similar to the light-emitting device 200 shown in FIGS. 9A, 9B, and 9C, and the difference is that the peripheral portion upper surface 4212a of the light-emitting device 400 of the present embodiment is substantially parallel to the substrate 110. Therefore, a portion of the insulating layer 430 located on the upper surface 4212a of the peripheral portion, a portion of the first electrode 441 located at the upper surface 4212a of the peripheral portion, and a portion of the second electrode 442 located at the upper surface 4212a of the peripheral portion are also substantially parallel to the substrate 110.

另外,請參照圖18A、18B及圖18C,圖18A繪示依照本新型之另一實施例之發光裝置500之俯視示意圖,圖18B繪示圖18A之發光裝置500沿B-B剖面之側視剖面示意圖,圖18C繪示圖18A之發光裝置500沿C-C剖面之側視剖面示意圖。18A, FIG. 18B and FIG. 18C, FIG. 18A is a schematic top plan view of a light-emitting device 500 according to another embodiment of the present invention, and FIG. 18B is a side cross-sectional view of the light-emitting device 500 of FIG. 18A along a BB cross-section. FIG. 18C is a side cross-sectional view of the light emitting device 500 of FIG. 18A along the CC cross section.

本實施例之發光裝置500與圖1A、圖1B及圖1C所示之發光裝置100相似,二者差異在於本實施例之發光裝置500之周圍部上表面5212a為弧面。其中此弧面可為拋物面,且此拋物面上之各拋物線之焦點可位於本體部1211及第二半導體層122之間之發光接面。因此使得位於周圍部上表面5212a之絕緣層530之一部分、位於周圍部上表面5212a之第一電極541之一部分及位於周圍部上表面5212a之第二電極542之一部分亦為弧面。且由於通常絕緣層530、第一電極541及第二電極542之厚度極薄,故三者之弧面為拋物面時,此些拋物面上之各拋物線之焦點亦可位於本體部1211及第二半導體層122之間之發光接面。The light-emitting device 500 of the present embodiment is similar to the light-emitting device 100 shown in FIGS. 1A, 1B, and 1C, and the difference is that the upper surface 5212a of the peripheral portion of the light-emitting device 500 of the present embodiment is a curved surface. The arc surface may be a paraboloid, and the focus of each parabola on the paraboloid may be located on the illumination junction between the body portion 1211 and the second semiconductor layer 122. Therefore, a portion of the insulating layer 530 located on the upper surface 5212a of the peripheral portion, a portion of the first electrode 541 located at the upper surface 5212a of the peripheral portion, and a portion of the second electrode 542 located at the upper surface 5212a of the peripheral portion are also curved surfaces. Moreover, since the thickness of the insulating layer 530, the first electrode 541, and the second electrode 542 is extremely thin, when the arc surfaces of the three surfaces are paraboloids, the focus of each parabola on the paraboloids may also be located in the body portion 1211 and the second semiconductor. The illuminating junction between layers 122.

另外,請參照圖19A、19B及圖19C,圖19A繪示依照本新型之另一實施例之發光裝置600之俯視示意圖,圖19B繪示圖19A之發光裝置600沿B-B剖面之側視剖面示意圖,圖19C繪示圖19A之發光裝置600沿C-C剖面之側視剖面示意圖。19A, 19B and 19C, FIG. 19A is a schematic top view of a light-emitting device 600 according to another embodiment of the present invention, and FIG. 19B is a side cross-sectional view of the light-emitting device 600 of FIG. 19A along a BB cross-section. 19C is a side cross-sectional view of the light emitting device 600 of FIG. 19A taken along the CC section.

本實施例之發光裝置600與圖9A、圖9B及圖9C所示之發光裝置200相似,二者差異在於本實施例之發光裝置600之周圍部上表面6212a為弧面。其中此弧面可為拋物面,且此拋物面上之各拋物線之焦點可位於本體部1211及第二半導體層122之間之發光接面。因此使得位於周圍部上表面6212a之絕緣層630之一部分、位於周圍部上表面6212a之第一電極641之一部分及位於周圍部上表面6212a之第二電極642之一部分亦為弧面。且由於通常絕緣層630、第一電極641及第二電極642之厚度極薄,故三者之弧面為拋物面時,此些拋物面上之各拋物線之焦點亦可位於本體部1211及第二半導體層122之間之發光接面。The light-emitting device 600 of the present embodiment is similar to the light-emitting device 200 shown in FIGS. 9A, 9B, and 9C, and the difference is that the upper surface 6212a of the peripheral portion of the light-emitting device 600 of the present embodiment is a curved surface. The arc surface may be a paraboloid, and the focus of each parabola on the paraboloid may be located on the illumination junction between the body portion 1211 and the second semiconductor layer 122. Therefore, a portion of the insulating layer 630 located on the upper surface 6212a of the peripheral portion, a portion of the first electrode 641 located at the upper surface 6212a of the peripheral portion, and a portion of the second electrode 642 located at the upper surface 6212a of the peripheral portion are also curved surfaces. Moreover, since the thickness of the insulating layer 630, the first electrode 641, and the second electrode 642 is extremely thin, when the arc surfaces of the three surfaces are paraboloids, the focus of each parabola on the paraboloids may also be located in the body portion 1211 and the second semiconductor. The illuminating junction between layers 122.

另外,請參照圖20,繪示依照本新型之另一實施例之發光裝置700之俯視示意圖。本實施例之發光裝置700與圖1A、圖1B及圖1C所示之發光裝置100相似,二者之主要相異處,在於本實施例之發光裝置700之本體部7211於俯視時可為圓形,但並非限定於此,亦可為橢圓形、花形、星形或其他對稱圖形。In addition, please refer to FIG. 20 , which is a schematic top view of a light emitting device 700 according to another embodiment of the present invention. The illuminating device 700 of the present embodiment is similar to the illuminating device 100 shown in FIG. 1A, FIG. 1B and FIG. 1C. The main difference between the two is that the main body portion 7211 of the illuminating device 700 of the present embodiment can be round in plan view. Shape, but not limited thereto, may also be elliptical, flower-shaped, star-shaped or other symmetrical figures.

綜上所述,本新型之發光裝置,藉由第一半導體層及第二半導體層之形狀為對稱配置,而使得形成於第一半導體層及第二半導體層之間之發光接面所所產生之光線亦可趨於對稱。此外,藉由本體部凸出周圍部,沿發光接面之側向發散之光線中至少部分光線可經由位於周圍部之第一電極之反射而遠離基板,以利此光線之應用,藉此還可提升發光裝置之光取出率。In summary, the light-emitting device of the present invention is formed by symmetrical arrangement of the shapes of the first semiconductor layer and the second semiconductor layer, so that the light-emitting junction formed between the first semiconductor layer and the second semiconductor layer is generated. The light can also tend to be symmetrical. In addition, by projecting the surrounding portion of the body portion, at least part of the light ray diverging along the lateral direction of the illuminating junction can be separated from the substrate by reflection of the first electrode located at the surrounding portion, thereby facilitating the application of the light. The light extraction rate of the light-emitting device can be improved.

雖然本新型以前述之實施例揭露如上,然其並非用以限定本新型。在不脫離本新型之精神和範圍內,所為之更動與潤飾,均屬本新型之專利保護範圍。關於本新型所界定之保護範圍請參考所附之申請專利範圍。Although the present invention has been disclosed above in the foregoing embodiments, it is not intended to limit the present invention. The changes and refinements of the present invention are within the scope of the patent protection of the present invention without departing from the spirit and scope of the present invention. Please refer to the attached patent application for the scope of protection defined by this new model.

100、200、300、400、500、600、700‧‧‧發光裝置
110‧‧‧基板
1200‧‧‧半導體元件
121、1210‧‧‧第一半導體層
1211、7211‧‧‧本體部
1212‧‧‧周圍部
1212a、3212a、4212a、5212a、6212a‧‧‧周圍部上表面
1212b‧‧‧周圍部側表面
122、1220‧‧‧第二半導體層
130、230、330、430、530、630‧‧‧絕緣層
131‧‧‧開口
141、241、341、441、541、641‧‧‧第一電極
142、242、342、442、542、642‧‧‧第二電極
150‧‧‧抗蝕層
161、162‧‧‧掩膜
231‧‧‧開口
D1、D2、D3、D4、D5、D6、D7、D8‧‧‧距離
L1‧‧‧第一軸線
L2‧‧‧第二軸線
P0‧‧‧形狀中心
P1‧‧‧第一點
P2‧‧‧第二點
P3‧‧‧第三點
P4‧‧‧第四點
R1‧‧‧中央部分
R2‧‧‧周圍部分
S1‧‧‧第一表面
S2‧‧‧第二表面
S2’‧‧‧上表面
S3‧‧‧第三表面
S4‧‧‧第四表面
θ‧‧‧夾角
100, 200, 300, 400, 500, 600, 700‧‧‧ illuminating devices
110‧‧‧Substrate
1200‧‧‧Semiconductor components
121, 1210‧‧‧ first semiconductor layer
1211, 7211‧‧‧ Body Department
1212‧‧‧ surrounding parts
1212a, 3212a, 4212a, 5212a, 6212a‧‧‧ upper surface of the surrounding area
1212b‧‧‧ peripheral side surface
122, 1220‧‧‧ second semiconductor layer
130, 230, 330, 430, 530, 630‧ ‧ insulation
131‧‧‧ openings
141, 241, 341, 441, 541, 641‧‧‧ first electrode
142, 242, 342, 442, 542, 642‧‧‧ second electrode
150‧‧‧resist
161, 162‧‧ mask
231‧‧‧ openings
D1, D2, D3, D4, D5, D6, D7, D8‧‧‧ distance
L1‧‧‧first axis
L2‧‧‧second axis
P0‧‧‧Shape Center
P1‧‧‧ first point
P2‧‧‧ second point
P3‧‧‧ third point
P4‧‧‧ fourth point
Central part of R1‧‧‧
R2‧‧‧ surrounding parts
S1‧‧‧ first surface
S2‧‧‧ second surface
S2'‧‧‧ upper surface
S3‧‧‧ third surface
S4‧‧‧ fourth surface θ‧‧‧ angle

圖1A繪示依照本新型之一實施例之發光裝置之俯視示意圖。 圖1B繪示圖1A之發光裝置沿B-B剖面之側視剖面示意圖。 圖1C繪示圖1A之發光裝置沿C-C剖面之側視剖面示意圖。 圖2A至圖8A繪示製造圖1A之發光裝置之俯視流程示意圖。 圖2B至圖8B繪示圖2A至圖8A沿B-B剖面之製造發光裝置之側視流程示意圖。 圖2C至圖8C繪示圖2A至圖8A沿C-C剖面之製造發光裝置之側視流程示意圖。 圖9A繪示依照本新型之另一實施例之發光裝置之俯視示意圖。 圖9B繪示圖9A之發光裝置沿B-B剖面之側視剖面示意圖。 圖9C繪示圖9A之發光裝置沿C-C剖面之側視剖面示意圖。 圖10A至圖15A繪示製造圖9A之發光裝置之俯視流程示意圖。 圖10B至圖15B繪示圖10A至圖15A沿B-B剖面之製造發光裝置之側視流程示意圖。 圖10C至圖15C繪示圖10A至圖15A沿C-C剖面之製造發光裝置之側視流程示意圖。 圖16A繪示依照本新型之另一實施例之發光裝置之俯視示意圖。 圖16B繪示圖16A之發光裝置沿B-B剖面之側視剖面示意圖。 圖16C繪示圖16A之發光裝置沿C-C剖面之側視剖面示意圖。 圖17A繪示依照本新型之另一實施例之發光裝置之俯視示意圖。 圖17B繪示圖17A之發光裝置沿B-B剖面之側視剖面示意圖。 圖17C繪示圖17A之發光裝置沿C-C剖面之側視剖面示意圖。 圖18A繪示依照本新型之另一實施例之發光裝置之俯視示意圖。 圖18B繪示圖18A之發光裝置沿B-B剖面之側視剖面示意圖。 圖18C繪示圖18A之發光裝置沿C-C剖面之側視剖面示意圖。 圖19A繪示依照本新型之另一實施例之發光裝置之俯視示意圖。 圖19B繪示圖19A之發光裝置沿B-B剖面之側視剖面示意圖。 圖19C繪示圖19A之發光裝置沿C-C剖面之側視剖面示意圖。 圖20繪示依照本新型之另一實施例之發光裝置之俯視示意圖。1A is a top plan view of a light emitting device in accordance with an embodiment of the present invention. 1B is a side cross-sectional view of the light-emitting device of FIG. 1A taken along line B-B. 1C is a side cross-sectional view of the light-emitting device of FIG. 1A taken along line C-C. 2A-8A are schematic top plan views showing the manufacture of the light emitting device of FIG. 1A. 2B to FIG. 8B are schematic side views showing the process of manufacturing the light-emitting device of FIG. 2A to FIG. 8A along the line B-B. 2C to FIG. 8C are schematic side views showing the process of manufacturing the light-emitting device of FIG. 2A to FIG. 8A along the line C-C. FIG. 9A is a schematic top view of a light emitting device according to another embodiment of the present invention. 9B is a side cross-sectional view of the light emitting device of FIG. 9A taken along line B-B. 9C is a side cross-sectional view of the light emitting device of FIG. 9A taken along line C-C. 10A-15A are schematic top plan views showing the manufacture of the light-emitting device of FIG. 9A. 10B to FIG. 15B are schematic side views showing the process of manufacturing the light-emitting device of FIG. 10A to FIG. 15A along the line B-B. 10C to FIG. 15C are schematic side views showing the process of manufacturing the light-emitting device of FIG. 10A to FIG. 15A along the line C-C. FIG. 16A is a top plan view of a light emitting device according to another embodiment of the present invention. 16B is a side cross-sectional view of the light emitting device of FIG. 16A taken along line B-B. Figure 16C is a side cross-sectional view of the light-emitting device of Figure 16A taken along line C-C. 17A is a top plan view of a light emitting device in accordance with another embodiment of the present invention. 17B is a side cross-sectional view of the light-emitting device of FIG. 17A taken along line B-B. 17C is a side cross-sectional view of the light-emitting device of FIG. 17A taken along line C-C. FIG. 18A is a schematic top plan view of a light emitting device according to another embodiment of the present invention. 18B is a side cross-sectional view of the light-emitting device of FIG. 18A taken along line B-B. 18C is a side cross-sectional view of the light-emitting device of FIG. 18A taken along line C-C. FIG. 19A is a schematic top plan view of a light emitting device according to another embodiment of the present invention. 19B is a side cross-sectional view of the light-emitting device of FIG. 19A taken along line B-B. 19C is a side cross-sectional view of the light emitting device of FIG. 19A taken along the line C-C. 20 is a top plan view of a light emitting device in accordance with another embodiment of the present invention.

100‧‧‧發光裝置 100‧‧‧Lighting device

110‧‧‧基板 110‧‧‧Substrate

121‧‧‧第一半導體層 121‧‧‧First semiconductor layer

1211‧‧‧本體部 1211‧‧‧ Body Department

1212‧‧‧周圍部 1212‧‧‧ surrounding parts

1212a‧‧‧周圍部上表面 1212a‧‧‧Top surface of the surrounding part

1212b‧‧‧周圍部側表面 1212b‧‧‧ peripheral side surface

122‧‧‧第二半導體層 122‧‧‧Second semiconductor layer

130‧‧‧絕緣層 130‧‧‧Insulation

131‧‧‧開口 131‧‧‧ openings

141‧‧‧第一電極 141‧‧‧First electrode

142‧‧‧第二電極 142‧‧‧second electrode

D5、D6、D7、D8‧‧‧距離 D5, D6, D7, D8‧‧‧ distance

S1‧‧‧第一表面 S1‧‧‧ first surface

S2‧‧‧第二表面 S2‧‧‧ second surface

S2’‧‧‧上表面 S2’‧‧‧ upper surface

S3‧‧‧第三表面 S3‧‧‧ third surface

S4‧‧‧第四表面 S4‧‧‧ fourth surface

θ‧‧‧夾角 Θ‧‧‧ angle

Claims (11)

一種發光裝置,包括:一基板;一第一半導體層,設置於該基板上,該第一半導體層包括相連之一本體部及一周圍部,該本體部凸出該周圍部,其中該周圍部係以鏡像對稱的方式環繞該本體部;一第二半導體層,設置於該本體部上,且該第二半導體層圖案與該本體部實質相同;一第一電極,至少部分設置於該周圍部上且電性連接於該第一半導體層;以及一第二電極,至少部分設置於該第二半導體層上且電性連接於該第二半導體層。A light-emitting device comprising: a substrate; a first semiconductor layer disposed on the substrate, the first semiconductor layer comprising a body portion and a surrounding portion, the body portion protruding from the peripheral portion, wherein the peripheral portion Surrounding the body portion in a mirror symmetrical manner; a second semiconductor layer is disposed on the body portion, and the second semiconductor layer pattern is substantially identical to the body portion; a first electrode is at least partially disposed at the periphery portion And electrically connected to the first semiconductor layer; and a second electrode disposed at least partially on the second semiconductor layer and electrically connected to the second semiconductor layer. 如請求項1所述之發光裝置,其中該第一電極之材質為光反射導電材質。The illuminating device of claim 1, wherein the material of the first electrode is a light reflective conductive material. 如請求項1所述之發光裝置,其中該第二電極之材質為光穿透導電材質。The illuminating device of claim 1, wherein the second electrode is made of a light-transmitting conductive material. 如請求項1所述之發光裝置,更包括一絕緣層,覆蓋部分該第一半導體層,該第二電極經由該絕緣層與該第一半導體層電性絕緣。The illuminating device of claim 1, further comprising an insulating layer covering a portion of the first semiconductor layer, the second electrode being electrically insulated from the first semiconductor layer via the insulating layer. 如請求項1所述之發光裝置,更包括一絕緣層,覆蓋該第一半導體層、該第二半導體層及該第一電極,該絕緣層具有一開口,該開口露出至少部分該第二半導體層,該第二電極經由該開口電性連接至該第二半導體層。The illuminating device of claim 1, further comprising an insulating layer covering the first semiconductor layer, the second semiconductor layer and the first electrode, the insulating layer having an opening exposing at least a portion of the second semiconductor a layer, the second electrode is electrically connected to the second semiconductor layer via the opening. 如請求項5所述之發光裝置,其中該絕緣層之一部分位於該第一電極及該第二電極之間。The illuminating device of claim 5, wherein one of the insulating layers is partially located between the first electrode and the second electrode. 如請求項1所述之發光裝置,其中該周圍部具有背向該基板之一周圍部上表面,該周圍部上表面實質上平行於該基板。The illuminating device of claim 1, wherein the peripheral portion has an upper surface facing away from a peripheral portion of the substrate, the peripheral portion upper surface being substantially parallel to the substrate. 如請求項1所述之發光裝置,其中該周圍部具有背向該基板之一周圍部上表面,且該第一半導體層及該第二半導體層之間具有一交接面,該周圍部上表面與該交接面具有一夾角θ,其中45°≦θ≦70°。The illuminating device of claim 1, wherein the peripheral portion has an upper surface facing away from a peripheral portion of the substrate, and an interface between the first semiconductor layer and the second semiconductor layer, the upper surface of the peripheral portion There is an angle θ with the junction mask, where 45° ≦ θ ≦ 70°. 如請求項1所述之發光裝置,其中該基板具有一第一表面,該第一表面鄰接該第一半導體層,該第二半導體層具有一第二表面,該第二表面鄰接該第一半導體層,該周圍部上之該第一電極具有一第三表面及一第四表面,該第三表面鄰接該第一半導體層,該第四表面位於該第三表面對側,其中該第一電極之該第四表面至該基板之該第一表面的距離小於該第二半導體層之該第二表面至該基板之該第一表面的距離。The illuminating device of claim 1, wherein the substrate has a first surface, the first surface is adjacent to the first semiconductor layer, and the second semiconductor layer has a second surface, the second surface is adjacent to the first semiconductor a layer, the first electrode on the peripheral portion has a third surface and a fourth surface, the third surface is adjacent to the first semiconductor layer, the fourth surface is located on the opposite side of the third surface, wherein the first electrode The distance from the fourth surface to the first surface of the substrate is less than the distance from the second surface of the second semiconductor layer to the first surface of the substrate. 如請求項1所述之發光裝置,其中該周圍部具有背向該基板之一周圍部上表面,該周圍部上表面為一拋物面。The illuminating device of claim 1, wherein the peripheral portion has an upper surface facing away from a peripheral portion of the substrate, the upper surface of the peripheral portion being a paraboloid. 如請求項1所述之發光裝置,其中該本體部為多邊形或圓形。The illuminating device of claim 1, wherein the body portion is polygonal or circular.
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