TWM473609U - Stereoscopic structure of circuit package - Google Patents

Stereoscopic structure of circuit package Download PDF

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Publication number
TWM473609U
TWM473609U TW102203603U TW102203603U TWM473609U TW M473609 U TWM473609 U TW M473609U TW 102203603 U TW102203603 U TW 102203603U TW 102203603 U TW102203603 U TW 102203603U TW M473609 U TWM473609 U TW M473609U
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TW
Taiwan
Prior art keywords
groove
hole
recess
die
circuit package
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Application number
TW102203603U
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Chinese (zh)
Inventor
Shih-Chi Chen
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Standard Technology Service Inc
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Application filed by Standard Technology Service Inc filed Critical Standard Technology Service Inc
Priority to TW102203603U priority Critical patent/TWM473609U/en
Publication of TWM473609U publication Critical patent/TWM473609U/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15151Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections

Description

立體電路封裝結構 Three-dimensional circuit package structure

本創作係有關於一種立體電路封裝結構,特別是一種具有光感應裝置放發光元件的電路封裝結構。 The present invention relates to a three-dimensional circuit package structure, and more particularly to a circuit package structure having a light-sensing device for emitting a light-emitting element.

在半導體封裝中,若將兩個不同的晶粒(如:一發光元件及一光感應元件)配置到同一塊基板,可形成多種不同的電路封裝結構(如:光感應裝置)。當有物件遮斷發光元件及光感測元件間的光路徑時,光感測元件便能判定物件的存在,反之若光感測元件能順利接收發光元件發射的光,光感測元件便能判定物件不存在。反射式光感應裝置即為將發光元件及光感測元件裝置於同一側,靠著是否有物件將發光元件的光反射回光感測元件,以判斷物件是否存在。 In a semiconductor package, if two different dies (eg, a illuminating element and a photo sensing element) are disposed on the same substrate, a plurality of different circuit package structures (eg, light sensing devices) can be formed. When an object intercepts the light path between the light-emitting element and the light-sensing element, the light-sensing element can determine the presence of the object, and if the light-sensing element can smoothly receive the light emitted by the light-emitting element, the light-sensing element can It is determined that the object does not exist. The reflective light sensing device is configured such that the light emitting element and the light sensing element are disposed on the same side, and whether the object reflects the light of the light emitting element back to the light sensing element to determine whether the object exists.

為了確保光感應裝置的準確性,在一般的習知技術中,會在電路封裝結構上加上多個元件,確保發光元件發光及光感測元件在運作時,整個流程不會受到外界的干擾,最重要的就是避免由發光元件以外發出的光源被光感測元件感測到;如此一來,電路封裝結構的結構通常會很複雜,進而使製程工序增加,而半導體產業一直在追求將產品尺寸縮小,因此複雜的結構及元件都會使製作的時間及成本增加,複雜的工序更是增加了產生失誤的機會,使產品的可靠度降低。 In order to ensure the accuracy of the light sensing device, in the conventional art, a plurality of components are added to the circuit package structure to ensure that the entire process is not interfered by the outside when the light emitting device emits light and the light sensing device is in operation. The most important thing is to prevent the light source emitted from the light-emitting element from being sensed by the light-sensing element; thus, the structure of the circuit package structure is usually complicated, and the process process is increased, and the semiconductor industry has been pursuing the product. The size is reduced, so the complicated structure and components will increase the time and cost of production, and the complicated process will increase the chance of error and reduce the reliability of the product.

因此,有人提出立體電路封裝結構,以簡化製程,在完成立體電路封裝結構後,此立體電路封裝結構通常會被配置至一印刷電路板上,以產生模組的功能。但由於封裝結構的尺寸會受限制,通常在進行立體電路的配置時,無法將每一電性接點的尺寸及距離做良好的配置,這會造成立體電路封裝結構上的電性接點無法與印刷電路板上的電性接點做良 好的連接。 Therefore, a three-dimensional circuit package structure has been proposed to simplify the process. After the three-dimensional circuit package structure is completed, the three-dimensional circuit package structure is usually configured on a printed circuit board to generate a module function. However, since the size of the package structure is limited, it is usually impossible to configure the size and distance of each electrical contact when the configuration of the three-dimensional circuit is performed, which may cause the electrical contact on the three-dimensional circuit package structure to fail. Electrical contacts on the printed circuit board are good Good connection.

對於上述問題,本創作提出一種立體電路封裝結構,透過對結構及製程的改良與設計,使得在進行製作時,能以較少的步驟完成電路封裝,進而減少製程所需時間及成本,並能有效提高良率,並能使立體電路封裝結構上的電性接點與印刷電路板有良好的連接。 For the above problems, the present invention proposes a three-dimensional circuit package structure. Through the improvement and design of the structure and the process, the circuit package can be completed in a small number of steps during the fabrication, thereby reducing the time and cost required for the process, and Effectively improve the yield and make the electrical contacts on the three-dimensional circuit package structure have a good connection with the printed circuit board.

為了解決上述問題,本創作之一主要目的在於提供一種立體電路封裝結構,透過以射出成型的方式形成基板結構,並用雷射刻出多個焊墊的位置,便能有效降低電路封裝的製作成本與時間,進一步能提高產品的可靠度。 In order to solve the above problems, one of the main purposes of the present invention is to provide a three-dimensional circuit package structure, which can effectively reduce the manufacturing cost of the circuit package by forming a substrate structure by injection molding and laser-engraving the positions of the plurality of pads. And time, further improve the reliability of the product.

為了達成上述目的,本創作提出一種立體電路封裝結構,包括一基板,基板有一第一面及與第一面相對之一第二面,第一面具有一第一凹槽及一第二凹槽,第一凹槽及第二凹槽之間具有一擋牆以相互隔離,立體電路封裝結構的特徵在於:第一凹槽包括:一第一貫穿孔,位於第一凹槽底部並連通至第二面;一第一凹槽壁,位於第一凹槽底部及第一面之間;一第一焊接點,位於第一凹槽底部的第一貫穿孔旁,第一焊接點並經由第一凹槽壁延伸至第一面並形成一第一電性連接端;及一第二焊接點,位於第一凹槽底部的第一貫穿孔旁,與第一焊接點相對,第二焊接點並經由第一凹槽壁延伸至第一面並形成一與第一電性連接端相對的第二電性連接端;第二凹槽包括:一第二貫穿孔,位於第二凹槽底部並連通至第二面;一第二凹槽壁,位於第二凹槽底部及第一面之間;及複數個第三焊接點,位於第二凹槽底部並圍繞第二貫穿孔,第三焊接點並經由第二凹槽壁延伸至第一面並形成複數個第三電性連接端;一第一晶粒,具有一第一上端及一第一下端,第一上端具有複數個第一焊墊,第一晶粒配置於第一凹槽,且第一上端正對第一貫穿孔,第一焊墊並分別與第一焊接點及第二焊接點電性連接;一第二晶粒,具有一第二上端及一第二下端,第二上端具有複數個第二焊墊,第二晶粒配置於第二凹槽,且第二上端正對第二貫穿孔,第二焊墊並分別與第三焊接點電性連接。 In order to achieve the above object, the present invention provides a three-dimensional circuit package structure including a substrate having a first surface and a second surface opposite to the first surface, the first mask having a first recess and a second recess The first groove and the second groove have a retaining wall to be isolated from each other. The three-dimensional circuit package structure is characterized in that: the first groove comprises: a first through hole located at the bottom of the first groove and connected to the first a first groove wall, located between the bottom of the first groove and the first surface; a first welding point, located beside the first through hole at the bottom of the first groove, the first welding point and the first The groove wall extends to the first surface and forms a first electrical connection end; and a second solder joint is located beside the first through hole at the bottom of the first groove, opposite to the first solder joint, and the second solder joint is Extending to the first surface via the first groove wall and forming a second electrical connection end opposite to the first electrical connection end; the second groove includes: a second through hole located at the bottom of the second groove and connected To the second side; a second groove wall at the bottom of the second groove and the first And a plurality of third solder joints located at the bottom of the second recess and surrounding the second through hole, the third soldering point extending to the first surface via the second recess wall and forming a plurality of third electrical connecting ends a first die having a first upper end and a first lower end, the first upper end having a plurality of first pads, the first die disposed in the first groove, and the first upper end facing the first pass The first pad is electrically connected to the first pad and the second pad; the second die has a second upper end and a second lower end, and the second upper end has a plurality of second pads. The second die is disposed on the second groove, and the second upper end faces the second through hole, and the second pad is electrically connected to the third soldering point.

本創作另外提出一種立體電路封裝結構,包括一基板,基板有一第一面及與第一面相對之一第二面,第一面具有一第一凹槽及一第二凹槽,第一凹槽及第二凹槽之間具有一擋牆以相互隔離,立體電路封裝結構的特徵在於:第一凹槽包括:一第一貫穿孔,位於第一凹槽底部並連通至第二面;一第一凹槽壁,位於第一凹槽底部及第一面之間;一第一焊接點,位於第一凹槽底部的第一貫穿孔旁,第一焊接點並經由第一凹槽壁延伸至第一面並形成一第一電性連接端;及一第二焊接點,位於第一凹槽底部的第一貫穿孔旁,與第一焊接點相對,第二焊接點並經由第一凹槽壁延伸至第一面並形成一與第一電性連接端相對的第二電性連接端;第二凹槽包括:一第二貫穿孔,位於第二凹槽底部並連通至第二面;一第二凹槽壁,位於第二凹槽底部及第一面之間;及複數個第三焊接點,位於第二凹槽底部並圍繞第二貫穿孔,第三焊接點並經由第二凹槽壁延伸至第一面並形成複數個第三電性連接端;一第一晶粒,具有一第一上端及一第一下端,第一上端具有複數個第一焊墊,第一晶粒配置於第一凹槽,且第一上端正對第一貫穿孔,第一焊墊並分別與第一焊接點及第二焊接點電性連接;一第二晶粒,具有一第二上端及一第二下端,第二上端具有複數個第二焊墊,第二晶粒配置於第二凹槽,且第二上端正對第二貫穿孔,第二焊墊並分別與第三焊接點電性連接;一軟板,具有一第三面及相對的一第四面,第三面具有複數個第一電性接點,第四面與第一面相接合,第四面進一步具有複數個第二電性接點,第二電性接點以相對第一焊接點、第二焊接點及第三焊接點的排列方式排列並與第一焊接點、第二焊接點及第三焊接點電性連接,第二電性接點透過複數個軟板穿孔及複數個軟板穿孔中的金屬材料與第一電性接點電性連接。 The present invention further provides a three-dimensional circuit package structure, including a substrate having a first surface and a second surface opposite to the first surface, the first mask having a first recess and a second recess, the first recess The first and second recesses are separated from each other by a retaining wall. The first recess includes a first through hole at the bottom of the first recess and communicates with the second surface. a first groove wall is located between the bottom of the first groove and the first surface; a first welding point is located beside the first through hole at the bottom of the first groove, and the first welding point extends through the first groove wall a first electrical connection end is formed to the first surface; and a second soldering point is located beside the first through hole at the bottom of the first groove, opposite to the first soldering point, and the second soldering point is via the first recess The groove wall extends to the first surface and forms a second electrical connection end opposite to the first electrical connection end; the second groove includes: a second through hole located at the bottom of the second groove and communicating to the second surface a second groove wall located between the bottom of the second groove and the first face; and plural a third soldering point is located at the bottom of the second recess and surrounds the second through hole, and the third soldering point extends to the first surface via the second recess wall and forms a plurality of third electrical connecting ends; a first die Having a first upper end and a first lower end, the first upper end has a plurality of first pads, the first die is disposed in the first groove, and the first upper end faces the first through hole, the first pad And electrically connected to the first soldering point and the second soldering point respectively; a second die has a second upper end and a second lower end, the second upper end has a plurality of second pads, and the second die is disposed on a second recess, and the second upper end faces the second through hole, and the second pad is electrically connected to the third soldering point respectively; a soft board having a third surface and an opposite fourth surface, the third The surface has a plurality of first electrical contacts, the fourth surface is joined to the first surface, the fourth surface further has a plurality of second electrical contacts, and the second electrical contacts are opposite to the first solder joint and the second solder joint The arrangement of the points and the third welding points are arranged and electrically connected to the first welding point, the second welding point and the third welding point Connector, a second electrical contact and a plurality of perforated metal material of soft perforated plate is connected to the first electrical contacts electrically via a plurality of soft board.

本創作所提出之立體電路封裝結構,可先行將形成基板及佈線的步驟完成,再一次性的以覆晶完成立體電路的封裝,能有效減少電路封裝的步驟,同時能減少進行封裝所需的成本並有效的提高產品的可靠度。 The three-dimensional circuit package structure proposed by the present invention can complete the steps of forming the substrate and the wiring first, and then complete the packaging of the three-dimensional circuit by flip chip once, which can effectively reduce the steps of the circuit package and reduce the need for packaging. Cost and effectively improve the reliability of the product.

1‧‧‧立體電路封裝結構 1‧‧‧Three-dimensional circuit package structure

1’‧‧‧立體電路封裝結構 1'‧‧‧Three-dimensional circuit package structure

1”‧‧‧立體電路封裝結構 1"‧‧‧Three-dimensional circuit package structure

12‧‧‧基板 12‧‧‧Substrate

122‧‧‧第一面 122‧‧‧ first side

123‧‧‧擋牆 123‧‧‧Retaining wall

128‧‧‧第二面 128‧‧‧ second side

14‧‧‧第一凹槽 14‧‧‧First groove

140‧‧‧第一貫穿孔 140‧‧‧First through hole

141‧‧‧第一凹槽壁 141‧‧‧First groove wall

1400‧‧‧第三封膠層 1400‧‧‧3rd rubber layer

1402‧‧‧第一透光罩 1402‧‧‧First Transmissive Cover

142‧‧‧第一電性連接端 142‧‧‧First electrical connection

1420‧‧‧第一焊接點 1420‧‧‧First solder joint

144‧‧‧第二電性連接端 144‧‧‧Second electrical connection

1440‧‧‧第二焊接點 1440‧‧‧second solder joint

148‧‧‧第一封膠層 148‧‧‧First adhesive layer

16‧‧‧第二凹槽 16‧‧‧second groove

160‧‧‧第二貫穿孔 160‧‧‧Second through hole

1600‧‧‧第四封膠層 1600‧‧‧Four sealant

1602‧‧‧第二透光罩 1602‧‧‧second translucent cover

161‧‧‧第二凹槽壁 161‧‧‧second groove wall

162‧‧‧第三電性連接端 162‧‧‧The third electrical connection

1620‧‧‧第三焊接點 1620‧‧‧ third welding point

1622‧‧‧缺口 1622‧‧‧ gap

168‧‧‧第二封膠層 168‧‧‧Second sealant

18‧‧‧第一晶粒 18‧‧‧First grain

180‧‧‧第一上端 180‧‧‧ first upper end

182‧‧‧第一下端 182‧‧‧ first lower end

184‧‧‧第一焊接點 184‧‧‧First solder joint

20‧‧‧第二晶粒 20‧‧‧Second grain

200‧‧‧第二上端 200‧‧‧second upper end

202‧‧‧第二下端 202‧‧‧second lower end

204‧‧‧第二焊接點 204‧‧‧second solder joint

3‧‧‧軟板 3‧‧‧Soft board

31‧‧‧第三面 31‧‧‧ third side

33‧‧‧第四面 33‧‧‧ fourth side

35‧‧‧第一電性接點 35‧‧‧First electrical contact

350‧‧‧缺口 350‧‧ ‧ gap

360‧‧‧軟板穿孔 360‧‧‧Soft board perforation

361‧‧‧金屬材料 361‧‧‧Metal materials

37‧‧‧第二電性接點 37‧‧‧Second electrical contacts

XX’‧‧‧連線 XX’‧‧‧ connection

第1圖 為本創作基板下視示意圖;第2圖 為本創作基板上視示意圖;第3圖 為本創作基板佈線下視示意圖;第4圖 為本創作立體電路封裝結構下視示意圖;第5圖 為本創作立體電路封裝結構剖視示意圖;第6圖 為本創作立體電路封裝結構第二實施例剖視示意圖;第7圖 為本創作立體電路封裝結構第三實施例剖視示意圖;第8A圖為本創作軟板上視示意圖;第8B圖為本創作軟板下視示意圖;第9圖 為本創作軟板與立體電路封裝結構結合示意圖。 1 is a schematic view of the creation substrate; FIG. 2 is a schematic view of the creation substrate; FIG. 3 is a schematic view of the creation substrate wiring; FIG. 4 is a schematic view of the creation of the three-dimensional circuit package structure; FIG. 6 is a cross-sectional view showing a second embodiment of a three-dimensional circuit package structure; FIG. 7 is a cross-sectional view showing a third embodiment of the three-dimensional circuit package structure; Figure is a schematic view of the creation soft board; Figure 8B is a schematic view of the creative soft board; Figure 9 is a schematic diagram of the combination of the creative soft board and the three-dimensional circuit package structure.

本創作係一種立體電路封裝結構,特別是一種使封裝製程得以簡化之結構,並且進一步能減少封裝時所需的時間及成本,而進行封裝製程所需的技術皆已為習知,故在下述說明中,並需要不完整描述。此外,於下述內文中之圖示,並未依據實際之相關尺寸完整繪製,其作用僅在表達與本創作特徵有關之示意圖。 The present invention is a three-dimensional circuit package structure, in particular, a structure that simplifies the packaging process, and further reduces the time and cost required for packaging, and the techniques required for the packaging process are well known, so In the description, and need to be incomplete description. In addition, the illustrations in the following texts are not completely drawn according to the actual relevant dimensions, and their function is only to express the schematic diagram related to the present creative features.

首先,請參閱第1圖,為本創作基板下視示意圖。如第1圖所示,基板12具有第一面122及與第一面122相對的第二面128,第一面122上有一第一凹槽14及一第二凹槽16,並有一擋牆123將第一凹槽14及第二凹槽16互相隔離;第一面122與第一凹槽14底部之間形成第一凹槽壁141,同時,第一面122與第二凹槽16底部之間形成第二凹槽壁161;其中,第一凹槽14底部有一第一貫穿孔140貫穿第一凹槽14底部至第二面128,第二凹槽16底部有一第二貫穿孔160貫穿第二凹槽底部至第二面128。 First, please refer to Figure 1, which is a schematic view of the substrate of the creation. As shown in FIG. 1, the substrate 12 has a first surface 122 and a second surface 128 opposite to the first surface 122. The first surface 122 has a first recess 14 and a second recess 16 and a retaining wall. 123 isolating the first groove 14 and the second groove 16 from each other; a first groove wall 141 is formed between the first surface 122 and the bottom of the first groove 14, and at the same time, the first surface 122 and the bottom of the second groove 16 A second groove wall 161 is formed between the bottom of the first groove 14 and a second through hole 160 through the bottom of the first groove 14 to the second surface 128. The bottom of the second groove is to the second face 128.

接著,請參閱第2圖,為本創作基板上視示意圖。如第2圖所示,基板12的第二面128為第一貫穿孔140及第二貫穿孔160。在本 創作的實施例中,如上所述的基板12及其結構可以是由高分子材料以射出成形方式所構成,然本創作並不加以限制基板12的材料及成形方式;另外,在本創作的較佳實施狀態中,第一貫穿孔140及第二貫穿孔160為圓孔,且第一貫穿孔140及第二貫穿孔160的孔徑大小在第二面128為最大,並隨著接近第一凹槽14及第二凹槽16的底部而遞減。 Next, please refer to Fig. 2, which is a schematic view of the substrate of the creation. As shown in FIG. 2, the second surface 128 of the substrate 12 is the first through hole 140 and the second through hole 160. In this In the created embodiment, the substrate 12 and the structure thereof as described above may be formed by injection molding of a polymer material, but the creation does not limit the material and forming manner of the substrate 12; In the preferred embodiment, the first through hole 140 and the second through hole 160 are circular holes, and the aperture sizes of the first through hole 140 and the second through hole 160 are the largest on the second surface 128, and are close to the first concave The bottom of the groove 14 and the second groove 16 are decremented.

接著,請參閱第3圖,為本創作基板佈線下視示意圖。如第3圖所示,在第一凹槽14底部的第一貫穿孔140旁,有一第一焊接點1420,第一焊接點1420經由第一凹槽壁141延伸至第一面122並形成一第一電性連接端142;在本創作的較佳實施狀態中,第一焊接點1420為幾何形狀;例如:半圓形;同時,在第一凹槽14底部另有一第二焊接點1440隔著第一貫穿孔140與第二焊接點1420相對,第二焊接點1440經由第一凹槽壁141延伸至第一面122,並形成第二電性連接端144,第二電性連接端144並隔著第一凹槽14與第一電性連接端142相對;另外,在第二凹槽16底部配置有複數個第三焊接點1620並圍繞第二貫穿孔160,第三焊接點1620各自經由第二凹槽壁161延伸至第一面122並形成複數個第三焊接點162,同時,第三焊接點162圍繞第二凹槽16;其中,第三電性連接端162中靠近基板12外側的一個第三電性連接端162可進一步有一缺口1622,以作為辨識腳。 Next, please refer to FIG. 3, which is a schematic diagram of the wiring of the original substrate. As shown in FIG. 3, a first solder joint 1420 is formed beside the first through hole 140 at the bottom of the first recess 14. The first solder joint 1420 extends to the first surface 122 via the first recess wall 141 and forms a The first electrical connection end 142; in the preferred embodiment of the present invention, the first solder joint 1420 is geometric; for example, semi-circular; meanwhile, there is a second solder joint 1440 at the bottom of the first recess 14 The first through hole 140 is opposite to the second soldering point 1420. The second soldering point 1440 extends to the first surface 122 via the first recessed wall 141, and forms a second electrical connecting end 144. The second electrical connecting end 144 And a first recess 14 is opposite to the first electrical connection end 142; in addition, a plurality of third solder joints 1620 are disposed at the bottom of the second recess 16 and surround the second through hole 160, and the third solder joints 1620 are respectively Extending to the first surface 122 via the second groove wall 161 and forming a plurality of third solder joints 162, while the third solder joint 162 surrounds the second recess 16; wherein the third electrical connection end 162 is adjacent to the substrate 12 A third electrical connection end 162 on the outer side may further have a notch 1622 as an identification leg.

在本實施例中,基板12上的第一電性連接端142、第二電性連接端144、第三電性連接端162、第一焊接點1420、第二焊接點1440及第三焊接點1620的形成方式,是先以雷射在基板12上的第一面122、第一凹槽壁141、第一凹槽14、第二凹槽壁161、第二凹槽16上雕出配置的位置,之後再經由電鍍或蒸鍍形成;然本創作並不對形成第一電性連接端142、第二電性連接端144、第三電性連接端162、第一焊接點1420、第二焊接點1440及第三焊接點1620等元件的方式、流程及材料加以限制。 In this embodiment, the first electrical connection end 142, the second electrical connection end 144, the third electrical connection end 162, the first solder joint 1420, the second solder joint 1440, and the third solder joint on the substrate 12 The 1620 is formed by first laser-depositing the first surface 122, the first groove wall 141, the first groove 14, the second groove wall 161, and the second groove 16 on the substrate 12. The position is then formed by electroplating or evaporation; however, the creation does not form the first electrical connection end 142, the second electrical connection end 144, the third electrical connection end 162, the first solder joint 1420, and the second soldering. The manner, flow and materials of the components such as the point 1440 and the third solder joint 1620 are limited.

接著,請同時參閱第4圖及第5圖,分別為本創作立體電路封裝結構下視示意圖及本創作立體電路封裝結構剖視示意圖,其中,第4圖兩端之連線XX’,對應第5圖連線XX’。如第4圖及第5圖所示,本創作立體電路封裝結構1,為在如第3圖所述的基板12上配置一個第一晶粒18及一個第二晶粒20;其中,第一晶粒18具有第一上端180及第一下 端182,第一上端180並有複數個第一焊墊184;第一晶粒18係配置於第一凹槽14,並使第一上端180正對第一貫穿孔140,且第一焊墊184分別與第一焊接點1420及第二焊接點1440電性連接;同時,第二晶粒20具有第二上端200及第二下端202,第二上端200並有複數個第二焊墊204;當第二晶粒20為一種光感測元件時,晶粒20上的光感測區(未顯示於圖中)會集中在第二上端200的一區域;第二晶粒20係配置於第二凹槽16,並使第二上端200的光感測區(未顯示於圖中)正對第二貫穿孔160,且第二焊墊204與第三焊接點1620電性連接。 Next, please refer to FIG. 4 and FIG. 5 at the same time, respectively, which are schematic diagrams of the schematic diagram of the creation of the three-dimensional circuit package structure and a schematic diagram of the package structure of the creation of the three-dimensional circuit, wherein the connection line XX' at both ends of the fourth figure corresponds to the first Figure 5 shows the line XX'. As shown in FIG. 4 and FIG. 5, the inventive three-dimensional circuit package structure 1 is provided with a first die 18 and a second die 20 on the substrate 12 as shown in FIG. 3; The die 18 has a first upper end 180 and a first lower The first upper end 180 has a plurality of first pads 184; the first die 18 is disposed on the first recess 14 and the first upper end 180 faces the first through hole 140, and the first pad The second die 20 has a second upper end 200 and a second lower end 202, and the second upper end 200 has a plurality of second pads 204; When the second die 20 is a light sensing component, the light sensing region (not shown) on the die 20 is concentrated in a region of the second upper end 200; the second die 20 is disposed in the first The second recess 16 has a light sensing region (not shown) facing the second through hole 160, and the second pad 204 is electrically connected to the third solder joint 1620.

在本實施例中,第一晶粒18及第二晶粒20係以覆晶(Flip chip)接合的方式配置於基板12,以第一晶粒18為例,先在第一晶粒18的第一上端180形成第一焊墊184,第一焊墊184可為錫、鉛或合金;接著,將第一晶粒18翻轉並置於第一凹槽14底部,使第一上端180正對第一貫穿孔180,同時使第一焊墊184接觸第一焊接點1420及第二焊接點1440,接著使第一焊墊184熔化再固化,便完成第一晶粒18與基板12的連接;而第二晶粒20的配置流程與第一晶粒18相似,故不再贅述,然本創作並不限定第一晶粒18與第二晶粒20的配置方法、步驟及所用的焊接材料;另外,在本實施例中,第一晶粒18為同側電極之發光二極體(LED),如:藍光LED或綠光LED。 In this embodiment, the first die 18 and the second die 20 are disposed on the substrate 12 by Flip chip bonding, and the first die 18 is taken as an example, first in the first die 18 . The first upper end 180 forms a first pad 184, and the first pad 184 may be tin, lead or alloy; then, the first die 18 is turned over and placed at the bottom of the first groove 14, so that the first upper end 180 is facing the first The first die 184 is consistently perforated 180, and the first pad 184 is contacted with the first pad 1420 and the second pad 1440, and then the first pad 184 is melted and solidified to complete the connection of the first die 18 to the substrate 12; The configuration of the second die 20 is similar to that of the first die 18, and therefore will not be described again. However, the present invention does not limit the method, the steps, and the soldering materials used for the first die 18 and the second die 20; In this embodiment, the first die 18 is a light emitting diode (LED) of the same side electrode, such as a blue LED or a green LED.

再接著,請參閱第6圖,為本創作立體電路封裝結構第二實施例剖視示意圖。如第6圖所示,分別在如第5圖所示之立體電路封裝結構1的第一凹槽14及第二凹槽16內形成第一封膠層148及第二封膠層168,第一封膠層148將第一晶粒18的第一下端182覆蓋,同時,第二封膠層168將第二晶粒20的第二下端202覆蓋,如此,可使立體電路封裝結構1’擁有更好的可靠度;其中,第一封膠層148及第二封膠層168可為環氧樹脂;接著,在第一貫穿孔140中形成第三封膠層1400,第三封膠層1400並覆蓋第一晶粒18的第一上端180;同時,在第二貫穿孔160中形成第四封膠層1600,第四封膠層1600並覆蓋第二晶粒20的第二上端200,如此,便能使立體電路封裝結構1’進一步擁有更好的可靠度;其中,第三封膠層1400及第四封膠層1600可為透明環氧樹脂;而立體電路封裝結構1’的其他元 件及結構,皆與立體電路封裝結構1相同,故不再贅述。 Next, please refer to FIG. 6 , which is a cross-sectional view of a second embodiment of the inventive three-dimensional circuit package structure. As shown in FIG. 6, a first encapsulation layer 148 and a second encapsulation layer 168 are formed in the first recess 14 and the second recess 16 of the three-dimensional circuit package structure 1 as shown in FIG. An adhesive layer 148 covers the first lower end 182 of the first die 18, and the second sealant 168 covers the second lower end 202 of the second die 20. Thus, the three-dimensional circuit package structure 1' can be The first sealant layer 148 and the second sealant layer 168 can be epoxy; then, the third sealant layer 1400 is formed in the first through hole 140, and the third sealant layer is formed. 1400 and covering the first upper end 180 of the first die 18; meanwhile, a fourth sealant layer 1600 is formed in the second through hole 160, and the fourth sealant layer 1600 covers the second upper end 200 of the second die 20, In this way, the three-dimensional circuit package structure 1 ′ can further have better reliability; wherein the third sealant layer 1400 and the fourth sealant layer 1600 can be transparent epoxy; and the three-dimensional circuit package structure 1 ′ yuan The components and structures are the same as those of the three-dimensional circuit package structure 1, and therefore will not be described again.

再接著,請參閱第7圖,為本創作立體電路封裝結構第三實施例剖視示意圖。如第7圖所示,立體電路封裝結構1”其第一貫穿孔140中配置一第一透光罩1402,第二貫穿孔160中配置一第二透光罩1602;其中,第一透光罩1402可為凸面結構之透鏡,使得由第一晶粒18發出的光在通過第一光罩1402時會發生聚光效果;第一透光罩1402亦可為平面之擴散膜(Diffuser)結構,可使第一透光罩1402具有將光擴散的效果,因此當光由第一晶粒18發出並經過第一透光罩1402時,便可因散射而增加光照射的面積;同時,第二透光罩1602可為凹面結構之透鏡,使進入第二貫穿孔160的光能產生聚焦的效果,而能增加第二晶粒20的光感測效率;其中,第一透光罩1402及第二透光罩1602可先以打磨、模塑等方式製作成型後,再分別置入第一貫穿孔140及第二貫穿孔160;且第一透光罩1402的頂端可高於、等於或低於第二面128,第二透光罩1602的頂端可高於、等於或低於第二面128;而本創作並不對形成第一透光罩1402及第二光罩1602的結構、材料、方法或流程加以限制;至於立體電路封裝結構1”的其他元件及結構,皆與立體電路封裝結構1相同,故不再贅述。 Next, please refer to FIG. 7 , which is a cross-sectional view of a third embodiment of the creative three-dimensional circuit package structure. As shown in FIG. 7 , a first transparent cover 1402 is disposed in the first through hole 140 of the three-dimensional circuit package structure 1′′, and a second transparent cover 1602 is disposed in the second through hole 160. The cover 1402 can be a lens of a convex structure, such that the light emitted by the first die 18 can condense when passing through the first reticle 1402; the first transparent cover 1402 can also be a planar diffuser film (Diffuser) structure. The first light transmissive cover 1402 can have the effect of diffusing light, so that when light is emitted from the first die 18 and passes through the first transmissive cover 1402, the area of the light irradiation can be increased by scattering; The light transmissive cover 1602 can be a lens of a concave structure, so that the light entering the second through hole 160 can produce a focusing effect, and can increase the light sensing efficiency of the second die 20; wherein, the first transparent cover 1402 and The second transparent cover 1602 can be formed by grinding, molding, etc., and then placed into the first through hole 140 and the second through hole 160 respectively; and the top end of the first transparent cover 1402 can be higher than, equal to or Lower than the second surface 128, the top end of the second transparent cover 1602 may be higher than, equal to or lower than the second surface 128; The present invention does not limit the structure, material, method or flow of forming the first transparent cover 1402 and the second light cover 1602; as for the other components and structures of the three-dimensional circuit package structure 1", the same as the three-dimensional circuit package structure 1, Therefore, it will not be repeated.

在完成立體電路封裝結構1、1’、1”後,此立體電路封裝結構1、1’、1”通常會被配置至一印刷電路板(未顯示於圖中)上,以產生模組的功能。但由於封裝結構的尺寸會受限制,通常在進行立體電路的配置時,無法將每一電性接點的尺寸及距離做良好的配置,這會造成立體電路封裝結構1、1’、1”上的電性接點無法與印刷電路板(未顯示於圖中)上的電性接點做良好的連接。為了克服此一實際上的困難,再接著,請同時參閱第8A圖、第8B圖,為本創作立體電路封裝結構第三實施例剖視圖;其中,第8A圖、第8B圖分別為本創作軟板上視示意圖、本創作軟板下視示意圖。如第8A圖及第8B圖所示,軟板3有第三面31及相對的第四面33,第三面31具有複數個第一電性接點35,第四面33具有複數個第二電性接點37,第一電性接點35及第二電性接點37之間透過複數個軟板穿孔360和其中的金屬材料361電性連接;其中,第二電性接點37的排列位置與基板12的第一面122上的第一電性連接端142、第二電性連接端144、第三電 性連接端162相對;此外,其中之一位於第三面31角落的第一電性連接點35有一缺口350,以作為辨識腳。 After the three-dimensional circuit package structure 1, 1 ', 1" is completed, the three-dimensional circuit package structure 1, 1 ', 1" is usually disposed on a printed circuit board (not shown) to generate a module. Features. However, since the size of the package structure is limited, it is usually impossible to configure the size and distance of each electrical contact when the configuration of the three-dimensional circuit is performed, which may result in the three-dimensional circuit package structure 1, 1 ', 1" The electrical contacts cannot be well connected to the electrical contacts on the printed circuit board (not shown). To overcome this practical difficulty, please refer to Figure 8A and Figure 8B at the same time. A cross-sectional view of the third embodiment of the present invention is a three-dimensional circuit package structure; wherein, FIG. 8A and FIG. 8B are respectively a schematic view of the creation soft board, and a schematic diagram of the original soft board, as shown in FIG. 8A and FIG. 8B. The third surface 31 has a plurality of first electrical contacts 35, and the fourth surface 33 has a plurality of second electrical contacts 37. The first surface 33 has a plurality of second electrical contacts 37. The electrical contact 35 and the second electrical contact 37 are electrically connected to the metal material 361 through a plurality of flexible plate through holes 360; wherein the second electrical contact 37 is arranged at the first position of the substrate 12 The first electrical connection end 142, the second electrical connection end 144, and the third electric power on the surface 122 The connector 162 is opposite; in addition, one of the first electrical connection points 35 located at the corner of the third face 31 has a notch 350 as an identification pin.

再接著,請參閱第9圖,為本創作軟板與立體電路封裝結構結合示意圖。如第9圖所示,軟板3的第四面33與立體電路封裝結構1的第一面122互相接合,且第一電性連接端142、第二電性連接端144、第三電性連接端162皆與第二電性接點37電性連接;因為第一面122的空間有所限制,使第一電性連接端142、第二電性連接端144、第三電性連接端162無法整齊排列,可能對立體電路封裝結構1後續的製程有所影響,若本創作以上述實施方式實施,則能使立體電路封裝結構1得以透過排列整齊的第一電性接點35與其他裝置(例如:印刷電路板)電性連接,且軟板3可以選擇使用高分子材料(例如:環氧樹脂-Epoxy)來形成,故可以使本創作的軟板3相當薄,使得加上軟板3以後的立體電路封裝結構1的體積不會明顯增加。 Then, please refer to FIG. 9 , which is a schematic diagram of the combination of the creative soft board and the three-dimensional circuit package structure. As shown in FIG. 9, the fourth surface 33 of the flexible board 3 and the first surface 122 of the three-dimensional circuit package structure 1 are bonded to each other, and the first electrical connection end 142, the second electrical connection end 144, and the third electrical connection. The connection end 162 is electrically connected to the second electrical contact 37. Because the space of the first surface 122 is limited, the first electrical connection end 142, the second electrical connection end 144, and the third electrical connection end are provided. 162 can not be neatly arranged, which may affect the subsequent process of the three-dimensional circuit package structure 1. If the present embodiment is implemented in the above embodiment, the three-dimensional circuit package structure 1 can be transmitted through the aligned first electrical contacts 35 and other The device (for example, a printed circuit board) is electrically connected, and the soft board 3 can be formed by using a polymer material (for example, epoxy resin-Epoxy), so that the soft board 3 of the present invention can be made relatively thin, so that the soft board is added. The volume of the three-dimensional circuit package structure 1 after the board 3 is not significantly increased.

根據本創作所提出之立體電路封裝結構1、1’、1”,由於可先以射出成形、雷射雕刻及電鍍等方式形成如第3圖所示的基板12佈線結構,於是半導體廠在進行封裝時,只需透過覆晶接合即可將第一晶粒18、第二晶粒20與基板12完成結合並完成封裝,能有效減少封裝製程所需的步驟與時間,進一步降低成本,也因為步驟的減少而能提高封裝成品的可靠度,更因為有另外模組化的軟板3,能使立體電路結構1、1’、1”在進行後續封裝時,也能有良好的對外電路連接。 According to the three-dimensional circuit package structure 1, 1', 1" proposed by the present invention, since the wiring structure of the substrate 12 as shown in FIG. 3 can be formed by injection molding, laser engraving, plating, or the like, the semiconductor factory is performing. In the package, the first die 18 and the second die 20 can be combined with the substrate 12 through the flip chip bonding to complete the package, which can effectively reduce the steps and time required for the packaging process, further reducing the cost, and also because The reduction of the steps can improve the reliability of the packaged product, and because of the additional modular soft board 3, the three-dimensional circuit structure 1, 1 ', 1" can also have a good external circuit connection when performing subsequent packaging. .

雖然本創作以前述之較佳實施例揭露如上,然其並非用以限定本創作,任何熟習相像技藝者,在不脫離本創作之精神和範圍內,當可作些許之更動與潤飾,因此本創作之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。 Although the present invention has been described above with reference to the preferred embodiments thereof, it is not intended to limit the present invention, and anyone skilled in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of patent protection of the creation shall be subject to the definition of the scope of the patent application attached to this specification.

1‧‧‧立體電路封裝結構 1‧‧‧Three-dimensional circuit package structure

12‧‧‧基板 12‧‧‧Substrate

122‧‧‧第一面 122‧‧‧ first side

123‧‧‧擋牆 123‧‧‧Retaining wall

128‧‧‧第二面 128‧‧‧ second side

14‧‧‧第一凹槽 14‧‧‧First groove

141‧‧‧第一凹槽壁 141‧‧‧First groove wall

142‧‧‧第一電性連接端 142‧‧‧First electrical connection

144‧‧‧第二電性連接端 144‧‧‧Second electrical connection

16‧‧‧第二凹槽 16‧‧‧second groove

161‧‧‧第二凹槽壁 161‧‧‧second groove wall

162‧‧‧第三電性連接端 162‧‧‧The third electrical connection

1622‧‧‧缺口 1622‧‧‧ gap

18‧‧‧第一晶粒 18‧‧‧First grain

182‧‧‧第一下端 182‧‧‧ first lower end

20‧‧‧第二晶粒 20‧‧‧Second grain

202‧‧‧第二下端 202‧‧‧second lower end

XX’‧‧‧連線 XX’‧‧‧ connection

Claims (13)

一種立體電路封裝結構,包括一基板,該基板有一第一面及與該第一面相對之一第二面,該第一面具有一第一凹槽及一第二凹槽,該第一凹槽及該第二凹槽之間具有一擋牆以相互隔離,該立體電路封裝結構的特徵在於:該第一凹槽包括:一第一貫穿孔,位於該第一凹槽底部並連通至該第二面;一第一凹槽壁,位於該第一凹槽底部及該第一面之間;一第一焊接點,位於該第一凹槽底部的該第一貫穿孔旁,該第一焊接點並經由該第一凹槽壁延伸至該第一面並形成一第一電性連接端;及一第二焊接點,位於該第一凹槽底部的該第一貫穿孔旁,與該第一焊接點相對,該第二焊接點並經由該第一凹槽壁延伸至該第一面並形成一與該第一電性連接端相對的第二電性連接端;該第二凹槽包括:一第二貫穿孔,位於該第二凹槽底部並連通至該第二面;一第二凹槽壁,位於該第二凹槽底部及該第一面之間;及複數個第三焊接點,位於該第二凹槽底部並圍繞該第二貫穿孔,該些第三焊接點並經由該第二凹槽壁延伸至該第一面並形成複數個第三電性連接端;一第一晶粒,具有一第一上端及一第一下端,該第一上端具有複數個第一焊墊,該第一晶粒配置於該第一凹槽,且該第一上端正對該第一貫穿孔,該些第一焊墊並分別與該第一焊接點及該第二焊接點電性連接;及一第二晶粒,具有一第二上端及一第二下端,該第二上端具有複數個第二焊墊,該第二晶粒配置於該第二凹槽,且該第二上端正對該第二貫穿孔,該些第二焊墊並分別與該些第三焊接點電性連接。 A three-dimensional circuit package structure includes a substrate having a first surface and a second surface opposite to the first surface, the first mask having a first recess and a second recess, the first recess The first and second recesses are separated from each other by a retaining wall. The first recess includes a first through hole at a bottom of the first recess and connected to the a first surface of the first groove is located between the bottom of the first groove and the first surface; a first soldering point is located beside the first through hole at the bottom of the first groove, the first a soldering point extends to the first surface via the first groove wall and forms a first electrical connection end; and a second soldering point is located beside the first through hole at the bottom of the first groove, and The second soldering point is opposite to the first soldering surface and extends to the first surface and forms a second electrical connecting end opposite to the first electrical connecting end; the second recess The method includes: a second through hole at the bottom of the second groove and communicating to the second surface; a second groove wall Located between the bottom of the second groove and the first surface; and a plurality of third solder joints located at the bottom of the second groove and surrounding the second through hole, and the third solder joints are passed through the second recess The first sidewall has a first upper end and a first lower end, and the first upper end has a plurality of first pads, and the first upper end has a plurality of first pads The first die is disposed in the first recess, and the first upper end is opposite to the first through hole, and the first pads are electrically connected to the first solder joint and the second solder joint respectively; a second die having a second upper end and a second lower end, the second upper end having a plurality of second pads, the second die being disposed in the second groove, and the second upper end is facing The second through holes are electrically connected to the third solder joints. 根據申請專利範圍第1項所述之立體電路封裝結構,該第一凹槽進一步配置一封膠層,該封膠層並將該第一晶粒的該第一下端覆蓋。 The first recess is further provided with an adhesive layer covering the first lower end of the first die. 根據申請專利範圍第1項所述之立體電路封裝結構,該第二凹槽進一步配置一封膠層,該封膠層並將該第二晶粒的該第二下端覆蓋。 The second recess is further provided with a glue layer covering the second lower end of the second die. 根據申請專利範圍第3項所述之立體電路封裝結構,該第二凹槽之該封膠層為環氧樹脂。 According to the three-dimensional circuit package structure of claim 3, the sealant layer of the second groove is an epoxy resin. 根據申請專利範圍第1項所述之立體電路封裝結構,該第一貫穿孔進一步具有一封膠層,該封膠層並將該第一晶粒的該第一上端覆蓋。 The first through hole further has a glue layer covering the first upper end of the first die. 根據申請專利範圍第1項所述之立體電路封裝結構,該第二貫穿孔進一步具有一封膠層,該封膠層並將該第二晶粒的該第二上端覆蓋。 The second through hole further has a glue layer covering the second upper end of the second die. 根據申請專利範圍第6項所述之立體電路封裝結構,該第二貫穿孔之該封膠層為透明環氧樹脂。 According to the three-dimensional circuit package structure of claim 6, the sealant layer of the second through hole is a transparent epoxy resin. 根據申請專利範圍第1項所述之立體電路封裝結構,該些第三電性連接端其中之一、位於該第一面角落的該第三電性連接端進一步具有一缺口。 According to the three-dimensional circuit package structure of claim 1, the third electrical connection end of the third electrical connection end further has a notch at the third electrical connection end of the first corner. 根據申請專利範圍第1項所述之立體電路封裝結構,該第一貫穿孔進一步具有一第一透光罩。 According to the three-dimensional circuit package structure of claim 1, the first through hole further has a first light transmissive cover. 根據申請專利範圍第9項所述之立體電路封裝結構,該第一透光罩為透鏡或擴散模。 According to the three-dimensional circuit package structure of claim 9, the first transparent cover is a lens or a diffusion mold. 根據申請專利範圍第1項所述之立體電路封裝結構,該第二貫穿孔進一步具有一第二透光罩。 According to the three-dimensional circuit package structure of claim 1, the second through hole further has a second transparent cover. 根據申請專利範圍第11項所述之立體電路封裝結構,該第二透光罩為透鏡。 According to the three-dimensional circuit package structure of claim 11, the second transparent cover is a lens. 一種立體電路封裝結構,包括一基板,該基板有一第一面及與該第一面相對之一第二面,該第一面具有一第一凹槽及一第二凹槽,該第一凹槽及該第二凹槽之間具有一擋牆以相互隔離,該立體電路封裝結構的特徵在於:該第一凹槽包括:一第一貫穿孔,位於該第一凹槽底部並連通至該第二面; 一第一凹槽壁,位於該第一凹槽底部及該第一面之間;一第一焊接點,位於該第一凹槽底部的該第一貫穿孔旁,該第一焊接點並經由該第一凹槽壁延伸至該第一面並形成一第一電性連接端;及一第二焊接點,位於該第一凹槽底部的該第一貫穿孔旁,與該第一焊接點相對,該第二焊接點並經由該第一凹槽壁延伸至該第一面並形成一與該第一電性連接端相對的第二電性連接端;該第二凹槽包括:一第二貫穿孔,位於該第二凹槽底部並連通至該第二面;一第二凹槽壁,位於該第二凹槽底部及該第一面之間;及複數個第三焊接點,位於該第二凹槽底部並圍繞該第二貫穿孔,該些第三焊接點並經由該第二凹槽壁延伸至該第一面並形成複數個第三電性連接端;一第一晶粒,具有一第一上端及一第一下端,該第一上端具有複數個第一焊墊,該第一晶粒配置於該第一凹槽,且該第一上端正對該第一貫穿孔,該些第一焊墊並分別與該第一焊接點及該第二焊接點電性連接;一第二晶粒,具有一第二上端及一第二下端,該第二上端具有複數個第二焊墊,該第二晶粒配置於該第二凹槽,且該第二上端正對該第二貫穿孔,該些第二焊墊並分別與該些第三焊接點電性連接;及一軟板,具有一第三面及相對的一第四面,該第三面具有複數個第一電性接點,該第四面與該第一面相接合,該第四面進一步具有複數個第二電性接點,該些第二電性接點以相對該第一焊接點、該第二焊接點及該些第三焊接點的排列方式排列並與該第一焊接點、該第二焊接點及該些第三焊接點電性連接,該些第二電性接點透過複數個軟板穿孔及複數個該些軟板穿孔中的金屬材料與該些第一電性接點電性連接。 A three-dimensional circuit package structure includes a substrate having a first surface and a second surface opposite to the first surface, the first mask having a first recess and a second recess, the first recess The first and second recesses are separated from each other by a retaining wall. The first recess includes a first through hole at a bottom of the first recess and connected to the Second side; a first groove wall is located between the bottom of the first groove and the first surface; a first soldering point is located beside the first through hole at the bottom of the first groove, and the first soldering point is via The first groove wall extends to the first surface and forms a first electrical connection end; and a second soldering point is located beside the first through hole at the bottom of the first groove, and the first solder joint The second soldering point extends to the first surface via the first recessed wall and forms a second electrical connecting end opposite to the first electrical connecting end; the second recess includes: a second through hole at the bottom of the second groove and communicating to the second surface; a second groove wall located between the bottom of the second groove and the first surface; and a plurality of third welding points located at The second groove bottom surrounds the second through hole, and the third soldering points extend to the first surface via the second groove wall and form a plurality of third electrical connecting ends; a first die Having a first upper end and a first lower end, the first upper end has a plurality of first pads, and the first die is disposed on the first a groove, and the first upper end is opposite to the first through hole, the first pads are electrically connected to the first soldering point and the second soldering point respectively; and a second die has a second An upper end and a second lower end, the second upper end has a plurality of second pads, the second die is disposed in the second groove, and the second upper end is facing the second through hole, the second welding The pads are electrically connected to the third solder joints respectively; and a flexible board has a third surface and an opposite fourth surface, the third surface having a plurality of first electrical contacts, the fourth surface Bonding with the first surface, the fourth surface further has a plurality of second electrical contacts, the second electrical contacts being opposite to the first solder joint, the second solder joint, and the third solder joints Arranging and electrically connecting the first soldering point, the second soldering point and the third soldering point, the second electrical contacts are through a plurality of flexible board perforations and a plurality of the soft board perforations The metal material is electrically connected to the first electrical contacts.
TW102203603U 2013-02-26 2013-02-26 Stereoscopic structure of circuit package TWM473609U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112652611A (en) * 2020-12-18 2021-04-13 维沃移动通信有限公司 Sensor packaging structure and electronic equipment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112652611A (en) * 2020-12-18 2021-04-13 维沃移动通信有限公司 Sensor packaging structure and electronic equipment
WO2022127726A1 (en) * 2020-12-18 2022-06-23 维沃移动通信有限公司 Sensor encapsulation structure and electronic device

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