M396474 五、新型說明： 【新型所屬之技術領域】 本新型是有關於一種晶片式電阻， 化晶片式電阻。 特別疋心-種抗硫 【先前技術】 傳統電阻由於體積較大，而且必須先在電路板鑽孔， 才能將傳統電阻設置於電路板上，因此泛用性受到限制， 所以近年來傳統電阻已經逐漸被晶片式電阻所取代。 然而，在某些高污染的環境中，例如汽車、感測器、 半導體設備、採礦設備等，由於空氣中含有高濃度的硫或 硫化物，所以硫或硫化物會從現有晶片式電阻的封裝縫隙 滲入内部，並與電連接於電阻材料的電極材料產生化學反 應。通常電極材料是銀，銀與硫很容易產生化學反應^轉 變為硫化銀，如此將導致整個現有晶片式電阻成為絕緣體 ，進而嚴重影響其電性特徵。 易因為環境惡劣而 阻的電性大幅改變M396474 V. New description: [New technical field] The present invention relates to a chip type resistor and a wafer type resistor. Specially concerned - kind of sulfur resistance [Prior Art] Traditional resistors have a large volume and must be drilled in the circuit board before the conventional resistors can be placed on the circuit board. Therefore, the generality is limited, so in recent years, the conventional resistors have been Gradually replaced by chip resistors. However, in some highly polluted environments, such as automobiles, sensors, semiconductor equipment, mining equipment, etc., due to the high concentration of sulfur or sulfide in the air, sulfur or sulfide will be encapsulated from existing chip resistors. The slit penetrates into the interior and chemically reacts with the electrode material electrically connected to the resistive material. Usually, the electrode material is silver, and silver and sulfur are easily chemically converted into silver sulfide, which will cause the entire existing chip resistor to become an insulator, thereby seriously affecting its electrical characteristics. Easy to change due to poor environment
所以’現有晶片式電阻内的電極容 硫化成為絕緣體，而導致現有晶片式電 ，所以有必要對以上缺點進行改善。 【新型内容】 因此，本新型之目的，即在提供一種密封效果較佳的 抗硫化晶片式電阻。 於是’本新型抗硫化晶片式電阻，包合— 03 基板、二電 極、一電阻層，以及一保護單元。 所述電極分別設置於該基板相反兩側，每—電極具有 3 M396474 —連接於該基板頂面的頂面一 板側緣的側緣部，以及—連…f接於该頂面部與該基 底面部，每n 4接於該侧緣部與該基板底面的 ' 玉的頂面部具有一連接於該側緣部的第— 奴’以及—連接於該第-段朗離該麟料第二段。 該電阻層包括一設置於該基板項面的中央部，以及— =中央部向四周延伸的延伸部，該延伸部是覆蓋遮蔽於 所述電極的頂面部的第二段上。 、 該保護單元包括一環繞設置益能局部遮蔽該電阻層盘 所^電極以密封所述頂面部的環繞保護層、-設置於該電 阻的中央部頂面並位於該環繞保護層内的中間保護層， 以及一設置於該中_護層上_部保，該 層具有—連接於該中間保護層頂面的頂中部，以及—由; 頂中部向四周延伸並能局部遮蔽該環繞保護層的頂遮部/ 本新型的功效在於：藉由該環繞保護層、中間保護層 、頂部保護層、電阻層、基板交互層疊的設計，以確，實密 封所述電極的頂面部，進而能避免所述電極的頂面部接觸 於外界空氟而被硫化成為絕緣體。 【實施方式】 有關本新型之前述及其他技術内容、特點與功效，在 以下配合參考圖式之—個較佳實施例的詳細說明中，將可 清楚的呈現。 參閱圖卜為本新型抗硫化晶片式電阻的較佳實施例， 包含-基板2、二電極3、一電阻層4’以及一保護單元5 所述電極3是概呈u字型並分別設置於該基板2相反 兩側。每一電極3具有一連接於該基板2頂面的頂面部31 、一連接於該頂面部31與該基板2側緣的側緣部32、一連 接於該側緣部32與該基板2底面的底面部33、一設置於該 側緣部32上的鎳層34，以及-設置於該鎳層34上的錫層 35 〇 值得提的疋，本新型抗硫化晶片式電阻在實際使用 時是透過所述底面部33與銲錫而能貼附電連接於一電路板 (圖未示）上，然而此為本技術領域中具有通常知識者所 易於知悉’因此不再另外繪示說明。 该頂面部31具有一連接於該侧緣部32的第一段311， 以及-連接於該第—段311的第二段312。特別說明的是， ^本較佳實施例中，所述電極3的頂面部31是以銀製成， 田〗…、所述頂面部3 1也能夠使用其他具有良好導電性的金屬 製作’⑼大部份具有良好導電性的金屬（部份貴金屬除 外）都十分容易與硫產生化學反應而形成不易導電的硫化 、該電阻層4包括一設置於該基板2頂面的中央部Μ， 以及-由該中央部41肖四周延伸的延伸部Μ，該延伸部 是覆蓋遮蔽於所述電極3的頂面部31的第二段312上。 該二電極3的第二段312是用以電連接於該電阻層4相反 兩側的延伸部42。 該保護單元5包括—環繞設置並能局部遮蔽該電阻層* 〇所述電極3並能密封所述頂面部31的環繞保護層η、一 M396474 設置於該電阻層4的中央部41 兴卩41頂面並位於該環繞保護層51 内的中間保護層52，以及_ μ s认—山 及叹置於该中間保護層52上的頂 部保護層53。所述電極3 _緣部32是同向延伸並遮蔽於 =環_制51外周緣。制說明的是，由於該環繞保護 曰51疋％型’因此在圖μ剖面圖中會形成左右兩側。 該頂部保護層53具有—連接於該中間保護層52頂面 的頂中部531，以及-由該頂中部531向四周延伸並能局部 遮蔽該環繞保護層51的頂遮部532。該環繞保護層Η且有 -遮蔽於所述電極3㈣面部31與側緣部Κ的外圍部⑴ ’以及-連接於該外圍部511並局部遮蔽於該電阻層4之延 伸部42的内圍部512。 特別說明的是，在本較佳實施例中，該中間保護層U 厚度為30” ；該頂部保護層53的頂中部53ι厚度為以 ι藉由該頂中部531的設相進—步增加該中間保護層 52與頂部保護層53的整體厚度。 ▲本新型抗硫化晶片式電阻利用該保護單元5的環繞保 護層51、甲間保護層52、頂部保護層53交互層疊的設置 ’並與該基板2相配合以將該電阻層4密封於其中。而該 環繞保㈣51、基板2、電阻層4則是相配合以密封所述 電極3的頂面部31 ’藉此避免所述電極3的頂面部η遭到 硫化而降低導電性，甚至造成整體成為絕緣體。 綜上所述，本新型抗硫化晶片式電阻藉由 ㈣、中間保護層52、頂部保護層53、電阻層：=蒦2 父互層疊的設計’以確實密封所述電極3的頂面部Μ，進 6Therefore, the electrode in the existing chip resistor is vulcanized into an insulator, which results in the existing wafer type electric power, so it is necessary to improve the above disadvantages. [New content] Therefore, the object of the present invention is to provide a vulcanization resistant chip resistor having a better sealing effect. Thus, the novel anti-vulcanization chip resistor, including - 03 substrate, two electrodes, a resistive layer, and a protection unit. The electrodes are respectively disposed on opposite sides of the substrate, each electrode has 3 M396474 - a side edge portion connected to a top edge of a top surface of the top surface of the substrate, and - is connected to the top surface and the substrate a face portion, each of which is connected to the side edge portion and the bottom surface portion of the bottom surface of the substrate has a first slave connected to the side edge portion and is connected to the second portion of the second segment. The resistive layer includes a central portion disposed on the surface of the substrate, and - an extending portion extending toward the periphery of the central portion, the extending portion covering the second portion of the top surface portion of the electrode. The protection unit includes a surrounding protective layer that partially shields the electrode of the resistive layer to seal the top surface, an intermediate protection disposed on a top surface of the central portion of the resistor and located in the surrounding protective layer a layer, and a layer disposed on the middle layer, the layer has a top central portion connected to a top surface of the intermediate protective layer, and - a top portion extending toward the periphery and partially shielding the surrounding protective layer The effect of the top cover/the novel is that the top surface of the electrode is sealed by the design of the surrounding protective layer, the intermediate protective layer, the top protective layer, the resistive layer and the substrate, thereby avoiding the The top surface of the electrode is vulcanized into an insulator in contact with the outside air. The above and other technical contents, features and effects of the present invention will be apparent from the following detailed description of the preferred embodiments. Referring to FIG. 2, a preferred embodiment of the novel vulcanization resistant chip resistor includes a substrate 2, a second electrode 3, a resistive layer 4', and a protective unit 5. The electrodes 3 are substantially u-shaped and are respectively disposed on The substrate 2 is on opposite sides. Each of the electrodes 3 has a top surface portion 31 connected to the top surface of the substrate 2, a side edge portion 32 connected to the top surface portion 31 and the side edge of the substrate 2, and a side edge portion 32 and a bottom surface of the substrate 2 The bottom surface portion 33, a nickel layer 34 disposed on the side edge portion 32, and a tin layer 35 disposed on the nickel layer 34 are not worth mentioning. The novel anti-vulcanization chip resistor is actually used. The bottom surface portion 33 and the solder can be electrically connected to a circuit board (not shown), but this is well known to those of ordinary skill in the art and thus will not be further illustrated. The top surface portion 31 has a first segment 311 connected to the side edge portion 32, and a second segment 312 connected to the first segment 311. In particular, in the preferred embodiment, the top surface portion 31 of the electrode 3 is made of silver, and the top surface portion 31 can also be made of other metals having good electrical conductivity '(9) large. Some of the metals with good electrical conductivity (except for some precious metals) are very susceptible to chemical reaction with sulfur to form a non-conductive vulcanization. The resistive layer 4 includes a central portion disposed on the top surface of the substrate 2, and An extension portion 延伸 extending around the central portion 41 is covered by a second portion 312 that is shielded from the top surface portion 31 of the electrode 3. The second section 312 of the two electrodes 3 is an extension 42 for electrically connecting to opposite sides of the resistive layer 4. The protection unit 5 includes a surrounding protective layer η which is disposed around the surface and can partially shield the resistive layer*, and can seal the top surface portion 31. A M396474 is disposed at the central portion 41 of the resistive layer 4. The top surface is located in the intermediate protective layer 52 surrounding the protective layer 51, and the top protective layer 53 is placed on the intermediate protective layer 52. The electrode 3 - edge portion 32 extends in the same direction and is shielded from the outer circumference of the ring. It is to be noted that since the surrounding protection 曰51疋% type is formed, the left and right sides are formed in the sectional view of Fig. The top protective layer 53 has a top middle portion 531 connected to the top surface of the intermediate protective layer 52, and a top shield portion 532 extending from the top middle portion 531 and partially shielding the surrounding protective layer 51. The surrounding protective layer has a peripheral portion (1)' that is shielded from the surface portion 31 and the side edge portion of the electrode 3, and a peripheral portion that is connected to the peripheral portion 511 and partially shielded from the extending portion 42 of the resistive layer 4. 512. Specifically, in the preferred embodiment, the intermediate protective layer U has a thickness of 30"; the top central portion 53 of the top protective layer 53 has a thickness of ι by the phase of the top middle portion 531. The overall thickness of the intermediate protective layer 52 and the top protective layer 53. ▲ The novel anti-vulcanized chip resistor utilizes the arrangement of the protective layer 5 of the protective layer 5, the inter-layer protective layer 52, and the top protective layer 53. The substrate 2 cooperates to seal the resistive layer 4 therein, and the surrounding protective layer (4) 51, the substrate 2, and the resistive layer 4 are matched to seal the top surface portion 31' of the electrode 3, thereby avoiding the top of the electrode 3. The face η is vulcanized to reduce the conductivity, and even the whole becomes an insulator. In summary, the novel anti-vulcanization chip resistor is provided by (4), the intermediate protective layer 52, the top protective layer 53, and the resistive layer: = 蒦 2 The laminated design 'to reliably seal the top surface of the electrode 3, into the
Jvuy〇474 而此避免所述電極3的頂面部3i接觸於外界空氣而被硫化 成為絕緣體，故確實能達成本新型之目的。 准、上所述者，僅為本新型之較佳實施例而已，當不 能以此限定本新型實施之範圍，即大凡依本新型中請專利 範圍及新型說明内容所作之簡單的等效變化與修飾，皆仍 屬本新型專利涵蓋之範圍内。 【圖式簡單說明】 圖1是-結構示意圖，說明本新型抗硫化晶片式電阻 的較佳實施例。 M396474 【主要元件符號說明】 2…… •…基板 41…… •…中央部 3…… •…電極 42…… •…延伸部 31····. —頂面部 5 ....... •…保護單元 311… •…第一段 51…… •…環繞保護層 312… •…第二段 511… •…外圍部 32···.. •…側緣部 512… …·内圍部 33····· —底面部 52…… …·中間保護層 34••… •…鎳層 53…… …·頂部保護層 35••… •…錫層 531 ··._ •…頂中部 4…… •…電阻層 532 ···_ …頂遮部Therefore, the top surface portion 3i of the electrode 3 is prevented from being vulcanized into an insulator by being in contact with the outside air, so that the object of the present invention can be achieved. The above is only the preferred embodiment of the present invention, and the scope of the present invention cannot be limited thereto, that is, the simple equivalent change made by the patent scope and the new description in the present invention is Modifications are still within the scope of this new patent. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a structural view showing a preferred embodiment of the novel vulcanization resistant chip resistor. M396474 [Description of main component symbols] 2...... •...Substrate 41... •...Center 3...•...Electrode 42...•...Extension 31····. —Top surface 5 ....... • Protection unit 311... •...first segment 51... •...surround protection layer 312... •...second segment 511... •...peripheral portion 32···........side edge portion 512... 33·····—bottom portion 52... ...·intermediate protective layer 34••... •...nickel layer 53... ...·top protective layer 35••... •...tin layer 531 ··._ •... 4... •...resistive layer 532 ···_ ...top mask