M349037 八、新型說明： 【新型所屬之技術領域】 本新型是有關於一種半導體封裝結構，且特別是有關 於半導體晶片與基板之間電路連接的方式。 【先前技術】 為了防止積體電路元件在輸送與取置過程中受到外力 或環境因素的破壞，必須將積體電路元件包裝起來。然而， 積體電路晶片必須依照電路設計而與外界之電路相連接， 才得以發揮其應有之功能。 電子封裝（electronic packaging)可賦予積體電路元件一 套組織架構，使其能發揮既定的功能，並可建立積體電路 元件的保護結構在積體電路之封裝技術中，打線接合（wire bonding)是目前應用相當廣泛的封裝技術。 請參考第1圖，其繪示習知以打線接合製程所製成之 半導體封裝結構的立體圖。在打線接合製程中，先將晶片 12固定於基板10上，並將鋁或金等所製成之銲線16的一 端壓合在晶片12之銲墊14上，再將銲線16之另一端壓合 在基板10的導線架18上。 在電子產品薄型化的趨勢下，電子元件的體積逐漸縮 小，密度逐漸增加，打線的條數與密度也勢必隨之增加。 在有限空間令，打線的數量增加，使得打線接合製程更加 困難’導致產品良率降低。 另一方面’在打線不良或失敗時，會造成該處無法再 M349037 進行第二次打線接合，必須將整個晶片12丟棄。如此—來， •勢必導致成本上極大的損失。 * 有鑑於此，需要一種新的封裝結構及其接線方式，以 免除傳統打線的缺點，並提升封裝結構空間的使用效率， 同時提高製程良率，進而節省製作成本。 【新型内容】 ·· 纟新型-方面提供-種封裝結構，用以取代傳統的打 線結構。此封裝結構包含互相貼合之一基板和一晶片。基 2上設置有複數個貫穿基板的貫穿孔，每一貫穿孔之内‘ :有金屬層。晶片的表面設有_層/^護層以保護晶片。 當晶^與基板相貼合時，保護層會貼合基板的下表面。晶 片上設置有複數個銲墊，此些銲墊一對一對齊於此些貫穿 孔。 同時，封裝結構更包含複數個金球及複數個錫膏。此 •球分別植在每-銲墊上。當晶片與基板相貼合時，每 一鲜塾均對齊—個貫穿孔’且銲墊上的金球會容置於貫穿 孔中。而此些錫膏則分別填充至各個貫穿孔中，且接觸各 貫穿孔中的金球。當此些錫膏受熱後，此些錫膏會各自 與此些金球形成複數個導電銲點。 由此可知，本新型所揭露之封裝結構，係利用金球和 錫膏所形成之導電銲點取代打線，且導電鲜點貫穿基板。 由於錫^疋直接灌注於銲墊上方的貫穿孔中，故導電鲜點 的長度m小於傳統銲線的長度，可有效縮短訊號傳輸路 M349037 徑。另外，金球、錫膏、銲墊與金屬層，在經過加熱後， 彼此之間的電性連接將更為穩固，可有效提高製程良率， 並節省製造成本。 另一方面，本新型提供一種封襄結構，能在有限的空 間中，提供基板與晶片較為穩固的電性連接結構。基板具 有複數個貝穿孔，並在每一貫穿孔之内壁上形成一金屬 層。在晶片的表面上設置一保護層以保護晶片。晶片上還 設置有複數個銲墊，此些銲墊一對一對齊於基板上的多個 貫穿孔’每一銲墊上植有一金球。 接著，將基板與晶片互相貼合，並將此些貫穿孔分別 對齊於此些銲墊及其上的金球，使得此些金球各自位於此 些貫穿孔中。再來，在此些貫穿孔中各自填入一錫膏，使 錫膏位於金球上。還有，藉由加熱製程，使得每一錫膏與 金球形成一導電銲點。 由此可知，本新型所揭露之封裝結構，係以導電銲點 垂直貫穿基板的連接方式，取代傳統的打線製程。由於錫 膏是直接灌注於銲塾上方的貫穿孔中，因此不必預留打線 結構中導線架或引腳等元件的空間，可有效節省使用空 間。再者’金球、錫膏、銲墊與金屬I，可藉由加熱使彼 此之間的電性連接更加穩固，並避免傳統打線製程打線失 敗的情況。 【實施方式】 μ同時參考第2圖到第4圖。帛2圖繪示本新型之- M349037 實施例的封裝結構100的俯視圖，第3圖繪示本新型第2 圖之封裝結構1GG中沿著AA，連線的剖面圖，帛4圖緣示 本新塑第2圖之封裝結構1〇〇中沿著BB，連線的剖面圖。 此封裝結構100主要包含一基板110和一晶片120。基 板no上設置有複數個貫穿孔116貫穿整個基板11〇，每一 貫穿孔116的内壁上均環繞了一層金屬層U8。晶片12〇 上δΧ置有複數個銲墊126，每一銲墊126上均植有一金球 φ 132。在封裝製程中，將此些貫穿孔116——對齊此些銲墊 126,且將基板110和晶片12〇互相貼合，使得此些銲塾126 上的金球132分別容置於此些貫穿孔116之中。在此些貫 穿孔116中，金球132以外的空間均填滿了錫膏134。此些 錫膏134在受熱之後，會各自與此些金屬層U8和金球132 密合，並會略微突出於基板110的上表面112，因而形成複 數個導電銲點130。 以下將逐一詳細說明各個元件及其作用關係。 _ 在基板110上的貫穿孔116，係從基板11〇的上表面 112垂直貫穿到基板110的下表面114。貫穿孔116可利用 鑽孔製程來製作，例如：以鑽孔機進行機械鑽孔，或以雷 射光束進行鑽孔。依照實際的封裝需求，可將貫穿孔U6 的形狀調整為矩形、圓形、橢圓形、正方形或各種的形狀。 在本新型之實施例中’貫穿孔116的形狀為長方形，且其 寬度略大於金球132的直徑。 金屬層118壤繞於貫穿孔116的内壁，除可提供基板 110與晶片120上的金球132較好的導電效果之外，金屬層 8 M349037 118的表面也可使錫膏134較易附著。由此可知，金屬層 118的材質主要為導電性佳，且易與錫膏134結合的材料， 例如：金或銅。 一般而言，由於晶片120中的電子元件（如電晶體）必須 與基板110上的電路電性連接，因此晶片12〇會設置有一 安裝面122，安裝面122上配置有多個銲墊126。此些銲墊 126電性連接晶片120中的電子元件，並可用來電性連接基 板110。銲墊126通常為鋁墊，其材質主要為鋁。然而，二 墊126也可為其他具有高導電性的金屬所製成，例如：金、 銀或銅。 由於晶片120相當容易遭受外力碰撞而破裂，尤其在 封裝過程中，許多加諸在晶片12〇上的製程都極可能導致 晶片120破損。為了保護晶片12〇，可在晶片12〇的安裝面 122上形成一層保護層12扣此保護層124的材質可為聚亞 醯胺（Polyimide，PI)。 保護層124覆蓋晶片120的整個安裝面122，僅露出此 些銲墊126,以維持此些銲墊126與外界電性連接的功能。 具體而言，保護層124設有複數個向下挖空的凹槽128，即 凹槽128的底部為安裝面122的一部分。此些銲墊126分 別位於此些凹槽128中，且設置於此些凹槽128的底部上。 在本新型之實施例令，每一銲墊126上均植有一金球 132。金球132的形成方法有很多種，較常見為熱壓接合法， 係將金線穿過氧化鋁、碳化鎢或其他耐火材料所製成之接 合工具，再以電子點火或氫氮燒熔金線之末端，並利用表 9 M349037 面張力之效應，使金線形成金球132，接合工具再將金球 132下£至銲| 126 _L進行球形接合，最後將金線扭斷而留 下金球132。在本新型之實施例中，金球132的直徑略小於 貫穿孔116的寬度’約為2〇微米。 晶片120和基板1H)可利用黏性材料互相黏合，先將 黏性材料塗抹在基板U0$下表面114，或在晶片u〇之保 護層124的表面，再將晶片12〇略微抵押基板u〇，便可將 兩者黏合。一般而言，黏性材料可為黏膠、單面膠、雙面 膠或環氧樹脂。 待基板110與晶片120黏合後，晶片12〇的安裝面122 會面向基板110的下表面114,且保護層124會介於安裝面 122和基板11〇的下表面114之間。由於貫穿孔ιΐ6和銲墊 126彼此會互相對齊，故基板11〇與晶片12〇黏合後，銲墊 126上的金球Π2會位於貫穿孔116之中。 在每一貫穿孔116中，除了金球132以外的所有空間 將填滿錫膏134。如前所述，由於錫膏134與金屬層118 的附著效果佳，故錫膏134會附著於貫穿孔116之中。本 新型之實施例中，錫膏134會經過加熱製程，使錫膏134 與金屬層118和金球132的結合更為緊密。此加熱製程可 利用紅外線、加熱板、電熱管或各種的加熱方式進行加熱。 本新型之實施例係利用紅外線對錫膏134進行加熱。 在經過加熱後，各個錫膏134會與金球132結合而形 成一導電銲點130，並且會略微突出於基板u〇的上表面 112。換句話說，導電銲點130連接晶片120的銲墊126， M349037 且自基板110的下表面114垂直貫穿到基板11〇的上表面 112’並突出於上表面112。導電銲點13〇不僅可將晶片12〇 和基板110兩者電性連接，也可作為後續製程中與晶片12〇 電性接觸用的接點。 由此可知，本新型所揭露之封裝結構100，係利用金球 132和錫膏134所形成之導電銲點13〇取代傳統的打線，且 導電#點130貫穿過基板顯而易見地，導電銲點 的長度遠小於傳統銲線的長度，可有效縮短訊號傳輸路 徑。並且，由於錫膏134是直接灌注於銲墊126上方的貫 穿孔116中，因此不必預留打線結構中導線架或引腳等元 件的空間’可有效節省使用空間。 以下將就封裝製程的步驟，逐一說明各個元件的製作 方法，以及各個元件之間的結合方式。 第5A圖和第5B圖繪示本新型在基板上製作貫穿 孔U6的製程剖面圖。請參照第5A圖。首先，利用鑽孔製 程’在基板11〇上形成複數個貫穿基板110的貫穿孔116。 每—貫穿孔116二端之開口分別位於基板u〇的上表面U2 和下表面114。一般而言，鑽孔製程可利用機械鑽孔的方 式’亦即利用鑽孔機以刀具鑽穿基板11〇。在本新型之實施 例中’鑽孔製程是利用雷射光束燒穿基板u〇而形成貫穿 孔 116。 請參照第5B圖。在貫穿孔116的内壁上形成一層金屬 層118。將金屬形成於其他材質表面上的製程，諸如電鍍製 程、物理沉積製程、化學沉積製程或濺鍍製程等。 11 M349037 第6A圖和第6B圖係繪示本新型之晶片12〇的製程剖 面圖。請參照第6A圖，在晶片120的安裝面122上形成複 數個銲墊126,使此些銲墊126電性連接晶片12〇中的電子 元件（如電晶體）。並且，在晶片12〇的安裝面122上形成一 層保護層124,以保護晶片120不易因外力而破裂。形成鲜 墊126和保護層124的方法已廣為本技術領域中具有通常 知識者所熟知，在此便不再多加贅述。 請參照第6B圖。在每一銲墊i26上均植有一金球丨32。 金球132的植入方法有很多種，較常見為熱壓接合法，係 將金線136穿過氧化鋁、碳化鎢或其他耐火材料所製成之 接合工具，再以電子點火或氫氮燒熔金線136之末端，並 利用表面張力之效應，使金線136形成金球132，接合工具 再將金球132下壓至銲墊126上進行球形接合，最後將2 線136扭斷，讓金球132及其連接的金線136分離，使金 球132遺留在銲墊126上。 第7A圖至第7C圖均繪示本新型之基板11〇和晶片12〇 的製程剖面圖。請參照第7A圖，晶片12〇將藉由一黏性材 料貼合於基板110上。此黏性材料可為黏膠、單面膠、雙 面膠或環氧樹脂《具體而言，可在基板11〇的下表面114 或在晶片120的保護層124上，均勻地塗抹上黏性材料而 形成一層黏合層140。接著，將晶片12〇的安裝面ι22面向 基板110的下表面114，並將晶片120略微抵壓基板11〇， 使得晶片120的保護層124黏在黏合層上。 在黏合的過程中’需將此些銲墊126^——對齊基板110 12 M349037 上的多個貫穿孔116»如此一來’當晶片120和基板u〇 貼合後，此些銲墊126上的金球132便可分別容置於此些 貫穿孔116之中。如前所述，本實施例中貫穿孔116的形 狀為長方形，長方形的寬度略大於金球132的直徑。金球 132是位於長方形之貫穿孔116的長邊的一端。 請參考第7B圖。接下來的製程為灌入錫膏ι34於貫穿 孔Π6中。具體而言’將錫膏134從基板11〇之上表面U2 的開口填入貫穿孔116中。由於晶片12〇的尺寸甚小，貫 穿孔116的大小受到空間限制，僅在數十微米之間。為了 增加錫膏134的份量，同時方便填入錫膏134，本新型之實 施例採用長方形的貫穿孔116，並將金球132容置於貫穿孔 116中長邊的一端。藉此，錫膏134便可從貫穿孔116中長 邊的另一端填入更多的份量。 請參考第7C圖。待每一貫穿孔116中均填滿錫膏134 後，藉由加熱製程，使每一錫膏134與金球132結合而形 成一導電輝·點130。當錫膏134受熱至一定溫度時，錫膏 134會跟其所接觸之金球132和金屬層ιΐ8略微融合，使彼 此之間的電性連接更為穩111。加熱製程的種類及方法相當 夕元，諸如紅外線、加熱板或電熱管均可應用於本新型中。 在本新型之實施例中，係採用紅外線加熱。 另方面，在本新型之實施例中，銲墊ΐ2ό是排列於 明片120的中間’如第2圖所示’故貫穿孔116也排列於 基板m的中間。而且，第2圖中繪示排列成兩排的鲜塾 每排的銲墊126的排列方向均垂直於每一貫穿孔 13 M349037 116之長邊的方向。 咕參照帛8 ® ’係繪示本新型另—實施例的封裝結構 1〇〇的俯視圖。在本實施例中，此些銲墊126係排列於晶片 120的邊緣’故此些貫穿孔116也排列於基板㈣的邊緣， 並--對齊此些銲墊126。 由上述本新型較佳實施例可知，封裝結構1〇〇是以導 電銲點13G垂直貫穿基板11G的連接方式，取代傳統的打 線製程。導電銲點13〇中的金球132、錫膏134、鲜塾126 與金屬層118’可藉由加熱使其電性連接更加穩固，以避免 傳統打線製程所存在的空焊或焊錯點等焊接失敗的情況， 進而提高製程良率，並節省製造成本。 另一方面，銲墊126和貫穿孔116垂直相對，且錫膏 134是直接灌注於貫穿孔116中’不必預留導線架或引腳等 元件的空間，可有效節省使用空間。 雖然本新型已以多個實施例揭露如上，然其並非用以 限定本新型’任何熟習此技藝者’在不脫離本新型之精神 和範圍内，當可作各種之更動與潤飾’因此本新型之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 為讓本新型之上述和其他目的、特徵、優點與實施例 能更明顯易懂，所附圖式之詳細說明如下： 第1圖繪示習知以打線接合製程所製成之半導體封 裝結構的立體圖。 M349037 第2 _ 第3圖 的剖面圖。 繪示本新型之一實 繪示本新型第2圖 施例的封裝結構的俯視圖。 之封裝結構中沿著AA，連線 2圖之封裝結構中沿著BB，連線 繪示本新型在基板上製作貫穿孔 第4圖繪示本新型第 的剖面圖。 第5A圖至第5B圖 的製程剖面圖。M349037 VIII. New Description: [New Technical Field] The present invention relates to a semiconductor package structure, and more particularly to a method of circuit connection between a semiconductor wafer and a substrate. [Prior Art] In order to prevent the integrated circuit components from being damaged by external forces or environmental factors during transportation and handling, the integrated circuit components must be packaged. However, the integrated circuit chip must be connected to the external circuit in accordance with the circuit design in order to perform its intended function. Electronic packaging can provide a set of organizational structure for integrated circuit components, enabling them to perform their intended functions, and to establish a protective structure for integrated circuit components. In the packaging technology of integrated circuits, wire bonding It is currently a widely used packaging technology. Referring to Fig. 1, there is shown a perspective view of a conventional semiconductor package structure fabricated by a wire bonding process. In the wire bonding process, the wafer 12 is first fixed on the substrate 10, and one end of the bonding wire 16 made of aluminum or gold is pressed onto the pad 14 of the wafer 12, and the other end of the bonding wire 16 is further bonded. Pressing on the lead frame 18 of the substrate 10. Under the trend of thinning electronic products, the volume of electronic components is gradually shrinking, the density is gradually increasing, and the number and density of wires are bound to increase. In a limited space, the number of wires is increased, making the wire bonding process more difficult' resulting in lower product yields. On the other hand, when the wire is bad or fails, it will cause the M349037 to perform the second wire bonding, and the entire wafer 12 must be discarded. So - come, • will inevitably lead to a huge cost loss. * In view of this, a new package structure and its wiring method are needed to eliminate the disadvantages of the conventional wire bonding, improve the use efficiency of the package structure space, and improve the process yield, thereby saving the manufacturing cost. [New content] ·· 纟 New--providing a kind of package structure to replace the traditional wire structure. The package structure includes a substrate and a wafer bonded to each other. The base 2 is provided with a plurality of through holes penetrating the substrate, and each of the through holes has a metal layer. The surface of the wafer is provided with a layer/protective layer to protect the wafer. When the crystal is bonded to the substrate, the protective layer adheres to the lower surface of the substrate. A plurality of pads are disposed on the wafer, and the pads are aligned one-to-one with the through holes. At the same time, the package structure further comprises a plurality of gold balls and a plurality of solder pastes. This ball is planted on each pad. When the wafer is attached to the substrate, each fresh sputum is aligned with a through hole and the gold balls on the pad are accommodated in the through holes. The solder pastes are filled into the respective through holes and contact the gold balls in the through holes. When the solder paste is heated, the solder pastes each form a plurality of conductive pads with the gold balls. It can be seen that the package structure disclosed in the present invention replaces the wire by the conductive solder joint formed by the gold ball and the solder paste, and the conductive fresh spot penetrates the substrate. Since the tin is directly poured into the through hole above the soldering pad, the length m of the conductive fresh spot is smaller than the length of the conventional bonding wire, and the diameter of the signal transmission path M349037 can be effectively shortened. In addition, the gold ball, solder paste, solder pad and metal layer, after heating, the electrical connection between them will be more stable, which can effectively improve the process yield and save manufacturing costs. On the other hand, the present invention provides a sealing structure capable of providing a relatively stable electrical connection structure between the substrate and the wafer in a limited space. The substrate has a plurality of bead perforations and a metal layer is formed on the inner wall of each of the through holes. A protective layer is provided on the surface of the wafer to protect the wafer. A plurality of pads are also disposed on the wafer, and the pads are one-to-one aligned with the plurality of through holes on the substrate. Each of the pads is implanted with a gold ball. Then, the substrate and the wafer are bonded to each other, and the through holes are respectively aligned with the pads and the gold balls thereon, so that the gold balls are respectively located in the through holes. Then, a solder paste is filled in each of the through holes to place the solder paste on the gold ball. Also, each solder paste forms a conductive pad with the gold ball by a heating process. It can be seen that the package structure disclosed in the present invention replaces the conventional wire bonding process by the way in which the conductive pads are vertically penetrated through the substrate. Since the solder paste is directly poured into the through holes above the solder fillet, it is not necessary to reserve space for components such as lead frames or pins in the wire structure, which saves space. Furthermore, the 'golden ball, solder paste, solder pad and metal I' can be heated to make the electrical connection between them more stable and avoid the failure of the traditional wire-bonding process. [Embodiment] μ refers to FIG. 2 to FIG. 4 at the same time. FIG. 2 is a top view of the package structure 100 of the present invention - M349037 embodiment, and FIG. 3 is a cross-sectional view of the package structure 1GG of the second drawing of FIG. 2 taken along line AA, and FIG. The new structure of the package structure of Figure 2 along the BB, the cross-sectional view of the line. The package structure 100 mainly includes a substrate 110 and a wafer 120. The substrate no is provided with a plurality of through holes 116 extending through the entire substrate 11A, and the inner wall of each of the through holes 116 is surrounded by a metal layer U8. A plurality of pads 126 are disposed on the wafer 12A, and a gold ball φ 132 is implanted on each of the pads 126. In the packaging process, the through holes 116 are aligned with the pads 126, and the substrate 110 and the wafer 12 are bonded to each other, so that the gold balls 132 on the pads 126 are respectively accommodated therein. In the hole 116. In this plurality of through holes 116, the space other than the gold balls 132 is filled with the solder paste 134. After being heated, the solder pastes 134 are intimately adhered to the metal layers U8 and the gold balls 132, and slightly protrude from the upper surface 112 of the substrate 110, thereby forming a plurality of conductive pads 130. Each component and its action relationship will be described in detail below. The through hole 116 on the substrate 110 extends perpendicularly from the upper surface 112 of the substrate 11 to the lower surface 114 of the substrate 110. The through hole 116 can be fabricated using a drilling process, such as mechanical drilling with a drill or drilling with a laser beam. The shape of the through hole U6 can be adjusted to a rectangular shape, a circular shape, an elliptical shape, a square shape, or various shapes according to actual packaging requirements. In the embodiment of the present invention, the through hole 116 has a rectangular shape and a width slightly larger than the diameter of the gold ball 132. The metal layer 118 is wound around the inner wall of the through hole 116. In addition to providing a better conductive effect of the substrate 110 and the gold ball 132 on the wafer 120, the surface of the metal layer 8 M349037 118 also allows the solder paste 134 to be more easily attached. It can be seen that the material of the metal layer 118 is mainly a material which is excellent in electrical conductivity and which is easily combined with the solder paste 134, such as gold or copper. In general, since electronic components (e.g., transistors) in the wafer 120 must be electrically connected to circuits on the substrate 110, the wafer 12 is provided with a mounting surface 122 on which a plurality of pads 126 are disposed. The pads 126 are electrically connected to the electronic components in the wafer 120 and can be electrically connected to the substrate 110. The pad 126 is typically an aluminum pad and is primarily aluminum. However, the second pad 126 can also be made of other metals having high electrical conductivity, such as gold, silver or copper. Since the wafer 120 is relatively susceptible to cracking due to external force collisions, especially during the packaging process, many processes imposed on the wafer 12 are highly likely to cause damage to the wafer 120. In order to protect the wafer 12, a protective layer 12 may be formed on the mounting surface 122 of the wafer 12, and the material of the protective layer 124 may be Polyimide (PI). The protective layer 124 covers the entire mounting surface 122 of the wafer 120, and only exposes the pads 126 to maintain the function of electrically connecting the pads 126 to the outside. In particular, the protective layer 124 is provided with a plurality of recesses 128 that are hollowed out, i.e., the bottom of the recess 128 is a portion of the mounting surface 122. The pads 126 are located in the recesses 128 and are disposed on the bottom of the recesses 128. In the embodiment of the present invention, a gold ball 132 is implanted on each of the pads 126. There are many ways to form the gold ball 132. The most common method is the hot press bonding method. The gold wire is passed through a bonding tool made of alumina, tungsten carbide or other refractory materials, and then electronically ignited or hydrogen-nitrogen-melted. At the end of the line, and using the effect of surface tension of Table 9 M349037, the gold wire forms a gold ball 132, and the bonding tool then pushes the gold ball 132 to the welding | 126 _L for spherical bonding, and finally twists the gold wire to leave gold. Ball 132. In the present embodiment, the diameter of the gold ball 132 is slightly less than the width ' of the through hole 116 is about 2 〇 microns. The wafer 120 and the substrate 1H) may be adhered to each other by using a viscous material, and the viscous material is first applied to the lower surface 114 of the substrate U0$, or the surface of the protective layer 124 of the wafer 〇, and the wafer 12 is slightly collateralized. , you can glue the two together. In general, the viscous material can be glue, single-sided, double-sided or epoxy. After the substrate 110 is bonded to the wafer 120, the mounting surface 122 of the wafer 12A faces the lower surface 114 of the substrate 110, and the protective layer 124 is interposed between the mounting surface 122 and the lower surface 114 of the substrate 11A. Since the through holes ι6 and the pads 126 are aligned with each other, the gold balls 2 on the pads 126 are located in the through holes 116 after the substrate 11 is bonded to the wafers 12A. In each of the through holes 116, all the spaces except the gold balls 132 are filled with the solder paste 134. As described above, since the adhesion effect of the solder paste 134 and the metal layer 118 is good, the solder paste 134 adheres to the through hole 116. In the novel embodiment, the solder paste 134 is subjected to a heating process to make the solder paste 134 more closely bonded to the metal layer 118 and the gold ball 132. This heating process can be heated by means of infrared rays, heating plates, electric heating tubes or various heating methods. The embodiment of the present invention heats the solder paste 134 by infrared rays. After heating, each solder paste 134 will bond with the gold balls 132 to form a conductive pad 130 and will slightly protrude from the upper surface 112 of the substrate u. In other words, the conductive pads 130 connect the pads 126 of the wafer 120, M349037 and extend perpendicularly from the lower surface 114 of the substrate 110 to the upper surface 112' of the substrate 11 and protrude from the upper surface 112. The conductive pads 13 电 can not only electrically connect the wafer 12 〇 and the substrate 110 , but also serve as a contact for electrical contact with the wafer 12 in a subsequent process. It can be seen that the package structure 100 disclosed in the present invention replaces the conventional wire bonding by using the conductive pads 13 形成 formed by the gold balls 132 and the solder paste 134, and the conductive # point 130 penetrates through the substrate, and the conductive pads are The length is much smaller than the length of the conventional wire, which can effectively shorten the signal transmission path. Moreover, since the solder paste 134 is directly poured into the through-holes 116 above the pad 126, it is not necessary to reserve the space of the lead frame or the pins and the like in the wire bonding structure, which can effectively save space for use. In the following, the steps of the packaging process will be explained one by one, and the method of making each component and the way of combining the components will be explained one by one. Fig. 5A and Fig. 5B are cross-sectional views showing the process of fabricating the through hole U6 on the substrate. Please refer to Figure 5A. First, a plurality of through holes 116 penetrating the substrate 110 are formed on the substrate 11 by a drilling process. The openings at both ends of each of the through holes 116 are respectively located on the upper surface U2 and the lower surface 114 of the substrate u. In general, the drilling process can utilize mechanical drilling methods, i.e., using a drill to drill the substrate through the substrate. In the embodiment of the present invention, the drilling process uses a laser beam to burn through the substrate u to form a through hole 116. Please refer to Figure 5B. A metal layer 118 is formed on the inner wall of the through hole 116. A process in which metal is formed on the surface of other materials, such as an electroplating process, a physical deposition process, a chemical deposition process, or a sputtering process. 11 M349037 Fig. 6A and Fig. 6B are cross-sectional views showing the process of the wafer 12 of the present invention. Referring to FIG. 6A, a plurality of pads 126 are formed on the mounting surface 122 of the wafer 120, such that the pads 126 are electrically connected to electronic components (such as transistors) in the wafer 12. Further, a protective layer 124 is formed on the mounting surface 122 of the wafer 12 to protect the wafer 120 from being easily broken by an external force. The method of forming the fresh pad 126 and the protective layer 124 is well known to those of ordinary skill in the art and will not be further described herein. Please refer to Figure 6B. A gold ball cymbal 32 is implanted on each of the pads i26. There are many methods for implanting the gold ball 132. The most common method is the thermocompression bonding method. The gold wire 136 is passed through a bonding tool made of alumina, tungsten carbide or other refractory materials, and then electronically ignited or hydrogen-nitrogen-burned. At the end of the molten gold wire 136, and using the effect of surface tension, the gold wire 136 forms a gold ball 132, and the bonding tool presses the gold ball 132 down to the bonding pad 126 for spherical bonding, and finally twists the 2 wire 136, so that The gold ball 132 and its associated gold wire 136 are separated, leaving the gold ball 132 on the pad 126. 7A to 7C are cross-sectional views showing the process of the substrate 11A and the wafer 12A of the present invention. Referring to Figure 7A, the wafer 12 will be bonded to the substrate 110 by a viscous material. The adhesive material may be an adhesive, a single-sided adhesive, a double-sided adhesive or an epoxy resin. Specifically, the adhesive may be uniformly applied on the lower surface 114 of the substrate 11 or on the protective layer 124 of the wafer 120. The material forms an adhesive layer 140. Next, the mounting surface 126 of the wafer 12 is faced to the lower surface 114 of the substrate 110, and the wafer 120 is slightly pressed against the substrate 11 〇 so that the protective layer 124 of the wafer 120 is adhered to the adhesive layer. During the bonding process, the pads 126 are to be aligned with the plurality of through holes 116 on the substrate 110 12 M349037. Thus, when the wafer 120 and the substrate are bonded, the pads 126 are attached. The gold balls 132 can be respectively accommodated in the through holes 116. As described above, the shape of the through hole 116 in the present embodiment is a rectangle having a width slightly larger than the diameter of the gold ball 132. The gold ball 132 is located at one end of the long side of the rectangular through hole 116. Please refer to Figure 7B. The next process is to fill the solder paste ι34 through the hole Π6. Specifically, the solder paste 134 is filled into the through hole 116 from the opening of the upper surface U2 of the substrate 11A. Since the size of the wafer 12 turns is very small, the size of the through-holes 116 is limited by space, only between tens of microns. In order to increase the amount of the solder paste 134 and to facilitate the filling of the solder paste 134, the embodiment of the present invention employs a rectangular through hole 116 and accommodates the gold ball 132 at one end of the long side of the through hole 116. Thereby, the solder paste 134 can be filled with more portions from the other end of the long side of the through hole 116. Please refer to Figure 7C. After each through hole 116 is filled with the solder paste 134, each solder paste 134 is combined with the gold ball 132 to form a conductive glow dot 130 by a heating process. When the solder paste 134 is heated to a certain temperature, the solder paste 134 will slightly fused with the gold ball 132 and the metal layer ι 8 which it contacts, making the electrical connection between each other more stable. The types and methods of the heating process are quite similar, such as infrared rays, heating plates or electric heating tubes can be applied to the present invention. In the embodiment of the present invention, infrared heating is employed. On the other hand, in the embodiment of the present invention, the pad ΐ 2 ό is arranged in the middle of the slab 120. As shown in Fig. 2, the through holes 116 are also arranged in the middle of the substrate m. Further, in Fig. 2, the arrangement of the rows of the pads 126 arranged in two rows is perpendicular to the direction of the long sides of each of the through holes 13 M349037 116. Referring to the 帛8®', a top view of the package structure of the present alternative embodiment is shown. In the present embodiment, the pads 126 are arranged on the edge of the wafer 120. Therefore, the through holes 116 are also arranged at the edges of the substrate (4), and the pads 126 are aligned. It can be seen from the above preferred embodiment of the present invention that the package structure 1 is a connection mode in which the conductive pads 13G are vertically penetrated through the substrate 11G, replacing the conventional wire bonding process. The gold ball 132, the solder paste 134, the fresh enamel 126 and the metal layer 118' in the conductive pad 13〇 can be electrically connected to be more stable by heating, so as to avoid the empty soldering or soldering misalignment existing in the conventional wire bonding process. In the case of failed welding, the process yield is improved and manufacturing costs are saved. On the other hand, the pad 126 and the through hole 116 are vertically opposed, and the solder paste 134 is directly poured into the through hole 116. It is not necessary to reserve a space such as a lead frame or a pin, and the space for use can be effectively saved. Although the present invention has been disclosed in the above embodiments in various embodiments, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above and other objects, features, advantages and embodiments of the present invention more obvious, the detailed description of the drawings is as follows: FIG. 1 is a schematic diagram of a conventional wire bonding process. A perspective view of a semiconductor package structure. M349037 Sectional view of Figure 2_3. One of the present invention is a plan view showing a package structure of the second embodiment of the present invention. In the package structure, along AA, the package structure of the connection diagram 2 is along the BB, and the connection is made to show the through hole on the substrate. FIG. 4 is a cross-sectional view of the present invention. Process profiles in Figures 5A through 5B.
第6A圖至第6B圖繪示本新型之晶片的製程剖面圖。 第7A圖至第7C圖繪示本新型之基板和晶片的製程 剖面圖。 第8圖繪示本新型另一實施例的封裝結構的俯視圖。 【主要元件符號說明】 10:基板 122 :安裝面 12 .晶片 14 :銲墊 124 :保護層 16 :銲線 126 :銲墊 18 :導線架 128 :凹槽 封装結構 130 :導電銲點 110 :基板 132 :金球 112 :上表面 114 :下表面 116 :貫穿孔 134 :錫膏 136 :金線 118 :金屬層 120 =晶片 140 .黏合層 156A to 6B are cross-sectional views showing the process of the wafer of the present invention. 7A to 7C are cross-sectional views showing the process of the substrate and the wafer of the present invention. FIG. 8 is a top plan view showing a package structure of another embodiment of the present invention. [Main component symbol description] 10: Substrate 122: Mounting surface 12. Wafer 14: Solder pad 124: Protective layer 16: Soldering wire 126: Solder pad 18: Lead frame 128: Groove package structure 130: Conductive pad 110: Substrate 132: gold ball 112: upper surface 114: lower surface 116: through hole 134: solder paste 136: gold wire 118: metal layer 120 = wafer 140. adhesive layer 15