TWM266542U - Chip assembly structure for stable carrying - Google Patents

Chip assembly structure for stable carrying Download PDF

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Publication number
TWM266542U
TWM266542U TW93215515U TW93215515U TWM266542U TW M266542 U TWM266542 U TW M266542U TW 93215515 U TW93215515 U TW 93215515U TW 93215515 U TW93215515 U TW 93215515U TW M266542 U TWM266542 U TW M266542U
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TW
Taiwan
Prior art keywords
wafer
lead frame
pins
pin
fixed
Prior art date
Application number
TW93215515U
Other languages
Chinese (zh)
Inventor
Chung-Shing Tz
Original Assignee
Fen Te Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Fen Te Co Ltd filed Critical Fen Te Co Ltd
Priority to TW93215515U priority Critical patent/TWM266542U/en
Publication of TWM266542U publication Critical patent/TWM266542U/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Packaging Frangible Articles (AREA)

Description

M266542 八、新型說明: 【新型所屬之技術領域】 本創作係有關一種可穩定承載之晶片組成結構,特別 指一種晶片能與導線架穩定結合,且該導線架可以預防焊 錫組A使用時造成短路之晶片組成結構改良。 【先前技術】 習知的晶片封裝結構如第六圖所示,係具有一導電性 之導線架10,該導線架1 〇為兩側或四周採以沖壓出複數片 狀引腳101所排列構成,各引腳101下端設有一凸塊1〇2, 藉以該凸塊102之端面103作為一導電部位,而導線架1〇之 引腳101上方係貼覆有一黏性膠帶2〇,於該膠帶2〇固定有一 半導體晶片30,若此,並於該晶片30與各引腳1〇1間設有一 電性連接之金屬線40,且在金屬線40連接完成後,實施有 一絕緣性封膠體50密封住晶片30周圍及導線架1〇底面,僅 預留所述該引腳101之下端面103外露,俾與電路板組裝形 成電性連接。 〜上揭習知的晶片封裝結構,係為一種普遍應用的封裝 技術,惟現今的晶片實際使用±,經常不需有所述的絕緣 性封膠體50,可以藉由其他保護裝置或散熱片之貼覆,即 達成保護晶片效果,然而單純的不實施該封膠體5〇,將造 片30僅藉膠帶2〇固定於導線架1〇之不穩定情事,且該 膠帶20係為經過特別製造處理物品,其造價不菲亦不二 降低晶片封裝成本;另者,上揭各引腳1〇1下端凸塊1〇2所 开2之導電端面103,縱使實施成為相錯開位置之結構^ 售構成在同一平面處,因此應用焊錫組裝於電路板之雷攸 接點時、,仍易發生焊錫溢流接觸到其他導電端面103等短 情形,導致更多的後續修復工作等品管成本。 且 M266542 【新型内容】 本創作主要目的,係在提出一種可穩定承載之晶片组 成結構,特別藉以導線架之構成形態,料成晶片 忒$線架穩定結合之組裝結構,且該導線架具有可以確每 預防焊锡組裝使用時造成短路之防護效果。 、 依上述目的,本創作實施内容係包括一晶 組成,其中: 夺琛木所 晶片,係為一種習知的半導體晶片; 導線架,為具有複數導電性引腳併排呈二排或矩陣排 列狀所構成,選定於導線架(各引聊)上設有絕緣性固定 座,令固定座黏固於各引腳上,並於該導線架之各引腳下 端面設有絕緣性擋塊,藉各引腳之擋塊分別所設位置,^ 各引腳下端面形成有相互錯離位置之對外導電部; 藉此,構成該固定座可穩定承載組裝晶片之晶片組成 結構,俾達成不需使用價袼昂貴的膠帶之封裝成本降低效 益,以及該擋塊具有預防焊錫溢流之防護效果。 【實施方式】 茲依附圖實施例將本創作之結構特徵及其他之作用、 目的詳細說明如下: 如附圖所示,本創作所為一種『可穩定承載之晶片組 成結構』,係有關於半導體晶片封裝結構之改良,主要包括 至y Βθ片1及一導線架2所組成,並於組成後實施有可 相連電性之金屬導線3,及保護金屬導線3之封膠體4, 其中: 曰曰片1,係為習知技術所構成之物品,即通常以半導 體材料所製成之片狀電子元件’故其詳細構成方式、技術 及功能等,不另贅述; M266542 導線架2,係為具有複數導電性引腳21併排呈二排( 如第二圖所示)或矩陣排列狀(如第五圖所示)所構成之 導電元件,可以採用金屬片沖壓構成,惟選定於該導線架 2上(即各引腳21上)設有絕緣性固定座22,令固定座黏 固於各引腳21上,並於該導線架2之各引腳21下端面選定 處凸設有絕緣性擋塊23,藉各引腳21下端凸設之擋塊23其 分別所設置的位置結構安排,令各引腳21下端面形成有相 互錯離位置而排列形成之對外導電部2 4 ; 藉此’請參考第一圖所示,藉以該導線架2上方之固 定座22供與所晶片1載置固定(其固定方式如後所述),並 於該晶片1電性接點及各引腳21選定部位分別接設有一金 屬導線3,且可選擇性地於金屬導線3所設位置實施有一 構成密封保護金屬導線3及其接點之封膠體4,若此,即 構成本創作可穩定承載之晶片組成結構。 如上所述,本創作該導線架2係實施有絕緣性之固定 座22,其形態包括如第三圖及第四圖所示,可為呈二排或 ,陣排列之各排引腳21上射出成型有一所述之固定座22, 藉此可以共同㈣所述該晶片1,^各固定座22之外側邊 可凸δ又有一擔牆25,俾供晶片工可以精確對齊並方便定位 〇上所述,該晶片1係與導線架2之固定座22構成 裝,其實施方式包括:可藉該固定座22射出成型時之液 黏性黏著該晶以於固定座22凝固成型後 固定晶片1之結構;並包括可預先於導線架2上成型上 幵〜之固疋座22,俾藉以其他黏性物 座22間等方式,以達成晶片!固定組裝之封裝結i 本創作可穩定承載之a Η έ + 羊? m ^絲構改良,由於該導j ’、〃有、晶片1精確對齊、穩定載置之固定座2 7 M266542 結構,衫際應用時,可以選擇性的於晶片上外圍再實施 有-封膠體’或不必實施晶片!外圍之封膠體而藉其他 保護f置或散熱片之貼覆即可應用,是以該固定座以即具 有穩定保護晶片1之功能,例如可以防止封膠體射出成型 夺之衝4力,或其他保護裝置或散熱片貼覆時之摩力損毁 該晶片1 ’·其次,本創作該固定座22之實施,係具有直接 =晶片1功能’其素材成本相對於f知的晶片黏貼用膠 f更低,故可藉此降低晶片封裝成本。 庐换2另3者:ί創作係於該導線架2之各引腳21下端凸設有 1 :以引腳21具有相互錯離位置排列之對外導電部 ==以對外導電部24與電路板等其他物品組裝時, 錫3組裝及電性導接’係能藉所述擋塊23防 產二 ΐ可預防短路之效果,使組裝應用上的 產。口不良率降低’俾節省修復等品管成本。 综上所述’本創作『可穩定承載之 確具實用性與創作性,复手$ 、’ 、、Ό構』’已 功效盥-叶目㈣炒乂 運用亦出於新穎無疑,且 ^文Κ目的減然符合,已稱合理進步 法提出新型專利申請,惟想I 、、' 乂 利為禱,至感德便。…月釣局惠予詳審,並賜准專 8 M266542 【圖式簡單說明】 二*為本創作晶片組成結構之斷面示意圖。 : 為本創作晶片組成結構之底面示意圖。 f圖為本創作晶片組成結構之立體分解示意圖。 ' Θ為本創作晶片組成結構另一實施例之立體分解 示意圖。 第五圖為本創作晶片組成結構另一實施例之底面示棄 圖〇 ’如 【主要元件符號說明】 第六圖為習知晶片封裝結構之斷面示意圖。 晶片1 ; 導線架2 ; 引腳21 ; 固定座22 ; 播塊23 ; 對外導電部24 ; 擋牆25 ; 金屬導線3 ; 封膠體4 ·,M266542 8. Description of the new type: [Technical field to which the new type belongs] This creation relates to a structure that can stably carry a wafer, especially a chip that can be stably combined with a lead frame, and the lead frame can prevent solder group A from causing a short circuit when used. The chip composition structure is improved. [Prior art] As shown in the sixth figure, the conventional chip package structure has a conductive lead frame 10, and the lead frame 10 is formed by punching out a plurality of chip leads 101 on both sides or around it. A bump 102 is provided at the lower end of each pin 101, and an end surface 103 of the bump 102 is used as a conductive part, and an adhesive tape 20 is attached above the lead 101 of the lead frame 10, and the tape 20 A semiconductor wafer 30 is fixed. If so, an electrically connected metal wire 40 is provided between the wafer 30 and each of the pins 101, and after the metal wire 40 is connected, an insulating sealing compound 50 is implemented. The periphery of the chip 30 and the bottom surface of the lead frame 10 are sealed, and only the lower end surface 103 of the pin 101 is reserved to be exposed, and the circuit board is assembled to form an electrical connection. The conventional chip packaging structure disclosed above is a commonly used packaging technology. However, the actual use of today's chips ± often does not require the insulating sealing compound 50 described above, which can be achieved by other protection devices or heat sinks. Sticking, that is to achieve the effect of protecting the wafer, but simply does not implement the sealant 50, the instability of the sheet 30 is fixed to the lead frame 10 only by the tape 20, and the tape 20 is specially manufactured Articles, which are expensive and reduce the cost of chip packaging; In addition, the conductive end faces 103 opened by the pins 101 and the bottom bumps 102 are opened, even if the implementation becomes a staggered position structure. At the same plane, when solder is used to assemble the lightning contacts on the circuit board, short situations such as solder overflow contacting other conductive end faces 103 are still prone to result in more quality control costs such as subsequent repair work. And M266542 [New content] The main purpose of this creation is to propose a stable structure of the wafer structure. In particular, the lead frame is used to form a stable assembly of the wafer and the wire frame. Make sure to prevent the short circuit protection effect when the solder is assembled and used. According to the above purpose, the content of this creative implementation is composed of a single crystal, in which: the chip of the Diaochen wood is a conventional semiconductor wafer; the lead frame is a two-row or matrix arrangement with multiple conductive pins side by side. The structure is selected to be provided with an insulating fixing seat on the lead frame (each lead), so that the fixing seat is fixed to each pin, and an insulating stopper is provided on the lower end surface of each pin of the lead frame. Positions of the stoppers of the pins are set separately, ^ external conductive parts are formed at the lower end surfaces of the pins, which are staggered from each other; thereby, the fixed structure can be used to stably carry the wafer composition structure of the assembled wafer, so it is not necessary to use The packaging cost of the expensive tape is reduced, and the stopper has a protective effect to prevent solder overflow. [Embodiment] The following describes the structural features and other functions and purposes of the creation in detail according to the embodiments of the drawings: As shown in the drawing, the creation is a "stable structure of the wafer", which is about semiconductor wafers The improvement of the package structure mainly includes a y βθ sheet 1 and a lead frame 2, and after the composition, an electrically conductive metal wire 3 and a sealing gel 4 for protecting the metal wire 3 are implemented, of which: 1. It is an article made of conventional technology, that is, a sheet-shaped electronic component usually made of semiconductor materials, so its detailed composition, technology, and functions are not described in detail; M266542 lead frame 2 is provided with a plurality of The conductive elements 21 are arranged side by side in two rows (as shown in the second figure) or in a matrix arrangement (as shown in the fifth figure). The conductive elements 21 can be formed by stamping metal sheets, but they are selected on the lead frame 2. (That is, on each pin 21) is provided with an insulating fixing base 22, so that the fixing base is fixed on each pin 21, and an insulating stopper is protruded at a selected position on the lower end surface of each pin 21 of the lead frame 2. 23, borrow The stopper 23 convexly arranged at the lower end of the pin 21 is arranged in a positional structure, so that the outer end of each pin 21 is formed with an external conductive portion 2 4 arranged in a mutually offset position; by this, please refer to the first figure As shown, the fixing base 22 above the lead frame 2 is used for mounting and fixing on the chip 1 (the fixing method is described later), and is connected to the electrical contacts of the chip 1 and selected parts of each pin 21 respectively. There is a metal wire 3, and a sealing compound 4 constituting a sealing and protecting the metal wire 3 and its contact point can be selectively implemented at the position where the metal wire 3 is set. As mentioned above, the lead frame 2 of the present invention is implemented with an insulating fixing base 22, and its form includes, as shown in the third and fourth figures, two or more rows of pins 21 arranged in a row. The above-mentioned fixed base 22 is injection-molded, so that the wafers 1 can be collectively used. ^ The outer sides of each fixed base 22 can be convex δ and a supporting wall 25, so that the wafer operator can accurately align and facilitate positioning. As mentioned above, the wafer 1 is assembled with the fixing base 22 of the lead frame 2. The embodiment includes: the liquid crystal can be adhered to the crystal by the fixing base 22 during injection molding to fix the wafer after the fixing base 22 is solidified and shaped. 1 structure; and includes a solid holder 22 that can be formed on the lead frame 2 in advance, and then use other sticky material holders 22 to achieve the chip! Fixed assembly of the packaging knot i This creation can be stably carried a έέ + sheep? m ^ Silk structure is improved. Due to the guide j ′, the chip 1 is precisely aligned and the mounting seat 2 7 M266542 structure is stable, it can be selectively implemented on the periphery of the chip when the shirt is applied. 'Or don't have to implement wafers! The outer sealing gel can be applied by other protective f or heat sinks. The fixed seat has the function of stably protecting the chip 1, for example, it can prevent the sealing gel from ejecting the molding force, or other The friction force of the protection device or the heat sink when the wafer is damaged 1 '. Secondly, the implementation of this fixed seat 22 has the function of directly = the wafer 1', and its material cost is more than that of the wafer bonding adhesive f. Low, so it can reduce chip packaging costs. The other 3 of Lu 2 are: 1 is created at the lower end of each pin 21 of the lead frame 2: the external conductive portion arranged with pins 21 at mutually offset positions == the external conductive portion 24 and the circuit board When other items are assembled, the assembly of tin 3 and electrical connection can prevent the short-circuit effect by the stopper 23 to prevent short-circuit effects, which can result in production in assembly applications. Reduced mouth defect rate ’saves quality control costs such as repair. To sum up, 'this creation' can be stably carried is indeed practical and creative, and the complex hand $, ',, Όstructor' has already functioned-the use of leaf eyebrows stir-fry is also novel and undoubted, and ^ text The purpose of K is less consistent, and it has been said that the Reasonable Progress Law filed a new patent application, but I would like to pray for the benefit, and I feel that it is morally convenient. … The moon fishing bureau will review it in detail, and give it to Zhunzhuan 8 M266542 [Simplified illustration of the drawing] 2 * This is a cross-sectional schematic diagram of the composition structure of the creative chip. : This is a schematic diagram of the bottom surface of the composition structure of the creative chip. Figure f is a three-dimensional exploded view of the composition structure of the creative wafer. 'Θ is a three-dimensional exploded view of another embodiment of the composition structure of the creative wafer. The fifth figure is a bottom view showing another embodiment of the composition structure of the creative wafer. Figure 〇 As in [Description of Symbols of Main Components] The sixth figure is a schematic sectional view of a conventional chip packaging structure. Chip 1; Lead frame 2; Pin 21; Fixing seat 22; Broadcast block 23; External conductive part 24; Retaining wall 25; Metal wire 3; Sealing gel 4 ·,

Claims (1)

M266542 九、申請專利範圍: 1 種可备、疋承载之晶片組成結構,包括至少一晶片载 置於一 ‘線架所組成,並於組成後實施有可相連電性 之金屬導線及封膠體,其特徵在於: 該導線架,為具有複數導電性引腳構成排列狀, 於該引腳上設有絕緣性固定座,令固定座固著於各引 腳上’並於各引腳下端面選定處凸設有絕緣性擋塊, 藉各擋塊形成有引腳下端面相互錯離位置排列之對外 導電部;藉此,令該晶片固設於導線架之固定座上, 以構成可穩定承載之晶片組成結構者。 2、 如申請專利範圍第1項所述可穩定承載之晶片組成結 構,該導線架包括複數導電性引腳構成可為二排併列 或矩陣排列之結構,以於該引腳設有絕緣性固定座。 3、 如申請專利範圍第2項所述可穩定承載之晶片組成結 構,該固定座包括於各排引腳上射出成型所構成;並 包括於固定座外側邊可凸設有一擋牆。M266542 9. Scope of patent application: A kind of wafer composition structure that can be prepared and carried, including at least one wafer placed on a 'wire rack', and after the composition, a conductive metal wire and sealing gel are implemented. It is characterized in that: the lead frame is arranged in an array with a plurality of conductive pins, and an insulating fixing seat is provided on the pin, so that the fixing seat is fixed on each pin 'and selected on the lower end face of each pin An insulating stopper is convexly arranged at each place, and an external conductive portion arranged at a position where the lower end faces of the pins are staggered from each other is formed by the stoppers; thereby, the chip is fixed on the fixed seat of the lead frame to form a stable load. The wafer constitutes the structure. 2. As described in item 1 of the scope of the patent application, the structure of the wafer that can be stably carried, the lead frame includes a plurality of conductive pins, which can be arranged in parallel or in a matrix, so that the pins are provided with insulation fixing. seat. 3. According to the structure of the wafer that can be stably carried as described in item 2 of the scope of the patent application, the fixed base includes injection molding on each row of pins; and includes a retaining wall that can be convexly arranged on the outer side of the fixed base.
TW93215515U 2004-09-30 2004-09-30 Chip assembly structure for stable carrying TWM266542U (en)

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