TWM253058U - Heterogeneous junction dipole transistor structure for adjusting on voltage of base and emitter - Google Patents

Heterogeneous junction dipole transistor structure for adjusting on voltage of base and emitter Download PDF

Info

Publication number
TWM253058U
TWM253058U TW092216107U TW92216107U TWM253058U TW M253058 U TWM253058 U TW M253058U TW 092216107 U TW092216107 U TW 092216107U TW 92216107 U TW92216107 U TW 92216107U TW M253058 U TWM253058 U TW M253058U
Authority
TW
Taiwan
Prior art keywords
layer
base
patent application
item
scope
Prior art date
Application number
TW092216107U
Other languages
Chinese (zh)
Inventor
Chau-Shing Huang
Yu-Jung Jin
Min-Nan Tzeng
Huai-Dung Yang
Kuen-Chiuan Lin
Original Assignee
Visual Photonics Epitaxy Co Lt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Visual Photonics Epitaxy Co Lt filed Critical Visual Photonics Epitaxy Co Lt
Priority to TW092216107U priority Critical patent/TWM253058U/en
Priority to JP2004254039A priority patent/JP2005086201A/en
Priority to US10/934,891 priority patent/US7224005B2/en
Publication of TWM253058U publication Critical patent/TWM253058U/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/6631Bipolar junction transistors [BJT] with an active layer made of a group 13/15 material
    • H01L29/66318Heterojunction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004Base region of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151Compositional structures
    • H01L29/152Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155Comprising only semiconductor materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/737Hetero-junction transistors
    • H01L29/7371Vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Description

M253058 五、創作說明(l) 【新型所屬之技術領域】 本創作係關於一種異質接面雙極電晶體結構,特別是 指用於調整雙極電晶體的基射極導通電壓(Vbe)的此種結 構。 σ 【先前技術】 =技藝欲調整異質接面雙極電晶體的基射極導通電 壓,θ遍的作法:均使用不同的基極材料,利用改 e)、的。其主要根據異質接面雙極電b體的 =原:r要=極導通電壓與基極之 關係因此,要使基射極導通電壓Vbe的下 整基極材料之組成在任選之固定參雜濃度低。 極之能隙的目的。 達成降低基 第一圖係習知技藝血帮里晳垃 其排列組合方式由ϊ;:以;:,極電晶體的結構。 彺射極方向,其排列方式依次由 θ田罘往 10、次集極層π、集極層12、美極_ 1q且覆為砷化鎵基板 覆層15。達成改變雙極;晶2體射極層“與射極 在異質接面雙極電晶體的基關鍵’主要 用T化録C GaAs)或虱砷化銦鎵(u ^ ^ . 化鎵(GaASxSbl—x)塊材,在任選之 )或録珅 調整材料之組成域7值,可調整基極能隙參雜浪度下透過 導通電壓(V b e )。 永 以改變基射極M253058 V. Creation Description (l) [Technical Field to which the New Type belongs] This creation is about a heterojunction bipolar transistor structure, and particularly refers to the adjustment of the base-emitter on-voltage (Vbe) of the bipolar transistor. Kind of structure. σ [Prior art] = The technique is to adjust the base-emitter conduction voltage of the heterojunction bipolar transistor, the method of θ times: all use different base materials, and use e),. It is mainly based on the heterojunction bipolar electric b-body = original: r to = the relationship between the pole on-voltage and the base. Therefore, the base-emitter on-voltage Vbe must be composed of the entire base material at optional fixed parameters. Miscellaneous concentration is low. The purpose of the extreme energy gap. Reaching a lower base The first picture is the literary skill of the gangster of the conventional art. In the direction of the emitter, the arrangement is from θ field to 10, the sub-collector layer π, the collector layer 12, the US pole 1q, and is covered with a gallium arsenide substrate cover layer 15. The bipolar change is achieved; the base of the crystal 2 body emitter layer "is the key to the bipolar transistor at the heterojunction interface with the emitter, mainly using T to record C GaAs) or lice indium gallium arsenide (u ^ ^. GaASxSbl —X) Block material, with optional 7) or recording adjustment material composition field 7 value, can adjust the base bandgap mixed volatility through the conduction voltage (V be). Always change the base emitter

Θ325 第6頁 M253058 五、創作說明(2) 新型内容】 本創作揭示一種新式的異質接面雙極電晶體結構,利 用 GaAsxSb】_x/GaAs, I nxGa ^xAs yN 卜 y/GaAs 或 GaAs xSb ^/GaAs/ 超晶格(s u p e r 1 a 11 i c e )的長晶方式,係藉 或氮神化銦鎵(I n XG aΘ325 Page 6 M253058 5. Creation instructions (2) New content] This creation reveals a new type of heterojunction bipolar transistor structure, using GaAsxSb] _x / GaAs, I nxGa ^ xAs yN, y / GaAs, or GaAs xSb ^ / GaAs / Superlattice (super 1 a 11 ice) growth mode, which is based on nitrogen or indium gallium (I n XG a

InxGa^.AsyN^ j _ _ _ 、一 由改變録钟化鎵(GaASxSb^ )或氮砷化銦鎵(InxGai — xAs N^匕)材料之組成,甚者,更可藉由調整砷化鎵,銻 搞碌二ί砷化銦鎵材料之排列順序及厚度,形成電晶體義 〇 、成調整一新基極材料的能隙。 組成,二係除了可藉由調整依序排列之材料 故於以;二其增加了-維的彈性調整空間, (Vbe)66 ° "貝接面雙極電晶體的基射極導通電壓 、的目的有更大的選擇空間。 以下將藉由具體實施例謀 進一步#日日士 & ^戶、e妁砰細描述,並配合所附圖式, 乂祝明本創作之目的與優點。 【實施方式】 施例ί = ί = Π一實施例的示意圖。本創作第-實 材料,以改變各材料之,且:Ϊ 均係使用不同能隙的 基極,在任選之固定參雜濃产 1成為電日日體的 多種變化,太名丨你3所拉度男’排列組合方式有 例,:本創作異質接面雙極電晶體結構的第一實施 由下至上的磊晶結構2』f序# Θ ώ | 4 丹乙m斤方向為由集極往射極方InxGa ^ .AsyN ^ j _ _ _, one is to change the composition of gallium gallium (GaASxSb ^) or indium gallium arsenide (InxGai — xAs N ^ d) material, or even adjust the gallium arsenide The sequence and thickness of the antimony indium gallium arsenide material is formed to form a transistor meaning adjusting the energy gap of a new base material. In addition, the second system can be adjusted by sequentially arranging the materials. Second, it increases the -dimensional elasticity adjustment space. (Vbe) 66 ° " Base-emitter on-voltage of the bipolar junction junction, There is more choice for the purpose. In the following, specific examples will be used to further elaborate the description of # 日 日 士 &; 户, e 妁 bang, and in conjunction with the attached drawings, I wish the purpose and advantages of this creation. [Embodiment] Example ί = ί = A schematic diagram of an embodiment. The first material of this creation is to change the material, and: Ϊ are based on the use of different energy gaps in the base, in the optional fixed mixed concentration 1 to become a variety of changes in the electric sun and the sun, too named 丨 you 3 There is an example of the arrangement of the combination of Ladodu's. The first implementation of this creation of the heterojunction bipolar transistor structure is a bottom-up epitaxial structure 2 ″ f 序 # Θ ώ | Polar to emitter

8326 第7頁 M253058 五、創作說明(3) a |其排列方式依次由下往上疊覆包含:砷化鎵基板2 0, 二人集極層2卜集極層22、基極層23、射極層24與射極覆層 2 5° 曰 勺人其中,基極層23包含至少一個夾心層230,夾心層230 包含:第一基極接面層230a,其材質為材料b,及第二基 極接面層230b’其材質為材料A,於第一基極接面層2^a ^墓其中,夾心層230可為複數個,並且依次疊覆。材料A 疋義為砷化鎵(GaAs)材料,厚度可任意調整在^00埃 之,:材料B定義為銻砷化鎵(GaASxSbi χ )材料,厚度可 任w凋整在1〜3 0 0埃之間,X組成值可任意整 〇. 999之間。 第三圖係顯示本創作第一實施例的基極層組成示意 ^第二圖由左到右僅顯示從集極層2 2到射極層2 4的部 =,亦即第二圖的基極層23,基極層23包含至少一個夾心 :匕30,夾心層230包含:第一基極接面層2心,其材質為 B,材料B定義為銻砷化鎵(GaASxSbix )材料,厚度可 任思凋整在1〜30 0埃之間,x組成值可任意調整在〇 〇〇卜 % 999之間。及^二基極接面層23〇b,於第一基極接面層 ΓΓΐ 接面層23_質為材料A,材料A定義為 申化鎵(GaAs)材料,厚度可任意調整在13〇〇埃之間。巧 其中,夾心層230可為複數個,並且依次疊覆。 第一基極接面層230a的材質可為銻砷化鎵(讥 中、Γ匕氮石中化鋼鎵(InxGai-xAsDx,其、 中,第一基極接面層230a的厚度可從丨到3〇〇埃,X的组、8326 Page 7 M253058 V. Creative Instructions (3) a | The arrangement method is from top to bottom, including: gallium arsenide substrate 20, two collector layers 2 collector layers 22, base layers 23, The emitter layer 24 and the emitter cladding layer are 25 °. Among them, the base layer 23 includes at least one sandwich layer 230, and the sandwich layer 230 includes: a first base interface layer 230a, whose material is material b, and The second base contact layer 230b 'is made of material A. Among the first base contact layer 230b', the sandwich layer 230 may be a plurality of sandwich layers 230 and stacked in sequence. Material A means GaAs material, and the thickness can be arbitrarily adjusted to ^ 00 Angstroms: Material B is defined as GaAsxSbi χ material, and the thickness can be adjusted to 1 ~ 3 0 0 Between Angstroms, the X composition value can be arbitrarily adjusted between 0.999. The third picture shows the composition of the base layer of the first embodiment of the creation. The second picture shows only the part from the collector layer 22 to the emitter layer 24 from left to right. The electrode layer 23 and the base layer 23 include at least one sandwich: dagger 30, and the sandwich layer 230 includes: the first base interface layer 2 core, whose material is B, and material B is defined as antimony gallium arsenide (GaASxSbix) material, thickness It can be adjusted between 1 and 300 angstroms, and the composition value of x can be arbitrarily adjusted between 0.001% and 999. And ^ two base contact layer 23b, in the first base contact layer ΓΓΐ contact layer 23_ material is material A, material A is defined as a gallium (GaAs) material, the thickness can be arbitrarily adjusted to 13 〇Angel. Coincidentally, there may be a plurality of sandwich layers 230, which are stacked one after another. The material of the first base contact layer 230a may be gallium antimony arsenide (Indium, γ-ditride, InxGai-xAsDx, among which, the thickness of the first base contact layer 230a may be from 丨To 300 angstroms, the group of X,

第8頁 0327 M253058 五、創作說明(4) 值可從0 · 0 0 1到0 · 9 9 9 ’ y的組成值可從〇 · 〇 〇 1到〇 · 9 9 9。 第二基極接面層2 3 0b的材質可為銻砷化鎵(GaASxSbi )、碑化鎵(GaAs)或氮坤化銦鎵(InxGai χΑ5γΝι y ),其 中’第二基極接面層2 3 0 b的厚度可從1到3 〇 〇埃,χ的組成 值可從0 . 0 0 1到0 . 9 9 9,y的組成值可從〇 · 〇 〇 1到〇 . 9 9 9。 本創作第一實施例的基極結構,在有需要的時候,基 極層23可包含:一間隔材料層(未圖示),係貼合於第一 基極接面層230 a或第二基極接面層230b,其中,間隔材料 層(未圖示)的材質係不同於其所貼合的第一基極接面層 230a的材質與第二基極接面層23〇b的材質。間隔材料層 (未圖示)的材質可為一組成漸變材料(c〇mp〇siti〇n graded material)。組成漸變材料可為銻砷化鎵 (GaASxSbh )或氮砷化銦鎵(InxGaixAMiy ),其中X或y 值於間隔材料層(未圖示)依其厚度成長方向,以漸變方 式使义或y值依序由低點逐漸遞增或由高點逐漸遞減(例Page 8 0327 M253058 V. Creation Instructions (4) The value can be from 0 · 0 0 1 to 0 · 9 9 9 ′ y The composition value can be from 0 · 〇 〇 1 to 〇 · 9 9 9. The material of the second base contact layer 2 3 0b may be gallium antimony arsenide (GaASxSbi), gallium ingot (GaAs), or indium gallium nitride (InxGai χΑ5γNι y), wherein the second base contact layer 2 The thickness of 30 b can be from 1 to 300 angstroms, the composition value of χ can be from 0.01 to 0.999, and the composition value of y can be from 0.001 to 0.999. In the base structure of the first embodiment of the present invention, when necessary, the base layer 23 may include: a spacer material layer (not shown), which is attached to the first base interface layer 230 a or the second The base interface layer 230b, wherein the material of the spacer material layer (not shown) is different from the material of the first base interface layer 230a and the second base interface layer 23b to which it is attached. . The material of the spacer material layer (not shown) may be a composition of graded material. The composition of the graded material can be gallium antimony arsenide (GaASxSbh) or indium gallium arsenide (InxGaixAMiy), where the X or y value in the spacer material layer (not shown) depends on the thickness growth direction, and the Y or y value is gradually changed Sequentially increasing from a low point or gradually decreasing from a high point (for example

GaAs與GaAsuSb。」中間加入一層3〇埃的GaASxSbi x組成 漸k材料,其中x值在此3〇埃厚度中並非固定而是用漸 ,方式’例如將X值在30埃GaASxSbi χ材料中由〇依序漸變為 的、丄=(未圖示)在有需要時,彳為經依序疊加 材料層(未圖示)。間隔材料層(未圖示) ,,質為一綈碎化鎵(GaAsxSbh )或氮钟化銦鎵 、丨,且各複數個間隔材料層(未圖示)的 X s y ^此均互不相同(例如GaAs與GaAs。糾。1中間加入GaAs and GaAsuSb. Add a layer of 30 Angstroms of GaASxSbi x to form a gradual k material, where the x value is not fixed in this 30 angstrom thickness but is gradually used, in a way 'for example, the X value is gradually changed from 0 in 30 angstroms of GaASxSbi χ material. Yes, 丄 = (not shown) When necessary, 彳 is a layer of materials (not shown) sequentially stacked. Spacer material layer (not shown), the quality of which is GaAsxSbh or indium gallium nitride, and X sy of each of the plurality of spacer material layers (not shown) is different from each other (Such as GaAs and GaAs. Correction. 1 Add in the middle

第9頁Page 9

832S M253058 五、#/作說明(5) 三層厚度分別為40埃, 〇. 03,832S M253058 Five, # / for explanation (5) The thickness of the three layers is 40 angstroms, 0.03,

GaAS().95SbG G5 及 G 、及 30埃之 GaAswSbi 卜第,係顯示;=科)。 |思圖。第四a圖由左到亡 _實細例的基極結構組成示 |部份,基極層23直 顯不從集極層22到射極層24的 材料A,與第二基直極^弟/;基極接面層23〇a的材質,其為 (雖然忽略顯示=面f 2湯的材質,其為材料B,表; 第四B、C、M、V"不影響讀者對本創作的理解)。 |創作其他實施例的基極纟G组】、_L J、[ L圖係顯示本 從集極層22到射極層24的部#由左到右僅顯示 面層230a的材質,其為材料a 土 : 23顯不第一基極接 極接面層230b的材質,复為材’、或材料C,與第二基 定義為石申化鎵(GaAs),,、厚度音材料=材料C。材料A 間。材料B定義為銻砷化鎵(Ga彳厂调整在b3〇0埃之 調整在1~ 30 0埃之間,x組成值任」if料,厚度可任意 之間。材料c定義為氮坤化銦鎵(V二調整fG.°G1〜°·999 卜可任意調整在卜3_之間,組成3值二-意)材整:, 〇. 0 0 1 ~ 0. 9 9 9之間,y組成值可任音〜=β I間。 』仕思調整在〇· 00卜0· 9 9 9之 第四 B、C、D、E、F、G、h、I、j、 其他實施例的基極結構,在有需要的時候κ :上圖’本匕作 或貼合第二基極接面層230b,極接面層230a 不同於第-基極接面層23_丄:隔:料層的材質係 』何質與第二基極接面層23〇b 第10頁 8323 M253058GaAS (). 95SbG G5 and G, and GaAswSbi of 30 Angstroms. | Situation. The fourth a is shown from the left to the bottom of the detailed example of the base structure. In part, the base layer 23 directly shows the material A from the collector layer 22 to the emitter layer 24, and the second base straight pole Brother /; The material of the base contact layer 23〇a is (although the display is ignored = the material of the surface f 2 soup, which is the material B, table; the fourth B, C, M, V " does not affect the reader's influence on this creation Understanding). | Creating the base 纟 G group of other embodiments], _L J, [The L diagram shows the part from the collector layer 22 to the emitter layer 24 #From left to right, only the material of the surface layer 230a is displayed, which is the material a soil: 23 shows the material of the first base electrode contact layer 230b, which is a material, or material C, and the second base is defined as GaAs, and the thickness sound material = material C . Material A. Material B is defined as antimony gallium arsenide (Ga 彳 factory adjusted at b300 angstroms and adjusted between 1 and 300 angstroms, x composition value is any "if material, thickness can be any arbitrary. Material c is defined as nitrogen kun Indium gallium (V2 adjustment fG. ° G1 ~ ° · 999 Bu can be arbitrarily adjusted between Bu 3_ to form a 3 value 2-Italian) material :, 〇 0 0 1 ~ 0.9 9 9 , The composition value of y can be any tone ~ = β I. 』Shisi adjusts the fourth B, C, D, E, F, G, h, I, j, 0, 0, 0, 9 9 9 and other embodiments The base structure, when necessary κ: The above picture 'this knife works or fits the second base junction layer 230b, the pole junction layer 230a is different from the-base junction layer 23_ 丄: The material system of the material layer "He Zhi and the second base electrode interface layer 23〇b page 10 8323 M253058

五、創作說明(6) 的材質。間隔材料層的材質可為一組成漸變材料 (composition graded material) 〇 組成漸變材料可為 銻砷化鎵(GaAsxSbh )或氮砷化銦鎵(InxGahAsyNb ), 其中X或y值於間隔材料層依其厚度成長方向,以漸變方 式’使X或y值依序由低點逐漸遞增或由高點逐漸遞減。間 隔材料層在有需要時,可為經依序疊加的複數個間隔材料 層。間隔材料層的材質可為一銻砷化鎵(GaASxSbi x )或氮 珅化銦鎵(InxGa^AsyNH ),且各複數個間隔材料層的χ 值或y值彼此均互不相同。 第五A圖係顯示本創作別種型態的其他實施例的基極 結構排列示意圖。除了兩端的集極層3 2與射極層3 4外,基 極層33主要包含:至少一個夾心層33〇,夾心層330包含: 第一基極接面層330a,其為材料A,第二基極接面層 330b,其為材料8,及位於第一基極接面層33〇&與第二基 極接面層330b間的第三基極接面層33〇c,其為材料c,其 中,夾心層3 3 0可為複數個,並且依次疊覆。Fifth, the material of the creation note (6). The material of the spacer material layer may be a composition graded material. The composition graded material may be GaAsxSbh or InxGahAsyNb, where the X or y value depends on the spacer material layer. In the direction of thickness growth, the X or y value is gradually increased from the low point or gradually decreased from the high point in a gradual manner. When necessary, the spacer material layer may be a plurality of spacer material layers which are sequentially stacked. The material of the spacer material layer may be gallium antimony arsenide (GaASxSbi x) or indium gallium nitride (InxGa ^ AsyNH), and the x value or y value of each of the plurality of spacer material layers is different from each other. The fifth diagram A is a schematic diagram showing the arrangement of the base structure in another embodiment of the present invention. In addition to the collector layer 32 and the emitter layer 34 at both ends, the base layer 33 mainly includes: at least one sandwich layer 330, and the sandwich layer 330 includes: a first base interface layer 330a, which is a material A, a The second base interface layer 330b, which is material 8, and the third base interface layer 33c, which is located between the first base interface layer 33 & and the second base interface layer 330b, is Material c, in which the sandwich layer 3 3 0 may be plural and overlapped in order.

材料A定義為砷化鎵(GaAs),厚度可任意調整在工 3 0 0埃之間。材料岐義為銻砷化鎵(GaAsjb卜χ ),厚度 任思凋整在1〜3 〇 〇埃之間,χ組成值可任意調整在〇 · 〇 〇丄〜Material A is defined as gallium arsenide (GaAs), and the thickness can be arbitrarily adjusted between 300 angstroms. The material ambiguity is gallium antimony arsenide (GaAsjb χ), the thickness is arbitrarily adjusted between 1 ~ 300 Angstroms, and the composition value of χ can be arbitrarily adjusted between 〇 · 〇〇〇 ~

Γ 壬思°在1〜3 0 0埃之間,x組成值可任意調整在 門/Α〇盘之間乂組成值可任意調整在〇』〇1〜0.9 9 9之 ::ίA與试B與C材料中間可選擇性地再加上一 $夕曰旱又在1埃到3 0 〇埃的間隔材料層來調整此新基:Γ Rensi ° between 1 ~ 3 0 0 angstroms, x composition value can be arbitrarily adjusted between the gate / Α〇 disc 乂 composition value can be arbitrarily adjusted 〇 』〇1 ~ 0.9 9 9 of:: A and test B This material can be optionally adjusted with C material by adding a layer of spacer material between 1 Angstrom and 300 Angstrom to adjust this new base:

第11頁 M253058 五、創作說明(7) --- 材料之能隙,此間隔材料層可使用組成漸變材料 (composition graded material)(例如在 GaAs與Page 11 M253058 V. Creation Instructions (7) --- Energy gap of materials, this spacer material layer can be composed of composition graded material (for example, in GaAs and

GaAsuSbu中間加入一層3〇埃的銻砷化鎵(GaASxSbix材 料,其中X值在此30埃厚度中並非固定,而是用漸變方式, 例如將X值在30埃GaAsxSb^材料中由〇依序漸變為〇·丨), ^數種不同組成之GaASxSbi X材料或Ιηχ(^ι_χΑ%Νι 1材料 作為間隔材料層(例如GaA_ GaAsQ9SbQ i中間加入三層厚度 ,,為40埃,35埃及3〇埃之GaAsG 97Sb_ 及A layer of 30 angstroms of antimony gallium arsenide (GaASxSbix material is added in the middle of GaAsuSbu. The X value is not fixed in this thickness of 30 angstroms, but it is gradually changed. For example, the X value is gradually changed from 0 in 30 angstroms of GaAsxSb ^ material. 〇 丨), ^ several different composition of GaASxSbi X material or Ιηχ (^ ι_χΑ% Νι 1 material as a spacer material layer (for example, GaA_GaAsQ9SbQ i added three layers in the middle, the thickness is 40 Angstroms, 35 Egyptian 30 Angstroms) GaAsG 97Sb_ and

GaAs 〇.92Sb 0 08 之材料)。 第五 B、 C、 D、 E、 F、 G、 H、 I、 J、 K、 L·、 Μ、 N、 0、 R圖係顯示別種型態的其他實施例的基極結構排列 不思圖。基極層3 3主要包含米料A,材料β,及材料c的各 層。材料A定義為砷化鎵(GaAs),厚度可任意調整在卜 3 0 0埃之間。材料歧義為銻砷化鎵((^八、^11),厚度可 任思凋整在1〜3 〇 〇埃之間,χ組成值可任意調整在〇 · 〇 〇卜 ^99之間。材料c定義為氮砷化銦鎵(InxGai xASyNi_y ), ,又可任意調整在1〜3 0 0埃之間,χ組成值可任意調整在 • 〇 〇 1〜0 · 9 9 9之間y組成值可任意調整在〇 · 〇 〇丨〜〇 9 9 9之 間。在A與B或A與C或B與C材料中間可選擇性地再加上一層 j多層,厚度在1埃到3 0 0埃的間隔材料層來調整此新基^ 材料之能隙,此間隔材料層可使用組成漸變材料 (composition graded material)(例如在 GaAs與 faAsuSbo.!中間加入一層3〇埃的材料,其中X值 此30埃厚度中並非固定,而是用漸變方式,將χ值在“埃 五、剌作說明π;GaAs 0.92Sb 0 08 material). Fifth, B, C, D, E, F, G, H, I, J, K, L ·, M, N, 0, R are diagrams showing the arrangement of the base structure of other embodiments of other types. . The base layer 33 mainly includes layers of rice material A, material β, and material c. Material A is defined as gallium arsenide (GaAs), and the thickness can be arbitrarily adjusted between 300 angstroms. The material ambiguity is antimony gallium arsenide (^^, ^ 11), the thickness can be adjusted between 1 ~ 300 Angstroms, and the composition value of χ can be arbitrarily adjusted between 〇 · 〇〇 卜 ^ 99. Materials c is defined as indium gallium arsenide (InxGai xASyNi_y), and can be arbitrarily adjusted between 1 and 300 angstroms, and the χ composition value can be arbitrarily adjusted between • 〇〇1 ~ 0 · 9 9 9 Can be arbitrarily adjusted between 〇 · 〇〇 丨 ~ 〇9 9 9. Between A and B or A and C or B and C materials can be optionally added a layer of j multilayer, the thickness of 1 Angstrom to 3 0 0 A spacer material layer is used to adjust the energy gap of this new base material. This spacer material layer can use a composition graded material (for example, a layer of 30 Angstrom material is added between GaAs and faAsuSbo.!, Where X value The thickness of 30 angstroms is not fixed, but a gradual method is used, and the value of χ is described in "Angle V, 剌 π;

GaASxSb^材料中由〇依序漸變 之GaAsxSbh材料作為問 ^ υ·〗),或用數種不同組成 中間加入三層厚度分別為4〇埃曰(例如GaAs與GaAsuSbu GaAsu7Sbfl.fl3, GaASfl95SbflQ5 、’ 35埃及 30埃之 雖然本創作已經藉由較佳者3 之材料)° 並非用以限定本創作。舉二】:,路如上’然而,其 (㈣,録神化鎵坤化鎵 AO材料組合成長出之基-極)之化銦鎵(InxGai 構,對任何熟悉此技藝土·八貝接面雙極電晶 範圍内,Λ , 士,在不偏離本劎你4 結 a 當可作任何更動盥潤銘&甘不創作之精神盥 潤飾仍不脫碰士名丨1 士 、,閑飾,而其所為之夂絲击^ 脫離本創作申請專利範圍所界定。各種更動與 M253058 圖式簡單說明 第一圖係習知技藝典型異質接面雙極電晶體的結構。 第二圖是本創作第一實施例的示意圖。 第三圖係顯示本創作第一實施例的基極層組成示意 圖。 第四A圖係顯示本創作第二實施例的基極結構組成示 意圖。 第四B、C、D、E、F、G、H、I、J、K、L圖係顯示本 創作其他實施例的基極結構組成示意圖。 第五A圖係顯示本創作別種型態的其他實施例的基極 結構排列示意圖。 第五 B、 C、 D、 E、 F、 G、 H、 I、 J、 K、 L、 Μ、 N、 0、 P、Q、R圖係顯示別種型態的其他實施例的基極結構排列 示意圖。 [ 元件符 號 說 明】 1 晶 結 構 10 石申 化 鎵 基板 11 次 集 極 層 12 集 極 層 13 基 極 層 14 射 極 層 15 射 極 覆 層 2 晶 結 構In the GaASxSb ^ material, the GaAsxSbh material with a progressive gradient of 0 is used as a question ^), or three different layers are added in the middle and the thickness is 40 angstroms (such as GaAs and GaAsuSbu GaAsu7Sbfl.fl3, GaASfl95SbflQ5, '35 Egypt's 30 Angstrom although this creation has been made with the material of the better 3) ° is not used to limit this creation. Example 2: "The road is the same as above" However, its (㈣, the base-pole of the growth of the gallium-gallium-alloy AO material combination) is made of indium gallium (InxGai structure), for anyone familiar with this technology Within the scope of the polarizer, Λ, 士, without deviating from your 4 knots a. When you can make any changes to the inscription of the spirit & the creative decoration of Gan Bu still does not touch the name of the person. And what it does is beyond the scope of the patent application for this creation. Various changes and the M253058 diagram briefly illustrate the structure of a typical heterojunction bipolar transistor, which is a typical technique in the conventional art. The second picture is the first A schematic diagram of an embodiment. The third diagram is a diagram showing the composition of the base layer of the first embodiment of the present invention. The fourth diagram A is a diagram showing the composition of the base structure of the second embodiment of the present invention. The fourth B, C, D , E, F, G, H, I, J, K, and L are schematic diagrams showing the composition of the base structure of the other embodiment of the present invention. The fifth diagram A shows the base structure of the other embodiment of the present invention in other types. Arrangement diagram. Fifth B, C, D, E, F, G, H, I, J, K, L, M, N, 0, P, Q, and R are schematic diagrams showing the arrangement of base structures in other embodiments of other types. [Description of Element Symbols] 1 Crystal Structure 10 Gallium Substrate 11 Sub-Collector Layer 12 Collector layer 13 Base layer 14 Emitter layer 15 Emitter cover 2 Crystal structure

第14頁 M253058 圖式簡單說明 20 砷化鎵基板 21 次集極層 22 集極層 23 基極層 24 射極層 25 射極覆層 230 夾心層 2 3 0a 第一基極接面層 2 3 0b 第二基極接面層 32 集極層 33 基極層 34 射極層 330 夾心層 33 0a 第一基極接面層 33 0b 第二基極接面層 33 0c 第三基極接面層Page 14 M253058 Brief description of the drawing 20 Gallium arsenide substrate 21 Sub-collector layer 22 Collector layer 23 Base layer 24 Emitter layer 25 Emitter cover 230 Sandwich layer 2 3 0a First base contact layer 2 3 0b Second base interface layer 32 Collector layer 33 Base layer 34 Emitter layer 330 Sandwich layer 33 0a First base interface layer 33 0b Second base interface layer 33 0c Third base interface layer

第15頁 0334Page 15 0334

Claims (1)

M253058 六、申請專利範圍 1. 一種可用以調整基射極導通電壓的異質接面雙極電晶體 結構,包含: 一基板,材質為一珅化嫁(GaAs); 一次集極層於該基板上; 一集極層於該次集極層上; 一基極層於該集極層上; 一射極層於該基極層上;及 一射極覆層於該射極層上; 其中,該基極層包含: 至少一夾心層,該失心層包含: 一第一基極接面層;及 一第二基極接面層於該第一基極接面層上; 其中,該夾心層可為複數個,並且依次疊覆。 2. 如申請專利範圍第1項所述的結構,進一步地,包含: 一第一基極接面層於該夾心層上。 3. 如申請專利範圍第1項所述的結構,進一步地,包含: 一第二基極接面層於該夾心層上。 4. 如申請專利範圍第1項所述的結構,進一步地,包含: 一間隔材料層,該間隔材料層貼合於該第一基極接面層或 該第二基極接面層;其中,該間隔材料層的材質係不同於 其所貼合之該第一基極接面層與該第二基極接面層的材 質。 5. 如申請專利範圍第1項所述的結構,於該夾心層,進一 步地,包含:M253058 6. Scope of patent application 1. A heterojunction bipolar transistor structure that can be used to adjust the base-emitter on-voltage, including: a substrate made of GaAs; a collector layer on the substrate A collector layer on the secondary collector layer; a base layer on the collector layer; an emitter layer on the base layer; and an emitter cladding layer on the emitter layer; wherein, The base layer includes: at least one sandwich layer, and the dislocation layer includes: a first base interface layer; and a second base interface layer on the first base interface layer; wherein the sandwich layer The layers may be plural and overlap one after another. 2. The structure according to item 1 of the patent application scope, further comprising: a first base electrode interface layer on the sandwich layer. 3. The structure described in item 1 of the scope of patent application, further comprising: a second base electrode interface layer on the sandwich layer. 4. The structure according to item 1 of the scope of patent application, further comprising: a spacer material layer, the spacer material layer being adhered to the first base junction layer or the second base junction layer; wherein The material of the spacer material layer is different from the material of the first base interface layer and the second base interface layer to which it is attached. 5. The structure described in item 1 of the scope of patent application, in the sandwich layer, further comprises: 第16頁 0335 M253058 六、申請專利範圍 一第三基極接面層於該第一基極接面層與該第二基極接面 層間。 6. 如申請專利範圍第5項所述的結構,進一步地,包含: 一第一基極接面層於該夾心層上。 7. 如申請專利範圍第5項所述的結構,進一步地,包含: 一第二基極接面層於該夾心層上。 8. 如申請專利範圍第5項所述的結構,進一步地,包含: 一第三基極接面層於該爽心層上。 9 .如申請專利範圍第5項所述的結構,包含: 一間隔材料層,該間隔材料層貼合該第一基極接面層、該 第二基極接面層,或該第三基極接面層間,其中,該間隔 材料層的材質係不同於其所貼合之該第一基極接面層的材 質、該第二基極接面層與該第三基極接面層的材質。 1 0 .如申請專利範圍第1項所述的結構,該第一基極接面層 的材質可為一銻砷化鎵(GaASxSb^ )、一砷化鎵 (GaAs)或一氮石申化銦鎵(I n xGa bXAs yN i_y ),其中,該第 一基極接面層的厚度可從1到3 Ο 0埃,x的組成值可從Ο . Ο Ο 1 到Ο · 9 9 9,y的組成值可從Ο . Ο Ο 1到Ο . 9 9 9。 1 1.如申請專利範圍第1項所述的結構,該第二基極接面層 的材質可為一銻砷化鎵(GaASxSbi—χ )、一砷化鎵 (GaAs)或一氮砷化銦鎵(InxGai—xASyNhy),其中,該第 二基極接面層的厚度可從1到3 0 0埃,X的組成值可從Ο . Ο Ο 1 到0 . 9 9 9,y的組成值可從Ο . Ο Ο 1到0 . 9 9 9。 1 2 .如申請專利範圍第5項所述的結構,該第三基極接面層Page 16 0335 M253058 6. Scope of patent application A third base contact layer is between the first base contact layer and the second base contact layer. 6. The structure according to item 5 of the patent application scope, further comprising: a first base electrode interface layer on the sandwich layer. 7. The structure according to item 5 of the scope of patent application, further comprising: a second base electrode interface layer on the sandwich layer. 8. The structure according to item 5 of the patent application scope, further comprising: a third base contact layer on the refreshing layer. 9. The structure according to item 5 of the scope of patent application, comprising: a spacer material layer, the spacer material layer being bonded to the first base contact layer, the second base contact layer, or the third base Between the electrode interface layers, the material of the spacer material layer is different from the material of the first base electrode interface layer to which it is attached, the second base electrode interface layer and the third base electrode interface layer. Material. 10. According to the structure described in item 1 of the scope of patent application, the material of the first base contact layer may be a gallium antimony arsenide (GaASxSb ^), a gallium arsenide (GaAs), or a nitrogen stone. Indium gallium (I n xGa bXAs yN i_y), wherein the thickness of the first base junction layer can be from 1 to 3 0 0 angstroms, and the composition value of x can be from 0. Ο Ο 1 to 0 · 9 9 9, The composition value of y can be from 0. Ο Ο 1 to Ο. 9 9 9. 1 1. According to the structure described in item 1 of the scope of patent application, the material of the second base junction layer may be a gallium antimony arsenide (GaASxSbi-χ), a gallium arsenide (GaAs), or a nitrogen arsenide. Indium gallium (InxGai—xASyNhy), wherein the thickness of the second base contact layer can be from 1 to 300 angstroms, and the composition value of X can be from 〇. 〇 Ο 1 to 0.9 9 9, y Values can range from 0. Ο Ο 1 to 0.9 9 9. 1 2. The structure according to item 5 of the scope of patent application, the third base contact layer 第17頁 0336 M253058 六、申請專利範圍 的材質可為一銻坤化鎵(GaASxSbi—x )、一砷化鎵 (GaAs)或一氮砷化銦鎵(inxGa卜xASyNi—y ),其中,該第 三基極接面層的厚度可從1到3 0 0埃,X的組成值可從0 . 0 0 1 到0 · 9 9 9,y的組成值可從〇 · 〇 〇 1到〇 · 9 9 9。 1 3 ·如申請專利範圍第4項或第9項所述的結構,該間隔材 料層的材質可為一組成漸變材料(composition graded material) 〇 1 4 ·如申請專利範圍第1 3項所述的結構,該組成漸變材料 可為一銻砷化鎵(GaASxSb^ )或氮砷化銦鎵(111/31-xAs yN h ),其中X或y值於間隔材料層依其厚度成長方向, 以漸變方式,使X或y值依序由低點逐漸遞增或由高點逐漸 遞減。 1 5 ·如申請專利範圍第4項或第9項所述的結構,其中,該 間隔材料層可為經依序疊加的複數個間隔材料層。 1 6 ·如申請專利範圍第1 5項所述的結構,其中,該間隔材 料層的材質可為一錄砷化鎵 (GaAsxSb n )或氮砷化銦鎵 (IrixGai-xAsyN^y ),且各該複數個間隔材料層的x值或y值 彼此均互不相同。Page 17 0336 M253058 6. The scope of the patent application material can be a gallium antimony (GaASxSbi-x), a gallium arsenide (GaAs), or a gallium indium gallium arsenide (inxGa and xASyNi-y). Among them, the The thickness of the third base contact layer may be from 1 to 300 angstroms, the composition value of X may be from 0.01 to 0 · 9 99, and the composition value of y may be from 〇 · 〇001 to 〇 · 9 9 9. 1 3 · According to the structure described in item 4 or item 9 of the scope of patent application, the material of the spacer material layer may be a composition graded material. 〇 1 4 · As described in item 13 of the scope of patent application Structure, the compositionally graded material may be a gallium antimony arsenide (GaASxSb ^) or an indium gallium arsenide (111 / 31-xAs yN h), where the X or y value in the spacer material layer grows in accordance with its thickness, and The gradual change method makes the X or y value gradually increase from the low point or decrease gradually from the high point. 1 5. The structure according to item 4 or item 9 of the scope of patent application, wherein the spacer material layer may be a plurality of spacer material layers which are sequentially superimposed. 16 · The structure according to item 15 of the scope of patent application, wherein the material of the spacer material layer is a gallium arsenide (GaAsxSb n) or indium gallium arsenide (IrixGai-xAsyN ^ y), and The x value or y value of each of the plurality of spacer material layers is different from each other. 第18頁 Θ337Page 18 Θ337
TW092216107U 2003-09-05 2003-09-05 Heterogeneous junction dipole transistor structure for adjusting on voltage of base and emitter TWM253058U (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW092216107U TWM253058U (en) 2003-09-05 2003-09-05 Heterogeneous junction dipole transistor structure for adjusting on voltage of base and emitter
JP2004254039A JP2005086201A (en) 2003-09-05 2004-09-01 Structure of heterojunction bipolar transistor
US10/934,891 US7224005B2 (en) 2003-09-05 2004-09-03 Heterojunction bipolar transistor structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW092216107U TWM253058U (en) 2003-09-05 2003-09-05 Heterogeneous junction dipole transistor structure for adjusting on voltage of base and emitter

Publications (1)

Publication Number Publication Date
TWM253058U true TWM253058U (en) 2004-12-11

Family

ID=34225722

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092216107U TWM253058U (en) 2003-09-05 2003-09-05 Heterogeneous junction dipole transistor structure for adjusting on voltage of base and emitter

Country Status (3)

Country Link
US (1) US7224005B2 (en)
JP (1) JP2005086201A (en)
TW (1) TWM253058U (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7550785B1 (en) * 2005-12-02 2009-06-23 Skyworks Solutions, Inc. PHEMT structure having recessed ohmic contact and method for fabricating same
WO2014148194A1 (en) * 2013-03-19 2014-09-25 株式会社村田製作所 Heterojunction bipolar transistor
CN114797474A (en) * 2014-05-21 2022-07-29 非链实验室 System and method for buffer solution exchange

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61210679A (en) * 1985-03-15 1986-09-18 Sony Corp Semiconductor device
US5150185A (en) * 1990-04-18 1992-09-22 Fujitsu Limited Semiconductor device
US5404028A (en) * 1993-01-22 1995-04-04 Hughes Aircraft Company Electrical junction device with lightly doped buffer region to precisely locate a p-n junction
US5365077A (en) * 1993-01-22 1994-11-15 Hughes Aircraft Company Gain-stable NPN heterojunction bipolar transistor
US6320212B1 (en) * 1999-09-02 2001-11-20 Hrl Laboratories, Llc. Superlattice fabrication for InAs/GaSb/AISb semiconductor structures
US6847060B2 (en) * 2000-11-27 2005-01-25 Kopin Corporation Bipolar transistor with graded base layer
JP2003297849A (en) * 2002-04-05 2003-10-17 Toshiba Corp Heterojunction bipolar transistor and manufacture method therefor
US6822274B2 (en) * 2003-02-03 2004-11-23 Agilent Technologies, Inc. Heterojunction semiconductor device having an intermediate layer for providing an improved junction
US6998320B2 (en) * 2003-04-23 2006-02-14 Triquint Semiconductor, Inc. Passivation layer for group III-V semiconductor devices

Also Published As

Publication number Publication date
JP2005086201A (en) 2005-03-31
US20050051799A1 (en) 2005-03-10
US7224005B2 (en) 2007-05-29

Similar Documents

Publication Publication Date Title
Huang et al. Strain relief by periodic misfit arrays for low defect density GaSb on GaAs
CN1977366B (en) High-electron-mobility transistor, field-effect transistor, epitaxial substrate, method for manufacturing epitaxial substrate, and method for manufacturing group iii nitride transistor
JP2694120B2 (en) Pseudo substrate structure
JP5039920B2 (en) Method for forming strained silicon materials with improved thermal conductivity
Kuo et al. High performance AlGaInP visible light‐emitting diodes
Nechaev et al. Control of threading dislocation density at the initial growth stage of AlN on c-sapphire in plasma-assisted MBE
TWI280662B (en) Heterojunction field effect transistors using silicon-germanium and silicon-carbon alloys
De Angelis et al. High-field-effect-mobility pentacene thin-film transistors with polymethylmetacrylate buffer layer
US20030127646A1 (en) Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same
Salvalaglio et al. Fine control of plastic and elastic relaxation in Ge/Si vertical heterostructures
Hoke et al. AlGaN/GaN high electron mobility transistors on 100 mm silicon substrates by plasma molecular beam epitaxy
TWM253058U (en) Heterogeneous junction dipole transistor structure for adjusting on voltage of base and emitter
US9419082B2 (en) Source/drain profile engineering for enhanced p-MOSFET
Boioli et al. Assessing the delay of plastic relaxation onset in SiGe islands grown on pit-patterned Si (001) substrates
CN206312900U (en) High mobility gallium nitride semiconductor device
Singh et al. Influence of AlGaN and InGaN back barriers on the performance of AlGaN/GaN HEMT
Li et al. High mobility two-dimensional electron gases in nitride heterostructures with high Al composition AlGaN alloy barriers
CN206301802U (en) A kind of high-quality AlGaN/GaN growth structures of selective area epitaxial
Funato et al. Bistable nanofacet structures on vicinal AlN (0001) surfaces
Yang et al. Interface-blocking mechanism for reduction of threading dislocations in SiGe and Ge epitaxial layers on Si (100) substrates
Sergeeva et al. New semipolar aluminum nitride thin films: growth mechanisms, structure, dielectric and pyroelectric properties
Yoon et al. Surface roughness and dislocation distribution in compositionally graded relaxed SiGe buffer layer with inserted-strained Si layers
Myronov et al. Enhancement of hole mobility and carrier density in Ge quantum well of SiGe heterostructure via implementation of double-side modulation doping
Egelhoff et al. Suppression of orange-peel coupling in magnetic tunnel junctions by preoxidation
Lebedev et al. Comparison of graphene films grown on 6 H-SiC and 4 H-SiC substrates

Legal Events

Date Code Title Description
MK4K Expiration of patent term of a granted utility model