TWI842259B - Power conversion device - Google Patents
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- TWI842259B TWI842259B TW111147085A TW111147085A TWI842259B TW I842259 B TWI842259 B TW I842259B TW 111147085 A TW111147085 A TW 111147085A TW 111147085 A TW111147085 A TW 111147085A TW I842259 B TWI842259 B TW I842259B
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 43
- 238000012544 monitoring process Methods 0.000 claims abstract description 9
- 230000005856 abnormality Effects 0.000 claims description 22
- 239000000758 substrate Substances 0.000 claims description 16
- 230000002159 abnormal effect Effects 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 21
- 239000004065 semiconductor Substances 0.000 description 6
- 239000003990 capacitor Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
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- 101001121408 Homo sapiens L-amino-acid oxidase Proteins 0.000 description 2
- 102100026388 L-amino-acid oxidase Human genes 0.000 description 2
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
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- 238000005516 engineering process Methods 0.000 description 2
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 1
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- 229910044991 metal oxide Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
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- Power Engineering (AREA)
- Power Conversion In General (AREA)
Abstract
本發明之目的在於提供一種可檢測與開關元件之連接異常之電力轉換裝置。 本發明之電力轉換裝置具有：複數個開關元件；驅動部，其對開關元件進行閘極之驅動；及控制部，其對驅動部輸出控制信號；且驅動部具有：閘極電阻，其連接於開關元件；及電壓監視部，其基於閘極電阻之電位差，檢測與開關元件之連接之異常。 The purpose of the present invention is to provide an electric power conversion device that can detect abnormal connection with a switching element. The electric power conversion device of the present invention has: a plurality of switching elements; a driving unit that drives the gate of the switching element; and a control unit that outputs a control signal to the driving unit; and the driving unit has: a gate resistor that is connected to the switching element; and a voltage monitoring unit that detects abnormal connection with the switching element based on the potential difference of the gate resistor.
Description
本發明係關於一種電力轉換裝置。The present invention relates to an electric power conversion device.
作為可檢測與電力轉換裝置相關之異常之技術，已知有專利文獻1。專利文獻1揭示有一種技術，其於電力轉換裝置之再生動作時，檢測向消耗能量之制動電阻器流通電流之制動電路的異常。 [先前技術文獻] [專利文獻] Patent document 1 is known as a technology capable of detecting abnormalities related to an electric power conversion device. Patent document 1 discloses a technology for detecting abnormalities in a braking circuit that flows a current to a braking resistor that consumes energy during a regenerative operation of the electric power conversion device. [Prior technical document] [Patent document]
[專利文獻1]日本專利特開2019-176601號公報[Patent Document 1] Japanese Patent Publication No. 2019-176601
[發明所欲解決之問題][The problem the invention is trying to solve]
一種電力轉換裝置，其受電交流電力，由整流電路轉換為直流電力，且由逆轉換器轉換為交流。逆轉換器部多由開關元件即電力半導體構成。進行電力轉換裝置之控制之控制電路由微電腦、或其他IC((IntegratedCircuit：積體電路)、及使用電阻或電容器等之電子電路進行。控制電路之零件一般安裝於基板。A power conversion device that receives AC power, converts it into DC power by a rectifier circuit, and then converts it into AC power by an inverter. The inverter part is usually composed of switching elements, i.e., power semiconductors. The control circuit that controls the power conversion device is performed by a microcomputer, or other IC (Integrated Circuit), and electronic circuits using resistors or capacitors. The components of the control circuit are generally mounted on a substrate.
若電力轉換裝置之輸出電容變大，則根據主力電容使用之開關元件之電容亦必須變大。若開關元件之電容變大，則開關元件之封裝亦變大。因此，於基板與開關元件之間，利用焊料等之直接連接變困難。因此，基板與開關元件經由電線連接。If the output capacitance of the power conversion device increases, the capacitance of the switch element used according to the main capacitance must also increase. If the capacitance of the switch element increases, the package of the switch element also increases. Therefore, it becomes difficult to directly connect the substrate and the switch element using solder or the like. Therefore, the substrate and the switch element are connected via wires.
該電線有產生斷線等之異常之情形。於該情形時，電力轉換裝置必須檢測產生異常之情況。The power line has an abnormality such as disconnection. In this case, the power conversion device must detect the abnormality.
於專利文獻1，未對此種連接之異常做任何考慮。Patent document 1 does not take into account any abnormality of such connection.
本發明之目的在於提供一種可檢測與開關元件之連接之異常之電力轉換裝置。 [解決問題之技術手段] The purpose of the present invention is to provide an electric power conversion device that can detect abnormalities in the connection with a switching element. [Technical means for solving the problem]
本發明係一種電力轉換裝置，其具有：複數個開關元件；驅動部，其對上述開關元件進行閘極之驅動；及控制部，其對上述驅動部輸出控制信號；且 上述驅動部具有： 閘極電阻，其連接於上述開關元件；及電壓監視部，其基於上述閘極電阻之電位差，檢測與上述開關元件之連接之異常。 [發明之效果] The present invention is an electric power conversion device, which has: a plurality of switching elements; a driving unit that drives the gate of the switching elements; and a control unit that outputs a control signal to the driving unit; and the driving unit has: a gate resistor that is connected to the switching element; and a voltage monitoring unit that detects abnormality in the connection with the switching element based on the potential difference of the gate resistor. [Effect of the invention]
根據本發明，可檢測與開關元件之連接之異常。According to the present invention, abnormality in connection with a switch element can be detected.
首先，使用圖3與圖4，說明應用本實施例之電力轉換裝置之構成。圖3係應用實施例1之電力轉換裝置1之整體電路構成之一例。First, the structure of the power conversion device of this embodiment is described using Figures 3 and 4. Figure 3 is an example of the overall circuit structure of the power conversion device 1 of the first embodiment.
於電力轉換裝置1中，由二極體3對來自交流電源2之電力進行全波整流，由電容器4進行平滑化，暫時轉換為直流電力。轉換之直流電力藉由電力轉換裝置1之逆轉換器轉換為交流電力。逆轉換器具備複數個IGBT(Insulated Gate Bipolar Transistor：絕緣閘極雙極性電晶體)5。藉由將IGBT5切換為接通(ON)或斷開(OFF)，進行自直流電力轉換為任意頻率、任意電壓之交流電力，電力轉換裝置1對負載6輸出交流電力。In the power conversion device 1, the power from the AC power source 2 is full-wave rectified by the diode 3, smoothed by the capacitor 4, and temporarily converted into DC power. The converted DC power is converted into AC power by the inverter of the power conversion device 1. The inverter has a plurality of IGBTs (Insulated Gate Bipolar Transistors) 5. By switching the IGBT5 to ON or OFF, the DC power is converted into AC power of any frequency and voltage, and the power conversion device 1 outputs AC power to the load 6.
進行電力轉換裝置1之控制之控制電路9、進行IGBT5之閘極之驅動之IGBT閘極驅動電路10等，由具備CPU(Central Processing Unit：中央處理單元)或記憶體等之微電腦、IC、電晶體等之半導體、電阻、電容器等構成。該等電路安裝於基板8。The control circuit 9 for controlling the power conversion device 1 and the IGBT gate drive circuit 10 for driving the gate of the IGBT 5 are composed of a microcomputer having a CPU (Central Processing Unit) or a memory, an IC, a semiconductor such as a transistor, a resistor, a capacitor, etc. These circuits are mounted on a substrate 8.
圖4係顯示應用本實施例之電力轉換裝置之整體構造之一例之圖。二極體、IGBT等之電力半導體，多以封入封裝之模組之狀態提供。圖4顯示由封入封裝之模組構成IGBT5之例。Fig. 4 is a diagram showing an example of the overall structure of a power conversion device to which this embodiment is applied. Power semiconductors such as diodes and IGBTs are often provided in the form of encapsulated modules. Fig. 4 shows an example of an IGBT 5 constructed from an encapsulated module.
於IGBT5，配置有施加閘極信號之閘極端子。為了冷卻自電力半導體產生之熱，於冷卻片21上配置複數個二極體3、複數個IGBT5。由電線或銅條等之配線材22，對二極體或IGBT5等之各電力半導體與電容器4進行配線。複數個二極體3或複數個IGBT5由電線或銅條等之主電路配線材23連接。搭載有控制電路9、IGBT閘極驅動電路10之基板8之端子、與IGBT5之閘極端子間，由電線或銅條等之IGBT閘極配線24連接。A gate terminal for applying a gate signal is arranged on the IGBT5. In order to cool the heat generated by the power semiconductor, a plurality of diodes 3 and a plurality of IGBT5 are arranged on the cooling plate 21. The power semiconductors such as the diodes or IGBT5 and the capacitor 4 are wired by wiring materials 22 such as wires or copper bars. The plurality of diodes 3 or the plurality of IGBT5 are connected by main circuit wiring materials 23 such as wires or copper bars. The terminals of the substrate 8 carrying the control circuit 9 and the IGBT gate drive circuit 10 are connected to the gate terminals of the IGBT5 by IGBT gate wiring 24 such as wires or copper bars.
操作面板7連接於控制電路9。操作面板7自外部輸入對電力轉換裝置之操作資訊，或輸出與電力轉換裝置之狀態相關之資訊。The operation panel 7 is connected to the control circuit 9. The operation panel 7 inputs operation information of the power conversion device from the outside, or outputs information related to the state of the power conversion device.
以下，使用圖詳細地說明本發明之實施例。 [實施例1] The following is a detailed description of an embodiment of the present invention using figures. [Embodiment 1]
圖1係顯示實施例1之IGBT閘極驅動電路10、控制電路9、IGBT5之圖。於圖1中，IGBT閘極驅動電路10與控制電路9安裝於基板8。IGBT閘極驅動電路10具備閘極信號放大器31、閘極電阻32、電壓監視器33。於基板8與IGBT5之間設置有傳送控制IGBT5之閘極之信號的IGBT閘極配線24。圖1之電路為顯示圖3所示之IGBT閘極驅動電路10與IGBT5之全部6相中之1相部分者。FIG. 1 is a diagram showing an IGBT gate driver circuit 10, a control circuit 9, and an IGBT 5 of Embodiment 1. In FIG. 1 , the IGBT gate driver circuit 10 and the control circuit 9 are mounted on a substrate 8. The IGBT gate driver circuit 10 has a gate signal amplifier 31, a gate resistor 32, and a voltage monitor 33. An IGBT gate wiring 24 for transmitting a signal for controlling the gate of the IGBT 5 is provided between the substrate 8 and the IGBT 5. The circuit of FIG. 1 shows one phase of all six phases of the IGBT gate driver circuit 10 and the IGBT 5 shown in FIG. 3 .
閘極信號放大器31將來自控制電路9之閘極源信號即接通信號、或斷開信號，放大為適合驅動IGBT閘極之信號。放大之閘極控制信號，經由閘極電阻32供給至IGBT之閘極端子。電壓監視器33監視產生於閘極電阻32之電壓，且監視將接通信號輸出至IGBT之閘極後，是否立即產生電壓之脈衝。產生脈衝之情形判定為正常，未產生脈衝之情形判定為異常，向上位之控制電路9發送正常或異常之信號。The gate signal amplifier 31 amplifies the gate source signal, i.e., the connection signal or the disconnection signal, from the control circuit 9 into a signal suitable for driving the IGBT gate. The amplified gate control signal is supplied to the gate terminal of the IGBT via the gate resistor 32. The voltage monitor 33 monitors the voltage generated in the gate resistor 32, and monitors whether a voltage pulse is generated immediately after the connection signal is output to the gate of the IGBT. The situation where a pulse is generated is judged as normal, and the situation where a pulse is not generated is judged as abnormal, and a normal or abnormal signal is sent to the upper control circuit 9.
其次，對實施例1之電路之動作進行說明。圖2顯示圖1之電路之時序圖。於圖2中，橫軸顯示時間，縱軸顯示圖1之各部位之電壓。Next, the operation of the circuit of Embodiment 1 is described. FIG2 shows a timing diagram of the circuit of FIG1. In FIG2, the horizontal axis shows time, and the vertical axis shows the voltage of each part of FIG1.
自圖2之上段朝向下段顯示有將自控制電路9輸出之IGBT之閘極接通或斷開之閘極源信號41、將閘極源信號41放大之閘極信號放大器31之輸出電壓即閘極信號42、IGBT之閘極與射極間之電壓(閘極電壓)43、產生於閘極電阻32之兩端之電壓44、電壓監視器33之輸出電壓(斷線信號)45。From the upper part to the lower part of FIG. 2 , there are shown a gate-source signal 41 for turning on or off the gate of the IGBT output from the control circuit 9, an output voltage of the gate signal amplifier 31 for amplifying the gate-source signal 41, i.e., a gate signal 42, a voltage between the gate and the emitter of the IGBT (gate voltage) 43, a voltage 44 generated at both ends of the gate resistor 32, and an output voltage (break signal) 45 of the voltage monitor 33.
於時間t1，根據來自控制電路9之接通信號，閘極信號放大器31之閘極信號42上升。此處因IGBT之閘極為電容性，故通過閘極電阻32向IGBT閘極進行充電。因此，於IGBT閘極之充電期間，於閘極電阻32產生電壓。At time t1, the gate signal 42 of the gate signal amplifier 31 rises according to the connection signal from the control circuit 9. Since the gate of the IGBT is capacitive, the IGBT gate is charged through the gate resistor 32. Therefore, a voltage is generated in the gate resistor 32 during the charging period of the IGBT gate.
於IGBT之斷開時，反而自IGBT閘極經由閘極電阻32進行放電。因此，產生相反方向之電壓。每當向IGBT閘極發送接通或斷開信號時，於閘極電阻間反復產生電位差。When the IGBT is turned off, discharge is carried out from the IGBT gate through the gate resistor 32. Therefore, a voltage in the opposite direction is generated. Whenever an on or off signal is sent to the IGBT gate, a potential difference is repeatedly generated between the gate resistors.
於時間t2，基板8與IGBT5之間之IGBT閘極配線24，於圖1之斷線部位34斷線。於該情形時，於IGBT接通或斷開時，通往IGBT閘極之充電電流或放電電流不流通。因此，未於閘極電阻間產生電壓。At time t2, the IGBT gate wiring 24 between the substrate 8 and the IGBT 5 is disconnected at the disconnection portion 34 in FIG. 1. In this case, when the IGBT is turned on or off, the charging current or the discharging current to the IGBT gate does not flow. Therefore, no voltage is generated across the gate resistor.
電壓監視器33監視IGBT接通後之閘極電阻間之電壓，若產生規定值以上之電壓脈衝，則不輸出信號45(輸出斷開信號)。另一方面，於閘極電阻間之電壓未產生規定值以上之電壓之情形時，電壓監視器33輸出接通之斷線信號45。如此，於無斷線等之異常之情形時，電壓監視器33設為正常，不輸出信號45。於產生斷線等之異常時，電壓監視器33輸出異常信號45，因此可檢測異常。The voltage monitor 33 monitors the voltage between the gate resistors after the IGBT is turned on. If a voltage pulse of a predetermined value or more is generated, the signal 45 is not output (a disconnection signal is output). On the other hand, when the voltage between the gate resistors does not exceed the predetermined value, the voltage monitor 33 outputs the disconnection signal 45 of the ON state. In this way, when there is no abnormality such as disconnection, the voltage monitor 33 is set to normal and does not output the signal 45. When an abnormality such as disconnection occurs, the voltage monitor 33 outputs the abnormality signal 45, so that the abnormality can be detected.
控制電路9於自電壓監視器33接收到接通信號45之情形時，以判斷為基板8與IGBT5之間之IGBT閘極配線24斷線，且使電力轉換裝置停止之方式進行控制。於該情形時，控制電路9亦可控制為，對於操作面板7等之顯示部，將產生斷線之情況，以利用者或管理者可掌握之方式通知至外部。When the control circuit 9 receives the connection signal 45 from the voltage monitor 33, it determines that the IGBT gate wiring 24 between the substrate 8 and the IGBT 5 is disconnected, and controls the power conversion device to stop. In this case, the control circuit 9 can also control the display unit such as the operation panel 7 to notify the user or manager of the disconnection in a manner that can be grasped by the user or the manager.
根據本實施例，於基板8與IGBT5之間之配線中產生連接異常之情形時，可檢測該異常，並停止電力轉換裝置之動作。 [實施例2] According to this embodiment, when a connection abnormality occurs in the wiring between the substrate 8 and the IGBT 5, the abnormality can be detected and the operation of the power conversion device can be stopped. [Example 2]
圖5係顯示實施例2之電路之圖。另，省略與實施例1共通之點之說明。本實施例為於並聯使用2個IGBT之情形時之實施例。並聯使用2個IGBT之理由在於，有欲獲得於IGBT流通之電流之容量之情形。FIG5 is a diagram showing a circuit of Embodiment 2. In addition, descriptions of points common to Embodiment 1 are omitted. This embodiment is an embodiment when two IGBTs are used in parallel. The reason for using two IGBTs in parallel is that there is a case where the capacity of the current flowing through the IGBT is desired.
於閘極信號放大器31與並聯之IGBT之間，設置連接於各IGBT之閘極之閘極電阻32。於各閘極電阻32設置與實施例1同樣之電壓監視器33。將來自電壓監視器33之輸出連接於OR電路51，且電壓監視器33之任一者為檢測出異常時對控制電路9傳送檢測信號的構成。A gate resistor 32 connected to the gate of each IGBT is provided between the gate signal amplifier 31 and the parallel-connected IGBT. A voltage monitor 33 similar to that of Embodiment 1 is provided at each gate resistor 32. The output from the voltage monitor 33 is connected to the OR circuit 51, and any one of the voltage monitors 33 is configured to transmit a detection signal to the control circuit 9 when an abnormality is detected.
本實施例雖有並聯2個IGBT之情形，但並不限定於此，亦可使並聯數為3以上，於該情形時構成為，於各IGBT之閘極電阻設置各電壓監視器，對所有之輸出取得OR。Although the present embodiment has two IGBTs connected in parallel, the present invention is not limited to this and the number of parallel connections may be three or more. In this case, each voltage monitor is provided at the gate resistor of each IGBT to obtain an OR for all outputs.
控制電路9自OR電路51接收信號，該信號顯示將並聯連接之2個IGBT與基板8連接之IGBT閘極配線24之任一者斷線之情況，且於該情形時，以使電力轉換裝置停止之方式進行控制。The control circuit 9 receives a signal from the OR circuit 51 indicating that one of the IGBT gate wirings 24 connecting the two IGBTs connected in parallel to the substrate 8 is disconnected, and in this case, controls the power conversion device to stop.
於並聯使用2個IGBT之情形時，於任一IGBT中，IGBT閘極信號配線不良，且一者之IGBT無法進行接通動作之狀態時，健全之配線之IGBT亦可正常接通並流通電流。即，於並聯使用2個IGBT之情形時，單側之IGBT無法接通之狀況未顯著化。因此，作為電力轉換裝置之輸出正常進行，有異常未顯著化之情形。When two IGBTs are used in parallel, if the IGBT gate signal wiring is faulty in any IGBT and one IGBT cannot be turned on, the IGBT with healthy wiring can be turned on normally and current can flow. In other words, when two IGBTs are used in parallel, the condition that the IGBT on one side cannot be turned on is not obvious. Therefore, the output of the power conversion device is normal and there is a situation where the abnormality is not obvious.
於此種狀況下，於本實施例中，亦可檢測IGBT閘極之配線不良，且控制電路9使電力轉換裝置之動作停止，對二次故障防患於未然。 [實施例3] In this case, in this embodiment, the wiring fault of the IGBT gate can also be detected, and the control circuit 9 stops the operation of the power conversion device, thus preventing secondary faults. [Embodiment 3]
圖6係顯示實施例3之電路之圖。於本實施例中，為將實施例1之電壓監視器33具體化之實施例。於本實施例中，圖3之電壓監視器33由電壓比較器61、邊緣檢測器62、鎖存電路63、XOR電路64構成。與實施例1或實施例2共通之點係省略說明。FIG6 is a diagram showing a circuit of Embodiment 3. In this embodiment, the voltage monitor 33 of Embodiment 1 is embodied. In this embodiment, the voltage monitor 33 of FIG3 is composed of a voltage comparator 61, an edge detector 62, a latch circuit 63, and an XOR circuit 64. The common points with Embodiment 1 or Embodiment 2 are omitted.
電壓比較器61將閘極電阻32之電壓44與基準電壓74比較。於閘極電阻32之電壓44高於基準電壓74之情形時，電壓比較器61向鎖存電路63輸出接通信號71。The voltage comparator 61 compares the voltage 44 of the gate resistor 32 with the reference voltage 74. When the voltage 44 of the gate resistor 32 is higher than the reference voltage 74, the voltage comparator 61 outputs a connection signal 71 to the latch circuit 63.
基準電壓74預先設定於電壓比較器61。該基準電壓74於正常時設為較閘極電阻32之電壓44之脈衝電壓低之位準，於IGBT之接通時以外設為因雜訊或檢測誤差等，電壓比較器61未輸出信號之位準。The reference voltage 74 is preset in the voltage comparator 61. The reference voltage 74 is set to a level lower than the pulse voltage of the voltage 44 of the gate resistor 32 in normal conditions, and is set to a level at which the voltage comparator 61 does not output a signal due to noise or detection error, etc., except when the IGBT is turned on.
來自電壓比較器61之信號發送至鎖存電路63之輸入。鎖存電路63於接通信號71進入時，輸出信號73保持接通之狀態，於重設信號72進入時，進行重設，且輸出信號73斷開。The signal from the voltage comparator 61 is sent to the input of the latch circuit 63. When the connection signal 71 enters, the latch circuit 63 outputs the signal 73 and remains connected. When the reset signal 72 enters, the latch circuit 63 is reset and the output signal 73 is disconnected.
邊緣檢測器62檢測閘極信號放大器31之輸出即閘極信號42之下降，輸出下降信號72。鎖存電路63輸入來自邊緣檢測器62之下降信號(重設信號)72。鎖存電路63之輸出信號73與閘極驅動電路之閘極信號42，輸入至XOR電路64。XOR電路64取得鎖存電路63之輸出信號73與閘極驅動電路之輸出即閘極信號42之XOR(互斥或)。The edge detector 62 detects the fall of the gate signal 42, which is the output of the gate signal amplifier 31, and outputs a fall signal 72. The latch circuit 63 inputs the fall signal (reset signal) 72 from the edge detector 62. The output signal 73 of the latch circuit 63 and the gate signal 42 of the gate drive circuit are input to the XOR circuit 64. The XOR circuit 64 obtains the XOR (exclusive OR) of the output signal 73 of the latch circuit 63 and the output of the gate drive circuit, which is the gate signal 42.
於閘極信號42為接通信號且鎖存電路63之輸出信號73為接通信號之情形時，XOR電路64之輸出45作為正常而設為斷開信號。於閘極信號42為接通信號且鎖存電路63之輸出信號73為斷開信號之情形時，XOR電路64之輸出45作為配線不良之異常而設為接通信號。When the gate signal 42 is a make signal and the output signal 73 of the latch circuit 63 is a make signal, the output 45 of the XOR circuit 64 is regarded as a normal state and is set as a break signal. When the gate signal 42 is a make signal and the output signal 73 of the latch circuit 63 is a break signal, the output 45 of the XOR circuit 64 is regarded as an abnormality of wiring failure and is set as a make signal.
控制電路9接收輸出信號45，於異常信號之情形時，檢測產生IGBT閘極之配線不良，控制電路9進行停止電力轉換裝置之動作之控制。The control circuit 9 receives the output signal 45, and in the case of an abnormal signal, detects a wiring fault that causes the IGBT gate, and the control circuit 9 controls the operation of stopping the power conversion device.
圖7顯示圖6之電路之時序圖。於圖7中，橫軸顯示時間，縱軸顯示圖6之各部位之電壓。FIG7 shows a timing diagram of the circuit of FIG6. In FIG7, the horizontal axis shows time, and the vertical axis shows the voltage of each part of FIG6.
自圖7之上段朝向下段，顯示接通或斷開由控制電路9輸出之IGBT之閘極之閘極源信號41、對閘極源信號41進行放大之閘極信號放大器31之輸出電壓即閘極信號42、IGBT之閘極與射極間之閘極電壓43、閘極電阻32之電位差即電壓44、來自電壓比較器61之信號71、閘極信號42之下降信號72、鎖存電路63之輸出信號73、XOR電路64之輸出電壓45。From the upper part to the lower part of FIG. 7 , the gate-source signal 41 of the gate of the IGBT output by the control circuit 9 is turned on or off, the output voltage of the gate signal amplifier 31 that amplifies the gate-source signal 41, i.e., the gate signal 42, the gate voltage 43 between the gate and the emitter of the IGBT, the potential difference of the gate resistor 32, i.e., the voltage 44, the signal 71 from the voltage comparator 61, the falling signal 72 of the gate signal 42, the output signal 73 of the latch circuit 63, and the output voltage 45 of the XOR circuit 64 are shown.
根據本實施例，與實施例1同樣，於基板8與IGBT5之間之配線中產生連接異常之情形時，可檢測該異常。且，可使電力轉換裝置之動作停止。又，用於決定是否異常之基準電壓74，可根據電路之狀況任意設定。 [實施例4] According to this embodiment, as in embodiment 1, when a connection abnormality occurs in the wiring between the substrate 8 and the IGBT 5, the abnormality can be detected. Furthermore, the operation of the power conversion device can be stopped. In addition, the reference voltage 74 used to determine whether there is an abnormality can be arbitrarily set according to the circuit condition. [Embodiment 4]
圖8係顯示實施例4之電路之圖。與上述實施例共通之點係省略說明。於本實施例中，按各IGBT之閘極電阻，設置有實施例3之電壓監視器33之具體化之電路。於圖8中，因並聯有2個IGBT5，故與IGBT5對應地連接有2個電壓監視器33。與實施例3同樣，電壓監視器33具有電壓比較器61、邊緣檢測器62、鎖存電路63、XOR電路64。於圖8中，2個XOR電路64之輸出連接於OR電路81。OR電路81將2個XOR電路64之輸出之邏輯和輸出至控制電路9。於並聯連接之任一者之IGBT5為配線不良之異常之情形時，控制電路9藉由接收接通信號，可檢測配線異常之產生。FIG8 is a diagram showing the circuit of Embodiment 4. The points common to the above-mentioned embodiments are omitted in description. In this embodiment, a circuit that embodies the voltage monitor 33 of Embodiment 3 is provided according to the gate resistance of each IGBT. In FIG8 , since two IGBTs 5 are connected in parallel, two voltage monitors 33 are connected corresponding to the IGBTs 5. Similar to Embodiment 3, the voltage monitor 33 has a voltage comparator 61, an edge detector 62, a latch circuit 63, and an XOR circuit 64. In FIG8 , the outputs of the two XOR circuits 64 are connected to an OR circuit 81. The OR circuit 81 outputs the logical sum of the outputs of the two XOR circuits 64 to the control circuit 9. When any of the IGBTs 5 connected in parallel is abnormal due to poor wiring, the control circuit 9 can detect the occurrence of the wiring abnormality by receiving the connection signal.
根據本實施例，與實施例2同樣，控制電路9可自OR電路81接收信號，該信號顯示將並聯連接之2個IGBT與基板8連接之IGBT閘極配線24之任一者斷線之情況。因此，可以使電力轉換裝置停止之方式進行控制，對二次故障防患於未然。 [實施例5] According to this embodiment, as in Embodiment 2, the control circuit 9 can receive a signal from the OR circuit 81, which indicates that one of the IGBT gate wirings 24 connecting the two IGBTs connected in parallel to the substrate 8 is disconnected. Therefore, the power conversion device can be controlled to stop, thereby preventing secondary faults. [Embodiment 5]
圖9係顯示實施例5之電路之圖。與上述之實施例共通之點係省略說明。本實施例係於並聯使用IGBT之情形時，由一者實現每相之電壓監視器93之實施例。於本實施例中，與閘極電阻91連接，配置有連接於各IGBT之2個電阻921、922之點上，與上述實施例不同。於共通之閘極電阻91設置監視產生於閘極電阻91之電壓之電壓監視器93。FIG9 is a diagram showing a circuit of the fifth embodiment. The common points with the above-mentioned embodiments are omitted. This embodiment is an embodiment in which a voltage monitor 93 for each phase is realized by one when IGBTs are used in parallel. In this embodiment, two resistors 921 and 922 connected to each IGBT are connected to the gate resistor 91, which is different from the above-mentioned embodiment. A voltage monitor 93 for monitoring the voltage generated in the gate resistor 91 is provided on the common gate resistor 91.
對本實施之電路之動作進行說明。圖10係顯示本實施例之時序圖。於時間t1，根據來自控制電路之接通信號，於閘極信號放大器之輸出電壓上升之時序，於閘極電阻91、第1電阻921、第2電阻922產生電位差之情況與實施例同樣。The operation of the circuit of this embodiment is described. Fig. 10 is a timing diagram of this embodiment. At time t1, according to the connection signal from the control circuit, at the timing when the output voltage of the gate signal amplifier rises, the potential difference is generated in the gate resistor 91, the first resistor 921, and the second resistor 922, which is the same as the embodiment.
於本實施例中，閘極電阻91與第1電阻921、及閘極電阻91與第2電阻922串聯連接。因此，產生於閘極電阻91之電壓成為電阻分壓比。若於時間t2，IGBT閘極配線24於斷線部位34斷線，則電阻分壓比發生變化，所產生之電壓發生變化。In this embodiment, the gate resistor 91 and the first resistor 921 and the gate resistor 91 and the second resistor 922 are connected in series. Therefore, the voltage generated in the gate resistor 91 becomes the resistance voltage division ratio. If the IGBT gate wiring 24 is disconnected at the disconnection portion 34 at time t2, the resistance voltage division ratio changes, and the generated voltage changes.
將閘極電阻91之電阻值設為R91，將第1電阻921及第2電阻922之電阻值設為R92。於該情形時，IGBT閘極配線24於斷線之前後，分壓比自R91/(R91+R92/2)向R91/(R91+R92)變化。The resistance value of the gate resistor 91 is set to R91, and the resistance values of the first resistor 921 and the second resistor 922 are set to R92. In this case, the voltage dividing ratio of the IGBT gate wiring 24 changes from R91/(R91+R92/2) to R91/(R91+R92) before and after the disconnection.
IGBT接通時之閘極電壓設為VH。於該情形時，於時間t2前，產生於閘極電阻91之電壓為VH×R91/(R91+R92/2)。於時間t2後，產生於閘極電阻91之電壓101為VH×R91/(R91+R92)，與斷線前相比，產生於閘極電阻91之電壓101變小。The gate voltage when the IGBT is turned on is VH. In this case, before time t2, the voltage generated in the gate resistor 91 is VH×R91/(R91+R92/2). After time t2, the voltage 101 generated in the gate resistor 91 is VH×R91/(R91+R92), and the voltage 101 generated in the gate resistor 91 is smaller than before the disconnection.
電壓監視器93之電壓檢測判定之基準電壓102，於閘極電阻91之產生電壓101為VH×R91/(R91+R92/2)時，設定為IGBT接通之位準，於產生電壓101為VH×R91/(R91+R92)時，設定為IGBT未接通之位準。電壓監視器93檢測接通時產生之電位差是否超過基準電壓102。The voltage monitor 93 detects the reference voltage 102, which is set to the IGBT-on level when the voltage 101 generated by the gate resistor 91 is VH×R91/(R91+R92/2), and sets the IGBT-off level when the voltage 101 generated is VH×R91/(R91+R92). The voltage monitor 93 detects whether the potential difference generated when turned on exceeds the reference voltage 102.
於IGBT5接通時產生之電位差超過基準電壓102之情形時，電壓監視器93向控制電路9輸出正常之斷開信號45。When the potential difference generated when the IGBT 5 is turned on exceeds the reference voltage 102, the voltage monitor 93 outputs a normal disconnection signal 45 to the control circuit 9.
於IGBT5導通時產生之閘極電阻91之電位差低於基準電壓102、或未產生閘極電阻91之電位差脈衝之情形時，電壓監視器93向控制電路9輸出異常之接通信號45。When the potential difference of the gate resistor 91 generated when the IGBT 5 is turned on is lower than the reference voltage 102, or when the potential difference pulse of the gate resistor 91 is not generated, the voltage monitor 93 outputs an abnormal connection signal 45 to the control circuit 9.
根據本實施例，於並聯使用IGBT5之情形時，由一者構成每相之電壓監視器93，可判斷IGBT閘極之配線不良。又，可對二次故障防患於未然。 [實施例6] According to this embodiment, when IGBT5 is used in parallel, a voltage monitor 93 for each phase can be used to determine whether the wiring of the IGBT gate is faulty. In addition, secondary faults can be prevented before they occur. [Embodiment 6]
圖11係顯示實施例5之電路之圖。與上述之實施例共通之點係省略說明。本實施例為，於實施例5即圖9之電路構成中，作為電壓監視器93之具體電路，使用實施例3中之電壓監視器33之電路之情形之實施例。FIG11 is a diagram showing the circuit of the fifth embodiment. The common points with the above-mentioned embodiments are omitted. This embodiment is an embodiment in which the circuit of the voltage monitor 33 in the third embodiment is used as the specific circuit of the voltage monitor 93 in the circuit structure of the fifth embodiment, that is, FIG9.
圖11係由電壓比較器61、邊緣檢測器62、鎖存電路63、XOR電路64構成圖9之電壓監視器93。於本實施例中，將電壓比較器61之基準電壓，與實施例5同樣地設為基準電壓102。又，於本實施例中，電壓比較器之檢測電壓與實施例3不同，但其他動作與實施例3同一。FIG11 shows a voltage monitor 93 of FIG9 composed of a voltage comparator 61, an edge detector 62, a latch circuit 63, and an XOR circuit 64. In this embodiment, the reference voltage of the voltage comparator 61 is set to the reference voltage 102 as in the fifth embodiment. In this embodiment, the detection voltage of the voltage comparator is different from that in the third embodiment, but the other operations are the same as those in the third embodiment.
根據本實施例，於並聯使用IGBT5之情形時，與實施例2或實施例4相比，無需按IGBT之閘極電阻之各者設置2個電壓監視器。根據本實施例，IGBT之閘極電阻91為1個，以連接於1個閘極電阻91之一個電壓監視器完成。且，根據本實施例，亦可判斷通往IGBT之閘極之配線不良。又，可對二次故障防患於未然。According to this embodiment, when IGBT 5 is used in parallel, it is not necessary to provide two voltage monitors for each gate resistor of the IGBT, as compared with the second embodiment or the fourth embodiment. According to this embodiment, there is one gate resistor 91 of the IGBT, and one voltage monitor connected to one gate resistor 91 is used. Moreover, according to this embodiment, it is also possible to judge whether the wiring leading to the gate of the IGBT is defective. In addition, secondary faults can be prevented before they occur.
進而，根據實施例1至實施例6，可對電力轉換裝置之IGBT等之零件之損傷防患於未然，且抑制無用之電力消耗。因此，可有效活用零件等之資源，且排除浪費，因而亦可通過環境保護，有助於實現不對地球環境造成不良影響之社會。Furthermore, according to the first to sixth embodiments, damage to the components such as IGBT of the power conversion device can be prevented before it happens, and useless power consumption can be suppressed. Therefore, resources such as components can be effectively utilized and waste can be eliminated, thereby also contributing to the realization of a society that does not cause adverse effects on the earth's environment through environmental protection.
於上述實施例中，以IGBT為例進行說明，亦可置換為MOSFET(Metal Oxide Semiconductor Field Effect Transistor：金屬氧化物半導體場效電晶體)等之其他開關元件。In the above embodiments, IGBT is used as an example for explanation, but it can also be replaced by other switching elements such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
1:電力轉換裝置 2:交流電源 3:二極體 4:電容器 5:IGBT 6:負載 7:操作面板 8:基板 9:控制電路 10:IGBT閘極驅動電路 21:冷卻片 22:配線材 23:主電路配線材 24:IGBT閘極配線 31:閘極信號放大器 32:閘極電阻 33:電壓監視器 34:斷線部位 41:閘極源信號 42:閘極信號 43:閘極電壓 44:閘極電阻之電壓 45:斷線信號 51:OR電路 61:電壓比較器 62:邊緣檢測器 63:鎖存電路 64:XOR電路 71:電壓比較器之輸出信號 72:邊緣檢測器之輸出信號 73:鎖存電路之輸出信號 74:基準電壓 81:OR電路 91:閘極電阻 93:電壓監視器 101:電壓 102:電壓監視器之基準電壓 921:第1電阻 922:第2電阻 t1:時間 t2:時間 VH:電壓 1: Power conversion device 2: AC power supply 3: Diode 4: Capacitor 5: IGBT 6: Load 7: Operation panel 8: Substrate 9: Control circuit 10: IGBT gate drive circuit 21: Cooling plate 22: Wiring material 23: Main circuit wiring material 24: IGBT gate wiring 31: Gate signal amplifier 32: Gate resistor 33: Voltage monitor 34: Disconnection position 41: Gate source signal 42: Gate signal 43: Gate voltage 44: Gate resistor voltage 45: Disconnection signal 51:OR circuit 61:voltage comparator 62:edge detector 63:latch circuit 64:XOR circuit 71:output signal of voltage comparator 72:output signal of edge detector 73:output signal of latch circuit 74:reference voltage 81:OR circuit 91:gate resistor 93:voltage monitor 101:voltage 102:reference voltage of voltage monitor 921:1st resistor 922:2nd resistor t1:time t2:time VH:voltage
圖1係實施例1之電路圖。 圖2係實施例1之時序圖。 圖3係作為實施例1之電力轉換裝置之整體概略電路圖。 圖4係作為實施例1之電力轉換裝置之整體概略構造圖。 圖5係實施例2之電路圖。 圖6係實施例3之電路圖。 圖7係實施例3之時序圖。 圖8係實施例4之電路圖。 圖9係實施例5之電路圖。 圖10係實施例5之時序圖。 圖11係實施例6之電路圖。 FIG. 1 is a circuit diagram of Example 1. FIG. 2 is a timing diagram of Example 1. FIG. 3 is a schematic overall circuit diagram of the power conversion device of Example 1. FIG. 4 is a schematic overall structural diagram of the power conversion device of Example 1. FIG. 5 is a circuit diagram of Example 2. FIG. 6 is a circuit diagram of Example 3. FIG. 7 is a timing diagram of Example 3. FIG. 8 is a circuit diagram of Example 4. FIG. 9 is a circuit diagram of Example 5. FIG. 10 is a timing diagram of Example 5. FIG. 11 is a circuit diagram of Example 6.
5:IGBT 5:IGBT
8:基板 8: Substrate
9:控制電路 9: Control circuit
10:IGBT閘極驅動電路 10: IGBT gate drive circuit
24:IGBT閘極配線 24: IGBT gate wiring
31:閘極信號放大器 31: Gate signal amplifier
32:閘極電阻 32: Gate resistor
33:電壓監視器 33: Voltage monitor
34:斷線部位 34: Disconnection point
41:閘極源信號 41: Gate source signal
42:閘極信號 42: Gate signal
43:閘極電壓 43: Gate voltage
44:閘極電阻之電壓 44: Gate resistor voltage
45:斷線信號 45: Disconnection signal
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| JP2022005374 | 2022-01-17 | ||
| JP2022-005374 | 2022-01-17 |
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| TW202331282A TW202331282A (en) | 2023-08-01 |
| TWI842259B true TWI842259B (en) | 2024-05-11 |
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| TW111147085A TWI842259B (en) | 2022-01-17 | 2022-12-08 | Power conversion device |
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| JP (1) | JPWO2023135901A1 (en) |
| TW (1) | TWI842259B (en) |
| WO (1) | WO2023135901A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201834397A (en) * | 2016-12-07 | 2018-09-16 | 日商瑞薩電子股份有限公司 | Semiconductor device and power conversion apparatus |
| TW201841470A (en) * | 2016-12-27 | 2018-11-16 | 日商瑞薩電子股份有限公司 | Semiconductor device and power converter |
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| JP3931627B2 (en) * | 2001-11-01 | 2007-06-20 | 株式会社日立製作所 | Gate driving device for semiconductor switching element |
| JP5664350B2 (en) * | 2011-03-07 | 2015-02-04 | 株式会社デンソー | Switching element drive circuit |
| JP5911014B2 (en) * | 2012-05-24 | 2016-04-27 | 三菱電機株式会社 | Inverter device and abnormality detection method for inverter device |
| JP7500720B2 (en) * | 2020-05-27 | 2024-06-17 | 株式会社日立製作所 | Fault detection device and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201834397A (en) * | 2016-12-07 | 2018-09-16 | 日商瑞薩電子股份有限公司 | Semiconductor device and power conversion apparatus |
| TW201841470A (en) * | 2016-12-27 | 2018-11-16 | 日商瑞薩電子股份有限公司 | Semiconductor device and power converter |
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| WO2023135901A1 (en) | 2023-07-20 |
| TW202331282A (en) | 2023-08-01 |
| JPWO2023135901A1 (en) | 2023-07-20 |
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