TW202331282A - power conversion device - Google Patents

power conversion device Download PDF

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Publication number
TW202331282A
TW202331282A TW111147085A TW111147085A TW202331282A TW 202331282 A TW202331282 A TW 202331282A TW 111147085 A TW111147085 A TW 111147085A TW 111147085 A TW111147085 A TW 111147085A TW 202331282 A TW202331282 A TW 202331282A
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Taiwan
Prior art keywords
gate
signal
conversion device
power conversion
voltage
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TW111147085A
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Chinese (zh)
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高田直樹
八木原茂俊
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日商日立產機系統股份有限公司
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Publication of TW202331282A publication Critical patent/TW202331282A/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT

Abstract

This power conversion device includes: a plurality of switching elements; a drive unit that drives gates with respect to the switching elements; and a control unit that outputs a control signal to the drive unit. The drive unit includes a voltage monitoring unit that, on the basis of the gate resistance connected to a switching element and the gate resistance potential-difference, detects abnormalities in connection with the switching element.

Description

電力轉換裝置power conversion device

本發明係關於一種電力轉換裝置。The present invention relates to a power conversion device.

作為可檢測與電力轉換裝置相關之異常之技術,已知有專利文獻1。專利文獻1揭示有一種技術,其於電力轉換裝置之再生動作時,檢測向消耗能量之制動電阻器流通電流之制動電路的異常。 [先前技術文獻] [專利文獻] Patent Document 1 is known as a technology capable of detecting abnormalities related to power conversion devices. Patent Document 1 discloses a technique for detecting an abnormality of a brake circuit that flows current to a brake resistor that consumes energy during a regenerative operation of a power conversion device. [Prior Art Literature] [Patent Document]

[專利文獻1]日本專利特開2019-176601號公報[Patent Document 1] Japanese Patent Laid-Open No. 2019-176601

[發明所欲解決之問題][Problem to be solved by the invention]

一種電力轉換裝置,其受電交流電力,由整流電路轉換為直流電力,且由逆轉換器轉換為交流。逆轉換器部多由開關元件即電力半導體構成。進行電力轉換裝置之控制之控制電路由微電腦、或其他IC((IntegratedCircuit:積體電路)、及使用電阻或電容器等之電子電路進行。控制電路之零件一般安裝於基板。A power conversion device receives AC power, converts it into DC power by a rectifier circuit, and converts it into AC power by an inverse converter. The inverter unit is often composed of switching elements, that is, power semiconductors. The control circuit that controls the power conversion device is implemented by a microcomputer, or other IC ((Integrated Circuit: integrated circuit), and an electronic circuit using resistors or capacitors. The components of the control circuit are generally mounted on the substrate.

若電力轉換裝置之輸出電容變大,則根據主力電容使用之開關元件之電容亦必須變大。若開關元件之電容變大,則開關元件之封裝亦變大。因此,於基板與開關元件之間,利用焊料等之直接連接變困難。因此,基板與開關元件經由電線連接。If the output capacitance of the power conversion device becomes larger, the capacitance of the switching element used according to the main capacitance must also become larger. If the capacitance of the switching element becomes larger, the package of the switching element also becomes larger. Therefore, direct connection with solder or the like becomes difficult between the substrate and the switching element. Therefore, the substrate and the switching element are connected via wires.

該電線有產生斷線等之異常之情形。於該情形時,電力轉換裝置必須檢測產生異常之情況。There is an abnormal situation such as disconnection of the electric wire. In this case, the power conversion device must detect the occurrence of abnormality.

於專利文獻1,未對此種連接之異常做任何考慮。In Patent Document 1, no consideration is given to the abnormality of such a connection.

本發明之目的在於提供一種可檢測與開關元件之連接之異常之電力轉換裝置。 [解決問題之技術手段] An object of the present invention is to provide a power conversion device capable of detecting an abnormality in connection with a switching element. [Technical means to solve the problem]

本發明係一種電力轉換裝置,其具有:複數個開關元件;驅動部,其對上述開關元件進行閘極之驅動;及控制部,其對上述驅動部輸出控制信號;且 上述驅動部具有: 閘極電阻,其連接於上述開關元件;及電壓監視部,其基於上述閘極電阻之電位差,檢測與上述開關元件之連接之異常。 [發明之效果] The present invention is a power conversion device, which includes: a plurality of switching elements; a driving unit that drives the gates of the switching elements; and a control unit that outputs a control signal to the driving unit; The above drive unit has: a gate resistor connected to the switching element; and a voltage monitoring unit that detects an abnormality in connection with the switching element based on a potential difference of the gate resistor. [Effect of Invention]

根據本發明,可檢測與開關元件之連接之異常。According to the present invention, it is possible to detect an abnormality in connection with a switching element.

首先,使用圖3與圖4,說明應用本實施例之電力轉換裝置之構成。圖3係應用實施例1之電力轉換裝置1之整體電路構成之一例。First, the configuration of the power conversion device to which this embodiment is applied will be described using FIG. 3 and FIG. 4 . FIG. 3 is an example of the overall circuit configuration of the power conversion device 1 to which the first embodiment is applied.

於電力轉換裝置1中,由二極體3對來自交流電源2之電力進行全波整流,由電容器4進行平滑化,暫時轉換為直流電力。轉換之直流電力藉由電力轉換裝置1之逆轉換器轉換為交流電力。逆轉換器具備複數個IGBT(Insulated Gate Bipolar Transistor:絕緣閘極雙極性電晶體)5。藉由將IGBT5切換為接通(ON)或斷開(OFF),進行自直流電力轉換為任意頻率、任意電壓之交流電力,電力轉換裝置1對負載6輸出交流電力。In the power conversion device 1, the power from the AC power source 2 is full-wave rectified by the diode 3, smoothed by the capacitor 4, and temporarily converted into DC power. The converted DC power is converted into AC power by the inverse converter of the power conversion device 1 . The inverter includes a plurality of IGBTs (Insulated Gate Bipolar Transistor: Insulated Gate Bipolar Transistor) 5 . The power conversion device 1 outputs AC power to the load 6 by switching the IGBT 5 to ON or OFF to convert DC power into AC power of an arbitrary frequency and voltage.

進行電力轉換裝置1之控制之控制電路9、進行IGBT5之閘極之驅動之IGBT閘極驅動電路10等,由具備CPU(Central Processing Unit:中央處理單元)或記憶體等之微電腦、IC、電晶體等之半導體、電阻、電容器等構成。該等電路安裝於基板8。The control circuit 9 for controlling the power conversion device 1, the IGBT gate drive circuit 10 for driving the gate of the IGBT 5, and the like are composed of a microcomputer, IC, and electric circuit equipped with a CPU (Central Processing Unit) or a memory. Semiconductors such as crystals, resistors, capacitors, etc. These circuits are mounted on the substrate 8 .

圖4係顯示應用本實施例之電力轉換裝置之整體構造之一例之圖。二極體、IGBT等之電力半導體,多以封入封裝之模組之狀態提供。圖4顯示由封入封裝之模組構成IGBT5之例。FIG. 4 is a diagram showing an example of the overall structure of a power conversion device to which this embodiment is applied. Power semiconductors such as diodes and IGBTs are mostly provided in the form of modules enclosed in packages. FIG. 4 shows an example of IGBT5 constituted by a module enclosed in a package.

於IGBT5,配置有施加閘極信號之閘極端子。為了冷卻自電力半導體產生之熱,於冷卻片21上配置複數個二極體3、複數個IGBT5。由電線或銅條等之配線材22,對二極體或IGBT5等之各電力半導體與電容器4進行配線。複數個二極體3或複數個IGBT5由電線或銅條等之主電路配線材23連接。搭載有控制電路9、IGBT閘極驅動電路10之基板8之端子、與IGBT5之閘極端子間,由電線或銅條等之IGBT閘極配線24連接。The IGBT5 is provided with a gate terminal for applying a gate signal. In order to cool the heat generated from the power semiconductor, a plurality of diodes 3 and a plurality of IGBTs 5 are arranged on the cooling fin 21 . Each power semiconductor such as a diode or IGBT 5 and the capacitor 4 are wired by a wiring material 22 such as an electric wire or a copper strip. A plurality of diodes 3 or a plurality of IGBTs 5 are connected by main circuit wiring materials 23 such as electric wires or copper bars. The terminal of the substrate 8 on which the control circuit 9 and the IGBT gate drive circuit 10 are mounted, and the gate terminal of the IGBT 5 are connected by an IGBT gate wiring 24 such as an electric wire or a copper strip.

操作面板7連接於控制電路9。操作面板7自外部輸入對電力轉換裝置之操作資訊,或輸出與電力轉換裝置之狀態相關之資訊。The operation panel 7 is connected to the control circuit 9 . The operation panel 7 inputs operation information on the power conversion device from the outside, or outputs information related to the state of the power conversion device.

以下,使用圖詳細地說明本發明之實施例。 [實施例1] Hereinafter, an embodiment of the present invention will be described in detail using the drawings. [Example 1]

圖1係顯示實施例1之IGBT閘極驅動電路10、控制電路9、IGBT5之圖。於圖1中,IGBT閘極驅動電路10與控制電路9安裝於基板8。IGBT閘極驅動電路10具備閘極信號放大器31、閘極電阻32、電壓監視器33。於基板8與IGBT5之間設置有傳送控制IGBT5之閘極之信號的IGBT閘極配線24。圖1之電路為顯示圖3所示之IGBT閘極驅動電路10與IGBT5之全部6相中之1相部分者。FIG. 1 is a diagram showing the IGBT gate drive circuit 10, the control circuit 9, and the IGBT 5 of the first embodiment. In FIG. 1 , the IGBT gate drive circuit 10 and the control circuit 9 are installed on the substrate 8 . The IGBT gate drive circuit 10 includes a gate signal amplifier 31 , a gate resistor 32 , and a voltage monitor 33 . An IGBT gate wiring 24 for transmitting a signal for controlling the gate of the IGBT 5 is provided between the substrate 8 and the IGBT 5 . The circuit in FIG. 1 shows the IGBT gate drive circuit 10 shown in FIG. 3 and one of the six phases of the IGBT5.

閘極信號放大器31將來自控制電路9之閘極源信號即接通信號、或斷開信號,放大為適合驅動IGBT閘極之信號。放大之閘極控制信號,經由閘極電阻32供給至IGBT之閘極端子。電壓監視器33監視產生於閘極電阻32之電壓,且監視將接通信號輸出至IGBT之閘極後,是否立即產生電壓之脈衝。產生脈衝之情形判定為正常,未產生脈衝之情形判定為異常,向上位之控制電路9發送正常或異常之信號。The gate signal amplifier 31 amplifies the gate source signal from the control circuit 9, that is, the ON signal or the OFF signal, into a signal suitable for driving the IGBT gate. The amplified gate control signal is supplied to the gate terminal of the IGBT through the gate resistor 32 . The voltage monitor 33 monitors the voltage generated in the gate resistor 32, and monitors whether a voltage pulse is generated immediately after the on signal is output to the gate of the IGBT. It is judged as normal when the pulse is generated, and it is judged as abnormal when the pulse is not generated, and a normal or abnormal signal is sent to the upper control circuit 9 .

其次,對實施例1之電路之動作進行說明。圖2顯示圖1之電路之時序圖。於圖2中,橫軸顯示時間,縱軸顯示圖1之各部位之電壓。Next, the operation of the circuit of the first embodiment will be described. FIG. 2 shows a timing diagram of the circuit of FIG. 1 . In FIG. 2 , the horizontal axis shows time, and the vertical axis shows voltages at various parts in FIG. 1 .

自圖2之上段朝向下段顯示有將自控制電路9輸出之IGBT之閘極接通或斷開之閘極源信號41、將閘極源信號41放大之閘極信號放大器31之輸出電壓即閘極信號42、IGBT之閘極與射極間之電壓(閘極電壓)43、產生於閘極電阻32之兩端之電壓44、電壓監視器33之輸出電壓(斷線信號)45。From the upper part of Fig. 2 to the lower part, there are gate source signal 41 that turns on or off the gate of the IGBT output from the control circuit 9, and the output voltage of the gate signal amplifier 31 that amplifies the gate source signal 41, i.e. gate Pole signal 42 , voltage between the gate and emitter of IGBT (gate voltage) 43 , voltage 44 generated at both ends of gate resistor 32 , output voltage (disconnection signal) 45 of voltage monitor 33 .

於時間t1,根據來自控制電路9之接通信號,閘極信號放大器31之閘極信號42上升。此處因IGBT之閘極為電容性,故通過閘極電阻32向IGBT閘極進行充電。因此,於IGBT閘極之充電期間,於閘極電阻32產生電壓。At time t1, according to the ON signal from the control circuit 9, the gate signal 42 of the gate signal amplifier 31 rises. Here, since the gate of the IGBT is very capacitive, the gate resistor 32 is used to charge the gate of the IGBT. Therefore, a voltage is generated at the gate resistor 32 during charging of the IGBT gate.

於IGBT之斷開時,反而自IGBT閘極經由閘極電阻32進行放電。因此,產生相反方向之電壓。每當向IGBT閘極發送接通或斷開信號時,於閘極電阻間反復產生電位差。When the IGBT is turned off, it discharges from the gate of the IGBT via the gate resistor 32 instead. Therefore, a voltage in the opposite direction is generated. Whenever an ON or OFF signal is sent to the IGBT gate, a potential difference is repeatedly generated between the gate resistors.

於時間t2,基板8與IGBT5之間之IGBT閘極配線24,於圖1之斷線部位34斷線。於該情形時,於IGBT接通或斷開時,通往IGBT閘極之充電電流或放電電流不流通。因此,未於閘極電阻間產生電壓。At time t2, the IGBT gate wiring 24 between the substrate 8 and the IGBT 5 is disconnected at the disconnection portion 34 in FIG. 1 . In this case, when the IGBT is turned on or off, the charge current or discharge current to the gate of the IGBT does not flow. Therefore, no voltage is generated across the gate resistor.

電壓監視器33監視IGBT接通後之閘極電阻間之電壓,若產生規定值以上之電壓脈衝,則不輸出信號45(輸出斷開信號)。另一方面,於閘極電阻間之電壓未產生規定值以上之電壓之情形時,電壓監視器33輸出接通之斷線信號45。如此,於無斷線等之異常之情形時,電壓監視器33設為正常,不輸出信號45。於產生斷線等之異常時,電壓監視器33輸出異常信號45,因此可檢測異常。The voltage monitor 33 monitors the voltage between the gate resistors after the IGBT is turned on, and does not output the signal 45 (outputs an off signal) if a voltage pulse exceeding a predetermined value is generated. On the other hand, when the voltage between the gate resistors does not generate a voltage higher than a predetermined value, the voltage monitor 33 outputs a disconnection signal 45 to be turned on. In this way, when there is no abnormality such as a disconnection, the voltage monitor 33 is normal and does not output the signal 45 . When an abnormality such as disconnection occurs, the voltage monitor 33 outputs an abnormal signal 45, so that abnormality can be detected.

控制電路9於自電壓監視器33接收到接通信號45之情形時,以判斷為基板8與IGBT5之間之IGBT閘極配線24斷線,且使電力轉換裝置停止之方式進行控制。於該情形時,控制電路9亦可控制為,對於操作面板7等之顯示部,將產生斷線之情況,以利用者或管理者可掌握之方式通知至外部。When the control circuit 9 receives the ON signal 45 from the voltage monitor 33 , it determines that the IGBT gate wiring 24 between the substrate 8 and the IGBT 5 is disconnected, and controls to stop the power conversion device. In this case, the control circuit 9 may control the display part of the operation panel 7 or the like to notify the outside of the disconnection in a manner that can be grasped by the user or the manager.

根據本實施例,於基板8與IGBT5之間之配線中產生連接異常之情形時,可檢測該異常,並停止電力轉換裝置之動作。 [實施例2] According to this embodiment, when a connection abnormality occurs in the wiring between the substrate 8 and the IGBT 5 , the abnormality can be detected and the operation of the power conversion device can be stopped. [Example 2]

圖5係顯示實施例2之電路之圖。另,省略與實施例1共通之點之說明。本實施例為於並聯使用2個IGBT之情形時之實施例。並聯使用2個IGBT之理由在於,有欲獲得於IGBT流通之電流之容量之情形。FIG. 5 is a diagram showing a circuit of Embodiment 2. FIG. In addition, the description of the points common to the first embodiment will be omitted. This embodiment is an embodiment in the case of using two IGBTs in parallel. The reason for using two IGBTs in parallel is that there are cases where it is desired to obtain the capacity of the current flowing through the IGBTs.

於閘極信號放大器31與並聯之IGBT之間,設置連接於各IGBT之閘極之閘極電阻32。於各閘極電阻32設置與實施例1同樣之電壓監視器33。將來自電壓監視器33之輸出連接於OR電路51,且電壓監視器33之任一者為檢測出異常時對控制電路9傳送檢測信號的構成。Between the gate signal amplifier 31 and the IGBTs connected in parallel, a gate resistor 32 connected to the gate of each IGBT is provided. A voltage monitor 33 similar to that of the first embodiment is installed on each gate resistor 32 . The output from the voltage monitor 33 is connected to the OR circuit 51, and any one of the voltage monitors 33 is configured to transmit a detection signal to the control circuit 9 when an abnormality is detected.

本實施例雖有並聯2個IGBT之情形,但並不限定於此,亦可使並聯數為3以上,於該情形時構成為,於各IGBT之閘極電阻設置各電壓監視器,對所有之輸出取得OR。Although the present embodiment has the case of connecting two IGBTs in parallel, it is not limited to this, and the number of parallel connections may be more than three. The output takes OR.

控制電路9自OR電路51接收信號,該信號顯示將並聯連接之2個IGBT與基板8連接之IGBT閘極配線24之任一者斷線之情況,且於該情形時,以使電力轉換裝置停止之方式進行控制。The control circuit 9 receives a signal from the OR circuit 51 indicating that any one of the IGBT gate wiring 24 connecting the two IGBTs connected in parallel to the substrate 8 is disconnected, and in this case, the power conversion device control by stopping.

於並聯使用2個IGBT之情形時,於任一IGBT中,IGBT閘極信號配線不良,且一者之IGBT無法進行接通動作之狀態時,健全之配線之IGBT亦可正常接通並流通電流。即,於並聯使用2個IGBT之情形時,單側之IGBT無法接通之狀況未顯著化。因此,作為電力轉換裝置之輸出正常進行,有異常未顯著化之情形。In the case of using two IGBTs in parallel, in any IGBT, the IGBT gate signal wiring is bad, and one IGBT cannot be turned on, the IGBT with sound wiring can also be turned on normally and flow current . That is, when two IGBTs are used in parallel, the situation that one IGBT cannot be turned on does not become conspicuous. Therefore, the output as a power conversion device is performed normally, and the abnormality may not become conspicuous.

於此種狀況下,於本實施例中,亦可檢測IGBT閘極之配線不良,且控制電路9使電力轉換裝置之動作停止,對二次故障防患於未然。 [實施例3] In this case, in this embodiment, it is also possible to detect faulty wiring of the IGBT gate, and the control circuit 9 stops the operation of the power conversion device to prevent secondary failures. [Example 3]

圖6係顯示實施例3之電路之圖。於本實施例中,為將實施例1之電壓監視器33具體化之實施例。於本實施例中,圖3之電壓監視器33由電壓比較器61、邊緣檢測器62、鎖存電路63、XOR電路64構成。與實施例1或實施例2共通之點係省略說明。FIG. 6 is a diagram showing a circuit of Embodiment 3. FIG. In the present embodiment, the voltage monitor 33 of the first embodiment is embodied. In this embodiment, the voltage monitor 33 in FIG. 3 is composed of a voltage comparator 61 , an edge detector 62 , a latch circuit 63 , and an XOR circuit 64 . The points in common with Embodiment 1 or Embodiment 2 are omitted from description.

電壓比較器61將閘極電阻32之電壓44與基準電壓74比較。於閘極電阻32之電壓44高於基準電壓74之情形時,電壓比較器61向鎖存電路63輸出接通信號71。The voltage comparator 61 compares the voltage 44 of the gate resistor 32 with a reference voltage 74 . When the voltage 44 of the gate resistor 32 is higher than the reference voltage 74 , the voltage comparator 61 outputs an on signal 71 to the latch circuit 63 .

基準電壓74預先設定於電壓比較器61。該基準電壓74於正常時設為較閘極電阻32之電壓44之脈衝電壓低之位準,於IGBT之接通時以外設為因雜訊或檢測誤差等,電壓比較器61未輸出信號之位準。The reference voltage 74 is preset in the voltage comparator 61 . The reference voltage 74 is set to a level lower than the pulse voltage of the voltage 44 of the gate resistor 32 under normal conditions, and is set to a level where the voltage comparator 61 does not output a signal due to noise or detection error, etc. when the IGBT is turned on. level.

來自電壓比較器61之信號發送至鎖存電路63之輸入。鎖存電路63於接通信號71進入時,輸出信號73保持接通之狀態,於重設信號72進入時,進行重設,且輸出信號73斷開。The signal from the voltage comparator 61 is sent to the input of the latch circuit 63 . When the on signal 71 enters the latch circuit 63, the output signal 73 remains on, and when the reset signal 72 enters, the latch circuit 63 resets and the output signal 73 is off.

邊緣檢測器62檢測閘極信號放大器31之輸出即閘極信號42之下降,輸出下降信號72。鎖存電路63輸入來自邊緣檢測器62之下降信號(重設信號)72。鎖存電路63之輸出信號73與閘極驅動電路之閘極信號42,輸入至XOR電路64。XOR電路64取得鎖存電路63之輸出信號73與閘極驅動電路之輸出即閘極信號42之XOR(互斥或)。The edge detector 62 detects the falling of the gate signal 42 which is the output of the gate signal amplifier 31 and outputs a falling signal 72 . The latch circuit 63 inputs a falling signal (reset signal) 72 from the edge detector 62 . The output signal 73 of the latch circuit 63 and the gate signal 42 of the gate drive circuit are input to the XOR circuit 64 . The XOR circuit 64 obtains the XOR (exclusive OR) of the output signal 73 of the latch circuit 63 and the output of the gate drive circuit, ie, the gate signal 42 .

於閘極信號42為接通信號且鎖存電路63之輸出信號73為接通信號之情形時,XOR電路64之輸出45作為正常而設為斷開信號。於閘極信號42為接通信號且鎖存電路63之輸出信號73為斷開信號之情形時,XOR電路64之輸出45作為配線不良之異常而設為接通信號。When the gate signal 42 is an ON signal and the output signal 73 of the latch circuit 63 is an ON signal, the output 45 of the XOR circuit 64 is an OFF signal as normal. When the gate signal 42 is an ON signal and the output signal 73 of the latch circuit 63 is an OFF signal, the output 45 of the XOR circuit 64 is an ON signal as an abnormality of wiring failure.

控制電路9接收輸出信號45,於異常信號之情形時,檢測產生IGBT閘極之配線不良,控制電路9進行停止電力轉換裝置之動作之控制。The control circuit 9 receives the output signal 45, and in the event of an abnormal signal, detects the faulty wiring of the IGBT gate, and the control circuit 9 performs control to stop the operation of the power conversion device.

圖7顯示圖6之電路之時序圖。於圖7中,橫軸顯示時間,縱軸顯示圖6之各部位之電壓。FIG. 7 shows a timing diagram of the circuit of FIG. 6 . In FIG. 7 , the horizontal axis shows time, and the vertical axis shows voltages at various parts in FIG. 6 .

自圖7之上段朝向下段,顯示接通或斷開由控制電路9輸出之IGBT之閘極之閘極源信號41、對閘極源信號41進行放大之閘極信號放大器31之輸出電壓即閘極信號42、IGBT之閘極與射極間之閘極電壓43、閘極電阻32之電位差即電壓44、來自電壓比較器61之信號71、閘極信號42之下降信號72、鎖存電路63之輸出信號73、XOR電路64之輸出電壓45。From the upper part of Fig. 7 to the lower part, it shows that the gate source signal 41 of the gate of the IGBT output by the control circuit 9 is turned on or off, and the output voltage of the gate signal amplifier 31 that amplifies the gate source signal 41 is the gate. Pole signal 42, gate voltage 43 between gate and emitter of IGBT, potential difference of gate resistor 32 is voltage 44, signal 71 from voltage comparator 61, falling signal 72 of gate signal 42, latch circuit 63 The output signal 73, the output voltage 45 of the XOR circuit 64.

根據本實施例,與實施例1同樣,於基板8與IGBT5之間之配線中產生連接異常之情形時,可檢測該異常。且,可使電力轉換裝置之動作停止。又,用於決定是否異常之基準電壓74,可根據電路之狀況任意設定。 [實施例4] According to the present embodiment, as in the first embodiment, when connection abnormality occurs in the wiring between the substrate 8 and the IGBT 5 , the abnormality can be detected. Also, the operation of the power conversion device can be stopped. Also, the reference voltage 74 for determining whether it is abnormal can be set arbitrarily according to the state of the circuit. [Example 4]

圖8係顯示實施例4之電路之圖。與上述實施例共通之點係省略說明。於本實施例中,按各IGBT之閘極電阻,設置有實施例3之電壓監視器33之具體化之電路。於圖8中,因並聯有2個IGBT5,故與IGBT5對應地連接有2個電壓監視器33。與實施例3同樣,電壓監視器33具有電壓比較器61、邊緣檢測器62、鎖存電路63、XOR電路64。於圖8中,2個XOR電路64之輸出連接於OR電路81。OR電路81將2個XOR電路64之輸出之邏輯和輸出至控制電路9。於並聯連接之任一者之IGBT5為配線不良之異常之情形時,控制電路9藉由接收接通信號,可檢測配線異常之產生。FIG. 8 is a diagram showing a circuit of Embodiment 4. FIG. The points common to the above-mentioned embodiments are omitted from description. In this embodiment, a circuit embodying the voltage monitor 33 of the third embodiment is provided according to the gate resistance of each IGBT. In FIG. 8 , since two IGBTs 5 are connected in parallel, two voltage monitors 33 are connected corresponding to the IGBTs 5 . Like the third embodiment, the voltage monitor 33 has a voltage comparator 61 , an edge detector 62 , a latch circuit 63 , and an XOR circuit 64 . In FIG. 8 , the outputs of the two XOR circuits 64 are connected to an OR circuit 81 . The OR circuit 81 outputs the logical sum of the outputs of the two XOR circuits 64 to the control circuit 9 . When any one of the IGBTs 5 connected in parallel is abnormal due to faulty wiring, the control circuit 9 can detect the generation of abnormal wiring by receiving the ON signal.

根據本實施例,與實施例2同樣,控制電路9可自OR電路81接收信號,該信號顯示將並聯連接之2個IGBT與基板8連接之IGBT閘極配線24之任一者斷線之情況。因此,可以使電力轉換裝置停止之方式進行控制,對二次故障防患於未然。 [實施例5] According to this embodiment, as in Embodiment 2, the control circuit 9 can receive a signal from the OR circuit 81 indicating that any one of the IGBT gate wiring 24 connecting the two IGBTs connected in parallel to the substrate 8 is disconnected. . Therefore, it is possible to control the power conversion device so as to stop, and prevent secondary failures before they happen. [Example 5]

圖9係顯示實施例5之電路之圖。與上述之實施例共通之點係省略說明。本實施例係於並聯使用IGBT之情形時,由一者實現每相之電壓監視器93之實施例。於本實施例中,與閘極電阻91連接,配置有連接於各IGBT之2個電阻921、922之點上,與上述實施例不同。於共通之閘極電阻91設置監視產生於閘極電阻91之電壓之電壓監視器93。FIG. 9 is a diagram showing a circuit of Embodiment 5. FIG. The points common to the above-mentioned embodiments are omitted from description. This embodiment is an embodiment in which the voltage monitor 93 for each phase is realized by one IGBT when the IGBTs are used in parallel. In this embodiment, it is connected to the gate resistor 91 and arranged at a point connected to the two resistors 921 and 922 of each IGBT, which is different from the above-described embodiments. A voltage monitor 93 for monitoring the voltage generated in the gate resistor 91 is installed on the common gate resistor 91 .

對本實施之電路之動作進行說明。圖10係顯示本實施例之時序圖。於時間t1,根據來自控制電路之接通信號,於閘極信號放大器之輸出電壓上升之時序,於閘極電阻91、第1電阻921、第2電阻922產生電位差之情況與實施例同樣。The operation of the circuit of this embodiment will be described. FIG. 10 is a timing diagram showing this embodiment. At time t1, according to the turn-on signal from the control circuit, the timing at which the output voltage of the gate signal amplifier rises generates a potential difference between the gate resistor 91, the first resistor 921, and the second resistor 922, as in the embodiment.

於本實施例中,閘極電阻91與第1電阻921、及閘極電阻91與第2電阻922串聯連接。因此,產生於閘極電阻91之電壓成為電阻分壓比。若於時間t2,IGBT閘極配線24於斷線部位34斷線,則電阻分壓比發生變化,所產生之電壓發生變化。In this embodiment, the gate resistor 91 and the first resistor 921 , and the gate resistor 91 and the second resistor 922 are connected in series. Therefore, the voltage generated at the gate resistor 91 becomes the resistor divider ratio. If the IGBT gate wiring 24 is disconnected at the disconnection portion 34 at time t2, the resistance voltage dividing ratio changes and the generated voltage changes.

將閘極電阻91之電阻值設為R91,將第1電阻921及第2電阻922之電阻值設為R92。於該情形時,IGBT閘極配線24於斷線之前後,分壓比自R91/(R91+R92/2)向R91/(R91+R92)變化。Let the resistance value of the gate resistor 91 be R91, and the resistance values of the first resistor 921 and the second resistor 922 be R92. In this case, the voltage division ratio changes from R91/(R91+R92/2) to R91/(R91+R92) before and after the disconnection of the IGBT gate wiring 24 .

IGBT接通時之閘極電壓設為VH。於該情形時,於時間t2前,產生於閘極電阻91之電壓為VH×R91/(R91+R92/2)。於時間t2後,產生於閘極電阻91之電壓101為VH×R91/(R91+R92),與斷線前相比,產生於閘極電阻91之電壓101變小。The gate voltage when the IGBT is turned on is set to VH. In this case, the voltage generated at the gate resistor 91 before time t2 is VH×R91/(R91+R92/2). After time t2, the voltage 101 generated in the gate resistor 91 is VH×R91/(R91+R92), and the voltage 101 generated in the gate resistor 91 becomes smaller than before the disconnection.

電壓監視器93之電壓檢測判定之基準電壓102,於閘極電阻91之產生電壓101為VH×R91/(R91+R92/2)時,設定為IGBT接通之位準,於產生電壓101為VH×R91/(R91+R92)時,設定為IGBT未接通之位準。電壓監視器93檢測接通時產生之電位差是否超過基準電壓102。The reference voltage 102 for the voltage detection and determination of the voltage monitor 93 is set as the IGBT turn-on level when the generated voltage 101 of the gate resistor 91 is VH×R91/(R91+R92/2), and the generated voltage 101 is When VH×R91/(R91+R92), it is set to the level where the IGBT is not turned on. The voltage monitor 93 detects whether the potential difference generated at turn-on exceeds the reference voltage 102 .

於IGBT5接通時產生之電位差超過基準電壓102之情形時,電壓監視器93向控制電路9輸出正常之斷開信號45。When the potential difference generated when the IGBT 5 is turned on exceeds the reference voltage 102 , the voltage monitor 93 outputs a normal turn-off signal 45 to the control circuit 9 .

於IGBT5導通時產生之閘極電阻91之電位差低於基準電壓102、或未產生閘極電阻91之電位差脈衝之情形時,電壓監視器93向控制電路9輸出異常之接通信號45。When the potential difference of the gate resistor 91 generated when the IGBT 5 is turned on is lower than the reference voltage 102 , or the potential difference pulse of the gate resistor 91 is not generated, the voltage monitor 93 outputs an abnormal ON signal 45 to the control circuit 9 .

根據本實施例,於並聯使用IGBT5之情形時,由一者構成每相之電壓監視器93,可判斷IGBT閘極之配線不良。又,可對二次故障防患於未然。 [實施例6] According to the present embodiment, when the IGBTs 5 are used in parallel, one of them constitutes the voltage monitor 93 for each phase, and it is possible to judge the faulty wiring of the IGBT gate. Also, secondary failures can be prevented before they happen. [Example 6]

圖11係顯示實施例5之電路之圖。與上述之實施例共通之點係省略說明。本實施例為,於實施例5即圖9之電路構成中,作為電壓監視器93之具體電路,使用實施例3中之電壓監視器33之電路之情形之實施例。Fig. 11 is a diagram showing a circuit of Embodiment 5. The points common to the above-mentioned embodiments are omitted from description. This embodiment is an embodiment in which the circuit of the voltage monitor 33 in the third embodiment is used as the specific circuit of the voltage monitor 93 in the circuit configuration of the fifth embodiment, that is, FIG. 9 .

圖11係由電壓比較器61、邊緣檢測器62、鎖存電路63、XOR電路64構成圖9之電壓監視器93。於本實施例中,將電壓比較器61之基準電壓,與實施例5同樣地設為基準電壓102。又,於本實施例中,電壓比較器之檢測電壓與實施例3不同,但其他動作與實施例3同一。In FIG. 11 , the voltage monitor 93 in FIG. 9 is composed of a voltage comparator 61 , an edge detector 62 , a latch circuit 63 and an XOR circuit 64 . In this embodiment, the reference voltage of the voltage comparator 61 is set as the reference voltage 102 in the same manner as in the fifth embodiment. Also, in this embodiment, the detection voltage of the voltage comparator is different from that of the third embodiment, but other operations are the same as those of the third embodiment.

根據本實施例,於並聯使用IGBT5之情形時,與實施例2或實施例4相比,無需按IGBT之閘極電阻之各者設置2個電壓監視器。根據本實施例,IGBT之閘極電阻91為1個,以連接於1個閘極電阻91之一個電壓監視器完成。且,根據本實施例,亦可判斷通往IGBT之閘極之配線不良。又,可對二次故障防患於未然。According to this embodiment, when using IGBT5 in parallel, compared with Embodiment 2 or Embodiment 4, it is not necessary to provide two voltage monitors for each of the gate resistance of IGBT. According to this embodiment, there is only one gate resistor 91 of the IGBT, and one voltage monitor connected to one gate resistor 91 is implemented. Furthermore, according to the present embodiment, it is also possible to judge that the wiring leading to the gate of the IGBT is defective. Also, secondary failures can be prevented before they happen.

進而,根據實施例1至實施例6,可對電力轉換裝置之IGBT等之零件之損傷防患於未然,且抑制無用之電力消耗。因此,可有效活用零件等之資源,且排除浪費,因而亦可通過環境保護,有助於實現不對地球環境造成不良影響之社會。Furthermore, according to Embodiment 1 to Embodiment 6, damage to components such as IGBTs of the power conversion device can be prevented before they occur, and useless power consumption can be suppressed. Therefore, resources such as parts can be effectively utilized and waste can be eliminated, so it can also contribute to the realization of a society that does not adversely affect the global environment through environmental protection.

於上述實施例中,以IGBT為例進行說明,亦可置換為MOSFET(Metal Oxide Semiconductor Field Effect Transistor:金屬氧化物半導體場效電晶體)等之其他開關元件。In the above-mentioned embodiments, the IGBT is taken as an example for description, and it may also be replaced with other switching elements such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor: Metal Oxide Semiconductor Field Effect Transistor).

1:電力轉換裝置 2:交流電源 3:二極體 4:電容器 5:IGBT 6:負載 7:操作面板 8:基板 9:控制電路 10:IGBT閘極驅動電路 21:冷卻片 22:配線材 23:主電路配線材 24:IGBT閘極配線 31:閘極信號放大器 32:閘極電阻 33:電壓監視器 34:斷線部位 41:閘極源信號 42:閘極信號 43:閘極電壓 44:閘極電阻之電壓 45:斷線信號 51:OR電路 61:電壓比較器 62:邊緣檢測器 63:鎖存電路 64:XOR電路 71:電壓比較器之輸出信號 72:邊緣檢測器之輸出信號 73:鎖存電路之輸出信號 74:基準電壓 81:OR電路 91:閘極電阻 93:電壓監視器 101:電壓 102:電壓監視器之基準電壓 921:第1電阻 922:第2電阻 t1:時間 t2:時間 VH:電壓 1: Power conversion device 2: AC power 3: Diode 4: Capacitor 5:IGBT 6: load 7: Operation panel 8: Substrate 9: Control circuit 10: IGBT gate drive circuit 21: cooling fins 22: Wiring 23: Main circuit wiring material 24: IGBT gate wiring 31:Gate signal amplifier 32: Gate resistor 33: Voltage monitor 34: Broken part 41:Gate source signal 42:Gate signal 43: Gate voltage 44: Voltage of the gate resistor 45: disconnection signal 51: OR circuit 61: Voltage comparator 62:Edge detector 63: Latch circuit 64: XOR circuit 71: Output signal of voltage comparator 72: Output signal of edge detector 73: The output signal of the latch circuit 74: Reference voltage 81: OR circuit 91: gate resistance 93: Voltage monitor 101: voltage 102: Reference voltage of voltage monitor 921: the first resistor 922: The second resistor t1: time t2: time VH: voltage

圖1係實施例1之電路圖。 圖2係實施例1之時序圖。 圖3係作為實施例1之電力轉換裝置之整體概略電路圖。 圖4係作為實施例1之電力轉換裝置之整體概略構造圖。 圖5係實施例2之電路圖。 圖6係實施例3之電路圖。 圖7係實施例3之時序圖。 圖8係實施例4之電路圖。 圖9係實施例5之電路圖。 圖10係實施例5之時序圖。 圖11係實施例6之電路圖。 Fig. 1 is the circuit diagram of embodiment 1. FIG. 2 is a timing diagram of Embodiment 1. FIG. FIG. 3 is an overall schematic circuit diagram of the power conversion device as the first embodiment. FIG. 4 is an overall schematic configuration diagram of a power conversion device according to Embodiment 1. FIG. Fig. 5 is the circuit diagram of embodiment 2. Fig. 6 is the circuit diagram of embodiment 3. FIG. 7 is a timing diagram of Embodiment 3. FIG. Fig. 8 is a circuit diagram of Embodiment 4. Fig. 9 is a circuit diagram of Embodiment 5. Fig. 10 is a timing diagram of Embodiment 5. Fig. 11 is a circuit diagram of Embodiment 6.

5:IGBT 5:IGBT

8:基板 8: Substrate

9:控制電路 9: Control circuit

10:IGBT閘極驅動電路 10: IGBT gate drive circuit

24:IGBT閘極配線 24: IGBT gate wiring

31:閘極信號放大器 31:Gate signal amplifier

32:閘極電阻 32: Gate resistor

33:電壓監視器 33: Voltage monitor

34:斷線部位 34: Broken part

41:閘極源信號 41:Gate source signal

42:閘極信號 42:Gate signal

43:閘極電壓 43: Gate voltage

44:閘極電阻之電壓 44: Voltage of the gate resistor

45:斷線信號 45: disconnection signal

Claims (10)

一種電力轉換裝置,其係具有: 複數個開關元件; 驅動部,其對上述開關元件進行閘極之驅動;及 控制部,其對上述驅動部輸出控制信號;且 上述驅動部具有: 閘極電阻,其連接於上述開關元件;及 電壓監視部,其基於上述閘極電阻之電位差,檢測與上述開關元件之連接之異常。 A power conversion device comprising: a plurality of switching elements; a drive unit for driving the gate of the switching element; and a control unit that outputs a control signal to the driving unit; and The above drive unit has: a gate resistor connected to said switching element; and A voltage monitoring unit that detects an abnormality in connection with the switching element based on a potential difference between the gate resistors. 如請求項1之電力轉換裝置,其中 上述電壓監視部將上述電位差與規定值進行比較,根據上述開關元件與上述驅動部之間有無斷線,對上述控制部輸出不同之信號。 Such as the power conversion device of claim 1, wherein The voltage monitoring unit compares the potential difference with a predetermined value, and outputs a different signal to the control unit depending on whether there is a disconnection between the switching element and the driving unit. 如請求項1之電力轉換裝置,其中 上述開關元件並聯連接有2個;且 對於各上述開關元件,配置上述閘極電阻與上述電壓監視部。 Such as the power conversion device of claim 1, wherein Two of the above switching elements are connected in parallel; and For each of the switching elements, the gate resistor and the voltage monitoring unit are arranged. 如請求項1之電力轉換裝置,其中 上述電壓監視部將上述電位差與規定值進行比較;且 基於比較結果之信號、與控制閘極之信號,根據上述開關元件與上述驅動部之間有無斷線,對上述控制部輸出不同之信號。 Such as the power conversion device of claim 1, wherein The voltage monitoring unit compares the potential difference with a predetermined value; and Based on the signal of the comparison result and the signal for controlling the gate, different signals are output to the control unit depending on whether there is a disconnection between the switching element and the drive unit. 如請求項4之電力轉換裝置,其中 上述開關元件並聯連接有2個;且 對於各上述開關元件,配置上述閘極電阻與上述電壓監視部。 Such as the power conversion device of claim 4, wherein Two of the above switching elements are connected in parallel; and For each of the switching elements, the gate resistor and the voltage monitoring unit are arranged. 如請求項1之電力轉換裝置,其中 作為上述開關元件,具有第1開關元件與第2開關元件;且 於第1開關元件與上述閘極電阻之間,配置第1電阻; 於第2開關元件與上述閘極電阻之間,配置第2電阻。 Such as the power conversion device of claim 1, wherein As the switching element, there are a first switching element and a second switching element; and A first resistor is arranged between the first switch element and the gate resistor; A second resistor is disposed between the second switching element and the gate resistor. 如請求項6之電力轉換裝置,其中 上述電壓監視部將上述電位差與規定值進行比較;且 基於比較結果之信號、與控制閘極之信號,根據上述開關元件與上述驅動部之間有無斷線,對上述控制部輸出不同之信號。 Such as the power conversion device of claim 6, wherein The voltage monitoring unit compares the potential difference with a predetermined value; and Based on the signal of the comparison result and the signal for controlling the gate, different signals are output to the control unit depending on whether there is a disconnection between the switching element and the drive unit. 如請求項1之電力轉換裝置,其中 上述開關元件為IGBT。 Such as the power conversion device of claim 1, wherein The above switching element is an IGBT. 如請求項1之電力轉換裝置,其具有: 逆轉換器,其具有複數個上述開關元件;及 基板,其具有上述驅動部與上述控制部。 The power conversion device according to claim 1, which has: an inverse converter having a plurality of the above-mentioned switching elements; and The substrate has the above-mentioned driving part and the above-mentioned control part. 如請求項9之電力轉換裝置,其中 上述開關元件被封入封裝內;且 上述開關元件與上述驅動部經由配線連接。 Such as the power conversion device of claim 9, wherein the switching element described above is enclosed in a package; and The switching element and the drive unit are connected via wiring.
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