TWI841838B - 資訊處理電路及資訊處理電路之設計方法 - Google Patents

資訊處理電路及資訊處理電路之設計方法 Download PDF

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Publication number
TWI841838B
TWI841838B TW110114833A TW110114833A TWI841838B TW I841838 B TWI841838 B TW I841838B TW 110114833 A TW110114833 A TW 110114833A TW 110114833 A TW110114833 A TW 110114833A TW I841838 B TWI841838 B TW I841838B
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circuit
parameter
parameter value
value output
information processing
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TW110114833A
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Chinese (zh)
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TW202147162A (zh
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竹中崇
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日商日本電氣股份有限公司
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/02—Reliability analysis or reliability optimisation; Failure analysis, e.g. worst case scenario performance, failure mode and effects analysis [FMEA]

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Evolutionary Computation (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Biomedical Technology (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Biophysics (AREA)
  • Data Mining & Analysis (AREA)
  • Artificial Intelligence (AREA)
  • Computational Linguistics (AREA)
  • Neurology (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Image Analysis (AREA)
TW110114833A 2020-05-26 2021-04-26 資訊處理電路及資訊處理電路之設計方法 TWI841838B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
WOPCT/JP2020/020701 2020-05-26
PCT/JP2020/020701 WO2021240633A1 (ja) 2020-05-26 2020-05-26 情報処理回路および情報処理回路の設計方法

Publications (2)

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TW202147162A TW202147162A (zh) 2021-12-16
TWI841838B true TWI841838B (zh) 2024-05-11

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TW110114833A TWI841838B (zh) 2020-05-26 2021-04-26 資訊處理電路及資訊處理電路之設計方法

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US (1) US20230205957A1 (https=)
JP (1) JP7456501B2 (https=)
TW (1) TWI841838B (https=)
WO (1) WO2021240633A1 (https=)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190212982A1 (en) * 2017-01-27 2019-07-11 Fujitsu Limited Processor, information processing apparatus and operation method for processor
CN110036384A (zh) * 2017-09-29 2019-07-19 索尼公司 信息处理设备和信息处理方法
TW201935286A (zh) * 2018-02-14 2019-09-01 倍加科技股份有限公司 電路規劃結果產生方法與系統
US20190318232A1 (en) * 2013-10-11 2019-10-17 Hrl Laboratories, Llc Scalable Integrated Circuit with Synaptic Electronics and CMOS integrated Memristors

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3353786B2 (ja) * 1990-01-24 2002-12-03 株式会社日立製作所 情報処理装置
JP2018133016A (ja) 2017-02-17 2018-08-23 株式会社半導体エネルギー研究所 ニューラルネットワークシステム
US11586907B2 (en) * 2018-02-27 2023-02-21 Stmicroelectronics S.R.L. Arithmetic unit for deep learning acceleration
US11886980B2 (en) * 2019-08-23 2024-01-30 Nvidia Corporation Neural network accelerator using logarithmic-based arithmetic
WO2021084717A1 (ja) * 2019-10-31 2021-05-06 日本電気株式会社 情報処理回路および情報処理回路の設計方法
JP7364026B2 (ja) * 2020-02-14 2023-10-18 日本電気株式会社 情報処理回路
US20230376769A1 (en) * 2022-05-18 2023-11-23 Seyed Alireza GHAFFARI Method and system for training machine learning models using dynamic fixed-point data representations

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190318232A1 (en) * 2013-10-11 2019-10-17 Hrl Laboratories, Llc Scalable Integrated Circuit with Synaptic Electronics and CMOS integrated Memristors
US20190212982A1 (en) * 2017-01-27 2019-07-11 Fujitsu Limited Processor, information processing apparatus and operation method for processor
CN110036384A (zh) * 2017-09-29 2019-07-19 索尼公司 信息处理设备和信息处理方法
TW201935286A (zh) * 2018-02-14 2019-09-01 倍加科技股份有限公司 電路規劃結果產生方法與系統

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US20230205957A1 (en) 2023-06-29
JPWO2021240633A1 (https=) 2021-12-02
WO2021240633A1 (ja) 2021-12-02
JP7456501B2 (ja) 2024-03-27
TW202147162A (zh) 2021-12-16

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