TWI838034B - Laser device and semiconductor device having the same - Google Patents

Abstract

A semiconductor device, includes a permanent substrate having a first boundary and a second boundary; a plurality of columnar bodies on the permanent substrate, and having a first columnar body adjacent to the first boundary and a second columnar body adjacent to the second boundary; a first type semiconductor structure on the plurality of columnar bodies, and having a first surface, a second surface opposite to the first surface and away from the permanent substrate, a first extending portion extending outwardly beyond the first columnar body and a second extending portion extending outwardly beyond the second columnar body; a first electrode on the second surface; and a second electrode on the second surface.

Description

Laser components and semiconductor components

The present invention relates to a laser device, in particular to a flip-chip laser device.

Vertical Cavity Surface Emitting Laser (VCSEL) is a type of laser element. One of its applications is data transmission, and it has the advantage of high speed.

When laser components are used for 3D sensing, they need to be operated with short pulses and high currents to increase brightness and thus the sensing distance. Under this high current driving condition, current distribution and chip reliability become very important.

The present invention proposes a vertical cavity surface emitting laser (VCSEL) structure design with a flip chip structure, wherein the electrodes are formed on the same side of the substrate and have a surrounding metal connection design, thereby optimizing the current distribution of the VCSEL chip and enhancing the chip reliability.

According to an embodiment of the present invention, a semiconductor device includes: a permanent substrate having a first boundary and a second boundary relative to the first boundary; a plurality of semiconductor columnar structures located on the permanent substrate and including a first columnar structure adjacent to the first boundary and a second columnar structure adjacent to the second boundary; a first conductive type semiconductor structure located on the plurality of semiconductor columnar structures and having a first surface, a second surface opposite to the first surface and away from the permanent substrate, a first extension extending outward beyond the first columnar structure, and a second extension extending outward beyond the second columnar structure; a first electrode located on the second surface; and a second electrode located on the second surface.

10: Permanent substrate

100: Laser element

300:Laser device

101: Anti-reflection structure

2: Chip

20: Epitaxial structure

200:Semiconductor stacking

2000: Growth substrate

202: First semiconductor structure

2020: First semiconductor stack

204: Active structure

2040: Active stack

205: Current limiting layer

2051: Current limit area

2052: Current conduction area

206: Second semiconductor structure

2060: Second semiconductor stack

2061: End face

2062: Lower surface

32: Insulation layer

322: First opening

34: Metal connection layer

341a: first protrusion

341b: Second protrusion

342: Second opening

344:Marker structure

40: Adhesive layer

50:Metal connection layer

60: Insulation layer

601: Side

602a: first opening

602b: Second opening

603: The third opening

702: First electrode

7021: Headquarters

7022: Surroundings

704: Second electrode

80: Insulation layer

802: The third opening

804: The fourth opening

902: First metal structure

9021: Middle layer

9022: Binding layer

904: Second metal structure

9041:Middle layer

9042: Binding layer

B1: Optical array

B11: Optical structure

B2: Circuit board

B21: First electrode pad

B22: Second electrode pad

B3: Bracket

P: Columnar structure

P1: Upper surface

P2: First side surface

E1: First edge

E2: Second Edge

S1: Second side surface

S11: First side

S12: Second side

G: Spacing

G1: First spacing

G2: Second gap

G3: The third distance

C1: First boundary

C2: Second boundary

D1: First distance

D2: Second distance

L1: Connection

L2: Connection

O: Central location

To further understand the features and technical contents of the present invention, please refer to the following detailed description of the embodiments of the present invention and the attached drawings. However, the detailed description and the attached figures are only for reference and explanation, and are not used to limit the present invention; wherein: FIG. 1A is a cross-sectional schematic diagram of a laser element according to an exemplary embodiment of the present invention; FIG. 1B is a bottom view schematic diagram of the laser element shown in FIG. 1A; FIG. 1C is a top view schematic diagram of the laser element shown in FIG. 1A; FIG. 2A to FIG. 2L are cross-sectional schematic diagrams of structures completed in each step of the laser element manufacturing process of an embodiment of the present invention; FIG. 3A to FIG. 3I are top or bottom view schematic diagrams of structures completed in each step of the laser element manufacturing process of an embodiment of the present invention; FIG. 4 is a bottom view schematic diagram of a structure completed in one step of the laser element manufacturing process of an embodiment of the present invention.

Figure 5 is a schematic cross-sectional view of a laser device in one embodiment of the present invention.

The following is a description of the concept of the present invention with reference to the drawings and exemplary embodiments. In the drawings or descriptions, similar or identical parts use the same element symbols; furthermore, the drawings are drawn for ease of understanding, and the thickness and shape of each layer in the drawings are not the actual size or proportional relationship of the components. It should be noted that the components not shown in the drawings or described in the instructions may be known to those skilled in the art of the field to which the invention belongs.

Please refer to FIG. 1A, which is a cross-sectional schematic diagram of a laser device according to an embodiment of the present invention. The laser device 100 of this embodiment includes a permanent substrate 10 and an epitaxial structure 20 located on one side of the permanent substrate 10. The epitaxial structure 20 includes at least one columnar structure P. In this embodiment, the epitaxial structure 20 includes a plurality of columnar structures P. Each columnar structure P includes a first semiconductor structure 202, a current confinement layer 205, and an active structure 204 sequentially located on the permanent substrate 10. The plurality of columnar structures P can be arranged regularly (regular arrangement) or irregularly (random arrangement) on a second semiconductor structure 206. The so-called regular arrangement means that the plurality of columnar structures P have a specific spatial relationship and are arranged in a fixed and repetitive manner. In some regularly arranged columnar structures P, the spacing between adjacent columnar structures P is substantially the same; in other regularly arranged columnar structures P, multiple columnar structures P are arranged along a specific direction. The current confinement layer 205 can be selectively disposed between the active structure 204 and the first semiconductor structure 202, or between the active structure 204 and the second semiconductor structure 206. Each columnar structure P includes an upper surface P1 facing the permanent substrate 10, and a first side surface P2 connecting the upper surface P1 and the second semiconductor structure 206. In addition, the epitaxial structure 20 further includes a lower surface 2062 away from the permanent substrate 10, and the lower surface 2062 is a surface of the second semiconductor structure 206. In this embodiment, the conductivity type of the first semiconductor structure 202 is P type, and the conductivity type of the second semiconductor structure 206 is N type. For the sake of simplicity, Figure 1A only uses five columnar structures P as an example. However, in actual VCSEL products, the number of columnar structures P can be adjusted according to the current and power requirements of the application, for example, 100 to 1000, but not limited to this. The current confinement layer 205 includes a current confinement region 2051 and a current conduction region 2052 surrounded by the current confinement region 2051. The conductivity of the current conduction region 2052 is higher than that of the current confinement region 2051, so that the current is concentrated in the current conduction region 2052.

In detail, according to the embodiment, the first semiconductor structure 202 and the active structure 204 partially cover the second semiconductor structure 206, and expose an end surface 2061 of the second semiconductor structure 206. The laser device 100 further includes an insulating layer 32 and a metal connection layer 34. The insulating layer 32 covers the first side surface P2 of the columnar structure P, the end surface 2061 of the second semiconductor structure 206, and a portion of the upper surface P1. The insulating layer 32 has a first opening 322, exposing a portion of the upper surface P1 from the insulating layer 32. The metal connection layer 34 is located on the insulating layer 32, and is electrically connected to the first semiconductor structure 202 through the first opening 322. The metal connection layer 34 has a second opening 342, so that the light emitted by the active structure 204 can be emitted from the second opening 342 to the direction of the permanent substrate 10 outside the laser element 100. In addition, the second semiconductor structure 206 has a first side S11 and a second side S12 corresponding to the first side S11, and the metal connection layer 34 has a first protrusion 341a extending beyond the first side S11, and a second protrusion 341b extending beyond the second side S12. The first protrusion 341a and the second protrusion 341b can be used for subsequent electrical connection. The detailed structure and electrical connection method will be described in detail below.

The laser device 100 of this embodiment further includes an adhesive layer 40, and the epitaxial structure 20 is connected to the permanent substrate 10 through the adhesive layer 40. A metal connection layer 50 is provided on the second semiconductor structure 206 on the side away from the permanent substrate 10, and the metal connection layer 50 is electrically connected to the second semiconductor structure 206. The laser device 100 of the present invention includes an insulating layer 60, and the insulating layer 60 covers the metal connection layer 50. The insulating layer 60 has a side portion 601, and a first opening portion 602a and a second opening portion 602b pass through the insulating layer 60. The side portion 601 covers the first side S11 and the second side S12 of the second semiconductor structure 206. The first opening portion 602a further passes through the insulating layer 32 to expose the first protrusion 341a of the metal connection layer 34, and the second opening portion 602b further passes through the insulating layer 32 to expose the second protrusion 341b of the metal connection layer 34. The insulating layer 60 also has a third opening portion 603 to expose the metal connection layer 50. The laser element 100 of the present invention includes a first electrode 702 and a second electrode 704. The first electrode 702 and the second electrode 704 are located on the same side of the permanent substrate 10 and are physically separated from each other.

In this embodiment, the laser device 100 is a flip chip type laser device, and solder can be used to bond the laser device 100 to an external circuit (e.g., a printed circuit board PCB) later. The first electrode 702 is connected to the metal connection layer 34 through the first opening 602a and the second opening 602b, respectively, and is electrically connected to the first semiconductor structure 202 through the first protrusion 341a and the second protrusion 341a of the metal connection layer 34. The first electrode 702 covers the side 601 of the insulating layer 60 and extends to cover the metal connection layer 50. The insulating layer 60 is located between the first electrode 702 and the metal connection layer 50 to avoid forming a short circuit path. The second electrode 704 is connected to the metal connection layer 50 through the third opening 603, thereby electrically connecting the second electrode 704 to the second semiconductor structure 206.

In addition to the above structures, the laser device 100 of the present invention may further include a first metal structure 902 and a second metal structure 904, which are respectively located on the first electrode 702 and the second electrode 704. The laser device 100 of the present invention further includes an insulating layer 80 covering the first electrode 702 and the second electrode 704. In detail, the insulating layer 80 has a third opening 802 to expose the first electrode 702, and a fourth opening 804 to expose the second electrode 704; the first metal structure 902 is electrically connected to the first electrode 702 through the third opening 802, and the second metal structure 904 is electrically connected to the second electrode 904 through the fourth opening 804. In addition, there is a distance G between the first metal structure 902 and the second metal structure 904 ranging from 10μm to 200μm. In this embodiment, from the bottom view of the laser element 100, the shape of the first metal structure 902 is different from the shape of the second metal structure 904 for electrical identification (as shown in FIG. 3I).

The laser device 100 of the present invention may optionally include an anti-reflection structure 101 located above the permanent substrate 10 and away from the first electrode 702 and the second electrode 704. The anti-reflection structure 101 can be used to reduce the reflection of the light emitted by the laser device 100 at the interface between the permanent substrate 10 and the air, so as to avoid the reduction of the light emission efficiency of the laser device 100 or the generation of an undesirable light shape. The anti-reflection structure 101 can be a single layer or multiple layers. When it is a single layer, the refractive index of the anti-reflection structure 101 is between the refractive index of the permanent substrate 10 and the refractive index of the external environment (e.g., air). For example, the refractive index of the anti-reflection structure 101 is 1.1-1.65. The material of the single-layer anti-reflection structure 101 is, for example, SiO _x or MgF ₂ . The anti-reflection structure 101 has a thickness, which is preferably an integer multiple of one quarter of the emission wavelength of the active structure 204, that is, if the emission wavelength is λ, the thickness of the anti-reflection structure 101 is (λ/4)*n, where n is an integer greater than or equal to 1. The anti-reflection structure 101 may also be a multi-layer structure formed by stacking high refractive index materials and low refractive index materials, such as _SiOx / _TiOx , _SiOx / _TiOx / _SiOx .

In this embodiment, the first semiconductor structure 202 and the second semiconductor structure 206 include a plurality of film layers with different refractive indices that are periodically stacked alternately (e.g., AlGaAs layers with high aluminum content and AlGaAs layers with low aluminum content that are periodically stacked alternately) to form a distributed Bragg reflector (DBR), so that the light emitted by the active structure 204 can be reflected in the two reflectors to form coherent light. The reflectivity of the first semiconductor structure 202 is lower than the reflectivity of the second semiconductor structure 206, so that the coherent light is emitted toward the permanent substrate 10. The materials of the first semiconductor structure 202, the second semiconductor structure 206 and the active structure 204 include III-V compound semiconductors, for example, they can be AlGaInAs series, AlGaInP series, AlInGaN series, AlAsSb series, InGaAsP series, InGaAsN series, AlGaAsP series, etc., such as AlGaInP, GaAs, InGaAs, AlGaAs, GaAsP, GaP, InGaP, AlInP, GaN, InGaN, AlGaN and other compounds. In the embodiments of the present disclosure, unless otherwise specified, the chemical formula includes "compounds that meet the chemical dosage" and "compounds that do not meet the chemical dosage", wherein "compounds that meet the chemical dosage" means, for example, that the total element dosage of the group III elements is the same as the total element dosage of the group V elements, whereas "compounds that do not meet the chemical dosage" means, for example, that the total element dosage of the group III elements is different from the total element dosage of the group V elements. For example, a chemical formula of the AlGaInAs series means that the group III elements aluminum (Al) and/or gallium (Ga) and/or indium (In) are included, and the group V element arsenic (As) is included, wherein the total element dosage of the group III elements (aluminum and/or gallium and/or indium) can be the same as or different from the total element dosage of the group V elements (arsenic). In addition, if the compounds represented by the chemical formulas above are compounds that conform to the chemical dosage, the AlGaInAs series represents (Al _y1 Ga _(1-yl) ) _1-x1 In _x1 As, wherein 0≦x1≦1, 0≦y1≦1; the AlGaInP series represents (Al _y2 Ga _(1-y2) ) _1-x2 In _x2 P, wherein 0≦x2≦1, 0≦y2≦1; the AlInGaN series represents (Al _y3 Ga _(1-y3) ) _1-x3 In _x3 N, wherein 0≦x3≦1, 0≦y3≦1; the AlAsSb series represents AlAs _x4 Sb _(1-x4) , wherein 0≦x4≦1; the InGaAsP series represents In _x5 Ga _1-x5 As _1-y4 P _y4 , where 0≦x5≦1, 0≦y4≦1; the InGaAsN series represents In _x6 Ga _1-x6 As _1-y5 N _y5 , where 0≦x6≦1, 0≦y5≦1; the AlGaAsP series represents Al _x7 Ga _1-x7 As _1-y6 P _y6 , where 0≦x7≦1, 0≦y6≦1.

Depending on the material, the active structure 204 can emit infrared light with a peak wavelength between 700nm and 1700nm, red light with a peak wavelength between 610nm and 700nm, yellow light with a peak wavelength between 530nm and 570nm, green light with a peak wavelength between 490nm and 550nm, blue light or dark blue light with a peak wavelength between 400nm and 490nm, or ultraviolet light with a peak wavelength between 250nm and 400nm. In this embodiment, the peak wavelength of the active structure 204 is infrared light between 750nm and 1200nm.

The material of the current confining layer 205 can be the above-mentioned III-V semiconductor material. In this embodiment, the material of the current confining layer 205 is AlGaAs, and the materials of the active structure 204, the first semiconductor structure 202 and the second semiconductor structure 206 all contain aluminum. The aluminum content of the current confining layer 205 is greater than the aluminum content of the active structure 204, the first semiconductor structure 202 and the second semiconductor structure 206. For example, the aluminum content of the current confining layer 205 is greater than 97%. In this embodiment, the oxygen content of the current confining region 2051 of the current confining layer 205 is greater than the oxygen content of the current conducting region 2052, so that the current confining region 2051 has a lower conductivity than the current conducting region 2052. The adhesive layer 40 is a material with high transmittance to the light emitted by the active structure 204, such as a transmittance greater than 80%. The material of the adhesive layer 40 is an insulating material, such as B-staged bisbenzocyclobutene (BCB), epoxy resin, polyimide, SOG (spin-on glass), silicone or perfluorocyclobutane (PFCB).

The materials of the insulating layer 32, the insulating layer 60 and the insulating layer 80 include non-conductive materials. The non-conductive materials include organic materials or inorganic materials. The organic materials include Su8, benzocyclobutene (BCB), perfluorocyclobutane (PFCB), epoxy resin, acrylic resin, cycloolefin polymer (COC), polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), polycarbonate (PC), polyetherimide or fluorocarbon polymer. The inorganic material includes silicone or glass, aluminum oxide (Al ₂ O ₃ ), silicon nitride (SiN _x ), silicon oxide (SiO _x ), titanium oxide (TiO _x ), or magnesium fluoride (MgF _x ). In one embodiment, the insulating layer 32 , the insulating layer 60 , and/or the insulating layer 80 include one or more layers (e.g., a Bragg reflector (DBR) structure formed by alternately stacking two sub-layers, such as a SiO _x sub-layer and a TiO _x sub-layer).

The material of the metal connection layer 34 and the metal connection layer 50 may include metals, such as aluminum (Al), silver (Ag), chromium (Cr), platinum (Pt), nickel (Ni), germanium (Ge), benzium (Be), gold (Au), titanium (Ti), tungsten (W) or zinc (Zn). The material of the first electrode 702 and the second electrode 704 may be a metal material, such as gold (Au), tin (Sn), titanium (Ti) or their alloys. In this embodiment, the first electrode 702 may be a multi-layer electrode structure, for example, the direction away from the permanent substrate 10 may include a titanium (Ti) layer and a gold (Au) layer. The second electrode 704 has the same material and structural composition as the first electrode 702. The material of the first electrode 702 is different from that of the first metal structure 902, and the material of the second electrode 704 is different from that of the second metal structure 904. For example, the first metal structure 902 and the second metal structure 904 contain at least one element, while the first electrode 702 and the second electrode 704 do not contain the element, so as to prevent the external (tin-containing) solder from damaging the first electrode 702 and the second electrode 704 and causing electrical failure during die bonding or high current operation, thereby further improving the reliability of the laser device 100 of the present invention. The above-mentioned element can be used to prevent the solder from diffusing into the first electrode 702 and the second electrode 704, and the element is, for example, nickel (Ni) and/or platinum (Pt). In detail, the first metal structure 902 and the second metal structure 904 may include a plurality of layers, for example, an intermediate layer 9021, 9041 and a bonding layer 9022, 9042, respectively, in order away from the substrate 10. The material of the intermediate layers 9021, 9041 is different from that of the first electrode 702 and the second electrode 704, so as to prevent solder (for example, tin or gold-tin alloy (AuSn)) from diffusing to the first electrode 702 and the second electrode 704. Therefore, the material of the intermediate layers 9021, 9041 preferably includes metal elements other than gold (Au), tin (Sn) and copper (Cu), such as nickel (Ni) and/or platinum (Pt). The material of the bonding layers 9022 and 9042 includes a metal material with high ductility, preferably gold (Au). The materials of the intermediate layers 9021 and 9041 of this embodiment are platinum (Pt) and nickel (Ni) stacked in sequence in the direction away from the permanent substrate 10, and the material of the bonding layers 9022 and 9042 is gold (Au). In other words, in the direction away from the permanent substrate, the metal structures 902 and 904 include a nickel layer, a platinum layer, and a gold layer.

FIG. 1B is a bottom view of the laser element 100 shown in FIG. 1A, i.e., a view of the laser element 100 observed from the direction of the first metal structure 902 and the second metal structure 904 (as indicated by the arrow C in FIG. 1A), and FIG. 1A is a cross-sectional schematic diagram along the line A-A’ in FIG. 1B. FIG. 1C is a top view of the laser element 100 shown in FIG. 1A, i.e., a view of the laser element 100 observed from the direction of the permanent substrate 10 (as indicated by the arrow D in FIG. 1A), and FIG. 1A is a cross-sectional schematic diagram along the line B-B’ in FIG. 1C.

As shown in FIG. 1B , the insulating layer 60 has a plurality of openings distributed around the laser element 100, such as two first openings 602a and two second openings 602b, and there is a first spacing G1 between adjacent first openings 602a and second openings 602b, and between adjacent first openings 602a and adjacent second openings 602b. In addition, as shown in FIG. 1C , in this embodiment, the metal connection layer 34 is formed with a plurality of marking structures 344, and the marking structures 344 are symmetrical to each other, and the center position O of the laser element 100 can be defined by connecting lines L1 and L2 between the plurality of marking structures 344, so as to facilitate machine identification and facilitate subsequent packaging processes. The positions of the first spacings G1 described above correspond to the marking structures 344. It should be noted that the dashed lines in Figure 1B and Figure 1C indicate that the structure cannot be directly observed from the bottom view/top view, and only the outline of the dashed lines can be seen.

In the present embodiment, the second-type semiconductor structure 206 is roughly centered on the permanent substrate 10, that is, the distance from any side of the second-type semiconductor structure 206 to a border of the adjacent permanent substrate 10 is roughly equal, so that the first metal structure 902 and the second metal structure 904 (or the first electrode 702 and the second electrode 704) can be arranged at symmetrical positions of the laser element 100, which is beneficial to the structural design of the subsequent packaging process and increases the effective area. In detail, as shown in FIG. 1B , when viewed from the second semiconductor structure 206 of the laser element 100 toward the active structure 204, the permanent substrate 10 has a first boundary C1 adjacent to the first side S11, and a second boundary C2 opposite to the first boundary C1 and adjacent to the second side S12. The first boundary C1 and the second boundary C2 correspond to each other and are each disposed on a side of the permanent substrate 10. The difference between a first distance D1 between the first side S11 and the first boundary C1 and a second distance D2 between the second side S12 and the second boundary C2 is less than 30% of the first distance D1; that is, the difference between the first distance D1 and the second distance D2 is 0≦(D1-D2)/D1<30%. In another embodiment, 0≦(D1-D2)/D1<20%; preferably, 0≦(D1-D2)/D1<15%. In another embodiment, 1%<(D1-D2)/D1<10%. In this embodiment, the first distance D1 is equal to the second distance D2.

The following describes the manufacturing process of the laser element 100 of the present invention with reference to Figures 2A to 2L.

As shown in FIG. 2A , a chip 2 is provided. The chip 2 includes a semiconductor stack 200 formed on a growth substrate 2000. The semiconductor stack 200 includes a second semiconductor stack 2060, an active stack 2040, and a first semiconductor stack 2020 in sequence on the growth substrate 2000. The semiconductor stack 200 can be grown on the growth substrate 2000 by epitaxial growth, and the epitaxial growth method includes, but is not limited to, metal organic chemical vapor deposition, hydride vapor phase epitaxy, molecular beam epitaxy, liquid phase epitaxy, etc. The growth substrate 2000 includes a III-V material, and its lattice constant matches that of the semiconductor stack 200. The material of the growth substrate 2000 of this embodiment is gallium arsenide (GaAs). In other embodiments, the material of the growth substrate 2000 may be indium phosphide (InP), sapphire, gallium nitride (GaN), or silicon carbide (SiC), etc.

Next, an etching process is performed on the aforementioned chip 2 to etch away a portion of the first semiconductor stack 2020 and a portion of the active stack 2040, thereby forming a plurality of columnar structures P and exposing the end surface 2061 of the second semiconductor stack 2060. Thus, each columnar structure P includes a first semiconductor structure 202 and an active structure 204, and has an upper surface P1 and a first side surface P2, and the first side surface P2 connects the upper surface P1 and the end surface 2061, as shown in FIG. 2B.

Next, a current confining layer 205 is formed in each columnar structure P, thereby forming a structure as shown in FIG. 2C. In this embodiment, the current confining layer 205 is formed between each first semiconductor structure 202 and each active structure 204, and each current confining layer 205 includes a current confining region 2051 and a current conducting region 2052 surrounded by the current confining region 2051. The current confining layer 205 can be formed by oxidizing a material generated in a region where the current confining region 2051 is to be formed through an oxidation process. For example, the first semiconductor structure 202 includes a plurality of AlGaAs layers with high aluminum content and AlGaAs layers with low aluminum content having different refractive indices that are alternately stacked periodically, and the materials of the active structure 204, the first semiconductor structure 202, and the second semiconductor structure 206 all include aluminum. The aluminum content of one layer in the first semiconductor structure 202 is greater than 97% (defined as the current confining layer 205) and greater than the aluminum content of the active structure 204, the first semiconductor structure 202, and the second semiconductor structure 206. Since the aluminum content of the current confining layer 205 is greater than the aluminum content of the active structure 204, the first semiconductor structure 202, and the second _{semiconductor} structure 206, after the oxidation process, only the current confining layer 205 is obviously oxidized, thereby forming a current confining region 2051 with low conductivity. Alternatively, the current confining region 2051 with low conductivity can be formed in a plurality of columnar structures P through an ion implantation process, and the above-mentioned current conduction region 2052 can be defined at the same time through a mask. Ion implantation can be achieved by implanting hydrogen ions (H ⁺ ), helium ions (He ⁺ ), or argon ions (Ar ⁺ ) in the area where the current limiting region 2051 is predetermined to be formed. The ion concentration of the current limiting region 2051 is greater than that of the current conduction region 2052, so that the current limiting region 2051 has a lower conductivity. In another embodiment, the oxidation process and the ion implantation process can be used simultaneously in a plurality of columnar structures P. For example, the current limiting region 2051 in some columnar structures P is formed by the ion implantation process, and the current limiting region 2051 in other columnar structures P is formed by the oxidation process. Alternatively, some columnar structures P have a current limiting region formed by an ion implantation process and also have a current limiting region formed by an oxidation process (not shown).

As shown in FIG. 2D, an insulating layer 32 is formed to cover the first side surface P2 of the columnar structure P, the second semiconductor structure 206 and a portion of the upper surface P1. The insulating layer 32 is formed with a first opening 322 to expose a portion of the upper surface P1. The top view shape of the first opening 322 can be, for example, circular, elliptical, square, irregular, etc. In this embodiment, the shape of the first opening 322 is a circular ring when viewed from above (see the following description of FIG. 3B), but it is not limited to this. In this embodiment, the insulating layer 32 has a plurality of first openings 322, and each first opening 322 is located on each upper surface P1 of each columnar structure P. In another embodiment, each upper surface P1 of each columnar structure P has a plurality of first openings 322.

As shown in FIG. 2E , a metal connection layer 34 is formed on the insulating layer 32. The metal connection layer 34 covers the insulating layer 32 and fills the first opening 322, thereby being electrically connected to the first semiconductor structure 202. The metal connection layer 34 has a second opening 342 on the upper surface P1 side of the columnar structure P, thereby exposing the insulating layer 32 below, so that the light generated by the active structure 204 can be emitted from the laser device 100 through the second opening 342. The second opening 342 of the metal connection layer 34 can be, for example, circular, elliptical, square, irregular, etc. when viewed from above. In this embodiment, the shape of the second opening 342 is circular when viewed from above (see the description of FIG. 3C below), but the invention is not limited thereto. In this embodiment, the metal connection layer 34 has a plurality of second openings 342, and each second opening 342 is approximately located at the center of the upper surface P1 of each columnar structure P. In another embodiment, each upper surface P1 of each columnar structure P has a plurality of second openings 342.

As shown in FIG. 2F, the columnar structure P1 and the second semiconductor stack 2060 are bonded to the permanent substrate 10 by the adhesive layer 40. The permanent substrate 10 of this embodiment is a material with high transmittance for the light emitted by the active structure 204, such as sapphire with a transmittance greater than 80%. After being bonded to the permanent substrate 10, the first protrusion 341a and the second protrusion 341b are farther away from the permanent substrate 10 than the first semiconductor structure 202. Then, the growth substrate 2000 located on the side of the second semiconductor stack 2060 is removed to form a structure as shown in FIG. 2G.

As shown in FIG. 2H, a metal connection layer 50 is then formed on the second semiconductor stack 2060 exposed after the growth substrate 2000 is removed, and from a cross-sectional view, the width W1 of the metal connection layer 50 is smaller than the width of the second semiconductor stack 2060 to expose a portion of the second semiconductor stack 2060. The width W1 of the metal connection layer 50 is also smaller than the width W2 of the permanent substrate 10.

As shown in FIG. 2I , an etching process is then performed to remove the surrounding area of the second semiconductor stack 2060, such as the second semiconductor stack 2060 near the first boundary C1 and the second boundary C2 of the permanent substrate 10, to form a second semiconductor structure 206. The second semiconductor structure 206 is a platform protruding from the metal connection layer 34. The plurality of columnar structures P have a first edge E1 near the first boundary C1, and the second semiconductor structure 206 has a first side S11 near the first boundary C1, and in the direction of the X-axis in the figure, the first side S11 is closer to the first boundary C1 than the first edge E1. In addition, the metal connection layer 50 has a side surface that is closer to the first boundary C1 than the first edge E1, and moreover, all sides of the metal connection layer 50 are closer to the boundary than the edges of the plurality of columnar structures P. In other words, the metal connection layer 50 covers all the columnar structures P1. In another embodiment, all sides of the metal connection layer 50 are farther from the boundary than the edges of the plurality of columnar structures P, in other words, the metal connection layer 50 only covers part of the columnar structure P1.

In addition to the end surface 2061 facing the permanent substrate 10, the second semiconductor structure 206 also includes a lower surface 2062 away from the permanent substrate 10 and corresponding to the end surface 2061, and a first side S11 and a second side S12 connecting the end surface 2061 and the lower surface 2062.

As shown in FIG. 2J, an insulating layer 60 is formed on the second semiconductor structure 206, covering the first side S11, the second side S12, a portion of the lower surface 2062 and a portion of the metal connection layer 50. Then, a portion of the insulating layer 32 and the insulating layer 60 located on the surrounding area of the metal connection layer 34 are removed to form the first and second openings 602a, 602b, and the first and second protrusions 341a, 341b are exposed. The insulating layer 60 is formed with a third opening 603 on the metal connection layer 50 to expose a portion of the metal connection layer 50.

Next, as shown in FIG. 2K, a first electrode 702 and a second electrode 704 are formed on the insulating layer 60. The first electrode 702 directly contacts and is electrically connected to the metal connection layer 34 through the first opening 602a and the second opening 602b, and the second electrode 704 is connected to the metal connection layer 50 through the third opening 603.

Next, as shown in FIG. 2L, an insulating layer 80 is formed to cover a portion of the first electrode 702 and a portion of the second electrode 704. The insulating layer 80 has a third opening 802 to expose the first electrode 702 and a fourth opening 804 to expose the second electrode 704.

Afterwards, a first metal structure 902 and a second metal structure 904 are formed on the insulating layer 80. The first metal structure 902 is electrically connected to the first electrode 702 through the third opening 802, and the second metal structure 904 is electrically connected to the second electrode 704 through the fourth opening 804, so as to form the laser element 100 as shown in FIG. 1A. The surface of the first metal structure 902 and the surface of the second metal structure 904 are substantially at the same level, so as to facilitate the subsequent use of solder to connect the laser element 100 to an external circuit.

Figures 3A to 3I are schematic top or bottom views of the structures completed in each step of the laser device manufacturing process of one embodiment of the present application. Figures 3A to 3C are top views viewed from the first semiconductor structure 202 toward the active structure 204, and Figures 3D to 3I are bottom views viewed from the active structure 204 toward the first semiconductor structure 202.

FIG. 3A is a top view of the structure shown in FIG. 2B. In this embodiment, the number of columnar structures P is 621, and the plurality of columnar structures P are regularly arranged in an array in a densest stacking manner.

FIG. 3B is a top view and a partially enlarged view of the structure shown in FIG. 2D. The insulating layer 32 covers a plurality of columnar structures P and has a plurality of first openings 322, thereby exposing the upper surfaces P1 of the plurality of columnar structures P respectively.

FIG. 3C is a top view of the structure shown in FIG. 2E. The metal connection layer 34 covers the insulating layer 32 and has a plurality of second openings 342. The second openings 342 are correspondingly located on the upper surface P1 of the plurality of columnar structures P, thereby forming a plurality of light-emitting holes of the laser element 100. The edge of the metal connection layer 34 has four marking structures 344, and the center position O of the laser element 100 can be defined by the connecting lines L1 and L2 between the corresponding marking structures 344.

FIG. 3D is a bottom view of the structure shown in FIG. 2H, where a metal connection layer 50 is formed on the second semiconductor stack 2060.

FIG. 3E is a bottom view of the structure shown in FIG. 2I. The surrounding area of the second semiconductor stack 2060 is removed to form the second semiconductor structure 206.

FIG. 3F is a bottom view of the structure shown in FIG. 2J. As shown in FIG. 3F, an insulating layer 60 is formed, and then a portion of the insulating layer 60 and the insulating layer 32 is removed to form a first opening 602a and a second opening 602b, and expose the first protrusion 341a and the second protrusion 341b of the metal connection layer 34. The insulating layer 60 also has a third opening 603 to expose the metal connection layer 50. In this embodiment, the number of the first opening 602a and the second opening 602b is plural (for example, two each), and surrounds the second semiconductor structure 206. The shape of the first opening 602a and the second opening 602b is L-shaped. There is a first spacing G1 between adjacent openings, which corresponds to the marking structure 344 of the metal connection layer 34. In other embodiments, as shown in FIG. 4, the openings 602a and 602b of the insulating layer 60 can be connected to each other (i.e., there is no spacing G1 between adjacent first openings 602a and second openings 602b, and between adjacent first openings 602a and adjacent second openings 602b), and form an annular configuration surrounding the laser element 100. In other words, the insulating layer 60 has only one opening, and its shape is a mouth.

FIG. 3G is a bottom view of the structure shown in FIG. 2K, where the first electrode 702 and the second electrode 704 are respectively disposed on the metal connection layer 34 and the metal connection layer 50. In this embodiment, the first electrode 702 includes a main body 7021 and a surrounding portion 7022 connected to the main body 7021, and the top view area of the first electrode 702 is larger than the top view area of the second electrode 704. The dotted line in FIG. 3G represents the boundary between the main body 7021 and the surrounding portion 7022. The shape of the main body 7021 is a square, and the shape of the surrounding portion 7022 is a mouth shape. As shown in FIG. 4, when the insulating layer 60 has only one opening, the surrounding portion 7022 has the same shape as the opening (e.g., mouth shape), and the surrounding portion 7022 completely covers the opening and has a top-view area larger than a top-view area of the opening. The surrounding portion 7022 covers the first side S11 and the second side S12.

Please refer to FIG. 2K and FIG. 3G. The surrounding portion 7022 surrounds the second electrode 704 and contacts the metal connection layer 34 through the first and second openings 602a and 602b, thereby electrically connecting the first semiconductor structure 202 and the first electrode 702; the second electrode 704 contacts the metal connection layer 50 through the third opening 603, thereby electrically connecting the second semiconductor structure 206 and the second electrode 704. In addition, the body 7021 and the second electrode 704 have a second distance G2, and the surrounding portion 7022 and the second electrode 704 have a third distance G3, and the third distance G3 is smaller than the second distance G2.

FIG. 3H is a bottom view of the structure shown in FIG. 2L. The insulating layer 80 is located on the first electrode 702 and the second electrode 704. The insulating layer 80 has a third opening 802 and a fourth opening 804, thereby exposing the main body 7021 of the first electrode 702 and the second electrode 704, respectively.

FIG. 3I is a bottom view of the structure shown in FIG. 1A. Please refer to FIG. 1A and FIG. 3I. This step forms a first metal structure 902 and a second metal structure 904. The first metal structure 902 is connected to the first electrode 702 through the third opening 802, and the second metal structure 904 is connected to the second electrode 704 through the fourth opening 804.

The laser device 100 of one embodiment of the present invention is a flip-chip laser device, which can operate under short pulse and high current conditions. Compared with the electrode structure of the traditional vertical laser device, which has electrodes formed on opposite sides of the permanent substrate and connected by metal wire bonding, the laser device 100 of this embodiment can operate under high current conditions without additional metal wire bonding, thereby improving the light emission brightness of the laser device 100 and increasing the sensing distance (for example, up to 10 meters). At the same time, since the laser device 100 of the present invention does not need to be connected to the external circuit by setting additional metal wire bonding, the problem of parasitic capacitance can be improved, so as to have a fast response time during high-frequency operation. In addition, the laser device 100 of the present invention also has a faster response speed, for example, the signal rise time (T _r ) and signal fall time (T _f ) are both shorter, and its reliability can be enhanced.

As shown in FIG. 1A, the height H of the first electrode 702 in an embodiment of the present invention is essentially mainly corresponding to the thickness of the epitaxial layer of the second semiconductor structure 206. The height H of the first electrode 702 is less than 8.5 μm, for example, 5 μm to 8 μm, or 5.5 μm to 7 μm. The height of the first electrode 702 within the above range can effectively avoid the risk of electrical failure of the material of the first electrode 702 due to poor sidewall coverage during the manufacturing process, and can also shorten the current path of the laser element 100 to facilitate current transmission efficiency.

In addition, the first electrode 702 and the second electrode 704 of the laser element 100 of an embodiment of the present invention are further provided with an insulating layer 80 and first and second metal structures 902 and 904, thereby preventing the laser element 100 from easily forming a eutectic structure with the electrode material (such as gold) due to high heat when the laser element 100 is used at a large current, thereby affecting the performance of the electrode. Therefore, the reliability of the laser element 100 of the present invention can be effectively improved.

Furthermore, the laser device 100 according to an embodiment of the present invention has excellent structural symmetry, which is beneficial to the subsequent packaging process. Specifically, in the laser device 100 of the present invention, the second semiconductor structure 206 is located at the substantial center of the laser device 100, so that the first metal structure 902 and the second metal structure 904 can also be arranged at symmetrical positions of the laser device 100, which is beneficial to the structural design of the subsequent packaging process and increases the effective area.

Referring to FIG. 5 , a laser device 300 of an embodiment of the present invention includes a laser element 100, an optical array B1, and a circuit board B2. The laser element 100 is located on the circuit board B2 and is electrically connected to a first electrode pad B21 and a second electrode pad B22 of the circuit board B2. Specifically, the first metal structure 902 and the second metal structure 904 of the laser element 100 can be electrically connected to the first electrode pad B21 and the second electrode pad B22 via solder (not shown), and the optical array B1 includes a plurality of optical structures B11. In some embodiments, the optical array B1 can be a microlens array, and the optical structure B11 can be arranged regularly or irregularly to expand the light emitted by the laser element 100 to have a larger field of view (FOV). The laser element 100, the optical array B1 and the circuit board B2 can be integrated together through the bracket B3. The laser element 100 described in the embodiment of the present invention has high heat dissipation efficiency and is particularly suitable for 3D sensing devices or flood illuminators of time of flight (ToF), but the application field of the laser element 100 is not limited to this.

It should be noted that the aforementioned embodiments of the present invention are only used to illustrate the present invention, and are not used to limit the scope of the present invention. All modifications and changes made to the present invention by those skilled in the art of the field to which the present invention belongs do not deviate from the spirit and scope of the present invention. The same or similar components in different embodiments, or components represented by the same element symbols in different embodiments have the same physical or chemical properties. In addition, under appropriate circumstances, the above embodiments of the present invention can be combined or replaced with each other, rather than being limited to the specific embodiments described above. The connection relationship between a specific component described in one embodiment and other components can also be applied to other embodiments, which all fall within the scope of the present invention as attached patent application scope.

10: Permanent substrate

100: Laser element

20: Epitaxial structure

202: First semiconductor structure

204: Active structure

205: Current limiting layer

2051: Current limit area

2052: Current conduction area

206: Second semiconductor structure

2061: End face

2062: Lower surface

32: Insulation layer

322: First opening

34: Metal connection layer

341a: first protrusion

341b: Second protrusion

342: Second opening

40: Adhesive layer

50:Metal connection layer

60: Insulation layer

601: Side

602a: first opening

602b: Second opening

603: The third opening

702: First electrode

704: Second electrode

80: Insulation layer

802: The third opening

804: The fourth opening

902: First metal structure

9021: Middle layer

9022: Binding layer

904: Second metal structure

9041:Middle layer

9042: Binding layer

P: Columnar structure

P1: Upper surface

P2: First side surface

H: Electrode height

101: Anti-reflection structure

Claims (10)

A semiconductor element, viewed from its cross section, comprises: a first conductive type semiconductor structure having a first surface, a second surface opposite to the first surface, and a first side and a second side between the first surface and the second surface; a plurality of semiconductor columnar structures located on the first surface, and the plurality of semiconductor columnar structures include a first columnar structure adjacent to the first side and a second columnar structure adjacent to the second side; a connection layer located on the semiconductor columnar structures and extending to the first surface, and the connection layer has a first protrusion extending beyond the first side and a second protrusion extending beyond the second side; a first electrode located on the second surface and connected to the first protrusion; and a second electrode located on the second surface. The semiconductor element as described in item 1 of the patent application scope further includes an insulating layer located between the first electrode and the first conductive type semiconductor structure, and the insulating layer has a plurality of openings. As described in item 2 of the patent application scope, the first side surface is located between one of the openings and the first columnar structure, and the first electrode is connected to the first protrusion through one of the openings. A semiconductor device as described in item 2 of the patent application, wherein the second side surface is located between one of the openings and the second columnar structure. A semiconductor device as described in item 4 of the patent application, wherein the first electrode is connected to the second protrusion through one of the openings. The semiconductor device as described in item 1 of the patent application further comprises a permanent substrate located on the first surface, and an adhesive layer located between the permanent substrate and the plurality of semiconductor columnar structures. The semiconductor element as described in item 1 of the patent application scope further includes a first metal structure located between the first electrode and the first conductive type semiconductor structure, the first metal structure includes at least one element, and the first electrode does not include the element. The semiconductor element as described in item 1 of the patent application further includes a second metal structure located between the second electrode and the first conductive type semiconductor structure, the second metal structure includes at least one element, and the second electrode does not include the element. A semiconductor device as described in item 1 of the patent application, wherein the plurality of semiconductor columnar structures are located between the first conductive type semiconductor structure and the connection layer. A semiconductor device comprises: a carrier; and a semiconductor element as described in any one of items 1 to 8 of the patent application scope, located on the carrier.

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