TWI838008B - Sorting method of sorting machine for semiconductor testing, control apparatus and computer device - Google Patents

Abstract

Sorting method of sorting machine for semiconductor testing, control apparatus and computer device are provided. The method includes: obtaining a batch of test results of a batch of wafers and sorting tray information; determining grading zone information according to the batch of test results and the sorting tray information; obtaining a test result of a wafer to be sorted from the batch of wafers and sorting tray utilization information; moving the wafer to be sorted to a corresponding position in a sorting tray according to the test result of the wafer to be sorted, the grading zone information and the sorting tray utilization information.

Description

Material sorting method, control device, and computer equipment for semiconductor test sorting machine

The present invention relates to a semiconductor automatic testing technology field, and in particular to a material sorting method, a control device, and a computer device for a semiconductor testing sorting machine.

With the continuous improvement of automation in the field of semiconductor packaging testing, many testing tasks that were originally completed by manual or semi-automatic fixtures are gradually being transformed into fully automatic testing machines. Material sorting is an important step in the automation process of packaging testing, so the sorting machine has become an indispensable standard automation equipment in the fully automatic testing system.

The versatility and sorting efficiency of the sorting machine are important indicators for measuring automation equipment. Due to the diversity of semiconductor product packaging categories, the packaging and testing processes of different types of products and the same type of products from different manufacturers are often different, which requires sorting machine equipment manufacturers to continuously improve the mechanical structure according to user needs to meet the needs of different packaging products and processes.

This application provides a material sorting method, a control device, and a computer device for a semiconductor test sorting machine.

On the one hand, the present application provides a sorting method for a semiconductor test sorting machine, including obtaining batch test results and sorting plate information of batch chips; determining grade partition information based on the batch test results and the sorting plate information; obtaining test results of wafers to be sorted in the batch chips and usage information of the sorting plate; and moving the wafers to be sorted to corresponding positions in the sorting plate based on the test results of the wafers to be sorted, the grade partition information and the usage information of the sorting plate.

In one or more embodiments, the batch test results include the grade number and grade ratio of the batch chips, the tray information includes the number of trays and the capacity of the trays, and determining the grade partition information based on the batch test results and the tray information includes determining the basic unit of behavior corresponding to the grade number in the tray based on the grade number, the grade ratio, the number of trays and the capacity of the tray, and the grade partition information includes the corresponding relationship between the grade number and the basic unit of behavior in the tray.

In one or more embodiments, moving the wafer to be divided to a corresponding position in the dividing plate according to the test result of the wafer to be divided, the grade partition information and the usage information of the dividing plate includes determining a target dividing plate corresponding to the wafer to be divided according to the test result of the wafer to be divided and the grade partition information; calculating the moving coordinates of the wafer to be divided according to the target dividing plate and the usage information of the dividing plate; and moving the wafer to be divided to a corresponding position in the dividing plate according to the moving coordinates.

In one or more embodiments, after the wafer to be divided is moved to a corresponding position in the dividing tray according to the test result of the wafer to be divided, the grade partition information and the usage information of the dividing tray, the method further includes determining whether the basic behavior unit in the dividing tray is full; when the basic behavior unit in the dividing tray is full, replacing the dividing tray according to the tray replacement method corresponding to the dividing tray.

On the other hand, the present application provides a material distribution control device for semiconductor testing, including a test discharging platform for transmitting batch chips; a material distribution module for obtaining batch test results of batch chips, distribution tray information and usage information of the distribution tray, and for distributing grade partition information according to the batch test results and the distribution tray information; a material distribution control module connected to the material distribution module for obtaining the batch chips; The test results of the chips to be divided in the sheet are also used to output a grabbing instruction according to the grade partition information corresponding to the test results of the chips to be divided and the usage information of the dividing plate; the automatic grabbing module is connected to the unloading control module, and is used to grab the chips to be divided from the batch chips transmitted by the test unloading platform according to the grabbing instruction, and move the chips to be divided to the corresponding position in the dividing plate.

In one or more embodiments, the material distribution module includes a data acquisition unit for acquiring batch test results of the batch of wafers, the material distribution tray information and the use information of the material distribution tray, wherein the batch test results include the grade number and grade proportion of the batch of wafers, the material distribution tray information includes the number of material distribution trays and the capacity of the material distribution tray, and the use information of the material distribution tray includes the position of each wafer in the material distribution tray. The data processing unit is connected to the data acquisition unit and is used to determine the basic behavior unit corresponding to the grade number in the material distribution plate according to the grade number, the grade ratio, the number of the material distribution plate and the capacity of the material distribution plate. The grade partition information includes the corresponding relationship between the grade number and the basic behavior unit in the material distribution plate.

In one or more embodiments, the material unloading control module includes a material distribution plate determination unit, which is used to determine the target material distribution plate corresponding to the chip to be distributed according to the test results of the chip to be distributed and the grade partition information; a movement coordinate calculation unit, which is connected to the material distribution plate determination unit, and is used to calculate the movement coordinates of the chip to be distributed according to the target material distribution plate and the usage information of the material distribution plate; and a control instruction output unit, which is connected to the movement coordinate calculation unit, and is used to output a grabbing instruction according to the movement coordinates.

In one or more embodiments, the material distribution control device for semiconductor testing further includes a judgment module for judging whether the behavior basic unit in the material distribution plate is full; a material distribution plate replacement module is connected to the judgment module and is used to replace the material distribution plate according to the corresponding plate replacement method when the behavior basic unit in the material distribution plate is full.

On the other hand, the present application provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the material sorting method of the semiconductor test sorting machine described in any of the above embodiments when executing the computer program.

On the other hand, the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the material sorting method of the semiconductor test sorting machine described in any one of the above-mentioned embodiments.

On the other hand, the present application provides a computer program product, including a computer program, which, when executed by a processor, implements the steps of the material sorting method of the semiconductor test sorting machine described in any of the above embodiments.

In order to facilitate the understanding of this application, a more comprehensive description of this application will be given below with reference to the relevant drawings. The drawings provide some implementation methods of this application. However, this application can be implemented in other different forms and is not limited to the implementation methods described herein. On the contrary, the purpose of providing these implementation methods is to understand the application content of this application more thoroughly and comprehensively.

It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may also be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right", "up", "down", "front", "back", "circumferential" and similar expressions used in this article are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and/or" used herein includes any unit and all combinations of one or more associated listed items.

At present, sorting machines can be divided into translation sorting machines, gravity sorting machines and turret sorting machines according to different transmission methods. In actual applications, translation sorting machines account for the largest proportion of applications. Usually, in the unloading section of the translation sorting machine, the tray, also known as the material tray, is used as a carrier for the chips. According to different test results, chips of different grades can be placed in different trays. This material sorting process is called binning (bin means material box, box, and "binning" means "disk sorting" in the semiconductor manufacturing industry). When binning is performed in the normal operating process, chips of different grades are usually placed on different trays according to different test results.

In order to save space, most of the translation sorting machines are designed to unload materials by combining automatic binning with fixed binning. The wafers corresponding to the test level that accounts for a larger proportion of the wafer test results will be placed in the tray corresponding to the automatic binning. The tray corresponding to the automatic binning will be automatically replaced by the conveyor belt after it is full; the wafers corresponding to the test level that accounts for a smaller proportion of the wafer test results will be placed in the tray corresponding to the fixed binning. The tray corresponding to the fixed binning will be replaced manually after it is full. The number of trays for automatic binning and fixed binning in the translation sorting machine can be arbitrarily combined according to the test process. The common combination in actual application is: setting 3 automatic bins and 3 fixed bins. However, when the product is changed or the customer demand changes, different numbers of wafer test results may appear, resulting in the number of trays not corresponding to the number of wafer test results, and efficient binning cannot be achieved. Simply adding different binning methods to correspond to the number of trays still cannot solve the problem of increasing the number of binning methods caused by product changes or changes in customer demand.

In order to solve the above problems, this application provides a material sorting method based on a translational sorting machine, which can expand the number of bins of the sorting machine without changing the hardware, and has broad application prospects.

Fig. 1 is a schematic diagram of a method flow of a material separation method of a semiconductor test sorting machine in an embodiment of the present application. In the embodiment of the present application, the material separation method of a semiconductor test sorting machine may include the following steps S100 to S400.

Step S100: Obtain batch test results and tray information of batch wafers.

The hardware equipment that can be used to implement the above-mentioned semiconductor test sorting machine sorting method includes a test discharging platform, an automatic grabbing module and at least one unloading tray. The sorting machine can move the chips that have completed the semiconductor performance test to the sorting unloading area by using the test discharging platform. The automatic grabbing module can be controlled to grab the chips to be sorted on the test discharging platform and move the chips to be sorted to the corresponding position.

After completing the semiconductor performance test for batches of chips, the batch test results of this batch of chips can be obtained. For example, different chips can be divided into different grades according to their performance. The batch test results can include test result information such as the number of grades in this batch of chips, the grade number, and the approximate proportion of chips of different grades.

At the same time, the information of the trays set in the semiconductor test sorter is obtained. Because different trays may be set for the sorter in different semiconductor production test plans. The tray information may include the number of trays set in the semiconductor test sorter, the capacity information of each tray that can accommodate chips, which trays are trays corresponding to automatic binning, and which trays are trays corresponding to fixed binning.

Step S200: Determine the grade partition information according to the batch test results and the material distribution tray information.

By comprehensively considering the batch test results obtained in the semiconductor performance test of the batch of wafers and the information of the binning trays set in the semiconductor test sorter, the grade partition information can be determined to formulate a corresponding binning method for this batch of wafers in a personalized manner. The grade partition information can be used to show the allocation of binning tray areas corresponding to wafers with different test results in binning. For example, when it is determined based on the batch test results that this batch of wafers includes wafers of 3 different grades, and there are exactly 3 binning trays set in the semiconductor test sorter, one binning tray can be allocated for each grade.

Step S300: Obtain the test results of the wafers to be divided in the batch of wafers and the usage information of the dividing plate.

The automatic grabbing module picks up a wafer to be separated from the batch of wafers that have completed the test on the test discharge platform, and can obtain the test result corresponding to the wafer to be separated from the test machine. The test result of the wafer to be separated may include the grade corresponding to the wafer to be separated, the grade number to which it belongs, and the proportion of the grade to which it belongs in this batch of wafers.

Step S400: According to the test results of the wafers to be divided, the grade partition information and the usage information of the dividing plate, the wafers to be divided are moved to the corresponding positions in the dividing plate.

Since the distribution of the material distribution tray corresponding to the test result can be determined according to the grade partition information, the material distribution tray corresponding to the wafer to be distributed can be determined according to the test result corresponding to the wafer to be distributed and the grade partition information. At the same time, since the capacity of the material distribution tray for accommodating the wafer is limited, the unoccupied position in the material distribution tray can be determined by obtaining the usage information of the material distribution tray before moving, and the corresponding position of the wafer to be distributed in the material distribution tray can be determined, so that the automatic gripping module can move the wafer to be distributed to the corresponding position in the material distribution tray under control.

The above-mentioned sorting method of the semiconductor test sorting machine divides the sorting tray according to the batch test results of the batch chips and the sorting tray information, and divides the sorting tray into sorting areas for accommodating different grades. According to the grade division situation and the test results of the chips to be sorted in the batch chips, the chips to be sorted are moved to the corresponding positions in the sorting tray. The sorting method of the semiconductor test sorting machine provided by this application can realize the expansion of the bin (sorting tray) categories of the sorting machine without changing the hardware. While ensuring the original functions, it can greatly improve the flexibility of the sorting machine's unloading and classification and reduce the hardware cost of the equipment. At the same time, the sorting tray can be used to the maximum extent without increasing the difficulty of operating the equipment.

Practical production experience has proven that the above method can greatly improve the flexibility of the binning method of the sorting machine, and can achieve the expansion of the number of bins of the sorting machine without changing the hardware. The above method of binning is applied to semiconductor test sorting machines. After packaging tests of different manufacturers and different types of products with different process standards, the sorting machine equipment can adaptively allocate bins according to the test results to meet the binning needs of different packaging products and processes, which has broad application prospects.

In one or more embodiments, in semiconductor testing, the tested wafers are usually divided into different grades of wafers according to their different performances. Numbering the test results of the tested wafers can facilitate distinguishing which grades of wafers are included in the batch of wafers. At the same time, after the batch of wafers is tested, the proportion of each grade in the total amount can be obtained. Therefore, the batch test results may include the grade numbers and grade proportions included in this batch of wafers. Similarly, the number of material trays provided in the sorting machine may be different, and the number of wafers that can be accommodated in material trays of different sizes is also different. Therefore, the material tray information can be obtained, and allocation can be made based on the number and capacity of the material trays. The material tray information may include the number of material trays and the capacity of the material trays.

When determining the grade partition information based on the batch test results and the material tray information, the basic unit of behavior corresponding to the grade number in the material tray can be determined based on the grade number, grade ratio, number of material trays and capacity of the material tray. Taking the grade number, grade ratio, number of material trays and capacity of the material tray into consideration, determine the material tray used to accommodate chips corresponding to one or several grade numbers. When a material tray is used to accommodate chips corresponding to multiple grade numbers, determine the area used to accommodate chips corresponding to a certain grade number. In some embodiments of the present application, the area in the material tray used to accommodate chips corresponding to one grade number is defined as a basic unit of behavior. The grade partition information can be used to represent the allocation of the bin areas corresponding to the wafers with different test results. The grade partition information can include the correspondence between the grade number and the basic unit of behavior in the bin.

Obtaining the grade ratio corresponding to each grade number in the batch of chips can make the most efficient use of the tray. The basic unit corresponding to each grade number in the tray is divided according to the grade ratio corresponding to each grade number. Since the semiconductor production process determines that the grade ratio of each grade in the batch of chips is relatively fixed, the grade ratio corresponding to each grade number in the batch of chips can be roughly estimated during the test process. When it is impossible to make a rough estimate of the grade ratio corresponding to each grade number in the batch of chips during the test process, the grade ratio corresponding to each grade number can also be obtained by directly dividing the batch of chips into equal parts according to the number of grades existing in the batch of chips.

In this embodiment, in order to better illustrate the steps of determining grade partition information based on batch test results and sorting tray information, taking the test results including 3 grades as an example, the grade numbers can be respectively recorded as: grade 1, grade 2, grade 3, and the grade proportions of the 3 grade numbers can be: 60%, 30%, and 10%. The semiconductor test sorting machine includes two trays AB as an example to illustrate the above-mentioned sorting process, but this should not be understood as a limitation on the scope of the invention patent.

Please refer to Figure 2, which is a schematic diagram of the hardware structure of the semiconductor test sorting machine in the embodiment of the present application. The test discharging platform and two trays AB are placed on a plane at the same height, wherein the Tester Unit is an area in the test discharging platform for storing batches of chips. An automatic grabbing module that can move freely on a plane formed by the X-axis and the Y-axis is provided above the test discharging platform and the two trays, and the suction head of the automatic grabbing module can be used to grab the chip. The automatic grabbing module can drive the chip to move freely above the test discharging platform and the two trays.

The batch test results and tray information of the batch wafers are obtained. The batch test results include the grade number and grade ratio of the batch wafers, that is, the grade number of the batch wafers includes grade 1, grade 2, and grade 3, the grade ratio corresponding to grade 1 is 60%, the grade ratio corresponding to grade 2 is 30%, and the grade ratio corresponding to grade 3 is 10%. The tray information includes the number of trays and the capacity of the trays, that is, the number of trays is 2, and the tray capacity is: each tray includes 16 rows, and a row includes 8 wafer storage positions.

In the case where a behavior basic unit is used to accommodate a chip corresponding to a level number, it can be determined that three behavior basic units are included in two trays according to the level number of the batch of chips. Considering the level proportion corresponding to each level number, it is known that level 1 has the largest proportion, so Tray A can be allocated separately to the behavior basic unit corresponding to level 1; the behavior basic unit corresponding to level 2 and the behavior basic unit corresponding to level 3 share Tray B. The behavior basic unit assigns level numbers to the trays so that the number of tray rows corresponding to each level corresponds to its proportion. Considering that the ratio of the level proportion corresponding to level 2 and the level proportion corresponding to level 3 is 3:1, and considering the capacity of the material distribution tray, the 12 rows of wafer storage positions in Tray B can be allocated to the behavior basic units corresponding to level 2, and the 4 rows of wafer storage positions in Tray B can be allocated to the behavior basic units corresponding to level 3. The level partition information can be shown in FIG3, which is a schematic diagram of the partition of the material distribution tray in the embodiment of the present application.

The above-mentioned sorting method of the semiconductor test sorting machine obtains the batch test results obtained from the test of the batch wafers, and according to the middle level number in the batch test results and the approximate proportion corresponding to each level number, the sorting plate information in the sorting machine is integrated, and the level number is assigned to the sorting plate as a basic unit of behavior. When applied, the storage area of the wafers corresponding to different test results in the sorting plate can be flexibly allocated according to the test results of each test and the situation of the sorting plate. Actual production experience has proved that the above-mentioned sorting and unloading method can greatly improve the unloading and binning flexibility of the sorting machine, thereby realizing the expansion of the number of arbitrary bins of the sorting machine without changing the hardware.

Figure 4 is a schematic diagram of the method flow for moving the wafers to be divided in the embodiment of the present application. In one or more embodiments, based on the test results of the wafers to be divided, the grade partition information and the usage information of the dividing plate, moving the wafers to be divided to the corresponding positions in the dividing plate may include the following steps S410 to S430.

Step S410: Determine the target partitioning plate corresponding to the wafer to be partitioned according to the test results and grade partitioning information of the wafer to be partitioned.

The automatic grabbing module is controlled to pick up the wafers to be divided from the batch of wafers that have completed the test on the test discharging platform, and at the same time, the test results of the wafers to be divided are obtained from the test machine. Among them, the test results of the wafers to be divided can be the grade number of the wafers to be divided. Since the grade partition information can be used to indicate the allocation of the dividing tray corresponding to the test result, the target dividing tray corresponding to the wafer to be divided can be determined according to the test result corresponding to the wafer to be divided and the grade partition information. For example, when the test result of the wafer to be divided is grade 1, the target dividing tray corresponding to grade 1 can be determined as Tray A according to the grade partition information. When dividing, the wafer to be divided can be moved to the behavior basic unit corresponding to grade 1 in Tray A.

Step S420: Calculate the moving coordinates of the wafer to be divided according to the target dividing plate and the usage information of the dividing plate.

At the same time, since the capacity of the material distribution plate for accommodating wafers is limited, the usage information of the material distribution plate can be obtained before moving to determine which unoccupied positions exist in the material distribution plate, and then determine the target position corresponding to the wafer to be distributed in the material distribution plate. The moving coordinates of the wafer to be distributed are calculated based on the target material distribution plate and the usage information of the material distribution plate.

In some embodiments of the present application, the usage information of the material distribution plate may include the information of whether there is material, the origin coordinate information, the row and column spacing information, etc. corresponding to each chip storage position in the material distribution plate. Based on the usage information of the material distribution plate, it is possible to determine where there are vacant positions in the behavior basic unit corresponding to the chip to be distributed, and select one of the vacant positions as the target position. Based on the information such as the origin coordinates, the row and column spacing, and the target position coordinates, the moving coordinates when moving the chip to be distributed to the target position can be calculated.

Step S430: Move the wafer to be divided to a corresponding position in the dividing plate according to the moving coordinates.

The moving coordinates are sent to the automatic gripping module, which can move the wafer to be divided to the target position in the corresponding dividing plate according to the moving coordinates. After the wafer to be divided is placed in the target position in the corresponding dividing plate, the binning of the single wafer of the wafer to be divided can be completed.

The above-mentioned sorting method of the semiconductor test sorting machine determines the target position of the wafer to be sorted according to the grade zoning situation, the test results of the wafer to be sorted in the batch wafers and the use of the sorting plate, and moves the wafer to be sorted to the corresponding position in the sorting plate. This can maximize the use of the accommodating position of the sorting plate in the semiconductor test sorting machine, and at the same time expand the flexibility of the sorting machine in unloading and classification without increasing the difficulty of operating the equipment, thereby reducing the hardware cost of the equipment.

Fig. 5 is a schematic diagram of the method flow of replacing a full material distribution plate in the embodiment of the present application. In the embodiment of the present application, after the wafer to be distributed is moved to the corresponding position in the distribution plate according to the test results of the wafer to be distributed, the grade partition information and the use information of the distribution plate, the method may further include the following steps S500 to S600.

Step S500: Determine whether the behavior basic unit in the material distribution plate is full.

Step S600: When the basic unit of behavior in the material distribution plate is full, the material distribution plate is replaced according to the plate replacement method corresponding to the material distribution plate.

A basic behavior unit in the binning tray is used to accommodate chips with a corresponding single type and grade number. When any basic behavior unit is full, if the tray is not replaced in time, and the chip grabbed at the next grab is the chip corresponding to the full basic behavior unit, then there will be no place to accommodate the next chip, thus affecting the binning process. Therefore, after completing the binning operation of a single chip, it is judged whether the basic behavior unit in the binning tray is full, and the binning tray where the full basic behavior unit is located is replaced in time. Since the behavior basic units in each distribution tray are divided according to the level proportion corresponding to each level number during allocation, when a behavior basic unit is full, there will not be a large waste of resources in other behavior basic units on the distribution tray, and the chip capacity of the distribution tray can be maximized.

In one or more embodiments, the material distribution tray used in the semiconductor test sorting machine may include a first material distribution tray and a second material distribution tray, which may be automatically binned and fixed binned, respectively. The tray changing method corresponding to the first material distribution tray is different from the tray changing method corresponding to the second material distribution tray. Therefore, when there is a full material behavior basic unit, the category corresponding to the material distribution tray where the full material behavior basic unit is located can be determined, and the tray can be changed according to the tray changing method corresponding to the category of the material distribution tray. For example, the material distribution tray used in the semiconductor test sorting machine may include a material distribution tray corresponding to automatic binning and a material distribution tray corresponding to fixed binning. Therefore, when the material distribution tray of the basic unit with full material behavior is the material distribution tray corresponding to the automatic binning, the conveyor belt can be used to realize automatic tray replacement; when the material distribution tray with full material is the material distribution tray corresponding to the fixed binning, a prompt message can be issued to prompt the operator to manually replace the tray.

In one or more embodiments, the material sorting method of the semiconductor test sorting machine may further include repeating the above steps S100 to S400 when the behavior basic units in all the material sorting trays are not yet full, until the behavior basic units in any one of the material sorting trays are full.

In one or more embodiments, the material sorting method of the semiconductor test sorting machine may further include storing all the data obtained in the above embodiments. For example, the batch test results of the batch wafers, the material sorting plate information, the test results of the wafers to be sorted in the batch wafers, the grade partition information, the use information of the material sorting plate, etc. are stored, which can facilitate the operation of tracing and correcting errors or locating and tracking the target wafer according to the stored data during the later maintenance.

It should be understood that, although the steps in the flowcharts of the attached drawings of the specification are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction for the execution of these steps, and these steps can be executed in other sequences. Moreover, at least a portion of the steps in the flowcharts of the attached drawings of the specification may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a portion of the steps or stages in other steps.

Based on the description of the above-mentioned semiconductor test sorting machine material distribution method embodiment, the present application also provides a semiconductor test material distribution control device. The semiconductor test material distribution control device may include a system (including a distributed system), software (application), modules, components, servers, clients, etc. that use the method described in the embodiments of this specification and is combined with necessary implementation hardware. Based on the same innovative concept, the semiconductor test material distribution control device in one or more embodiments provided in the embodiments of this application is as described in the following embodiments. Since the implementation scheme and method of the semiconductor test material distribution control device to solve the problem are similar, the implementation of the semiconductor test material distribution control device specific to the embodiments of this specification can refer to the implementation of the aforementioned method, and the repetitions will not be repeated. As used below, the term "unit" or "module" may refer to a combination of software and/or hardware, or software in execution, that implements a predetermined function. For example, units and modules may be, but are not limited to, processes, processors, objects, executable codes, threads of execution, programs, and/or computers running on a processor. As an illustration, an application running on a server and a server may be a unit or a module, one or more units and modules may reside in a process and/or a thread of execution, and units and modules may be located in one computer and/or distributed between two or more computers. Although the semiconductor test batch control device described in the following embodiments is implemented by software, implementation by hardware, or a combination of software and hardware is also possible and conceivable.

Fig. 6 is a schematic diagram of the structure of the material distribution control device for semiconductor testing in the embodiment of the present application. In the embodiment of the present application, a material distribution control device for semiconductor testing may include a test discharging platform 100, a material distribution module 200, a material control module 300 and an automatic grabbing module 400.

The test unloading platform 100 can be used to transfer batches of chips.

The material distribution module 200 can be used to obtain batch test results of batch chips, material tray information and material tray usage information, and can also be used to distribute grade partition information based on the batch test results and material tray information.

The material unloading control module 300 is connected to the material unloading distribution module 200, and can be used to obtain the test results of the wafers to be divided in the batch of wafers, and is also used to output the grabbing instructions according to the grade partition information corresponding to the test results of the wafers to be divided and the usage information of the dividing plate.

The material distribution module 200 and the material control module 300 can both be connected to the testing machine to obtain the test results in the testing machine.

The automatic grabbing module 400 is connected to the unloading control module 300. It can be connected to the unloading control module 300, and can grab the chips to be divided from the batch chips transmitted by the test unloading platform according to the grabbing instructions, and move the chips to be divided to the corresponding positions in the dividing plate.

In one or more embodiments, the material distribution module 200 may include a data acquisition unit and a data processing unit.

The data acquisition unit can be used to obtain batch test results and tray information of batch chips. The batch test results include the grade number and grade ratio of the batch chips, and the tray information includes the number of trays and the capacity of the trays.

The data processing unit is connected to the data acquisition unit and can be used to determine the basic behavior unit corresponding to the grade number in the distribution tray according to the grade number, grade proportion, number of distribution trays and capacity of the distribution tray. The grade partition information includes the corresponding relationship between the grade number and the basic behavior unit in the distribution tray.

In one or more embodiments, the material unloading control module may include a material distribution plate determination unit, a movement coordinate calculation unit and a control instruction output unit.

The material dividing plate determination unit can be used to determine the target material dividing plate corresponding to the wafer to be divided according to the test results and grade partition information of the wafer to be divided.

The moving coordinate calculation unit is connected to the material distribution plate determination unit and can be used to calculate the moving coordinates of the wafer to be distributed according to the target material distribution plate and the usage information of the material distribution plate.

The control command output unit is connected to the movement coordinate calculation unit and can be used to output the grabbing command according to the movement coordinates.

In one or more embodiments, the material distribution control device for semiconductor testing may also include a judgment module and a material distribution plate replacement module.

The judgment module can be used to judge whether the basic unit in the material distribution tray is full.

The material distribution plate replacement module is connected to the judgment module and can be used to replace the material distribution plate according to the plate replacement method corresponding to the material distribution plate when the behavior basic unit in the material distribution plate is full.

In one or more embodiments, the material distribution module 200 and the material control module 300 can both be functional units in the server, and the server is used to realize the material distribution control of the semiconductor test. The server is connected to the test machine, obtains the number of levels of the chip test results in the test machine and the approximate proportion of each level, and determines the level partition information according to the batch test results and the material distribution plate information, and assigns the level number to the material distribution plate with the behavior basic unit, so that the number of material distribution plate rows corresponding to each level corresponds to its proportion. The server can also realize the control of the automatic gripping module 400, and control the automatic gripping module 400 to pick up the wafers to be divided from the test discharging platform 100. The server can also obtain the test results corresponding to the wafers grabbed by the automatic gripping module 400 from the test machine, such as the level number.

The server can also calculate the placement position of the chip according to the usage information of the material distribution tray, the grade division information and the test results corresponding to the captured wafers to be distributed. Under the control of the server, the automatic grab module 400 places the chip into the placement position of the corresponding material distribution tray according to the placement position of the chip calculated by the server to complete the binning of the single chip to be distributed. Repeat the above steps until the behavior basic unit corresponding to a certain grade number in the material distribution tray is full. If the full material distribution tray is the material distribution tray corresponding to the automatic binning, the conveyor belt will realize automatic tray replacement; if the full material distribution tray is the material distribution tray corresponding to the fixed binning, a prompt message will be issued to prompt the operator to manually change the tray. Repeat the above steps until the distribution operation of this batch of chips is completed.

In one or more embodiments, the server can also be used to store all the data obtained in the above embodiments. For example, the batch test results of the batch wafers, the material separation plate information, the test results of the wafers to be separated in the batch wafers, the grade partition information, the use information of the material separation plate, etc. are stored in the database of the server, which can facilitate the operation of tracing and correcting errors or locating the target wafer according to the stored data during the later maintenance.

Each module in the above-mentioned semiconductor test material distribution control device can be fully or partially implemented by software, hardware and their combination. Each of the above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the corresponding operations of each of the above modules.

Regarding the material distribution control device for semiconductor testing in the above-mentioned embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be explained in detail here.

It is understandable that the various embodiments of the above-mentioned method, semiconductor test material distribution control device, etc. in this specification are described in a progressive manner, and the same/similar parts between the various embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. For relevant points, please refer to the description of other method embodiments.

FIG7 is a schematic block diagram of a semiconductor test material distribution control system in an embodiment of the present application. Referring to FIG7, the semiconductor test material distribution control system S00 includes a processing element S20, which further includes one or more processors, and a memory resource represented by a memory S22 for storing instructions that can be executed by the processing element S20, such as an application. The application stored in the memory S22 may include one or more modules, each of which corresponds to a set of instructions. In addition, the processing element S20 is configured to execute instructions to execute the above method.

The semiconductor test dispensing control system S00 may further include: a power supply element S24 configured to perform power management of the semiconductor test dispensing control system S00, a wired or wireless network interface S26 configured to connect the semiconductor test dispensing control system S00 to a network, and an input/output (I/O) interface S28. The semiconductor test dispensing control system S00 may operate based on an operating system stored in the memory S22, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, or the like.

In an exemplary embodiment, a computer-readable storage medium including instructions is also provided, such as a memory S22 including instructions, and the above instructions can be executed by a processor of a semiconductor test material distribution control system S00 to complete the above method. The storage medium can be a computer-readable storage medium, for example, the computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

In an exemplary embodiment, a computer program product is also provided, wherein the computer program product includes instructions, and the instructions can be executed by a processor of a semiconductor test material distribution control system S00 to complete the above method.

In the embodiment of the present application, a computer device is also provided. The computer device may be a server, and its internal structure diagram may be as shown in FIG8 , which is a schematic diagram of the internal structure of the computer device in the embodiment of the present application. The computer device includes a processor, a memory, a network interface, and a display screen connected via a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store all the data obtained in the above embodiment. The network interface of the computer device is used to communicate with the external terminal through the network connection. When the computer program is executed by the processor, a material sorting method of a semiconductor test sorting machine is realized.

The display screen of the computer device may be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device may be a touch layer covered on the display screen, or may be a key, trackball or touchpad provided on the computer device housing, or may be an external keyboard, touchpad or mouse.

Those skilled in the art will understand that the structure shown in FIG. 8 is merely a block diagram of a portion of the structure related to the present application scheme, and does not constitute a limitation on the computer device to which the present application scheme is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component layout.

A person skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, database or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory may include random access memory (RAM) or external high-speed cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited thereto. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, etc., but are not limited thereto.

Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the hardware-integrated program embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

It should be noted that the above-mentioned apparatus, electronic equipment, server, etc. may also include other implementations according to the description of the method embodiment, and the specific implementations may refer to the description of the relevant method embodiment. At the same time, the new embodiments composed of the mutual combination of the features of the various methods and apparatus, equipment, and server embodiments still belong to the scope of implementation covered by this application, and will not be described one by one here.

In the description of this specification, reference to the terms "some embodiments", "other embodiments", "desirable embodiments", etc. means that the specific features, structures, materials or features described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic description of the above terms does not necessarily refer to the same embodiment or example.

The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

The above-mentioned embodiments only express several implementation methods of the present application, and the description is relatively specific and detailed, but it should not be understood as limiting the scope of the invention patent. It should be pointed out that for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present application, and these are all within the scope of protection of the present application. Therefore, the scope of protection of the patent of the present application shall be based on the attached claims.

S100, S200, S300, S400, S410, S420, S430, S500, S600: Electronic devices 100: Test discharging platform 200: Material discharging module 300: Material discharging control module 400: Automatic grabbing module S00: Material discharging control system for semiconductor testing S20: Processing components S22: Memory S24: Power components S26: Network interface S28: Input/output interface

Figure 1 is a schematic diagram of the method flow of the material sorting method of the semiconductor test sorting machine in the embodiment of the present application; Figure 2 is a schematic diagram of the hardware structure of the semiconductor test sorting machine in the embodiment of the present application; Figure 3 is a schematic diagram of the partitioning of the material sorting plate in the embodiment of the present application; Figure 4 is a schematic diagram of the method flow of moving the wafer to be sorted in the embodiment of the present application; Figure 5 is a schematic diagram of the method flow of changing the full material sorting plate in the embodiment of the present application; Figure 6 is a structural schematic diagram of the material sorting control device for semiconductor testing in the embodiment of the present application; Figure 7 is a schematic block diagram of the material sorting control system for semiconductor testing in the embodiment of the present application; Figure 8 is a schematic diagram of the internal structure of the computer device in the embodiment of the present application.

S100, S200, S300, S400: Steps

Claims (8)

A semiconductor test sorting machine sorting method comprises: obtaining batch test results of batch wafers and sorting plate information; determining grade partition information according to the batch test results and the sorting plate information; obtaining test results of wafers to be sorted in the batch wafers and use information of the sorting plate; moving the wafers to be sorted to corresponding positions in the sorting plate according to the test results of the wafers to be sorted, the grade partition information and the use information of the sorting plate; the batch test results include The grade number and grade ratio of the batch wafers, the material tray information includes the number of material trays and the capacity of the material trays, and the step of determining the grade partition information according to the batch test results and the material tray information includes: determining the basic unit of behavior corresponding to the grade number in the material tray according to the grade number, the grade ratio, the number of material trays and the capacity of the material tray, and the grade partition information includes the corresponding relationship between the grade number and the basic unit of behavior in the material tray. The material sorting method of the semiconductor test sorting machine as described in claim 1, wherein the step of moving the wafer to be sorted to the corresponding position in the sorting plate according to the test result of the wafer to be sorted, the grade partition information and the usage information of the sorting plate comprises: determining the target sorting plate corresponding to the wafer to be sorted according to the test result of the wafer to be sorted and the grade partition information; calculating the moving coordinates of the wafer to be sorted according to the target sorting plate and the usage information of the sorting plate; and moving the wafer to be sorted to the corresponding position in the sorting plate according to the moving coordinates. The material sorting method of the semiconductor test sorting machine as described in claim 1, wherein, after the wafer to be sorted is moved to the corresponding position in the sorting tray according to the test result of the wafer to be sorted, the grade division information and the usage information of the sorting tray, the method further includes: judging whether the behavior basic unit in the sorting tray is full; when the behavior basic unit in the sorting tray is full, replacing the sorting tray according to the tray replacement method corresponding to the sorting tray. A material distribution control device for semiconductor testing, comprising: a test discharging platform for transmitting batch wafers; a material distribution module for obtaining batch test results and distribution plate information of the batch wafers, and for distributing grade partition information according to the batch test results and the distribution plate information; a material distribution control module connected to the material distribution module, for obtaining test results of wafers to be distributed in the batch wafers, and for outputting a grabbing instruction according to the grade partition information corresponding to the test results of the wafers to be distributed and the use information of the distribution plate; an automatic grabbing module connected to the material distribution control module, for grabbing the wafers to be distributed from the batch wafers transmitted by the test discharging platform according to the grabbing instruction. The chip to be divided is moved to the corresponding position in the dividing plate; The material distribution module includes: a data acquisition unit, which is used to obtain the batch test results of the batch of chips and the dividing plate information, the batch test results include the grade number and grade ratio of the batch of chips, and the dividing plate information includes the number of dividing plates and the capacity of the dividing plate; a data processing unit, which is connected to the data acquisition unit, is used to determine the behavior basic unit corresponding to the grade number in the dividing plate according to the grade number, the grade ratio, the number of dividing plates and the capacity of the dividing plate, and the grade partition information includes the corresponding relationship between the grade number and the behavior basic unit in the dividing plate. The semiconductor test material distribution control device as described in claim 4, wherein the material unloading control module includes: a material distribution plate determination unit, which is used to determine the target material distribution plate corresponding to the wafer to be distributed according to the test result of the wafer to be distributed and the grade partition information; a moving coordinate calculation unit, which is connected to the material distribution plate determination unit, and is used to calculate the moving coordinates of the wafer to be distributed according to the target material distribution plate and the use information of the material distribution plate; a control instruction output unit, which is connected to the moving coordinate calculation unit, and is used to output a grabbing instruction according to the moving coordinates. The semiconductor test material distribution control device as described in claim 4, wherein the semiconductor test material distribution control device further comprises: a judgment module, used to judge whether the behavior basic unit in the material distribution plate is full; a material distribution plate replacement module, connected to the judgment module, used to replace the material distribution plate according to the corresponding plate replacement method of the material distribution plate when the behavior basic unit in the material distribution plate is full. A computer device includes a memory and a processor, wherein the memory stores a computer program, wherein the processor implements the steps of the material sorting method of a semiconductor test sorting machine described in any one of claim items 1-3 when executing the computer program. A computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the material sorting method of a semiconductor test sorting machine as described in any one of claims 1-3.