TWI837993B - Display device - Google Patents

Abstract

A display device includes a light emitting diode package structure. The light emitting diode package structure includes a substrate, first pads, a second pad and light emitting diodes. The substrate includes first through holes and a second through hole. The first pads and the second pad are respectively filled in the first through holes and the second through hole. The first pads are continuously extending from the top surface of the substrate to the bottom surface of the substrate along the sidewalls of the first through holes. The second pad is continuously extending from the top surface of the substrate to the bottom surface of the substrate along the sidewall of the second through hole. The light emitting diodes are disposed on the top surface of the substrate. Each light emitting diode is electrically connected to the second pad and a corresponding first pad.

Description

Display device

The present invention relates to a display device.

LED is an electroluminescent semiconductor element with advantages such as high efficiency, long life, not easy to damage, fast response speed, high reliability, etc. With a lot of time and money invested, the size of LED is getting smaller year by year. However, it is still difficult to use LED in the pixel structure of light-emitting device, especially in light-emitting device with red sub-pixel, green sub-pixel and blue sub-pixel in a single pixel. The size of a single sub-pixel is very small. Whether it is manufacturing LED that meets the small sub-pixel or transferring the LED, there is a problem of low process yield.

The present invention provides a display device which can improve the problem that the LED packaging structure is easily damaged during the manufacturing process.

At least one embodiment of the present invention provides a display device. The display device includes a light-emitting diode package structure. The light-emitting diode package structure includes a substrate, a plurality of first pads, a second pad, and a plurality of light-emitting diodes. The substrate includes a plurality of first through holes and a second through hole. The first pad is filled in the first through hole. The first pad extends continuously from the top surface of the substrate along the side wall of the first through hole to the bottom surface of the substrate. The angle between the first pad on the side wall of the first through hole and the bottom surface of the substrate is an acute angle. The second pad is filled in the second through hole. The second pad extends continuously from the top surface of the substrate along the side wall of the second through hole to the bottom surface of the substrate. The angle between the second pad on the side wall of the second through hole and the bottom surface of the substrate is an acute angle. The light emitting diodes are arranged on the top surface of the substrate. Each light emitting diode is electrically connected to the second pad and the corresponding first pad.

At least one embodiment of the present invention provides a display device. The display device includes a light-emitting diode package structure and a thin film transistor substrate. The light-emitting diode package structure includes a substrate, a plurality of pads and a plurality of light-emitting diodes. The substrate includes a plurality of through holes. The pads are filled in the through holes. At least one of the pads extends continuously from the top surface of the substrate along the side wall of at least one of the through holes to the bottom surface of the substrate. The angle between at least one of the pads on the side wall of at least one of the through holes and the bottom surface of the substrate is an acute angle. The light-emitting diode is arranged on the top surface of the substrate. Each light-emitting diode is electrically connected to a corresponding pad. The pads of the light-emitting diode package structure are electrically connected to the thin film transistor substrate.

FIG. 1A to FIG. 4A are cross-sectional schematic diagrams of a manufacturing method of a light-emitting diode package structure according to a comparative set of the present invention. FIG. 1B to FIG. 4B are top schematic diagrams of the manufacturing method of the light-emitting diode package structure of FIG. 1A to FIG. 4A, respectively, wherein FIG. 1A to FIG. 4A correspond to the position of the line A-A' in FIG. 1B to FIG. 4B. Referring to FIG. 1A and FIG. 1B, a carrier 100 is provided, and a peeling layer 110 is formed on the carrier 100.

A protective layer 120 may be optionally formed on the release layer 110. A plurality of first pads 212 and second pads 214 are formed on the protective layer 120. The first pads 212 and the second pads 214 are separated from each other. The method of forming the first pads 212 and the second pads 214 includes: first, depositing a first conductive layer on the protective layer 120 over the entire surface. Then, patterning the first conductive layer through a lithography process and an etching process to form the first pads 212 and the second pads 214. In the control group, the length L1 and the width W1 of the first pad 212 and the length L2 and the width W2 of the second pad 214 are all 45 microns.

2A and 2B, a substrate 220 is formed on the protective layer 120. The substrate 220 has a plurality of first through holes 222 and second through holes 224. The first through holes 222 overlap with a corresponding first pad 212, and the second through holes 224 overlap with a corresponding second pad 214. In the control group, the size SZ of the first through hole 222 and the size SZ of the second through hole 224 are both 20 microns.

In the control group, the width of the bottom surface of each of the first pad 212 and the second pad 214 is slightly larger than the width of the top surface. In other words, the first pad 212 and the second pad 214 both have a structure that is wide at the bottom and narrow at the top. The angle θ1 between the side wall 212s of the first pad 212 and the bottom surface 220b of the substrate 220 is a blunt angle, and the angle between the side wall (not shown in FIG. 2A ) of the second pad 214 and the bottom surface 220b of the substrate 220 is a blunt angle.

In the control group, the first pad 212 and the second pad 214 are located at the bottom of the first through hole 222 and the second through hole 224 respectively, and the first pad 212 and the second pad 214 do not cover the sidewalls of the first through hole 222 and the sidewalls of the second through hole 224 .

In the control group, the distance DT between the plurality of first through holes 222 and the distance DT between the first through hole 222 and the second through hole 224 are greater than or equal to 70 micrometers in order to provide sufficient wiring space between the plurality of first through holes 222 and between the first through hole 222 and the second through hole 224. In the control group, the width SW of the substrate 220 is 175 micrometers in order to provide sufficient wiring space.

3A and 3B , a plurality of first connection lines 232 and second connection lines 234 are formed on the top surface 220t of the substrate 220. The first connection lines 232 are filled into the first through holes 222 and connected to the first pads 212, and the second connection lines 234 are filled into the second through holes 224 and connected to the second pads 212.

The method for forming the first connection line 232 and the second connection line 234 includes: first, depositing the second conductive layer on the entire top surface 220t of the substrate 220, the second conductive layer filling the first through hole 222 and the second through hole 224, and contacting the first pad 212 and the second pad 214. Then, patterning the second conductive layer through a lithography process and an etching process to form the first connection line 232 and the second connection line 234.

In the control group, when the second conductive layer is deposited, the second conductive layer is directly deposited on the first pad 212 and the second pad 214, so stress is easily generated between different conductive layers. The stress is easy to cause the second conductive layer to peel off, and cause the second conductive layer to be partially separated from the side wall of the first through hole 222 and/or the side wall of the second through hole 224. When there is a gap or crack (not shown) between the second conductive layer and the side wall of the first through hole 222 and/or the side wall of the second through hole 224, the etching liquid used when patterning the second conductive layer is easy to penetrate into the gap or crack, thereby causing the first connecting line 232 and/or the second connecting line 234 formed subsequently to peel off.

4A and 4B , a plurality of light emitting diodes 240 are disposed on the top surface 220t of the substrate 220. In the control group, the light emitting diode 240 includes a semiconductor stacking layer 246 and a first electrode 242 and a second electrode 244 formed on the semiconductor stacking layer 246. The semiconductor stacking layer 246 includes, for example, a stacking layer of an N-type semiconductor and a P-type semiconductor. For example, a light emitting layer is further included between the N-type semiconductor and the P-type semiconductor. The first electrode 242 and the second electrode 244 are located on the same side of the LED 240 , and each LED 240 is flip-chip bonded to the corresponding first connection line 232 and the second connection line 234 , and is electrically connected to the corresponding first pad 212 and the second pad 214 through the corresponding first connection line 232 and the second connection line 234 .

In the control group, each LED package structure 10 may include a plurality of LEDs 240 of different colors.

The light shielding layer 250 is formed on the top surface 220t of the substrate 220. The light shielding layer 250 can be filled in the first through hole 222 and the second through hole 224. The light shielding layer 250 has a plurality of openings 252, and each opening 252 overlaps a corresponding light emitting diode 240.

In some embodiments, after the light shielding layer 250 is formed, a packaging material (not shown) is formed on the light shielding layer 250 and the light emitting diode 240 . The packaging material covers the light emitting diode 240 .

5 to 7 are cross-sectional schematic diagrams of a manufacturing method of a display device according to a comparative set of the present invention. Referring to FIG5, following the steps of FIG4A and FIG4B, the peeling layer 110 is removed by a wet etching process, thereby removing the carrier 100. The protective layer 120 can protect the first pad 212 and the second pad 214 in the aforementioned wet etching process, thereby preventing the first pad 212 and the second pad 214 from being damaged in the aforementioned wet etching process.

In some embodiments, before removing the carrier 100, a supporting film (not shown) is attached to the side of the LED package structure 10 that faces away from the carrier 100. For example, the supporting film is attached to the packaging material covering the LED 240.

6 , the protective layer 120 is removed by a wet etching process or a dry etching process. In some embodiments, a plurality of LED package structures 10 are formed on the carrier 100 (see FIGS. 1A to 4A ) at the same time, and the plurality of LED package structures 10 are separated by a cutting process.

7 , the first pad 212 and the second pad 214 of the LED package structure 10 are bonded to the pad 410 of the thin film transistor substrate 400 via the conductive connection structure 300. Thus, the display device 1 is substantially completed.

In the control group, the first through hole 212 and the second through hole 214 have a structure of being wide at the top and narrow at the bottom. The contact area between the first pad 212 and the conductive connection structure 300 is larger than the bottom area of the first through hole 222, and the contact area between the second pad 214 and the conductive connection structure 300 is larger than the bottom area of the second through hole 224.

Figures 8A to 11A are cross-sectional schematic diagrams of a method for manufacturing a light-emitting diode package structure according to an embodiment of the present invention. Figures 8B to 11B are top schematic diagrams of the method for manufacturing the light-emitting diode package structure of Figures 8A to 11A, respectively, wherein Figures 8A to 11A correspond to the position of the line A-A' in Figures 8B to 11B.

8A and 8B , a carrier 100 is provided, and a peeling layer 110 is formed on the carrier 100. In some embodiments, the carrier 100 is a hard carrier, and its material is, for example, glass, semiconductor, metal or other suitable materials. In some embodiments, the material of the peeling layer 110 includes, for example, polyimide resin or other suitable materials.

A substrate 220 is formed on the peeling layer 110. The substrate 220 has a plurality of first through holes 222 and a second through hole 224. In some embodiments, the material of the substrate 220 includes, for example, polyimide (PI), silicon nitride (SiNx), silicon oxide (SiOx) or other insulating materials. In some embodiments, the substrate 220 includes a cured photoresist material, and the method of forming the first through hole 222 and the second through hole 224 includes a lithography process. In some embodiments, the size SZ of the first through hole 222 and the size SZ of the second through hole 224 are both 20 microns to 30 microns. In some embodiments, the substrate 220 and the peeling layer 110 include different types of polyimide.

In some embodiments, a protective layer (not shown) may be optionally formed on the peeling layer 110, and the substrate 220 is formed on the protective layer.

9A and 9B , a plurality of first pads 212 and second pads 214 are formed on a substrate 220 . The first pads 212 and the second pads 214 are separated from each other. The first pads 212 are filled into the first through holes 222 , and the second pads 214 are filled into the second through holes 224 .

In some embodiments, the method of forming the first pad 212 and the second pad 214 includes: first, depositing a first conductive layer on the entire surface of the substrate 220, and filling the first through hole 222 and the second through hole 224 with the first conductive layer. Then, patterning the first conductive layer through a lithography process and an etching process to form the first pad 212 and the second pad 214.

In this embodiment, there is no other conductive layer below the first pad 212 and below the second pad 214. The first pad 212 extends continuously from the top surface 220t of the substrate 220 along the side wall 222s of the first through hole 222 to the bottom surface 220b of the substrate 220, and the second pad 214 extends continuously from the top surface 220t of the substrate 220 along the side wall 224s of the second through hole 224 to the bottom surface 220b of the substrate 220. Based on this, the problem of the two conductive layers contacting each other and generating stress as in the control group of FIG. 3A will not occur, thereby avoiding the problem of the first pad 212 and the second pad 214 being peeled off.

In the present embodiment, the angle θ1 between the first pad 212 on the side wall 222s of the first through hole 222 and the bottom surface 220b of the substrate 220 is an acute angle, and the angle θ2 between the second pad 214 on the side wall 224s of the second through hole 224 and the bottom surface 220b of the substrate 220 is an acute angle. In some embodiments, the angle θ1 and the angle θ2 are 0 degrees to 90 degrees. In the present embodiment, the bottommost surface of the first pad 212 and the bottommost surface of the second pad 214 are aligned with the bottom surface 220b of the substrate 220.

In this embodiment, three first pads 212 are arranged in a row, so the wiring space required between the first pad 212 and the second pad 214 can be saved, thereby reducing the size of the LED package structure. In some embodiments, the distance DT between the plurality of first through holes 222 and the distance DT between the first through hole 222 and the second through hole 224 is 30 microns to 35 microns.

In some embodiments, the length L1 and width W1 of the first pad 212 are both 40 μm to 45 μm. The length L2 of the second pad 214 is greater than the width W2. In some embodiments, the length L2 of the second pad 214 is 100 μm to 120 μm, and the width W2 is 40 μm to 45 μm. In some embodiments, the width SW of the substrate 220 is 140 μm to 145 μm.

10A and 10B, a plurality of light-emitting diodes 240 are disposed on the top surface 220t of the substrate 220. In the present embodiment, the light-emitting diode 240 includes a semiconductor stacking layer 246 and a first electrode 242 and a second electrode 244 formed on the semiconductor stacking layer 246. The semiconductor stacking layer 246, for example, includes a stacking layer of an N-type semiconductor and a P-type semiconductor. For example, a light-emitting layer is further included between the N-type semiconductor and the P-type semiconductor. The first electrode 242 and the second electrode 244 are located on the same side of the light-emitting diode 240. One of the first electrode 242 and the second electrode 244 is connected to the N-type semiconductor, and the other is connected to the P-type semiconductor. Each LED 240 is flip-chip bonded to the corresponding first pad 212 and the second pad 214, wherein the first electrode 242 is electrically connected to the corresponding first pad 212, and the second electrode 214 is electrically connected to the second pad 244. In this embodiment, the LED 240 is a horizontal LED.

In this embodiment, each LED package structure may include a plurality of LEDs 240 of different colors.

11A and 11B , a light shielding layer 250 is formed on the top surface 220t of the substrate 220. The light shielding layer 250 can be filled into the first through hole 222 and the second through hole 224. The light shielding layer 250 has a plurality of openings 252, and each opening 252 overlaps a corresponding LED 240. At this point, the LED package structure 20 is substantially completed.

In some embodiments, after the light shielding layer 250 is formed, a packaging material (not shown) is formed on the light shielding layer 250 and the light emitting diode 240 . The packaging material covers the light emitting diode 240 .

FIG. 12 and FIG. 13 are cross-sectional schematic diagrams of a manufacturing method of a display device according to a comparative set of the present invention. Referring to FIG. 12 , following the steps of FIG. 11A and FIG. 11B , the peeling layer 110 is removed by a wet etching process, thereby removing the carrier 100. In some embodiments, the material of the peeling layer 110 is polyimide resin, and an amine compound is used to remove the peeling layer 110. Since the amine compound is not easy to cause damage to the metal, it is not necessary to form a protective layer between the peeling layer 110 and the first pad 212 and between the peeling layer 110 and the second pad 214.

In some embodiments, before removing the carrier 100, a support film (not shown) is attached to the side of the LED package structure 20 facing away from the carrier 100. For example, the support film is attached to the packaging material covering the LED 240. In some embodiments, a plurality of LED package structures 20 are formed on the carrier 100 (see FIGS. 8A to 11A ) at the same time, and the plurality of LED package structures 20 are separated by a cutting process.

13 , the first pad 212 and the second pad 214 of the LED package structure 20 are bonded to the pad 410 of the thin film transistor substrate 400 through the conductive connection structure 300. The first pad 212 and the second pad 214 are electrically connected to the thin film transistor substrate 400. At this point, the display device 2 is substantially completed.

In some embodiments, the conductive connection structure 300 is a solder ball, other soldering materials, conductive glue, or other materials that can be used for electrical conduction and bonding.

In some embodiments, the thin film transistor substrate 400 includes a plurality of thin film transistors (not shown) and a common signal line. Each first pad 212 is electrically connected to a different thin film transistor, and the second pad 214 is electrically connected to the common signal line. In some embodiments, a plurality of light emitting diode package structures 20 are bonded to the thin film transistor substrate 400, and the number of light emitting diode package structures 20 can be adjusted according to actual needs.

In this embodiment, the first through hole 212 and the second through hole 214 have a structure of being wide at the top and narrow at the bottom. The contact area between the first pad 212 and the conductive connection structure 300 is equal to the bottom area of the first through hole 222, and the contact area between the second pad 214 and the conductive connection structure 300 is equal to the bottom area of the second through hole 224.

Figures 14A to 16A are cross-sectional schematic diagrams of a method for manufacturing a light-emitting diode package structure according to an embodiment of the present invention. Figures 14B to 16B are top schematic diagrams of the method for manufacturing the light-emitting diode package structure of Figures 14A to 16A, respectively, wherein Figures 14A to 16A correspond to the position of the line A-A' in Figures 14B to 16B.

It should be noted that the embodiment of FIG. 14A to FIG. 16B uses the component numbers and part of the content of the embodiment of FIG. 8A to FIG. 11B, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical content is omitted. The description of the omitted parts can refer to the aforementioned embodiment, and will not be repeated here.

Referring to FIG. 14A and FIG. 14B , a plurality of light emitting diodes 240V are disposed on the top surface 220t of the substrate 220. In the present embodiment, the light emitting diodes 240V lie horizontally on the top surface 220t of the substrate 220. In the present embodiment, the first electrode 242, the semiconductor stack layer 246, and the second electrode 244 are sequentially arranged along a first direction D1, and the first direction D1 is perpendicular to the normal direction ND of the top surface 220t of the substrate 220. In some embodiments, the light emitting diodes 240V are connected to the top surface 220t of the substrate 220 through an adhesive layer (not shown).

In the present embodiment, the light-emitting diode 240V includes a semiconductor stacking layer 246 and a first electrode 242 and a second electrode 244 formed on the semiconductor stacking layer 246. The semiconductor stacking layer 246, for example, includes a stacking layer of an N-type semiconductor and a P-type semiconductor. For example, a light-emitting layer is also included between the N-type semiconductor and the P-type semiconductor. The first electrode 242 and the second electrode 244 are respectively located on opposite sides of the light-emitting diode 240V. One of the first electrode 242 and the second electrode 244 is connected to the N-type semiconductor, and the other is connected to the P-type semiconductor. In the present embodiment, the light-emitting diode 240V is a vertical light-emitting diode. In this embodiment, each LED package structure may include a plurality of LEDs 240V of different colors.

15A and 15B , a plurality of first pads 212 and second pads 214 are formed on the substrate 220 and the light emitting diode 240V. The first pads 212 and the second pads 214 are separated from each other. The first pads 212 are filled into the first through holes 222 , and the second pads 214 are filled into the second through holes 224 .

In this embodiment, the first pad 212 extends from the first electrode 242 to the substrate 220, and the first pad 212 covers the first electrode 242. In some embodiments, part of the first pad 212 further extends to the semiconductor stacking layer 246. In FIG15A, the upper surface and the side surface of the first electrode 242 (the side surface of the first electrode 242 on the right side in FIG15A) are both covered by the first pad 212. In addition, although FIG15A does not show it, the front surface and the rear surface (the two surfaces parallel to the paper surface of FIG15A) of the first electrode 242 are also covered by the first pad 212.

In this embodiment, the second pad 214 extends from the second electrode 244 to the substrate 220, and the second pad 214 covers the second electrode 244. In some embodiments, part of the second pad 214 further extends to the semiconductor stacking layer 246. In FIG15A, the upper surface and the side surface of the second electrode 244 (the side surface of the second electrode 244 on the left side in FIG15A) are both covered by the second pad 214. In addition, although FIG15A does not show it, the front surface and the rear surface (the two surfaces parallel to the paper surface of FIG15A) of the second electrode 244 are also covered by the second pad 214.

In some embodiments, the method of forming the first pad 212 and the second pad 214 includes: first, depositing a first conductive layer on the substrate 220 and the light-emitting diode 240V, and filling the first through hole 222 and the second through hole 224. Then, patterning the first conductive layer through a lithography process and an etching process to form the first pad 212 and the second pad 214.

16A and 16B, a light shielding layer 250 is formed on the top surface 220t of the substrate 220. The light shielding layer 250 can be filled into the first through hole 222 and the second through hole 224. The light shielding layer 250 has a plurality of openings 252, and each opening 252 overlaps a corresponding LED 240. At this point, the LED package structure 30 is substantially completed.

In some embodiments, after the light shielding layer 250 is formed, a packaging material (not shown) is formed on the light shielding layer 250 and the light emitting diode 240 . The packaging material covers the light emitting diode 240 .

17 and 18 are cross-sectional views of a manufacturing method of a display device according to a comparative set of the present invention. Referring to FIG17 , following the steps of FIG16A and FIG16B , the release layer 110 is removed by a wet etching process, thereby removing the carrier 100 .

In some embodiments, before removing the carrier 100, a support film (not shown) is attached to the side of the LED package structure 30 facing away from the carrier 100. For example, the support film is attached to the packaging material covering the LED 240. In some embodiments, a plurality of LED package structures 30 are formed on the carrier 100 (see FIGS. 14A to 16A ) at the same time, and the plurality of LED package structures 30 are separated by a cutting process.

18 , the first pad 212 and the second pad 214 of the LED package structure 30 are bonded to the pad 410 of the thin film transistor substrate 400 through the conductive connection structure 300. The first pad 212 and the second pad 214 are electrically connected to the thin film transistor substrate 400. Thus, the display device 3 is substantially completed.

In summary, in the LED package structure of the present invention, the pad extends continuously from the top surface of the substrate along the side wall of the through hole to the bottom surface of the substrate, thereby improving the problem that the LED package structure is easily damaged during the manufacturing process.

1,2,3: display device 10,20,30: LED package structure 100: carrier 110: peeling layer 120: protective layer 212: first pad 212s,222s,224s: sidewall 214: second pad 220: substrate 220b: bottom surface 220t: top surface 222: first through hole 224: second through hole 232: first connection line 234: second connection line 240,240V: LED 242: first electrode 244: second electrode 246: semiconductor stacking layer 250: light shielding layer 252: opening 300: conductive connection structure 400: thin film transistor substrate 410: pad D1: first direction DT: distance L1, L2: length ND: normal direction SW, W1, W2: width SZ: size θ1, θ2: angle

Figures 1A to 4A are schematic cross-sectional views of a method for manufacturing a light-emitting diode package structure according to a comparison group of the present invention. Figures 1B to 4B are respectively schematic top views of the method for manufacturing the light-emitting diode package structure of Figures 1A to 4A. Figures 5 to 7 are schematic cross-sectional views of a method for manufacturing a display device according to a comparison group of the present invention. Figures 8A to 11A are schematic cross-sectional views of a method for manufacturing a light-emitting diode package structure according to an embodiment of the present invention. Figures 8B to 11B are respectively schematic top views of the method for manufacturing the light-emitting diode package structure of Figures 8A to 11A. Figures 12 to 13 are schematic cross-sectional views of a method for manufacturing a display device according to a comparison group of the present invention. FIG. 14B to FIG. 16B are top views of the manufacturing method of the LED package structure of FIG. 14A to FIG. 16A, respectively. FIG. 17 to FIG. 18 are cross-sectional views of a manufacturing method of a display device according to a control group of the present invention.

2: Display device

20: LED packaging structure

212: First pad

214: Second pad

220: Substrate

222: First through hole

224: Second through hole

240: LED

242: First electrode

244: Second electrode

246: On the semiconductor stacking layer

250: Shading layer

300: Conductive connection structure

400: Thin film transistor substrate

410:Pad

Claims (15)

A display device, comprising: A light-emitting diode package structure, comprising: A substrate, comprising a plurality of first through holes and a second through hole; A plurality of first pads, filled in the first through holes, wherein the first pads extend continuously from the top surface of the substrate along the side walls of the first through holes to the bottom surface of the substrate, wherein the angle between the first pads on the side walls of the first through holes and the bottom surface of the substrate is an acute angle; A second pad, filled in the second through hole, wherein the second pad extends continuously from the top surface of the substrate along the side walls of the second through hole to the bottom surface of the substrate, wherein the angle between the second pad on the side walls of the second through hole and the bottom surface of the substrate is an acute angle; and A plurality of light-emitting diodes are disposed on the top surface of the substrate, wherein each of the light-emitting diodes is electrically connected to the second pad and the corresponding first pad. The display device as described in claim 1 further comprises: A thin film transistor substrate, wherein the first pads and the second pads of the light-emitting diode package structure are electrically connected to the thin film transistor substrate. A display device as described in claim 2, wherein the first pads are electrically connected to the thin film transistor substrate through a plurality of conductive connection structures, and wherein the first through holes have a structure that is wide at the top and narrow at the bottom, and the contact area between the first pads and the conductive connection structures is equal to the bottom area of the first through holes. The display device as described in claim 1, wherein the light-emitting diode package structure includes three first pads, and the first pads are arranged in a row. The display device as described in claim 1 further includes: A light shielding layer filling the first through holes and the second through holes. A display device as described in claim 1, wherein the distance between adjacent first through holes is 30 microns to 35 microns. A display device as described in claim 1, wherein the bottom surfaces of the first pads and the bottom surface of the second pad are aligned with the bottom surface of the substrate. A display device as described in claim 1, wherein each of the light-emitting diodes includes a semiconductor stacking layer and a first electrode and a second electrode located on the semiconductor stacking layer, the first electrode and the second electrode are located on the same side of the light-emitting diode, and wherein the first electrode is electrically connected to the corresponding first pad, and the second electrode is electrically connected to the second pad. A display device as described in claim 1, wherein each of the light-emitting diodes includes a semiconductor stacking layer and a first electrode and a second electrode located on the semiconductor stacking layer, the first electrode and the second electrode are respectively located on opposite sides of the light-emitting diode, and wherein the first electrode is electrically connected to the corresponding first pad, and the second electrode is electrically connected to the second pad. A display device as described in claim 9, wherein the first electrode is formed on the semiconductor stack layer and covered by the corresponding first pad, and the second electrode is formed on the semiconductor stack layer and covered by the second pad. A display device as described in claim 9, wherein the first electrode, the semiconductor stack layer and the second electrode are arranged in sequence along a first direction, and the first direction is perpendicular to the normal direction of the top surface of the substrate. A display device, comprising: A light-emitting diode package structure, comprising: A substrate, comprising a plurality of through holes; A plurality of pads, filled in the through holes, wherein at least one of the pads extends continuously from the top surface of the substrate along the side wall of at least one of the through holes to the bottom surface of the substrate, wherein the angle between at least one of the pads on the side wall of at least one of the through holes and the bottom surface of the substrate is an acute angle; and A plurality of light-emitting diodes, arranged on the top surface of the substrate, wherein each of the light-emitting diodes is electrically connected to the corresponding pads; and A thin film transistor substrate, wherein the pads of the light-emitting diode package structure are electrically connected to the thin film transistor substrate. A display device as described in claim 12, wherein each of the light-emitting diodes includes a semiconductor stacking layer and two electrodes located on the semiconductor stacking layer, the two electrodes are located on opposite sides of the light-emitting diode, and the two electrodes are electrically connected to the corresponding pads. A display device as described in claim 13, wherein the two electrodes are formed on the semiconductor stack layer and covered by the corresponding pads. A display device as described in claim 13, wherein the semiconductor stack layer is located between the two electrodes in a first direction, and the first direction is perpendicular to the normal direction of the top surface of the substrate.

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