TWI837993B - Display device - Google Patents

Display device Download PDF

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TWI837993B
TWI837993B TW111146902A TW111146902A TWI837993B TW I837993 B TWI837993 B TW I837993B TW 111146902 A TW111146902 A TW 111146902A TW 111146902 A TW111146902 A TW 111146902A TW I837993 B TWI837993 B TW I837993B
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substrate
pad
pads
light
electrode
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TW111146902A
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TW202425348A (en
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詹之筑
孫碩陽
謝昊倫
李嘯澐
張于浩
陳富揚
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友達光電股份有限公司
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Priority to CN202310440867.8A priority patent/CN116487376A/en
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Publication of TW202425348A publication Critical patent/TW202425348A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

A display device includes a light emitting diode package structure. The light emitting diode package structure includes a substrate, first pads, a second pad and light emitting diodes. The substrate includes first through holes and a second through hole. The first pads and the second pad are respectively filled in the first through holes and the second through hole. The first pads are continuously extending from the top surface of the substrate to the bottom surface of the substrate along the sidewalls of the first through holes. The second pad is continuously extending from the top surface of the substrate to the bottom surface of the substrate along the sidewall of the second through hole. The light emitting diodes are disposed on the top surface of the substrate. Each light emitting diode is electrically connected to the second pad and a corresponding first pad.

Description

顯示裝置Display device

本發明是有關於一種顯示裝置。The present invention relates to a display device.

發光二極體是一種電致發光的半導體元件,具有效率高、壽命長、不易破損、反應速度快、可靠性高等優點。隨著大量的時間與金錢的投入,發光二極體的尺寸逐年縮小,然而,要將發光二極體使用於發光裝置的畫素結構中仍有困難,尤其是在單個畫素就具有紅色子畫素、綠色子畫素及藍色子畫素的發光裝置中,單個子畫素的尺寸很小,不論是在製造符合小尺寸子畫素的發光二極體或是在轉移所述發光二極體時都有製程良率低的問題。LED is an electroluminescent semiconductor element with advantages such as high efficiency, long life, not easy to damage, fast response speed, high reliability, etc. With a lot of time and money invested, the size of LED is getting smaller year by year. However, it is still difficult to use LED in the pixel structure of light-emitting device, especially in light-emitting device with red sub-pixel, green sub-pixel and blue sub-pixel in a single pixel. The size of a single sub-pixel is very small. Whether it is manufacturing LED that meets the small sub-pixel or transferring the LED, there is a problem of low process yield.

本發明提供一種顯示裝置,能改善發光二極體封裝結構容易在製程中受損的問題。The present invention provides a display device which can improve the problem that the LED packaging structure is easily damaged during the manufacturing process.

本發明的至少一實施例提供一種顯示裝置。顯示裝置包括發光二極體封裝結構。發光二極體封裝結構包括基板、多個第一接墊、第二接墊以及多個發光二極體。基板包括多個第一通孔以及第二通孔。第一接墊填入第一通孔中。第一接墊自基板的頂面沿著第一通孔的側壁連續地延伸至基板的底面。第一通孔的側壁上的第一接墊與基板的底面之間的夾角為銳角。第二接墊填入第二通孔中。第二接墊自基板的頂面沿著第二通孔的側壁連續地延伸至基板的底面。在第二通孔的側壁上的第二接墊與基板的底面之間的夾角為銳角。發光二極體設置於基板的頂面上。各發光二極體電性連接至第二接墊以及對應的第一接墊。At least one embodiment of the present invention provides a display device. The display device includes a light-emitting diode package structure. The light-emitting diode package structure includes a substrate, a plurality of first pads, a second pad, and a plurality of light-emitting diodes. The substrate includes a plurality of first through holes and a second through hole. The first pad is filled in the first through hole. The first pad extends continuously from the top surface of the substrate along the side wall of the first through hole to the bottom surface of the substrate. The angle between the first pad on the side wall of the first through hole and the bottom surface of the substrate is an acute angle. The second pad is filled in the second through hole. The second pad extends continuously from the top surface of the substrate along the side wall of the second through hole to the bottom surface of the substrate. The angle between the second pad on the side wall of the second through hole and the bottom surface of the substrate is an acute angle. The light emitting diodes are arranged on the top surface of the substrate. Each light emitting diode is electrically connected to the second pad and the corresponding first pad.

本發明的至少一實施例提供一種顯示裝置。顯示裝置包括發光二極體封裝結構以及薄膜電晶體基板。發光二極體封裝結構包括基板、多個接墊以及多個發光二極體。基板包括多個通孔。接墊填入通孔中。接墊的至少一者自基板的頂面沿著通孔的至少一者的側壁連續地延伸至基板的底面。在通孔的至少一者的側壁上的接墊的至少一者與基板的底面之間的夾角為銳角。發光二極體設置於基板的頂面上。各發光二極體電性連接至對應的接墊。發光二極體封裝結構的接墊電性連接至薄膜電晶體基板。At least one embodiment of the present invention provides a display device. The display device includes a light-emitting diode package structure and a thin film transistor substrate. The light-emitting diode package structure includes a substrate, a plurality of pads and a plurality of light-emitting diodes. The substrate includes a plurality of through holes. The pads are filled in the through holes. At least one of the pads extends continuously from the top surface of the substrate along the side wall of at least one of the through holes to the bottom surface of the substrate. The angle between at least one of the pads on the side wall of at least one of the through holes and the bottom surface of the substrate is an acute angle. The light-emitting diode is arranged on the top surface of the substrate. Each light-emitting diode is electrically connected to a corresponding pad. The pads of the light-emitting diode package structure are electrically connected to the thin film transistor substrate.

圖1A至圖4A是依照本發明的一對照組的一種發光二極體封裝結構的製造方法的剖面示意圖。圖1B至圖4B分別是圖1A至圖4A的發光二極體封裝結構的製造方法的上視示意圖,其中圖1A至圖4A對應了圖1B至圖4B中線A-A’的位置。請參考圖1A與圖1B,提供載板100,並於載板100上形成剝離層110。FIG. 1A to FIG. 4A are cross-sectional schematic diagrams of a manufacturing method of a light-emitting diode package structure according to a comparative set of the present invention. FIG. 1B to FIG. 4B are top schematic diagrams of the manufacturing method of the light-emitting diode package structure of FIG. 1A to FIG. 4A, respectively, wherein FIG. 1A to FIG. 4A correspond to the position of the line A-A' in FIG. 1B to FIG. 4B. Referring to FIG. 1A and FIG. 1B, a carrier 100 is provided, and a peeling layer 110 is formed on the carrier 100.

可選擇地形成保護層120於剝離層110上。形成多個第一接墊212以及第二接墊214於保護層120上。第一接墊212以及第二接墊214彼此分離。形成第一接墊212以及第二接墊214的方法包括:首先,整面地沉積第一導電層於保護層120上。接著,透過微影製程以及蝕刻製程而圖案化前述第一導電層,以形成第一接墊212以及第二接墊214。在對照組中,第一接墊212的長度L1與寬度W1以及第二接墊214的長度L2與寬度W2皆為45微米。A protective layer 120 may be optionally formed on the release layer 110. A plurality of first pads 212 and second pads 214 are formed on the protective layer 120. The first pads 212 and the second pads 214 are separated from each other. The method of forming the first pads 212 and the second pads 214 includes: first, depositing a first conductive layer on the protective layer 120 over the entire surface. Then, patterning the first conductive layer through a lithography process and an etching process to form the first pads 212 and the second pads 214. In the control group, the length L1 and the width W1 of the first pad 212 and the length L2 and the width W2 of the second pad 214 are all 45 microns.

請參考圖2A與圖2B,形成基板220於保護層120上。基板220具有多個第一通孔222以及第二通孔224。第一通孔222分別重疊於對應的一個第一接墊212,且第二通孔224重疊於對應的一個第二接墊214。在對照組中,第一通孔222的尺寸SZ以及第二通孔224的尺寸SZ皆為20微米。2A and 2B, a substrate 220 is formed on the protective layer 120. The substrate 220 has a plurality of first through holes 222 and second through holes 224. The first through holes 222 overlap with a corresponding first pad 212, and the second through holes 224 overlap with a corresponding second pad 214. In the control group, the size SZ of the first through hole 222 and the size SZ of the second through hole 224 are both 20 microns.

在對照組中,第一接墊212以及第二接墊214各自的底面的寬度略大於頂面的寬度,換句話說第一接墊212以及第二接墊214皆具有下寬上窄的結構。第一接墊212的側壁212s與基板220的底面220b之間的夾角θ1為鈍角,且第二接墊214的側壁(圖2A未繪出)與基板220的底面220b之間的夾角為鈍角。In the control group, the width of the bottom surface of each of the first pad 212 and the second pad 214 is slightly larger than the width of the top surface. In other words, the first pad 212 and the second pad 214 both have a structure that is wide at the bottom and narrow at the top. The angle θ1 between the side wall 212s of the first pad 212 and the bottom surface 220b of the substrate 220 is a blunt angle, and the angle between the side wall (not shown in FIG. 2A ) of the second pad 214 and the bottom surface 220b of the substrate 220 is a blunt angle.

在對照組中,第一接墊212與第二接墊214分別位於第一通孔222以及第二通孔224的底部,且第一接墊212與第二接墊214並未覆蓋第一通孔222的側壁以及第二通孔224的側壁。In the control group, the first pad 212 and the second pad 214 are located at the bottom of the first through hole 222 and the second through hole 224 respectively, and the first pad 212 and the second pad 214 do not cover the sidewalls of the first through hole 222 and the sidewalls of the second through hole 224 .

在對照組中,為了使多個第一通孔222之間及第一通孔222與第二通孔224之間有足夠的佈線空間,多個第一通孔222之間的距離DT以及第一通孔222與第二通孔224之間的距離DT大於或等於70微米。在對照組中,為了提供足夠的佈線空間,基板220的寬度SW為175微米。In the control group, the distance DT between the plurality of first through holes 222 and the distance DT between the first through hole 222 and the second through hole 224 are greater than or equal to 70 micrometers in order to provide sufficient wiring space between the plurality of first through holes 222 and between the first through hole 222 and the second through hole 224. In the control group, the width SW of the substrate 220 is 175 micrometers in order to provide sufficient wiring space.

請參考圖3A與圖3B,形成多個第一連接線232以及第二連接線234於基板220的頂面220t上。第一連接線232填入第一通孔222並連接至第一接墊212,且第二連接線234填入第二通孔224並連接至第二接墊212。3A and 3B , a plurality of first connection lines 232 and second connection lines 234 are formed on the top surface 220t of the substrate 220. The first connection lines 232 are filled into the first through holes 222 and connected to the first pads 212, and the second connection lines 234 are filled into the second through holes 224 and connected to the second pads 212.

形成第一連接線232以及第二連接線234的方法包括:首先,整面地沉積第二導電層於基板220的頂面220t上,前述第二導電層填入第一通孔222中與第二通孔224中,並接觸第一接墊212與第二接墊214。接著,透過微影製程以及蝕刻製程而圖案化前述第二導電層,以形成第一連接線232以及第二連接線234。The method for forming the first connection line 232 and the second connection line 234 includes: first, depositing the second conductive layer on the entire top surface 220t of the substrate 220, the second conductive layer filling the first through hole 222 and the second through hole 224, and contacting the first pad 212 and the second pad 214. Then, patterning the second conductive layer through a lithography process and an etching process to form the first connection line 232 and the second connection line 234.

在對照組中,在沉積前述第二導電層時,第二導電層直接沉積於第一接墊212與第二接墊214上,因此容易在不同導電層之間產生應力。前述應力容易導致第二導電層剝離,並導致第二導電層部分分離於第一通孔222的側壁及/或第二通孔224的側壁。當第二導電層與第一通孔222的側壁及/或第二通孔224的側壁之間具有間隙或裂縫(未繪出)時,圖案化第二導電層時所使用的蝕刻液容易滲入前述間隙或裂縫,進而導致後續所形成的第一連接線232及/或第二連接線234出現剝離的問題。In the control group, when the second conductive layer is deposited, the second conductive layer is directly deposited on the first pad 212 and the second pad 214, so stress is easily generated between different conductive layers. The stress is easy to cause the second conductive layer to peel off, and cause the second conductive layer to be partially separated from the side wall of the first through hole 222 and/or the side wall of the second through hole 224. When there is a gap or crack (not shown) between the second conductive layer and the side wall of the first through hole 222 and/or the side wall of the second through hole 224, the etching liquid used when patterning the second conductive layer is easy to penetrate into the gap or crack, thereby causing the first connecting line 232 and/or the second connecting line 234 formed subsequently to peel off.

請參考圖4A與圖4B,將多個發光二極體240設置於基板220的頂面220t上。在對照組中,發光二極體240包括半導體堆疊層246以及形成於半導體堆疊層246上的第一電極242與第二電極244。半導體堆疊層246例如包括N型半導體以及P型半導體的堆疊層。N型半導體以及P型半導體之間例如還包括發光層。第一電極242與第二電極244位於發光二極體240的同一側,且每個發光二極體240以覆晶的方式接合至對應的第一連接線232以及第二連接線234,並透過對應的第一連接線232以及第二連接線234而電性連接至對應的第一接墊212以及第二接墊214。4A and 4B , a plurality of light emitting diodes 240 are disposed on the top surface 220t of the substrate 220. In the control group, the light emitting diode 240 includes a semiconductor stacking layer 246 and a first electrode 242 and a second electrode 244 formed on the semiconductor stacking layer 246. The semiconductor stacking layer 246 includes, for example, a stacking layer of an N-type semiconductor and a P-type semiconductor. For example, a light emitting layer is further included between the N-type semiconductor and the P-type semiconductor. The first electrode 242 and the second electrode 244 are located on the same side of the LED 240 , and each LED 240 is flip-chip bonded to the corresponding first connection line 232 and the second connection line 234 , and is electrically connected to the corresponding first pad 212 and the second pad 214 through the corresponding first connection line 232 and the second connection line 234 .

在對照組中,每個發光二極體封裝結構10中可以包括多個不同顏色的發光二極體240。In the control group, each LED package structure 10 may include a plurality of LEDs 240 of different colors.

形成遮光層250於基板220的頂面220t上。遮光層250可以填入第一通孔222與第二通孔224中。遮光層250具有多個開口252,每個開口252重疊於對應的發光二極體240。The light shielding layer 250 is formed on the top surface 220t of the substrate 220. The light shielding layer 250 can be filled in the first through hole 222 and the second through hole 224. The light shielding layer 250 has a plurality of openings 252, and each opening 252 overlaps a corresponding light emitting diode 240.

在一些實施例中,在形成遮光層250之後,於遮光層250以及發光二極體240上形成封裝材料(未繪出)。封裝材料包覆發光二極體240。In some embodiments, after the light shielding layer 250 is formed, a packaging material (not shown) is formed on the light shielding layer 250 and the light emitting diode 240 . The packaging material covers the light emitting diode 240 .

圖5至圖7是依照本發明的一對照組的一種顯示裝置的製造方法的剖面示意圖。請參考圖5,接續圖4A與圖4B的步驟,透過濕蝕刻製程移除剝離層110,藉此將載板100取下。保護層120可以在前述濕蝕刻製程中保護第一接墊212與第二接墊214,藉此避免第一接墊212與第二接墊214在前述濕蝕刻製程中受損。5 to 7 are cross-sectional schematic diagrams of a manufacturing method of a display device according to a comparative set of the present invention. Referring to FIG5, following the steps of FIG4A and FIG4B, the peeling layer 110 is removed by a wet etching process, thereby removing the carrier 100. The protective layer 120 can protect the first pad 212 and the second pad 214 in the aforementioned wet etching process, thereby preventing the first pad 212 and the second pad 214 from being damaged in the aforementioned wet etching process.

在一些實施例中,在將載板100取下前,將支撐膜(未繪出)貼於發光二極體封裝結構10背對載板100的一側。舉例來說,將支撐膜貼於包覆發光二極體240的封裝材料上。In some embodiments, before removing the carrier 100, a supporting film (not shown) is attached to the side of the LED package structure 10 that faces away from the carrier 100. For example, the supporting film is attached to the packaging material covering the LED 240.

請參考圖6,利用濕蝕刻製程或乾蝕刻製程移除保護層120。在一些實施例中,同時於載板100(請參考圖1A至圖4A)上形成多個發光二極體封裝結構10,並藉由切割製程分割多個發光二極體封裝結構10。6 , the protective layer 120 is removed by a wet etching process or a dry etching process. In some embodiments, a plurality of LED package structures 10 are formed on the carrier 100 (see FIGS. 1A to 4A ) at the same time, and the plurality of LED package structures 10 are separated by a cutting process.

請參考圖7,將發光二極體封裝結構10的第一接墊212與第二接墊214透過導電連接結構300而接合至薄膜電晶體基板400的接墊410。至此,大致完成顯示裝置1。7 , the first pad 212 and the second pad 214 of the LED package structure 10 are bonded to the pad 410 of the thin film transistor substrate 400 via the conductive connection structure 300. Thus, the display device 1 is substantially completed.

在對照組中,第一通孔212以及第二通孔214具有上寬下窄的結構。第一接墊212與導電連接結構300之間的接觸面積大於第一通孔222的底面面積,且第二接墊214與導電連接結構300之間的接觸面積大於第二通孔224的底面面積。In the control group, the first through hole 212 and the second through hole 214 have a structure of being wide at the top and narrow at the bottom. The contact area between the first pad 212 and the conductive connection structure 300 is larger than the bottom area of the first through hole 222, and the contact area between the second pad 214 and the conductive connection structure 300 is larger than the bottom area of the second through hole 224.

圖8A至圖11A是依照本發明的一實施例的一種發光二極體封裝結構的製造方法的剖面示意圖。圖8B至圖11B分別是圖8A至圖11A的發光二極體封裝結構的製造方法的上視示意圖,其中圖8A至圖11A對應了圖8B至圖11B中線A-A’的位置。Figures 8A to 11A are cross-sectional schematic diagrams of a method for manufacturing a light-emitting diode package structure according to an embodiment of the present invention. Figures 8B to 11B are top schematic diagrams of the method for manufacturing the light-emitting diode package structure of Figures 8A to 11A, respectively, wherein Figures 8A to 11A correspond to the position of the line A-A' in Figures 8B to 11B.

請參考圖8A與圖8B,提供載板100,並於載板100上形成剝離層110。在一些實施例中,載板100為硬質載板,其材料例如為玻璃、半導體、金屬或其他合適的材料。在一些實施例中,剝離層110的材料例如包括聚醯亞胺樹脂或其他合適的材料。8A and 8B , a carrier 100 is provided, and a peeling layer 110 is formed on the carrier 100. In some embodiments, the carrier 100 is a hard carrier, and its material is, for example, glass, semiconductor, metal or other suitable materials. In some embodiments, the material of the peeling layer 110 includes, for example, polyimide resin or other suitable materials.

形成基板220於剝離層110上。基板220具有多個第一通孔222以及第二通孔224。在一些實施例中,基板220的材料例如包括聚醯亞胺(polyimide,PI)、氮化矽(SiNx)、氧化矽(SiOx)或其他絕緣材料。在一些實施例中,基板220包括固化的光阻材料,且形成第一通孔222以及第二通孔224的方法包括微影製程。在一些實施例中,第一通孔222的尺寸SZ以及第二通孔224的尺寸SZ皆為20微米至30微米。在一些實施例中,基板220與剝離層110包括不同類型的聚醯亞胺。A substrate 220 is formed on the peeling layer 110. The substrate 220 has a plurality of first through holes 222 and a second through hole 224. In some embodiments, the material of the substrate 220 includes, for example, polyimide (PI), silicon nitride (SiNx), silicon oxide (SiOx) or other insulating materials. In some embodiments, the substrate 220 includes a cured photoresist material, and the method of forming the first through hole 222 and the second through hole 224 includes a lithography process. In some embodiments, the size SZ of the first through hole 222 and the size SZ of the second through hole 224 are both 20 microns to 30 microns. In some embodiments, the substrate 220 and the peeling layer 110 include different types of polyimide.

在一些實施例中,可選擇地形成保護層(未繪出)於剝離層110上,且基板220形成保護層上。In some embodiments, a protective layer (not shown) may be optionally formed on the peeling layer 110, and the substrate 220 is formed on the protective layer.

請參考圖9A與圖9B,形成多個第一接墊212以及第二接墊214於基板220上。第一接墊212以及第二接墊214彼此分離。第一接墊212填入第一通孔222中,第二接墊214填入第二通孔224中。9A and 9B , a plurality of first pads 212 and second pads 214 are formed on a substrate 220 . The first pads 212 and the second pads 214 are separated from each other. The first pads 212 are filled into the first through holes 222 , and the second pads 214 are filled into the second through holes 224 .

在一些實施例中,形成第一接墊212以及第二接墊214的方法包括:首先,整面地沉積第一導電層於基板220上,且第一導電層填入第一通孔222中以及第二通孔224中。接著,透過微影製程以及蝕刻製程而圖案化前述第一導電層,以形成第一接墊212以及第二接墊214。In some embodiments, the method of forming the first pad 212 and the second pad 214 includes: first, depositing a first conductive layer on the entire surface of the substrate 220, and filling the first through hole 222 and the second through hole 224 with the first conductive layer. Then, patterning the first conductive layer through a lithography process and an etching process to form the first pad 212 and the second pad 214.

在本實施例中,第一接墊212的下方以及第二接墊214的下方沒有其他導電層,第一接墊212自基板220的頂面220t沿著第一通孔222的側壁222s連續地延伸至基板220的底面220b,且第二接墊214自基板220的頂面220t沿著第二通孔224的側壁224s連續地延伸至基板220的底面220b。基於此,不會出現如圖3A的對照組中的兩層導電層互相接觸而產生應力的問題,藉此避免第一接墊212以及第二接墊214出現剝離的問題。In this embodiment, there is no other conductive layer below the first pad 212 and below the second pad 214. The first pad 212 extends continuously from the top surface 220t of the substrate 220 along the side wall 222s of the first through hole 222 to the bottom surface 220b of the substrate 220, and the second pad 214 extends continuously from the top surface 220t of the substrate 220 along the side wall 224s of the second through hole 224 to the bottom surface 220b of the substrate 220. Based on this, the problem of the two conductive layers contacting each other and generating stress as in the control group of FIG. 3A will not occur, thereby avoiding the problem of the first pad 212 and the second pad 214 being peeled off.

在本實施例中,在第一通孔222的側壁222s上的第一接墊212與基板220的底面220b之間的夾角θ1為銳角,且在第二通孔224的側壁224s上的第二接墊214與基板220的底面220b之間的夾角θ2為銳角。在一些實施例中,夾角θ1與夾角θ2為0度至90度。在本實施例中,第一接墊212的最底面以及第二接墊214的最底面對齊基板220的底面220b。In the present embodiment, the angle θ1 between the first pad 212 on the side wall 222s of the first through hole 222 and the bottom surface 220b of the substrate 220 is an acute angle, and the angle θ2 between the second pad 214 on the side wall 224s of the second through hole 224 and the bottom surface 220b of the substrate 220 is an acute angle. In some embodiments, the angle θ1 and the angle θ2 are 0 degrees to 90 degrees. In the present embodiment, the bottommost surface of the first pad 212 and the bottommost surface of the second pad 214 are aligned with the bottom surface 220b of the substrate 220.

在本實施例中,三個第一接墊212排成一列,因此,可以節省第一接墊212與第二接墊214之間所需的布線空間,進而縮小發光二極體封裝結構的尺寸。在一些實施例中,多個第一通孔222之間的距離DT以及第一通孔222與第二通孔224之間的距離DT為30微米至35微米。In this embodiment, three first pads 212 are arranged in a row, so the wiring space required between the first pad 212 and the second pad 214 can be saved, thereby reducing the size of the LED package structure. In some embodiments, the distance DT between the plurality of first through holes 222 and the distance DT between the first through hole 222 and the second through hole 224 is 30 microns to 35 microns.

在一些實施例中,第一接墊212的長度L1與寬度W1皆為40微米至45微米。第二接墊214的長度L2大於寬度W2。在一些實施例中,第二接墊214的長度L2為100微米至120微米,且寬度W2為40微米至45微米。在一些實施例中,基板220的寬度SW為140微米至145微米。In some embodiments, the length L1 and width W1 of the first pad 212 are both 40 μm to 45 μm. The length L2 of the second pad 214 is greater than the width W2. In some embodiments, the length L2 of the second pad 214 is 100 μm to 120 μm, and the width W2 is 40 μm to 45 μm. In some embodiments, the width SW of the substrate 220 is 140 μm to 145 μm.

請參考圖10A與圖10B,將多個發光二極體240設置於基板220的頂面220t上。在本實施例中,發光二極體240包括半導體堆疊層246以及形成於半導體堆疊層246上的第一電極242與第二電極244。半導體堆疊層246例如包括N型半導體以及P型半導體的堆疊層。N型半導體以及P型半導體之間例如還包括發光層。第一電極242與第二電極244位於發光二極體240的同一側。第一電極242與第二電極244中的一者連接至N型半導體,且另一者連接至P型半導體。每個發光二極體240以覆晶的方式接合至對應的第一接墊212以及第二接墊214,其中第一電極242電性連接至對應的第一接墊212,且第二電極214電性連接至第二接墊244。在本實施例中,發光二極體240為水平式發光二極體。10A and 10B, a plurality of light-emitting diodes 240 are disposed on the top surface 220t of the substrate 220. In the present embodiment, the light-emitting diode 240 includes a semiconductor stacking layer 246 and a first electrode 242 and a second electrode 244 formed on the semiconductor stacking layer 246. The semiconductor stacking layer 246, for example, includes a stacking layer of an N-type semiconductor and a P-type semiconductor. For example, a light-emitting layer is further included between the N-type semiconductor and the P-type semiconductor. The first electrode 242 and the second electrode 244 are located on the same side of the light-emitting diode 240. One of the first electrode 242 and the second electrode 244 is connected to the N-type semiconductor, and the other is connected to the P-type semiconductor. Each LED 240 is flip-chip bonded to the corresponding first pad 212 and the second pad 214, wherein the first electrode 242 is electrically connected to the corresponding first pad 212, and the second electrode 214 is electrically connected to the second pad 244. In this embodiment, the LED 240 is a horizontal LED.

在本實施例中,每個發光二極體封裝結構中可以包括多個不同顏色的發光二極體240。In this embodiment, each LED package structure may include a plurality of LEDs 240 of different colors.

請參考圖11A與圖11B,形成遮光層250於基板220的頂面220t上。遮光層250可以填入第一通孔222與第二通孔224中。遮光層250具有多個開口252,每個開口252重疊於對應的發光二極體240。至此,發光二極體封裝結構20大致完成。11A and 11B , a light shielding layer 250 is formed on the top surface 220t of the substrate 220. The light shielding layer 250 can be filled into the first through hole 222 and the second through hole 224. The light shielding layer 250 has a plurality of openings 252, and each opening 252 overlaps a corresponding LED 240. At this point, the LED package structure 20 is substantially completed.

在一些實施例中,在形成遮光層250之後,於遮光層250以及發光二極體240上形成封裝材料(未繪出)。封裝材料包覆發光二極體240。In some embodiments, after the light shielding layer 250 is formed, a packaging material (not shown) is formed on the light shielding layer 250 and the light emitting diode 240 . The packaging material covers the light emitting diode 240 .

圖12至圖13是依照本發明的一對照組的一種顯示裝置的製造方法的剖面示意圖。請參考圖12,接續圖11A與圖11B的步驟,透過濕蝕刻製程移除剝離層110,藉此將載板100取下。在一些實施例中,剝離層110的材料為聚醯亞胺樹脂,且利用胺類化合物(amine compound)來除剝離層110。由於胺類化合物不容易對金屬造成損傷,因此不需要在剝離層110與第一接墊212之間以及剝離層110與第二接墊214之間形成保護層。FIG. 12 and FIG. 13 are cross-sectional schematic diagrams of a manufacturing method of a display device according to a comparative set of the present invention. Referring to FIG. 12 , following the steps of FIG. 11A and FIG. 11B , the peeling layer 110 is removed by a wet etching process, thereby removing the carrier 100. In some embodiments, the material of the peeling layer 110 is polyimide resin, and an amine compound is used to remove the peeling layer 110. Since the amine compound is not easy to cause damage to the metal, it is not necessary to form a protective layer between the peeling layer 110 and the first pad 212 and between the peeling layer 110 and the second pad 214.

在一些實施例中,在將載板100取下前,將支撐膜(未繪出)貼於發光二極體封裝結構20背對載板100的一側。舉例來說,將支撐膜貼於包覆發光二極體240的封裝材料上。在一些實施例中,同時於載板100(請參考圖8A至圖11A)上形成多個發光二極體封裝結構20,並藉由切割製程分割多個發光二極體封裝結構20。In some embodiments, before removing the carrier 100, a support film (not shown) is attached to the side of the LED package structure 20 facing away from the carrier 100. For example, the support film is attached to the packaging material covering the LED 240. In some embodiments, a plurality of LED package structures 20 are formed on the carrier 100 (see FIGS. 8A to 11A ) at the same time, and the plurality of LED package structures 20 are separated by a cutting process.

請參考圖13,將發光二極體封裝結構20的第一接墊212與第二接墊214透過導電連接結構300而接合至薄膜電晶體基板400的接墊410。第一接墊212與第二接墊214電性連接至薄膜電晶體基板400。至此,大致完成顯示裝置2。13 , the first pad 212 and the second pad 214 of the LED package structure 20 are bonded to the pad 410 of the thin film transistor substrate 400 through the conductive connection structure 300. The first pad 212 and the second pad 214 are electrically connected to the thin film transistor substrate 400. At this point, the display device 2 is substantially completed.

在一些實施例中,導電連接結構300為錫球、其他銲接材料、導電膠或其他可用於導電以及接合的材料。In some embodiments, the conductive connection structure 300 is a solder ball, other soldering materials, conductive glue, or other materials that can be used for electrical conduction and bonding.

在一些實施例中,薄膜電晶體基板400中包括多個薄膜電晶體(未繪出)以及共用訊號線。每個第一接墊212電性連接至不同個薄膜電晶體,而第二接墊214則電性連接至共用訊號線。在一些實施例中,將多個發光二極體封裝結構20接合至薄膜電晶體基板400,發光二極體封裝結構20的數量可以依照實際需求而進行調整。In some embodiments, the thin film transistor substrate 400 includes a plurality of thin film transistors (not shown) and a common signal line. Each first pad 212 is electrically connected to a different thin film transistor, and the second pad 214 is electrically connected to the common signal line. In some embodiments, a plurality of light emitting diode package structures 20 are bonded to the thin film transistor substrate 400, and the number of light emitting diode package structures 20 can be adjusted according to actual needs.

在本實施例中,第一通孔212以及第二通孔214具有上寬下窄的結構。第一接墊212與導電連接結構300之間的接觸面積等於第一通孔222的底面面積,且第二接墊214與導電連接結構300之間的接觸面積等於第二通孔224的底面面積。In this embodiment, the first through hole 212 and the second through hole 214 have a structure of being wide at the top and narrow at the bottom. The contact area between the first pad 212 and the conductive connection structure 300 is equal to the bottom area of the first through hole 222, and the contact area between the second pad 214 and the conductive connection structure 300 is equal to the bottom area of the second through hole 224.

圖14A至圖16A是依照本發明的一實施例的一種發光二極體封裝結構的製造方法的剖面示意圖。圖14B至圖16B分別是圖14A至圖16A的發光二極體封裝結構的製造方法的上視示意圖,其中圖14A至圖16A對應了圖14B至圖16B中線A-A’的位置。Figures 14A to 16A are cross-sectional schematic diagrams of a method for manufacturing a light-emitting diode package structure according to an embodiment of the present invention. Figures 14B to 16B are top schematic diagrams of the method for manufacturing the light-emitting diode package structure of Figures 14A to 16A, respectively, wherein Figures 14A to 16A correspond to the position of the line A-A' in Figures 14B to 16B.

在此必須說明的是,圖14A至圖16B的實施例沿用圖8A至圖11B的實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,在此不贅述。It should be noted that the embodiment of FIG. 14A to FIG. 16B uses the component numbers and part of the content of the embodiment of FIG. 8A to FIG. 11B, wherein the same or similar numbers are used to represent the same or similar components, and the description of the same technical content is omitted. The description of the omitted parts can refer to the aforementioned embodiment, and will not be repeated here.

請參考圖14A與圖14B,將多個發光二極體240V設置於基板220的頂面220t上。在本實施例中,發光二極體240V橫躺在基板220的頂面220t上。在本實施例中,第一電極242、半導體堆疊層246與第二電極244沿著第一方向D1依序排列,第一方向D1垂直於基板220的頂面220t的法線方向ND。在一些實施例中,發光二極體240V透過黏著層(未繪出)而連接至基板220的頂面220t。Referring to FIG. 14A and FIG. 14B , a plurality of light emitting diodes 240V are disposed on the top surface 220t of the substrate 220. In the present embodiment, the light emitting diodes 240V lie horizontally on the top surface 220t of the substrate 220. In the present embodiment, the first electrode 242, the semiconductor stack layer 246, and the second electrode 244 are sequentially arranged along a first direction D1, and the first direction D1 is perpendicular to the normal direction ND of the top surface 220t of the substrate 220. In some embodiments, the light emitting diodes 240V are connected to the top surface 220t of the substrate 220 through an adhesive layer (not shown).

在本實施例中,發光二極體240V包括半導體堆疊層246以及形成於半導體堆疊層246上的第一電極242與第二電極244。半導體堆疊層246例如包括N型半導體以及P型半導體的堆疊層。N型半導體以及P型半導體之間例如還包括發光層。第一電極242與第二電極244分別位於發光二極體240V的相反兩側。第一電極242與第二電極244中的一者連接至N型半導體,且另一者連接至P型半導體。在本實施例中,發光二極體240V為垂直式發光二極體。在本實施例中,每個發光二極體封裝結構中可以包括多個不同顏色的發光二極體240V。In the present embodiment, the light-emitting diode 240V includes a semiconductor stacking layer 246 and a first electrode 242 and a second electrode 244 formed on the semiconductor stacking layer 246. The semiconductor stacking layer 246, for example, includes a stacking layer of an N-type semiconductor and a P-type semiconductor. For example, a light-emitting layer is also included between the N-type semiconductor and the P-type semiconductor. The first electrode 242 and the second electrode 244 are respectively located on opposite sides of the light-emitting diode 240V. One of the first electrode 242 and the second electrode 244 is connected to the N-type semiconductor, and the other is connected to the P-type semiconductor. In the present embodiment, the light-emitting diode 240V is a vertical light-emitting diode. In this embodiment, each LED package structure may include a plurality of LEDs 240V of different colors.

請參考圖15A與圖15B,形成多個第一接墊212以及第二接墊214於基板220以及發光二極體240V上。第一接墊212以及第二接墊214彼此分離。第一接墊212填入第一通孔222中,第二接墊214填入第二通孔224中。15A and 15B , a plurality of first pads 212 and second pads 214 are formed on the substrate 220 and the light emitting diode 240V. The first pads 212 and the second pads 214 are separated from each other. The first pads 212 are filled into the first through holes 222 , and the second pads 214 are filled into the second through holes 224 .

在本實施例中,第一接墊212從第一電極242延伸至基板220上,且第一接墊212覆蓋第一電極242。在一些實施例中,部分第一接墊212還進一步延伸至半導體堆疊層246上。在圖15A中,第一電極242的上表面與側面(第一電極242在圖15A中右邊的側面),皆被第一接墊212包覆。此外,雖然圖15A並未繪示,但第一電極242的前表面與後表面(平行於圖15A的紙面的兩個表面)也會被第一接墊212所包覆。In this embodiment, the first pad 212 extends from the first electrode 242 to the substrate 220, and the first pad 212 covers the first electrode 242. In some embodiments, part of the first pad 212 further extends to the semiconductor stacking layer 246. In FIG15A, the upper surface and the side surface of the first electrode 242 (the side surface of the first electrode 242 on the right side in FIG15A) are both covered by the first pad 212. In addition, although FIG15A does not show it, the front surface and the rear surface (the two surfaces parallel to the paper surface of FIG15A) of the first electrode 242 are also covered by the first pad 212.

在本實施例中,第二接墊214從第二電極244延伸至基板220上,且第二接墊214覆蓋第二電極244。在一些實施例中,部分第二接墊214還進一步延伸至半導體堆疊層246上。在圖15A中,第二電極244的上表面與側面(第二電極244在圖15A中左邊的側面),皆被第二接墊214包覆。此外,雖然圖15A並未繪示,但第二電極244的前表面與後表面(平行於圖15A的紙面的兩個表面)也會被第二接墊214所包覆。In this embodiment, the second pad 214 extends from the second electrode 244 to the substrate 220, and the second pad 214 covers the second electrode 244. In some embodiments, part of the second pad 214 further extends to the semiconductor stacking layer 246. In FIG15A, the upper surface and the side surface of the second electrode 244 (the side surface of the second electrode 244 on the left side in FIG15A) are both covered by the second pad 214. In addition, although FIG15A does not show it, the front surface and the rear surface (the two surfaces parallel to the paper surface of FIG15A) of the second electrode 244 are also covered by the second pad 214.

在一些實施例中,形成第一接墊212以及第二接墊214的方法包括:首先,整面地沉積第一導電層於基板220以及發光二極體240V上,且第一導電層填入第一通孔222中以及第二通孔224中。接著,透過微影製程以及蝕刻製程而圖案化前述第一導電層,以形成第一接墊212以及第二接墊214。In some embodiments, the method of forming the first pad 212 and the second pad 214 includes: first, depositing a first conductive layer on the substrate 220 and the light-emitting diode 240V, and filling the first through hole 222 and the second through hole 224. Then, patterning the first conductive layer through a lithography process and an etching process to form the first pad 212 and the second pad 214.

請參考圖16A與圖16B,形成遮光層250於基板220的頂面220t上。遮光層250可以填入第一通孔222與第二通孔224中。遮光層250具有多個開口252,每個開口252重疊於對應的發光二極體240。至此,發光二極體封裝結構30大致完成。16A and 16B, a light shielding layer 250 is formed on the top surface 220t of the substrate 220. The light shielding layer 250 can be filled into the first through hole 222 and the second through hole 224. The light shielding layer 250 has a plurality of openings 252, and each opening 252 overlaps a corresponding LED 240. At this point, the LED package structure 30 is substantially completed.

在一些實施例中,在形成遮光層250之後,於遮光層250以及發光二極體240上形成封裝材料(未繪出)。封裝材料包覆發光二極體240。In some embodiments, after the light shielding layer 250 is formed, a packaging material (not shown) is formed on the light shielding layer 250 and the light emitting diode 240 . The packaging material covers the light emitting diode 240 .

圖17至圖18是依照本發明的一對照組的一種顯示裝置的製造方法的剖面示意圖。請參考圖17,接續圖16A與圖16B的步驟,透過濕蝕刻製程移除剝離層110,藉此將載板100取下。17 and 18 are cross-sectional views of a manufacturing method of a display device according to a comparative set of the present invention. Referring to FIG17 , following the steps of FIG16A and FIG16B , the release layer 110 is removed by a wet etching process, thereby removing the carrier 100 .

在一些實施例中,在將載板100取下前,將支撐膜(未繪出)貼於發光二極體封裝結構30背對載板100的一側。舉例來說,將支撐膜貼於包覆發光二極體240的封裝材料上。在一些實施例中,同時於載板100(請參考圖14A至圖16A)上形成多個發光二極體封裝結構30,並藉由切割製程分割多個發光二極體封裝結構30。In some embodiments, before removing the carrier 100, a support film (not shown) is attached to the side of the LED package structure 30 facing away from the carrier 100. For example, the support film is attached to the packaging material covering the LED 240. In some embodiments, a plurality of LED package structures 30 are formed on the carrier 100 (see FIGS. 14A to 16A ) at the same time, and the plurality of LED package structures 30 are separated by a cutting process.

請參考圖18,將發光二極體封裝結構30的第一接墊212與第二接墊214透過導電連接結構300而接合至薄膜電晶體基板400的接墊410。第一接墊212與第二接墊214電性連接至薄膜電晶體基板400。至此,大致完成顯示裝置3。18 , the first pad 212 and the second pad 214 of the LED package structure 30 are bonded to the pad 410 of the thin film transistor substrate 400 through the conductive connection structure 300. The first pad 212 and the second pad 214 are electrically connected to the thin film transistor substrate 400. Thus, the display device 3 is substantially completed.

綜上所述,在本發明的發光二極體封裝結構中,接墊自基板的頂面沿著通孔的的側壁連續地延伸至基板的底面,藉此能改善發光二極體封裝結構容易在製程中受損的問題。In summary, in the LED package structure of the present invention, the pad extends continuously from the top surface of the substrate along the side wall of the through hole to the bottom surface of the substrate, thereby improving the problem that the LED package structure is easily damaged during the manufacturing process.

1,2,3:顯示裝置 10,20,30:發光二極體封裝結構 100:載板 110:剝離層 120:保護層 212:第一接墊 212s,222s,224s:側壁 214:第二接墊 220:基板 220b:底面 220t:頂面 222:第一通孔 224:第二通孔 232:第一連接線 234:第二連接線 240,240V:發光二極體 242:第一電極 244:第二電極 246:半導體堆疊層上 250:遮光層 252:開口 300:導電連接結構 400:薄膜電晶體基板 410:接墊 D1:第一方向 DT:距離 L1,L2:長度 ND:法線方向 SW,W1,W2:寬度 SZ:尺寸 θ1,θ2:夾角1,2,3: display device 10,20,30: LED package structure 100: carrier 110: peeling layer 120: protective layer 212: first pad 212s,222s,224s: sidewall 214: second pad 220: substrate 220b: bottom surface 220t: top surface 222: first through hole 224: second through hole 232: first connection line 234: second connection line 240,240V: LED 242: first electrode 244: second electrode 246: semiconductor stacking layer 250: light shielding layer 252: opening 300: conductive connection structure 400: thin film transistor substrate 410: pad D1: first direction DT: distance L1, L2: length ND: normal direction SW, W1, W2: width SZ: size θ1, θ2: angle

圖1A至圖4A是依照本發明的一對照組的一種發光二極體封裝結構的製造方法的剖面示意圖。 圖1B至圖4B分別是圖1A至圖4A的發光二極體封裝結構的製造方法的上視示意圖。 圖5至圖7是依照本發明的一對照組的一種顯示裝置的製造方法的剖面示意圖。 圖8A至圖11A是依照本發明的一實施例的一種發光二極體封裝結構的製造方法的剖面示意圖。 圖8B至圖11B分別是圖8A至圖11A的發光二極體封裝結構的製造方法的上視示意圖。 圖12至圖13是依照本發明的一對照組的一種顯示裝置的製造方法的剖面示意圖。 圖14B至圖16B分別是圖14A至圖16A的發光二極體封裝結構的製造方法的上視示意圖。 圖17至圖18是依照本發明的一對照組的一種顯示裝置的製造方法的剖面示意圖。 Figures 1A to 4A are schematic cross-sectional views of a method for manufacturing a light-emitting diode package structure according to a comparison group of the present invention. Figures 1B to 4B are respectively schematic top views of the method for manufacturing the light-emitting diode package structure of Figures 1A to 4A. Figures 5 to 7 are schematic cross-sectional views of a method for manufacturing a display device according to a comparison group of the present invention. Figures 8A to 11A are schematic cross-sectional views of a method for manufacturing a light-emitting diode package structure according to an embodiment of the present invention. Figures 8B to 11B are respectively schematic top views of the method for manufacturing the light-emitting diode package structure of Figures 8A to 11A. Figures 12 to 13 are schematic cross-sectional views of a method for manufacturing a display device according to a comparison group of the present invention. FIG. 14B to FIG. 16B are top views of the manufacturing method of the LED package structure of FIG. 14A to FIG. 16A, respectively. FIG. 17 to FIG. 18 are cross-sectional views of a manufacturing method of a display device according to a control group of the present invention.

2:顯示裝置 2: Display device

20:發光二極體封裝結構 20: LED packaging structure

212:第一接墊 212: First pad

214:第二接墊 214: Second pad

220:基板 220: Substrate

222:第一通孔 222: First through hole

224:第二通孔 224: Second through hole

240:發光二極體 240: LED

242:第一電極 242: First electrode

244:第二電極 244: Second electrode

246:半導體堆疊層上 246: On the semiconductor stacking layer

250:遮光層 250: Shading layer

300:導電連接結構 300: Conductive connection structure

400:薄膜電晶體基板 400: Thin film transistor substrate

410:接墊 410:Pad

Claims (15)

一種顯示裝置,包括: 一發光二極體封裝結構,包括: 一基板,包括多個第一通孔以及一第二通孔; 多個第一接墊,填入該些第一通孔中,其中該些第一接墊自該基板的頂面沿著該些第一通孔的側壁連續地延伸至該基板的底面,其中在該些第一通孔的側壁上的該些第一接墊與該基板的底面之間的夾角為銳角; 一第二接墊,填入該第二通孔中,其中該第二接墊自該基板的頂面沿著該第二通孔的側壁連續地延伸至該基板的底面,其中在該第二通孔的側壁上的該第二接墊與該基板的底面之間的夾角為銳角;以及 多個發光二極體,設置於該基板的頂面上,其中各該發光二極體電性連接至該第二接墊以及對應的該第一接墊。 A display device, comprising: A light-emitting diode package structure, comprising: A substrate, comprising a plurality of first through holes and a second through hole; A plurality of first pads, filled in the first through holes, wherein the first pads extend continuously from the top surface of the substrate along the side walls of the first through holes to the bottom surface of the substrate, wherein the angle between the first pads on the side walls of the first through holes and the bottom surface of the substrate is an acute angle; A second pad, filled in the second through hole, wherein the second pad extends continuously from the top surface of the substrate along the side walls of the second through hole to the bottom surface of the substrate, wherein the angle between the second pad on the side walls of the second through hole and the bottom surface of the substrate is an acute angle; and A plurality of light-emitting diodes are disposed on the top surface of the substrate, wherein each of the light-emitting diodes is electrically connected to the second pad and the corresponding first pad. 如請求項1所述的顯示裝置,更包括: 一薄膜電晶體基板,其中該發光二極體封裝結構的該些第一接墊以及該第二接墊電性連接至該薄膜電晶體基板。 The display device as described in claim 1 further comprises: A thin film transistor substrate, wherein the first pads and the second pads of the light-emitting diode package structure are electrically connected to the thin film transistor substrate. 如請求項2所述的顯示裝置,其中該些第一接墊透過多個導電連接結構而電性連接至該薄膜電晶體基板,且其中該些第一通孔具有上寬下窄的結構,且該些第一接墊與該些導電連接結構之間的接觸面積等於該些第一通孔的底面面積。A display device as described in claim 2, wherein the first pads are electrically connected to the thin film transistor substrate through a plurality of conductive connection structures, and wherein the first through holes have a structure that is wide at the top and narrow at the bottom, and the contact area between the first pads and the conductive connection structures is equal to the bottom area of the first through holes. 如請求項1所述的顯示裝置,其中該發光二極體封裝結構包括三個第一接墊,且該些第一接墊排成一列。The display device as described in claim 1, wherein the light-emitting diode package structure includes three first pads, and the first pads are arranged in a row. 如請求項1所述的顯示裝置,更包括: 一遮光層,填入該些第一通孔以及該第二通孔。 The display device as described in claim 1 further includes: A light shielding layer filling the first through holes and the second through holes. 如請求項1所述的顯示裝置,其中相鄰的該些第一通孔之間的距離為30微米至35微米。A display device as described in claim 1, wherein the distance between adjacent first through holes is 30 microns to 35 microns. 如請求項1所述的顯示裝置,其中該些第一接墊的最底面以及該第二接墊的最底面對齊該基板的底面。A display device as described in claim 1, wherein the bottom surfaces of the first pads and the bottom surface of the second pad are aligned with the bottom surface of the substrate. 如請求項1所述的顯示裝置,其中各該發光二極體包括一半導體堆疊層以及位於該半導體堆疊層上的一第一電極與一第二電極,該第一電極以及該第二電極位於該發光二極體的同一側,且其中該第一電極電性連接至對應的該第一接墊,且該第二電極電性連接至該第二接墊。A display device as described in claim 1, wherein each of the light-emitting diodes includes a semiconductor stacking layer and a first electrode and a second electrode located on the semiconductor stacking layer, the first electrode and the second electrode are located on the same side of the light-emitting diode, and wherein the first electrode is electrically connected to the corresponding first pad, and the second electrode is electrically connected to the second pad. 如請求項1所述的顯示裝置,其中各該發光二極體包括一半導體堆疊層以及位於該半導體堆疊層上的一第一電極與一第二電極,該第一電極以及該第二電極分別位於該發光二極體的相反兩側,且其中該第一電極電性連接至對應的該第一接墊,且該第二電極電性連接至該第二接墊。A display device as described in claim 1, wherein each of the light-emitting diodes includes a semiconductor stacking layer and a first electrode and a second electrode located on the semiconductor stacking layer, the first electrode and the second electrode are respectively located on opposite sides of the light-emitting diode, and wherein the first electrode is electrically connected to the corresponding first pad, and the second electrode is electrically connected to the second pad. 如請求項9所述的顯示裝置,其中該第一電極形成於該半導體堆疊層上且被對應的該第一接墊覆蓋,且該第二電極形成於該半導體堆疊層上且被該第二接墊覆蓋。A display device as described in claim 9, wherein the first electrode is formed on the semiconductor stack layer and covered by the corresponding first pad, and the second electrode is formed on the semiconductor stack layer and covered by the second pad. 如請求項9所述的顯示裝置,其中該第一電極、該半導體堆疊層與該第二電極沿著一第一方向依序排列,該第一方向垂直於該基板的頂面的法線方向。A display device as described in claim 9, wherein the first electrode, the semiconductor stack layer and the second electrode are arranged in sequence along a first direction, and the first direction is perpendicular to the normal direction of the top surface of the substrate. 一種顯示裝置,包括: 一發光二極體封裝結構,包括: 一基板,包括多個通孔; 多個接墊,填入該些通孔中,其中該些接墊的至少一者自該基板的頂面沿著該些通孔的至少一者的側壁連續地延伸至該基板的底面,其中在該些通孔的該至少一者的側壁上的該些接墊的該至少一者與該基板的底面之間的夾角為銳角;以及 多個發光二極體,設置於該基板的頂面上,其中各該發光二極體電性連接至對應的該些接墊;以及 一薄膜電晶體基板,其中該發光二極體封裝結構的該些接墊電性連接至該薄膜電晶體基板。 A display device, comprising: A light-emitting diode package structure, comprising: A substrate, comprising a plurality of through holes; A plurality of pads, filled in the through holes, wherein at least one of the pads extends continuously from the top surface of the substrate along the side wall of at least one of the through holes to the bottom surface of the substrate, wherein the angle between at least one of the pads on the side wall of at least one of the through holes and the bottom surface of the substrate is an acute angle; and A plurality of light-emitting diodes, arranged on the top surface of the substrate, wherein each of the light-emitting diodes is electrically connected to the corresponding pads; and A thin film transistor substrate, wherein the pads of the light-emitting diode package structure are electrically connected to the thin film transistor substrate. 如請求項12所述的顯示裝置,其中各該發光二極體包括一半導體堆疊層以及位於該半導體堆疊層上的兩個電極,該兩個電極位於該發光二極體的相反兩側,且其中該兩個電極電性連接至對應的該些接墊。A display device as described in claim 12, wherein each of the light-emitting diodes includes a semiconductor stacking layer and two electrodes located on the semiconductor stacking layer, the two electrodes are located on opposite sides of the light-emitting diode, and the two electrodes are electrically connected to the corresponding pads. 如請求項13所述的顯示裝置,其中該兩個電極形成於該半導體堆疊層上且被對應的該些接墊覆蓋。A display device as described in claim 13, wherein the two electrodes are formed on the semiconductor stack layer and covered by the corresponding pads. 如請求項13所述的顯示裝置,其中該半導體堆疊層在一第一方向上位於該兩個電極之間,且該第一方向垂直於該基板的頂面的法線方向。A display device as described in claim 13, wherein the semiconductor stack layer is located between the two electrodes in a first direction, and the first direction is perpendicular to the normal direction of the top surface of the substrate.
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