TWI835085B - Method for detecting defect between wafer or die and substrate - Google Patents

Abstract

A method for detecting defect between wafer or die and substrate includes the following steps: placing a wafer or a die on a substrate; projecting an image on a surface of the wafer or die; reflecting the image by the surface of the wafer or die to form a reflected image; capturing the reflected image; and determining a space between the wafer or die and substrate with or without a defect according to a state of the reflected image. As such, the method can precisely determine the space between the wafer or die and substrate with or without a defect and identify the whole defect by the means for projection, reflection, capture and recognition under a condition of a height change region which is 1-2 nm matching a requirement of the hybrid bonding. Further, the cost of equipment used in the method is much less than the cost of an ultrasound scanning device, thereby saving the cost.

Description

Die bonding defect detection method

The present invention relates to a detection method, in particular to a method for detecting defects in die bonding.

During the transfer of the wafer or die to the substrate, local areas of the wafer or die contact the substrate to form a bond wave. The bonding wave spreads from a local area of the wafer or die toward other areas of the wafer or die, causing the wafer or die to be gradually fixed on the substrate.

However, bubbles may be enclosed between the wafer or die and the substrate to form a void, or there may be particles between the wafer or die and the substrate to form a void. If there is a void between the wafer or die and the substrate, the wafer or die and the substrate are not tightly adhered, which will cause the subsequent processing procedures of the wafer or die such as picking or identification to be easily affected by bubbles or particles, reducing the The yield of products produced by subsequent processing.

Generally speaking, the industry usually uses ultrasonic scanning (Scanning Acoustic Tomography, SAT) to detect whether there are voids, so as to pick out wafers or die that are not tightly adhered to the substrate. However, ultrasonic scanning equipment is very expensive and has a high resolution of only 0.5 m. Since the height change required by Hybrid Bonding technology is in the range of 1~2 nm, 0.5 The height resolution of m is quite insufficient to identify complete defects.

The main purpose of the present invention is to provide a method for detecting defects in die bonding, which can accurately determine whether there are defects between the wafer or die and the substrate through technical means such as image projection, reflection, capture and identification.

Another object of the present invention is to provide a method for detecting defects in die bonding, using equipment that is lower in cost than ultrasonic scanning equipment.

In order to achieve the aforementioned goals, the present invention provides a method for detecting solid chip bonding defects, which includes the following steps: bonding a wafer or a die to a substrate; projecting an image on the surface of the wafer or die ; The image is reflected by the surface of the wafer or die to form a reflection image; capturing the reflection image; and determining whether there is a defect between the wafer or die and the substrate based on the state of the reflection image.

In some embodiments, the step of determining whether there is a defect further includes: when there is no defect between the wafer or die and the substrate, the state of the reflected image is a normal state, and determining whether the wafer or chip is in a normal state based on the state of the reflected image being a normal state. There is no defect between the die and the substrate; when there is a defect between the wafer or the die and the substrate, the state of the reflected image is abnormal. According to the abnormal state of the reflected image, the relationship between the wafer or die and the substrate is determined. There are flaws.

In some embodiments, the normal state means that the reflected image is a normal mirror image of the image, and the abnormal state means that the reflected image is a distorted mirror image of the image.

In some embodiments, the step of projecting the image on the surface of the wafer or die further includes: projecting an image of a pattern of a certain positioning reference sheet on the surface of the wafer or die; wherein, the step of forming a reflective image The method further includes: the image of the pattern of the positioning reference sheet is reflected by the wafer or die to form a reflection image.

In some embodiments, the step of projecting the image onto the surface of the wafer or die further includes: a light source emits a light onto the surface of the wafer or die; the light is reflected by the surface of the wafer or die. project onto the positioning reference piece; and project the image of the pattern of the positioning reference piece onto the surface of the wafer or die through light.

In some embodiments, the angle between an axis of the positioning reference sheet and the surface of the wafer or die is 40 to 50 degrees.

In some embodiments, the pattern of the positioning reference piece is a checkerboard pattern.

In some embodiments, the step of capturing the reflected image further includes: capturing the reflected image by an image capturing unit.

In some embodiments, the angle between an axis of the image capturing unit and the surface of the wafer or die is 40 to 50 degrees.

In some embodiments, the step of determining whether defects exist further includes: a processing unit receives the reflected image, identifies the state of the reflected image, and determines whether there is a defect between the wafer or die and the substrate based on the state of the reflected image.

The effect of the present invention is that, through technical means such as image projection, reflection, capture and identification, the method of the present invention can accurately achieve a height change of 1~2 nm that meets the requirements of hybrid bonding technology. Determine whether there are defects between the wafer or die and the substrate, and identify complete defects.

Furthermore, the cost of the equipment used in the method of the present invention is lower than that of ultrasonic scanning equipment, thereby achieving a cost-saving effect.

The following is a more detailed description of the embodiments of the present invention with reference to drawings and component symbols, so that those skilled in the art can implement them after reading this specification.

Figure 1 is a flow chart of the method of the present invention. As shown in Figure 1, the present invention provides a method for detecting solid chip bonding defects, which includes the following steps: Step S100, bond a wafer or a die to a substrate; Step S200, project an image on the wafer or on the surface of the die; step S300, the image is reflected by the surface of the wafer or die to form a reflection image; step S400, capture the reflection image; and step S500, determine the relationship between the wafer or die and the state of the reflection image. Are there any defects between the substrates?

Several examples and drawings will be provided below to illustrate the actual operation process of the method of the present invention.

Figure 2 is a schematic diagram of the method of the present invention for identifying that the wafer 10 is bonded without defects 80. Figure 3 is a schematic diagram of the method of the present invention for identifying that the wafer 10 is bonded with defects 80. Figure 4 shows the image capture unit 60 and the processing unit. Schematic diagram of the connection relationship of 70. As shown in Figures 2 to 4, when the object to be bonded is a wafer 10, the substrate is a wafer 10A. The following will describe in detail how the method of the present invention detects whether there are defects between the wafer 10 and the wafer 10A 80 exist. Step S100 further includes: bonding a wafer 10 to a substrate, and the substrate is a wafer 10A. Step S200 further includes: a light source 30 emits a light onto the surface of the wafer 10; the light is reflected by the surface of the wafer 10 and projected onto a positioning reference sheet 40; and the pattern of the positioning reference sheet 40 is projected by the light. An image (not shown) is projected on the surface of the wafer 10 . Step S300 further includes: the image of the pattern of the positioning reference sheet 40 is reflected by the surface of the wafer 10 to form a reflected image 50 . Step S400 further includes: an image capturing unit 60 capturing the reflected image 50 . Step S500 further includes: a processing unit 70 receives the reflected image 50, identifies whether the state of the reflected image 50 is a normal state or an abnormal state, and determines the relationship between the wafer 10 and the wafer 10A based on whether the state of the reflected image 50 is a normal state or an abnormal state. There are 80 defects between them. As shown in FIGS. 2 and 4 , when there is no defect 80 between the wafer 10 and the wafer 10A, the state of the reflected image 50 is a normal state, and the processing unit 70 can recognize that the state of the reflected image 50 is a normal state and based on If the state of the reflected image 50 is a normal state, it is determined that there is no defect 80 between the wafer 10 and the wafer 10A. As shown in FIGS. 3 and 4 , when there is a defect 80 between the wafer 10 and the wafer 10A, the state of the reflected image 50 is an abnormal state, and the processing unit 70 can identify that the state of the reflected image 50 is an abnormal state and based on If the state of the reflected image 50 is an abnormal state, it is determined that a defect 80 exists between the wafer 10 and the wafer 10A.

Figure 4 shows a schematic diagram of the connection relationship between the image capture unit 60 and the processing unit 70. Figure 5 is a schematic diagram of the method of the present invention for identifying the stack of wafers 10 and 10A without defects 80. Figure 6 is the method of the present invention for identifying the wafer 10. , a schematic diagram of a defective 80A stack. As shown in Figures 5 and 6, when a plurality of wafers 10 and 10A are stacked, one of the two adjacent wafers 10 and 10A is an object to be bonded, and the two adjacent wafers 10 and 10A are The other piece is the substrate. During each stacking process of two wafers 10 and 10A, it can be determined whether there is a defect 80 between the wafer 10 and the wafer 10A through the method described in the previous paragraph. As shown in FIGS. 4 and 5 , when there is no defect 80 between the wafer 10 and the wafer 10A, the state of the reflected image 50 is a normal state, and the processing unit 70 can recognize that the state of the reflected image 50 is a normal state and based on If the state of the reflected image 50 is a normal state, it is determined that there is no defect 80 between the wafer 10 and the wafer 10A. As shown in FIGS. 4 and 6 , when there is a defect 80 between the wafer 10 and the wafer 10A, the state of the reflected image 50 is an abnormal state, and the processing unit 70 can identify that the state of the reflected image 50 is an abnormal state and based on If the state of the reflected image 50 is an abnormal state, it is determined that a defect 80 exists between the wafer 10 and the wafer 10A.

Generally speaking, the wafer 10 is fixed on the wafer 10A through a bond wave, which belongs to a hybrid bonding technology (Hybrid Bonding). Therefore, the surface of the wafer 10 needs to be polished to make the surface of the wafer 10 quite smooth, so that bonding waves can be formed. The arithmetic mean roughness (Ra) of the surface of the wafer 10 is less than 0.2 nm, and can be regarded as a reflecting mirror, so that the image of the pattern of the positioning reference sheet 40 can be reflected by the surface of the wafer 10 to form the reflection image 50 .

Figure 4 shows a schematic diagram of the connection relationship between the image capture unit 60 and the processing unit 70. Figure 7 is a schematic diagram of the method of the present invention for identifying the chip 20 to be attached without defects 80. Figure 8 is the method of the present invention to identify the chip 20 to be attached. A schematic diagram of the defective 80. As shown in Figures 4, 7 and 8, when the object to be bonded is the die 20, the substrate is a wafer 10B. The following will describe in detail how the method of the present invention detects the gap between the die 20 and the wafer 10B. There are no defects 80 exist. Step S100 further includes: bonding a die 20 to a substrate, and the substrate is a wafer 10B. Step S200 further includes: a light source 30 emits a light onto the surface of the die 20; the light is reflected by the surface of the die 20 and projected onto a positioning reference sheet 40; and the pattern of the positioning reference sheet 40 is projected by the light. An image (not shown) is projected on the surface of the die 20 . Step S300 further includes: the image of the pattern of the positioning reference sheet 40 is reflected by the surface of the die 20 to form a reflected image 50 . Step S400 further includes: an image capturing unit 60 capturing the reflected image 50 . Step S500 proceeds to The steps include: a processing unit 70 receives the reflected image 50, identifies whether the state of the reflected image 50 is a normal state or an abnormal state, and determines whether there is any connection between the die 20 and the wafer 10B based on whether the state of the reflected image 50 is a normal state or an abnormal state. Defect 80 exists. As shown in FIGS. 4 and 7 , when there is no defect 80 between the die 20 and the wafer 10B, the state of the reflected image 50 is a normal state, and the processing unit 70 can identify that the state of the reflected image 50 is a normal state and based on The state of the reflected image 50 is a normal state and it is determined that there is no defect 80 between the die 20 and the wafer 10B. As shown in FIGS. 4 and 8 , when there is a defect 80 between the die 20 and the wafer 10B, the state of the reflected image 50 is an abnormal state, and the processing unit 70 can identify that the state of the reflected image 50 is an abnormal state and based on The state of the reflected image 50 is an abnormal state and it is determined that a defect 80 exists between the die 20 and the wafer 10B.

Figure 4 shows a schematic diagram of the connection relationship between the image capture unit 60 and the processing unit 70. Figure 9 is a schematic diagram of the method of the present invention for identifying the chip 20, 20A stack without defects 80. Figure 10 is the method of the present invention for identifying the chip 20. , 20A stack with defective 80A schematic diagram. As shown in FIGS. 9 and 10 , when a plurality of die 20 and 20A are stacked, except that the substrate to which the first die 20 is bonded is the wafer 10B, among the remaining die 20 and 20A, two adjacent die One of the dies 20 and 20A is the object to be bonded, and the other of the two adjacent dies 20 and 20A is the substrate. During the stacking process of each two die 20 and 20A, it can be determined whether there is a defect 80 between the die 20 and the die 20A through the method described in the previous paragraph. As shown in FIGS. 4 and 9 , when there is no flaw 80 between the die 20 and the die 20A, the state of the reflected image 50 is a normal state, and the processing unit 70 can identify that the state of the reflected image 50 is a normal state and based on The state of the reflected image 50 is a normal state and it is determined that there is no defect 80 between the die 20 and the die 20A. As shown in FIG. 4 and FIG. 10 , when there is a defect 80 between the die 20 and the die 20A, the state of the reflected image 50 is an abnormal state, and the processing unit 70 can identify that the state of the reflected image 50 is an abnormal state and based on The state of the reflected image 50 is an abnormal state and it is determined that a defect 80 exists between the die 20 and the die 20A.

Generally speaking, the die 20 is fixed on the wafer 10B or the die 20A through a bond wave, which belongs to a hybrid bonding technology. Therefore, the surface of the crystal grain 20 needs to be polished to make the surface of the crystal grain 20 quite smooth, so that the bonding wave can be formed. The arithmetic mean roughness (Ra) of the surface of the die 20 is less than 0.2 nm, and can be regarded as a reflecting mirror, so that the image of the pattern of the positioning reference sheet 40 can be reflected by the surface of the die 20 to form the reflection image 50 .

In hybrid bonding technology, the most common defect 80 is void. To be more clear, bubbles may be trapped between the wafer 10 or the die 20 and the substrate to form a cavity, or there may be particles between the wafer 10 or the die 20 and the substrate to form a cavity. If there are no defects 80 such as voids between the wafer 10 or the die 20 and the substrate, the wafer 10 or the die 20 is in close contact with the substrate. At this time, the state of the reflected image 50 is a normal mirror image of the image of the pattern of the positioning reference sheet 40 and is defined as normal state. On the contrary, if there are defects 80 such as holes between the wafer 10 or the die 20 and the substrate, the wafer 10 or the die 20 and the substrate are not closely adhered. At this time, the state of the reflected image 50 is the image of the pattern of the positioning reference sheet 40 is a distorted image of the state and is defined as an abnormal state.

FIG. 11 shows a schematic diagram that the reflected image 50 is in a normal state, and FIG. 12 shows a schematic diagram that the reflected image 50 is in an abnormal state. The pattern of the positioning reference sheet 40 is a checkerboard pattern, and the checkerboard pattern includes a plurality of squares. The squares have two colors in total, and the squares of the two colors are arranged in a staggered manner. As shown in Figure 11, the normal state refers to that the reflected image 50 is a normal mirror image of the checkerboard image. The normal mirror image of the checkerboard image shows that the plurality of squares are arranged quite neatly; the processing unit 70 recognizes that the reflected image 50 is a checkerboard. A normal mirror image of the grid image is used, and based on this, it is determined that there is no defect 80 between the wafer 10 or the die 20 and the substrate. As shown in FIG. 12 , the abnormal state refers to that the reflected image 50 is a distorted mirror image of the checkerboard image. The distorted mirror image of the checkerboard image shows that the plural squares are distorted; the processing unit 70 recognizes that the reflected image 50 is a checkerboard image. A distorted mirror image of the image is obtained, and based on this, it is determined that there is a defect 80 between the wafer 10 or the die 20 and the substrate.

Preferably, as shown in FIG. 2 , the angle between an axis 41 of the positioning reference sheet 40 and the surface of the wafer 10 1 is 40 to 50 degrees, the angle between an axis 61 of the image capture unit 60 and the surface of the wafer 10 2 is 40~50 degrees; as shown in Figure 7, the angle between the axis 41 of the positioning reference piece 40 and the surface of the die 20 3 is 40 to 50 degrees, the angle between the axis 61 of the image capturing unit 60 and the surface of the die 20 4 is 40~50 degrees. Thereby, the image capture unit 60 will not capture its own image on the wafer 10 or the die 20 , and the reflected image 50 will not be exposed, which improves the ability to determine whether there are defects between the wafer 10 or the die 20 and the substrate 80 Existential accuracy. The above angle 1 to 4 are all 45 degrees as the best, so that it can be more accurately determined whether there is a defect 80 between the wafer 10 or the die 20 and the substrate.

Preferably, as shown in FIG. 4 , the image capturing unit 60 has a light source 30 . In other embodiments, the light source 30 can also be provided separately from the image capturing unit 60 .

In summary, the method of the present invention, through technical means such as image projection, reflection, capture and identification, can accurately determine the height change in the range of 1~2 nm that meets the requirements of hybrid bonding technology. Whether there are defects 80 between the wafer 10 or the die 20 and the substrate, and complete defects 80 are identified. The industry can carry out subsequent processing procedures on wafers 10 or dies 20 without defects 80 and sort out wafers 10 or dies 20 with defects 80 .

Furthermore, the cost of the equipment used in the method of the present invention is lower than that of ultrasonic scanning equipment, thereby achieving a cost-saving effect.

The above are only used to explain the preferred embodiments of the present invention, and are not intended to limit the present invention in any form. Therefore, any modifications or changes related to the present invention are made under the same spirit of the invention. , should still be included in the scope of protection intended by the present invention.

10, 10A, 10B: Wafer 20, 20A: Die 30: Light source 40: Positioning reference film 41: Axis 50: Reflected image 60: Image capture unit 61: Axis 70: Processing unit 80: Defects S100~S500: Steps 1~ 4:Angle

Figure 1 is a flow chart of the method of the present invention. Figure 2 is a schematic diagram of the method of the present invention to identify flawless wafer bonding. Figure 3 is a schematic diagram of identifying defects in wafer bonding using the method of the present invention. Figure 4 shows a schematic diagram of the connection relationship between the image capture unit and the processing unit. FIG. 5 is a schematic diagram of the method of the present invention to identify that the wafer stack is flawless. FIG. 6 is a schematic diagram of the method of the present invention for identifying defects in a wafer stack. Figure 7 is a schematic diagram of the method of the present invention to identify flawless die bonding. Figure 8 is a schematic diagram of identifying defects in die bonding using the method of the present invention. Figure 9 is a schematic diagram of the method of the present invention to identify the flawless die stack. FIG. 10 is a schematic diagram of the method of the present invention for identifying defects in die stacks. Figure 11 shows a schematic diagram showing that the state of the reflected image is a normal state. Figure 12 shows a schematic diagram showing that the state of the reflected image is an abnormal state.

S100~S500: steps

Claims (8)

A method for detecting solid chip bonding defects includes the following steps: bonding a wafer or a die to a substrate through a bonding wave, wherein the surface of the wafer or die is polished so that the The surface of the wafer or the die is quite smooth; a light source emits a light onto the surface of the wafer or the die; the light is reflected by the surface of the wafer or the die and projected onto a certain positioning reference sheet; And, an image of the pattern of the positioning reference piece is projected on the surface of the wafer or the die by the light; the image of the pattern of the positioning reference piece is reflected by the surface of the wafer or the die. Form a reflection image; capture the reflection image; and determine whether there is a defect between the wafer or the die and the substrate based on the state of the reflection image. The die bonding defect detection method as described in claim 1, wherein the step of determining whether a defect exists further includes: when there is no defect between the wafer or the die and the substrate, the state of the reflected image is Normal state, based on the normal state of the reflected image, it is determined that there is no defect between the wafer or the die and the substrate; when there is a defect between the wafer or the die and the substrate, the reflected image The state is an abnormal state. Based on the abnormal state of the reflected image, it is determined that there is a defect between the wafer or the die and the substrate. The die bonding defect detection method as described in claim 2, wherein the normal state refers to the reflected image being a normal mirror image of the image, and the abnormal state refers to the reflected image being a distorted mirror image of the image. The die bonding defect detection method as described in claim 1, wherein the angle between an axis of the positioning reference sheet and the surface of the wafer or die is 40 to 50 degrees. The die bonding defect detection method as described in claim 1, wherein the pattern of the positioning reference sheet is a checkerboard. The die bonding defect detection method as described in claim 1, wherein the step of capturing the reflected image further includes: an image capturing unit capturing the reflected image. The die bonding defect detection method as described in claim 6, wherein the angle between an axis of the image capture unit and the surface of the wafer or die is 40 to 50 degrees. The die-bonding defect detection method as described in claim 1, wherein the step of determining whether a defect exists further includes: a processing unit receives the reflected image, identifies the state of the reflected image, and determines based on the state of the reflected image Whether there are defects between the wafer or the die and the substrate.

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