TWI809624B - Circuit board structure - Google Patents

Abstract

A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer and at least one second build-up circuit layer. The dielectric substrate has a top surface and a bottom surface opposite to the top surface, and includes at least one through cavity. The through cavity penetrates the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block has a top surface and a bottom surface opposite to the top surface, and includes at least one first through hole and at least one second through hole. The electronic component is arranged in the through hole of the embedded block. The first build-up circuit layer is arranged on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is arranged on the bottom surface of the dielectric substrate and covers the embedded block.

Description

circuit board structure

The present invention relates to a circuit board structure, and more particularly to a circuit board structure with embedded blocks.

At present, the circuit boards embedded with electronic components usually cannot effectively dissipate the heat generated by the electronic components, thus leading to the problem of poor heat dissipation. Although changing the core layer of the circuit board to a metal material can improve the above-mentioned problem of poor heat dissipation, it will lead to the problem of difficult assembly because the heat dissipation effect of the core layer is too good. For example, non-embedded electronic components or chip package structures can usually be bonded to the circuit board through solder balls, but the core layer of the circuit board is made of metal material, because the heat dissipation effect of the circuit board is too good, so the soldering is not easy. It is attached to the circuit board, so solder balls cannot be formed, and non-embedded electronic components or chip package structures cannot be successfully bonded to the circuit board.

The invention provides a circuit board structure, which can improve heat dissipation effect, shorten signal transmission distance, reduce overall size or reduce signal loss.

The circuit board structure of the present invention includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer and at least one second build-up circuit layer. The dielectric substrate has a top surface and a bottom surface opposite to the top surface, and includes at least one through groove. The through groove runs through the dielectric substrate. The embedded block is fixed in the through groove. The embedded block has a top surface and a bottom surface opposite to the top surface, and includes at least one first through hole. The electronic components are arranged in the first through hole of the embedded block. The first build-up wiring layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.

In an embodiment of the present invention, the above-mentioned embedded block further includes at least one second through hole, and the above-mentioned circuit board structure further includes at least one conductive through hole. The conductive via hole is disposed in the second via hole of the embedding block, and electrically connects the first build-up circuit layer and the second build-up circuit layer.

In an embodiment of the present invention, the above-mentioned embedded block is made of conductive material. Wherein, the conductive material includes metal, alloy or metal mixed with non-metallic material, and the non-metallic material includes diamond or graphene.

In an embodiment of the present invention, the above-mentioned embedded block is made of non-conductive material. Wherein, the non-conductive material includes glass, ceramic or other organic materials.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a connection layer. The connection layer is disposed between the first build-up circuit layer and the second build-up circuit layer, and is electrically connected to the first build-up circuit layer and the second build-up circuit layer.

In an embodiment of the present invention, the above connection layer is electrically connected to the first build-up circuit layer and the electronic component.

In an embodiment of the present invention, the above-mentioned electronic components are passive components.

In an embodiment of the present invention, the above-mentioned electronic components are active components.

In an embodiment of the present invention, the aforementioned active device is a bare chip or a packaged module.

In an embodiment of the present invention, the above-mentioned circuit board structure further includes a dielectric material. The dielectric material is disposed in the gap between the electronic component and the embedded block, and the dielectric material includes prepreg or gel.

In an embodiment of the present invention, the above-mentioned dielectric material is disposed in a gap between the electronic component and the second build-up circuit layer.

Based on the above, in the circuit board structure according to one embodiment of the present invention, the overall size can be reduced by disposing the electronic components in the first through hole of the embedding block (that is, embedding the electronic components in the dielectric substrate), And the signal transmission distance between the embedded electronic components and other electronic components outside the dielectric substrate can be shortened.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail together with the accompanying drawings.

FIG. 1 is a schematic cross-sectional view of a circuit board structure according to an embodiment of the present invention. Referring to FIG. 1, the circuit board structure 100 of this embodiment includes a dielectric substrate 110, at least one embedded block 120, at least one electronic component 130, 131, at least one first build-up circuit layer 140, and at least one second build-up circuit layer 150 , at least one conductive via 160 , 161 , and dielectric material 170 . The dielectric substrate 110 has a top surface 110a and a bottom surface 110b opposite to the top surface 110a. The dielectric substrate 110 includes at least one through-groove 112 , a via 114 , a conductive via 116 and a dielectric material layer 118 .

Specifically, the through groove 112 and the through hole 114 respectively penetrate through the dielectric substrate 110 . The through groove 112 and the through hole 114 can connect the top surface 110 a and the bottom surface 110 b of the dielectric substrate 110 . A conductive via 116 may be disposed within the via 114 . The dielectric material layer 118 may be disposed within the via 114 and may be disposed in a gap between the conductive via 116 and the dielectric substrate 110 . In this embodiment, the material of the dielectric substrate 110 may include flame-retardant self-extinguishing (FR-4) epoxy glass cloth (Epoxy Glass Cloth) or BT resin (Bismaleimide Triazine Resin), but this is not a limitation. limit.

The embedded block 120 is fixed in the through groove 112 . The embedded block 120 has a top surface 120a and a bottom surface 120b opposite to the top surface 120a. The top surface 120 a of the embedded block 120 may be substantially flush with the top surface 110 a of the dielectric substrate 110 , and the bottom surface 120 b of the embedded block 120 may be substantially flush with the bottom surface 110 b of the dielectric substrate 110 . The embedded block 120 includes at least one first through hole 121 , 122 and at least one second through hole 123 , 124 . The first through holes 121 , 122 can pass through the embedded block 120 , and can connect the top surface 120 a and the bottom surface 120 b of the embedded block 120 . The second through holes 123 , 124 can pass through the embedding block 120 , and can connect the top surface 120 a and the bottom surface 120 b of the embedding block 120 .

In this embodiment, since the embedding block 120 can be made of conductive material, the heat generated by the electronic components 130 , 131 can be transmitted through the embedding block 120 , thereby improving the overall heat dissipation effect. Wherein, the conductive material may include metal (such as copper), alloy or metal mixed with non-metallic materials. The non-metallic material may include diamond or graphene, but not limited thereto. In some embodiments, the insert block 120 may also be made of a non-conductive material. Wherein, the non-conductive material may include glass, ceramics or other organic materials, but not limited thereto.

The electronic components 130 , 131 are disposed in the first through holes 121 , 122 of the embedded block 120 . There is a gap G1 between the electronic components 130 , 131 and the embedded block 120 , and there is a gap G2 between the electronic components 130 , 131 and the second build-up circuit layer 150 . The electronic components 130, 131 may be active components and/or passive components. Wherein, the active element may be a bare die or a packaged module, and the passive element may be a capacitor, an inductor or a resistor, but not limited thereto. For example, in this embodiment, the electronic component 130 is, for example, an active component and is disposed in the first through hole 121 , and the electronic component 131 is, for example, a passive component and is disposed in the first through hole 122 . The electronic component 130 has an active surface 130a, a back surface 130b opposite to the active surface 130a, and a pad 130c disposed on the active surface 130a. The active surface 130a may be substantially flush with the top surface 120a of the insert block 120 .

In this embodiment, by embedding the electronic components 130, 131 in the dielectric substrate 110, in addition to increasing the module density of the circuit board structure 100, the overall size (such as volume and area) of the circuit board structure 100 can also be reduced. ). In addition, compared to multiple electronic components that are arranged horizontally and transmit signals horizontally, the embedded electronic components 130, 131 can conduct signal transmission vertically with the non-embedded electronic components 132, 133, To shorten the distance of signal transmission and improve the electrical effect.

The first build-up wiring layer 140 is disposed on the top surface 110 a of the dielectric substrate 110 and covers the dielectric substrate 110 and the embedded block 120 . The first build-up wiring layer 140 may include at least one first dielectric layer 141 , at least one first wiring layer 143 , first wiring layer 144 , at least one first via hole 145 and at least one first via hole 146 . Wherein, the first dielectric layer 141 and the first wiring layer 143 are sequentially stacked on the top surface 110 a of the dielectric substrate 110 and the embedded block 120 . The first circuit layer 144 is disposed on the first dielectric layer 141 away from the dielectric substrate 110 to be exposed to the outside of the first dielectric layer 141 . The first via hole 145 and the first via hole 146 respectively penetrate through the first dielectric layer 141 . The first via hole 145 can electrically connect the first circuit layer 143 and the conductive via 116, the first via hole 145 can electrically connect the first circuit layer 143 and the conductive vias 160, 161, and the first via hole 145 can also be The first circuit layer 143 is electrically connected to the electronic components 130 and 131 . The first via hole 146 can electrically connect two adjacent first circuit layers 143 , and can also electrically connect the first circuit layer 144 and the first circuit layer 143 . In this embodiment, the lines in the first build-up line layer 140 (including the first line layers 143 and 144 ) may be thin lines.

In this embodiment, although the first dielectric layer 141 in the first build-up circuit layer 140 is exemplified by three layers and the first circuit layers 143 and 144 are exemplified by three layers, the present invention does not apply to the first dielectric layer 140. The number of layers of the layer 141 and the first circuit layers 143 and 144 is limited. That is to say, in some embodiments, the first dielectric layer 141 may also have 1 to 2 layers or more than 3 layers, and the first wiring layers 143 and 144 may also have 2 or more layers.

The second build-up wiring layer 150 is disposed on the bottom surface 110 b of the dielectric substrate 110 and covers the dielectric substrate 110 and the embedded block 120 . The second build-up wiring layer 150 may include at least one second dielectric layer 151 , at least one second wiring layer 153 , second wiring layer 154 , at least one second via hole 155 and at least one second via hole 156 . Wherein, the second dielectric layer 151 and the second circuit layer 153 are sequentially stacked on the bottom surface 110 b of the dielectric substrate 110 and the embedded block 120 . The second circuit layer 154 is disposed on the second dielectric layer 151 away from the dielectric substrate 110 to be exposed to the outside of the second dielectric layer 151 . The second via hole 155 and the second via hole 156 respectively penetrate through the second dielectric layer 151 . The second via hole 155 can electrically connect the second circuit layer 153 and the conductive via 116 , and the second via hole 155 can electrically connect the second circuit layer 153 and the conductive vias 160 , 161 . The second via hole 156 can electrically connect two adjacent second circuit layers 153 , and can also electrically connect the second circuit layer 154 and the second circuit layer 153 . In this embodiment, the lines in the second build-up line layer 150 (including the second line layers 153 and 154 ) may be thin lines.

In this embodiment, although the second dielectric layer 151 in the second build-up circuit layer 150 is exemplified by 3 layers and the second circuit layers 153, 154 are exemplified by 3 layers, the present invention does not apply to the second dielectric layer 150. The layers of the layer 151 and the second circuit layers 153 and 154 are limited. That is to say, in some embodiments, the second dielectric layer 151 may also have 1 to 2 layers or more than 3 layers, and the second wiring layers 153 and 154 may also have 2 or more layers.

The conductive via 160 and the conductive via 161 can be respectively disposed in the second through hole 123 and the second through hole 124 of the embedding block 120 , and there is a gap G3 between the conductive vias 160 , 161 and the embedding block 120 . The conductive vias 160 , 161 can contact the first via hole 145 and the second via hole 155 , so that the conductive vias 160 , 161 can electrically connect the first build-up circuit layer 140 and the second build-up circuit layer 150 . In this embodiment, since the conductive vias 160, 161 can be surrounded by the embedding block 120 containing conductive material, the signals of the conductive vias 160, 161 can be protected from noise interference, thereby reducing signal loss and Make the integrity of the signal better.

The dielectric material 170 can be disposed in the gap G1 between the electronic components 130 , 131 and the embedded block 120 , and the dielectric material 170 can be disposed in the gap G2 between the electronic components 130 , 131 and the second build-up circuit layer 150 . In this embodiment, the dielectric material 170 can also be provided with a gap G3 between the conductive vias 160, 161 and the embedded block 120, so as to avoid short circuit between the conductive vias 160, 161 and the embedded block 120 containing conductive material. (short circuit). Wherein, the dielectric material may include prepreg or gel, but not limited thereto.

In addition, in this embodiment, the circuit board structure 100 may further include a solder resist layer 180 , a solder resist layer 181 , an electronic component 132 and an electronic component 133 . Wherein, the solder resist layer 180 is disposed on the first build-up circuit layer 140 , covers the first dielectric layer 141 and exposes the first circuit layer 144 . The solder resist layer 181 is disposed on the second build-up circuit layer 150 , covers the second dielectric layer 151 and exposes the second circuit layer 154 . The electronic component 132 and the electronic component 133 can be respectively disposed on the first build-up circuit layer 140 . The electronic component 132 can contact the first circuit layer 144 exposed by the solder resist layer 180 . The electronic component 133 can be electrically connected to the first circuit layer 144 exposed by the solder resist layer 180 through the conductive terminal 133 a.

Other embodiments are listed below for illustration. It must be noted here that the following embodiments use the component numbers and part of the content of the previous embodiments, wherein the same numbers are used to denote the same or similar components, and descriptions of the same technical content are omitted. For the description of omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.

FIG. 2 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. Please refer to FIG. 1 and FIG. 2 at the same time. The circuit board structure 101 of this embodiment is similar to the circuit board structure 100 in FIG. , a dielectric layer 141a and a via hole 145a.

Specifically, referring to FIG. 2 , in this embodiment, the dielectric layer 141 a is disposed on the top surface 110 a of the dielectric substrate 110 and covers the dielectric substrate 110 and the embedded block 120 . The via hole 145 a penetrates through the dielectric layer 141 a to be electrically connected to the conductive via 116 , the conductive vias 160 , 161 , and the electronic components 130 , 131 , respectively.

The connection layer 190 is disposed on the dielectric layer 141a and disposed between the first build-up circuit layer 140 and the dielectric layer 141a. The connection layer 190 is disposed between the first build-up circuit layer 140 and the second build-up circuit layer 150 . The connection layer 190 includes a third dielectric layer 191 , a third circuit layer 192 and a third via hole 193 . The third circuit layer 192 is disposed on the dielectric layer 141a and contacts the via hole 145a. The third dielectric layer 191 is disposed on the third wiring layer 192 and covers the third wiring layer 192 and the dielectric layer 141a. The third via hole 193 penetrates through the third dielectric layer 191 and electrically connects the first wiring layer 143 and the third wiring layer 192 of the first build-up wiring layer 140 . In addition, in this embodiment, the material of the third dielectric layer 191 may include polypropylene, and the material of the third via hole 193 may include copper paste, but not limited thereto.

In this embodiment, the first build-up circuit layer 140 can be electrically connected to the electronic components 130 and 131 through the connection layer 190 and the via hole 145 a. The first build-up circuit layer 140 can be electrically connected to the second build-up circuit layer 150 through the connection layer 190 , the via hole 145 a and the conductive via hole 116 (or the conductive via hole 160 , 161 ).

In this embodiment, although the first dielectric layer 141 in the first build-up wiring layer 140 is taken as one layer and the first wiring layers 143, 144 are taken as two layers as an example, the present invention does not apply to the first dielectric layer 140. The number of layers of the layer 141 and the first circuit layers 143 and 144 is limited. That is to say, in some embodiments, the first dielectric layer 141 may be more than one layer, and the first wiring layers 143 and 144 may be more than two layers.

In this embodiment, the configuration of the connection layer 190 can make the first build-up wiring layer 140 not need to be fabricated on the dielectric substrate 110 or the connection layer 190 according to the situation, but the first build-up circuit layer that has been fabricated in advance can be used The circuit layer 140 can be directly integrated on the connection layer 190, thereby avoiding the need to make different layers of the first dielectric layer 141, the first circuit layers 143, 144, and The first via holes 145 and 146 have problems such as inaccurate alignment and poor yield. Wherein, the prefabricated first build-up circuit layer 140 is disposed on the connection layer 190 after confirming that the yield is good.

In this embodiment, although the connection layer 190 is disposed between the first build-up circuit layer 140 and the dielectric substrate 110 , the present invention does not limit the location of the connection layer. That is to say, in some embodiments, a connection layer (not shown) may also be disposed between the second build-up wiring layer 150 and the dielectric substrate 110 .

In some embodiments, the connecting layer 190 can also be electrically connected to the embedding block 120 for the purpose of grounding, but not limited thereto.

To sum up, in the circuit board structure of an embodiment of the present invention, by disposing the electronic components in the first through hole of the embedding block (that is, embedding the electronic components in the dielectric substrate), the overall size can be reduced. size, and can shorten the signal transmission distance between the embedded electronic components and other electronic components outside the dielectric substrate. In addition, if the embedding block can be made of conductive material, the heat generated by the embedded electronic components can be transmitted through the embedding block, thereby improving the overall heat dissipation effect. In addition, by disposing the conductive via hole in the second via hole of the embedded block, the surrounding of the conductive via hole can be surrounded by the embedded block containing conductive material, thereby protecting the signal of the conductive via hole from being interfered by noise, Furthermore, the loss of the signal can be reduced and the integrity of the signal can be improved.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention should be defined by the scope of the appended patent application.

100, 101: circuit board structure 110: Dielectric substrate 110a: top surface 110b: bottom surface 112: Grooving 114: through hole 116: Conductive via 118: dielectric material layer 120:Embedded block 120a: top surface 120b: bottom surface 121, 122: the first through hole 123, 124: the second through hole 130, 131, 132, 133: electronic components 130a: active surface 130b: back surface 130c: Pad 133a: conductive terminal 140: The first build-up line layer 141: the first dielectric layer 141a: dielectric layer 143, 144: the first line layer 145, 146: the first via hole 145a: via hole 150: The second build-up circuit layer 151: second dielectric layer 153, 154: second line layer 155, 156: the second via hole 160, 161: Conductive vias 170: Dielectric material 180, 181: Solder mask 190: Connection layer 191: The third dielectric layer 192: Third line layer 193: The third via hole G1, G2, G3: Gap

FIG. 1 is a schematic cross-sectional view of a circuit board structure according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention.

100: Circuit board structure

110: Dielectric substrate

110a: top surface

110b: bottom surface

112: Grooving

114: through hole

116: Conductive via

118: dielectric material layer

120:Embedded block

120a: top surface

120b: bottom surface

121, 122: the first through hole

123, 124: the second through hole

130, 131, 132, 133: electronic components

130a: active surface

130b: back surface

130c: Pad

133a: conductive terminal

140: The first build-up line layer

141: the first dielectric layer

143, 144: the first line layer

145, 146: the first via hole

150: The second build-up circuit layer

151: second dielectric layer

153, 154: second line layer

155, 156: the second via hole

160, 161: Conductive vias

170: Dielectric material

180, 181: Solder mask

G1, G2, G3: Gap

Claims (10)

A circuit board structure, comprising: a dielectric substrate having a top surface and a bottom surface opposite to the top surface, and including at least one through-groove penetrating through the dielectric substrate; at least one embedded block fixed to the at least one Inside the groove, it has a top surface and a bottom surface opposite to the top surface, and includes at least one first through hole and at least one second through hole; at least one electronic component is arranged on the at least one of the at least one embedded block. In a first through hole; at least one first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the at least one embedded block; at least one second build-up circuit layer is disposed on On the bottom surface of the dielectric substrate, covering the at least one embedded block; and at least one conductive via hole, disposed in the at least one second through hole of the at least one embedded block, and electrically The at least one first build-up circuit layer is connected to the at least one second build-up circuit layer. The circuit board structure according to claim 1, wherein said at least one embedded block is made of conductive material, said conductive material includes metal, alloy or metal mixed with non-metallic material, and said non-metallic material includes diamond or Graphene. The circuit board structure according to claim 1, wherein the at least one embedded block is made of non-conductive material, and the non-conductive material includes glass, ceramics or other organic materials. The circuit board structure as described in claim item 1 further includes: The connection layer is arranged between the at least one first build-up circuit layer and the at least one second build-up circuit layer, and electrically connects the at least one first build-up circuit layer and the at least one second build-up circuit layer Build-up line layer. The circuit board structure as claimed in claim 4, wherein the connection layer is electrically connected to the at least one first build-up circuit layer and the at least one electronic component. The circuit board structure as claimed in claim 1, wherein the at least one electronic component is a passive component. The circuit board structure as claimed in claim 1, wherein the at least one electronic component is an active component. The circuit board structure according to claim 7, wherein the active component is a bare die or a packaged module. The circuit board structure according to claim 1, further comprising: a dielectric material disposed in a gap between the at least one electronic component and the at least one embedded block, and includes prepreg or gel. The circuit board structure as claimed in claim 9, wherein the dielectric material is disposed in a gap between the at least one electronic component and the at least one second build-up circuit layer.

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