TWI801374B - 阻障膜沉積及處理 - Google Patents

阻障膜沉積及處理 Download PDF

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TWI801374B
TWI801374B TW107111822A TW107111822A TWI801374B TW I801374 B TWI801374 B TW I801374B TW 107111822 A TW107111822 A TW 107111822A TW 107111822 A TW107111822 A TW 107111822A TW I801374 B TWI801374 B TW I801374B
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power
substrate
film
ald
source
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TW107111822A
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TW201842218A (zh
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謝祥金
阿道夫米勒 艾倫
先敏 唐
吉留剛一
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美商應用材料股份有限公司
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Abstract

在低壓環境中將原子層沉積(ALD)處理與物理氣相沉積(PVD)處理結合,以產生高品質的阻障膜。使用ALD處理將初始阻障膜沉積在基板上,並接著移動到PVD腔室以處理阻障膜,以增加阻障膜的密度和純度,從而降低阻障膜的電阻率。將雙材料源濺射到基板上以提供摻雜,同時使用氣體來蝕刻基板以釋放氮氣。至少一個材料源被定位為以銳角提供摻雜給基板的表面,同時供應DC功率和在第一RF功率頻率下的RF功率。基板使用在第二RF功率頻率下的RF功率而偏壓。

Description

阻障膜沉積及處理
本揭露書的實施例大體關於基板處理。
基板被用於構建用於半導體工業的結構或裝置。使用薄膜沉積來沉積材料層以形成導體、通孔、半導體及其他結構/裝置來構建裝置。因為裝置的尺寸縮小(由於對更小和更快的電子裝置的需求),因此需要對薄膜處理進行更大的控制,以確保適當的裝置構造。較小的尺寸已導致從使用物理氣相沉積(PVD)腔室到原子層沉積(ALD)腔室的轉變。ALD腔室允許表面控制方法在整個裝置結構上產生高度均勻的膜。然而,當使用ALD腔室產生阻障膜時,由於ALD膜的低密度,阻障膜具有高電阻率,從而產生低品質的阻障膜。PVD腔室產生具有高密度和低電阻率的良好阻障性質,但是為非共形的,導致基板上未適當構建的裝置。
因此,發明人已提供了用於製造阻障膜的改進處理的實施例。
在低壓環境中將ALD處理與PVD處理結合,以產生高品質的阻障膜。使用ALD處理將初始阻障膜沉積在基板上,並接著移動到PVD腔室以處理阻障 膜,以增加阻障膜的密度和純度,從而降低阻障膜的電阻率。
在一些實施例中,提供了一種用於對基板上的原子層沉積(ALD)膜執行動態處理的方法。方法包含以下步驟:將處理腔室加壓到大於零到小於約10毫托的壓力;將材料的第一源和第二源濺射到ALD膜上,材料的第一源用RF功率或DC功率供應,且材料的第二源用在第一RF功率頻率下的RF功率和DC功率供應;用在第二RF功率頻率下的RF功率偏壓ALD膜;及在濺射材料的第一源和第二源的同時用至少一種氣體蝕刻ALD膜。
在其他實施例中,方法可以任何順序或結合進一步包含以下內容-使用材料的第二源以銳角濺射到ALD膜;使用惰性氣體,氮基氣體,或氧基氣體的至少一者蝕刻ALD膜;以約1.8MHz至約2.2MHz的第一RF功率頻率使用材料的第二源濺射;使用大於第一RF功率頻率的第二RF功率頻率偏壓ALD膜;在約攝氏15度至約攝氏400度的溫度下處理ALD膜;進行動態處理高達約10秒;對ALD膜進行脫氣和預清潔;當材料的第二源在約0伏特到約-1000伏特下時,僅使用材料的第二源濺射到ALD膜上,並當在約0伏特到約-1000伏特下濺射材料的第二源時,用至少一種氣體在約0伏特到約-300伏特的能量狀態下蝕刻ALD膜;將材料的第二源以銳角濺射到基板的表面;用至少部分地基於鉭或鈮的材料摻雜或濺射ALD膜;處理包含氮化鉭或氮化鈮的至少一種的ALD 膜;在製造膜堆疊的處理的至少一部分期間應用所述處理,膜堆疊包含選自由氮化鉭/鈷膜堆疊、氮化鉭/鈷/銅膜堆疊、氮化鉭/鉭/釕/銅膜堆疊及氮化鉭/釕/銅膜堆疊所組成的群組的至少一種。
在其它實施例中,一種使用整合工具在基板上處理ALD膜的方法可包含以下步驟:在ALD處理腔室中的基板上沉積ALD膜;在沒有真空破壞的情況下將基板傳送到PVD處理腔室;將PVD處理腔室加壓到大於零壓力至小於約10mTorr的壓力;同時用第一材料和第二材料摻雜ALD膜;及當用第一材料和第二材料摻雜ALD膜時,用至少一種氣體蝕刻ALD膜。
在其他實施例中,方法可以任何順序或結合進一步包含以下步驟-藉由使用DC功率濺射第一材料而用第一材料摻雜ALD膜;藉由使用DC功率和在第一RF功率頻率下的RF功率濺射第二材料而用第二材料摻雜ALD膜及以在第二RF功率頻率下的RF功率偏壓基板;及/或以約100瓦至約5000瓦的功率位準供應第一RF功率頻率,並以約100瓦至約1000瓦的功率位準供應第二RF功率頻率。
在其他實施例中,一種用於在基板上進行膜沉積的設備,包含:處理腔室,具有內部容積,內部容積具有基板支撐件、靶材和位於基板支撐件與靶材之間的感應線圈;氣體供應源,流體耦合到處理腔室的內部容積,提供蝕刻氣體;第一電源,與基板支撐件相互作用,以供應 在第一頻率下的RF功率;第二電源,與感應線圈相互作用,以供應第一DC功率和在小於第一頻率的第二頻率下的RF功率;第三電源,與靶材相互作用,以供應第二DC功率;及控制器,當濺射靶材或感應線圈時及當調節蝕刻氣體到處理腔室的內部容積的流量時,調整第一電源的第一RF功率位準、第二電源的第二RF功率位準、第二電源的第一DC功率位準及第三電源的第二DC功率位準。
下面描述本揭露書的其他和進一步的實施例。
100:處理腔室
102:側壁
103:底部
104:蓋組件
105:腔室主體
106:內部容積
108:基板支撐件
109:基板傳送埠
110:氣體源
111:支撐表面
112:泵
113:背板
114:靶材
116:源組件
117:電源
118:基板
120:內屏蔽件
122:外屏蔽件
123:徑向凸緣
126:覆蓋環
136:邊緣沉積環
138:熱控制器
140:線圈間隔件
142:感應線圈
144:接頭
150:功率源
158:記憶體
160:中央處理單元/CPU
162:支援電路
180:RF功率源
182:箭頭
198:控制器
200:代表圖
202:電漿
204:銳角
206:銳角
208:氣體
218:基板
220:通孔
300:方法
302:步驟
304:步驟
306:步驟
308:步驟
310:步驟
400:整合工具/工具
401:處理平台
402:系統控制器
403A-B:傳送腔室
404:工廠界面
405A-405D:FOUP
406A-B:裝載閘腔室
407:對接站
414A-F:處理腔室
416A-B:服務腔室
421:基板
430:中央處理單元/CPU
432:支援電路
434:記憶體
438:工廠介面機器人
440:冷卻站
442:預清潔站
442A:真空機器人
442B:真空機器人
上面簡要總結並在下面更詳細論述的本揭露書的實施例可藉由參考附隨的圖式中描繪的本揭露書的說明性實施例來理解。然而,附隨的圖式僅顯示了本揭露書的典型實施例,且因此不被認為是對範圍的限制,因為本揭露書可允許其他等效實施例。
第1圖描繪了根據本揭露書的一些實施例的PVD處理腔室的橫截面圖。
第2圖描繪了根據本揭露書的一些實施例的第1圖的PVD處理腔室的內部容積的代表圖。
第3圖描繪了根據本揭露書的一些實施例的處理基板的方法的流程圖。
第4圖描繪了根據本揭露書的一些實施例的適合於執行用於處理基板的方法的群集工具。
為促進理解,在可能的情況下使用相同的元件符號來表示共用於圖式中的相同元件。這些圖式不是按比 例繪製的,且為了清晰起見可能會被簡化。一個實施例的元件和特徵可有益地併入其他實施例中而無需進一步敘述。
如於此所用的術語「約」意指大約或接近於,且在所提出的數值或範圍的情況下是指數值的±15%或更小的變化。例如,相差±14%,±10%,或±5%的值將滿足約的定義。
ALD處理與PVD處理結合,以產生高品質的阻障膜。使用ALD處理將初始阻障膜沉積在基板上,並接著移動到PVD腔室以處理阻障膜以增加阻障膜的密度和純度,從而降低阻障膜的電阻率。處理可在處理之間有或沒有真空破壞的情況下執行。
對於尺寸為7nm和更小的基板裝置而言,PVD阻障膜和銅(Cu)互連件在RC(電阻/電容)減小(互連時間延遲)方面變得更具挑戰性。為了降低電阻(R),需要更薄的阻障。還需要考慮藉由調整阻障處理來提高回流焊或電鍍銅(ECP)的效能。一個有效的銅阻障需要連續的阻障。對於PVD處理來說,斜角損傷、突出部分、通孔電阻和共形問題在結合在一起時是非常難克服的。以氮化鉭(TaN)使用ALD處理通常會產生良好的共形覆蓋率。然而,ALD TaN膜具有低密度(由於富氮)和較高的電阻率。因此,ALD TaN膜不是有效的阻障,且ALD TaN膜也會導致更高的通孔電阻(由於均 勻的薄膜沉積填充通孔的底部)。電漿增強型ALD(PEALD)TaN可提高TaN膜的密度,但具有損害低k材料的不利結果(時間依賴性介電擊穿(TDDB)問題)。於此描述的技術提供了用PVD方式處理ALD膜(如,TaN膜)的解決方案,並改進了用於7nm及以下結構的阻障層應用(如,Cu阻障層應用)的ALD膜。所述方式也可用以增加其他應用的其他ALD或CVD膜的密度。典型的可被處理的膜堆疊可包括具有(例如)鈷(Co)和釕(Ru)的膜堆疊,諸如(例如)TaN/Co,TaN/Co/Cu,TaN/Ta/Ru/Cu,或TaN/Ru/Cu及類似者。
所揭露的方法適用於除TaN以外的材料和膜,諸如氮化鈮(NbN)和其他。然而,為了簡單起見,所描述的大多數實施例將使用TaN作為實例。首先將膜(如,TaN)沉積在ALD腔室中的基板上。接著將基板放置在具有雙頻率(第一和第二頻率)的PVD腔室中,該腔室可用於從ALD膜中選擇性移除氮氣並緻密化ALD膜,以獲得用於阻障應用的類PVD膜。PVD腔室具有也可提供用於斜面保護和側壁處理的金屬(如,鉭)源的雙材料源(靶材和線圈)(第一和第二源)。該處理可在整合處理系統(亦即,群集工具)中執行,或使用單獨的獨立腔室來執行。當使用整合處理系統時,將ALD膜沉積在基板上,並接著在沒有真空破壞的情況下將基板傳送到PVD腔室中進行處理。沒有真空破壞會縮短總體處理時間。然而,該處理也可使用獨立腔室來完成。在ALD腔 室中將膜沉積在基板上之後,基板將遇到真空破壞且在插入到PVD腔室中以進行處理之前被脫氣及預清潔。
第1圖描繪了根據本揭露書的一些實施例的說明性處理腔室100(如,PVD腔室)的示意性橫截面圖。合適的PVD腔室的實例包括可從加州聖克拉拉市的應用材料公司商購獲得的ENCORE® II和ENCORE® III以及其他PVD處理腔室。然而,所揭露的方法也可在可從其他製造商獲得的處理腔室中使用。在一個實施例中,處理腔室100能夠在基板118上沉積(例如)鉭、氮化鉭、氮化鈦、鎢、氮化鎢、鈮、氮化鈮及類似者。
處理腔室100具有腔室主體105,腔室主體105包括側壁102、底部103和蓋組件104,其全部封閉內部容積106。基板支撐件108設置在處理腔室100的內部容積106的下部與靶材114相對。在側壁102中形成基板傳送埠109,用於傳送基板進出內部容積106。
氣體源110耦接到處理腔室100,以將處理氣體供應到內部容積106中。在一個實施例中,處理氣體可包括惰性氣體、非反應性氣體和反應性氣體等。可由氣體源110提供的處理氣體的實例包括(但不限於)氬氣(Ar)、氦氣(He)、氖氣(Ne)、氮氣(N2)、氧氣(O2)和H2O等等。
泵112耦接至處理腔室100,與內部容積106連通,以控制內部容積106的壓力。在一個實施例中,處理腔室100的壓力可保持在大於零壓力至約10毫托或更 少壓力下。在另一個實施例中,處理腔室100內的壓力可保持在約3毫托。
背板113可將靶材114支撐在內部容積106的上部中。靶材114通常提供將沉積在基板118上的材料源。靶材114可由含有(Ti)金屬,鉭金屬(Ta),鈮(Nb)金屬,鎢(W)金屬,鈷(Co),鎳(Ni),銅(Cu),鋁(Al),它們的合金,它們的組合,或類似者的材料所製成。在於此描繪的實例性實施例中,靶材114可用鉭金屬(Ta)或鈮金屬(Nb)製成。
靶材114可耦接到包含用於靶材114的電源117的源組件116。在一些實施例中,電源117可為RF電源。在一些實施例中,電源117可替代地是DC源電源。在一些實施例中,電源117可包括DC和RF功率源兩者。
另外的RF功率源180還可通過基板支撐件108耦接到處理腔室100,以在靶材114和基板支撐件108之間提供偏壓功率。在一個實施例中,RF功率源180可提供功率到基板支撐件108,以在約1MHz和約100MHz之間的頻率(諸如約13.56MHz)下偏壓基板118。
如箭頭182所示,基板支撐件108可在升高位置和降低位置之間移動。在降低位置中,基板支撐件108的支撐表面111可與基板傳送埠109對準或恰好在基板傳送埠109之下方,以促進基板118從處理腔室100的進入和移除。支撐表面111可具有邊緣沉積環136,邊緣沉 積環136經調整尺寸以在其上接收基板118,同時保護基板支撐件108免受電漿和沉積材料的影響。基板支撐件108可移動到更靠近靶材114的升高位置以處理在處理腔室100中的基板118。當基板支撐件108在升高位置中時,覆蓋環126可嚙合邊緣沉積環136。覆蓋環126可防止沉積材料橋接在基板118和基板支撐件108之間。當基板支撐件108在降低位置中時,覆蓋環126懸掛在基板支撐件108和位於其上的基板118之上方以允許基板傳送。
在諸如從ALD腔室到處理腔室100的基板傳送期間,其上具有基板118的機器人葉片(未顯示)延伸通過基板傳送埠109。升降銷(未顯示)延伸通過基板支撐件108的支撐表面111,以從基板支撐件108的支撐表面111升高基板118,從而允許機器人葉片在基板118和基板支撐件108之間通過的空間。機器人接著可從處理腔室100攜帶基板118通過基板傳送埠109。基板支撐件108及/或升降銷的升高和降低可藉由控制器198控制。
在濺射沉積期間,可藉由利用設置在基板支撐件108中的熱控制器138來控制基板118的溫度。基板118可任選地被加熱到用於處理的期望溫度。在一些實施例中,可使用任選的加熱來使基板及/或膜的溫度達到約攝氏200至約攝氏400度的溫度。在其他實施例中,可在室溫(約攝氏15度至約攝氏30度)下處理基板。在其他實施例中,溫度可包括約攝氏15度至約攝氏400度的範圍。在處理之後,利用設置在基板支撐件108中的熱控制 器138可快速冷卻基板118。熱控制器138控制基板118的溫度,並可用來將基板118的溫度從第一溫度在幾秒到約一分鐘內改變到第二溫度。
內屏蔽件120可定位在靶材114與基板支撐件108之間的內部容積106中。內屏蔽件120可由鋁或不銹鋼等其他材料形成。在一個實施例中,內屏蔽件120由不銹鋼形成。外屏蔽件122可形成在內屏蔽件120和側壁102之間。外屏蔽件122可由鋁或不銹鋼等其他材料形成。外屏蔽件122可延伸經過內屏蔽件120並經配置成當基板支撐件108在降低位置中時支撐覆蓋環126。
在一個實施例中,內屏蔽件120包括徑向凸緣123,徑向凸緣123包括大於內屏蔽件120的外徑的內徑。徑向凸緣123從內屏蔽件120以相對於內屏蔽件120的內徑表面大於約90度(90°)的角度延伸。徑向凸緣123可為從內屏蔽件120的表面延伸的圓形脊,且通常適於與形成在設置在基板支撐件108上的覆蓋環126中的凹部相匹配。凹部可為形成在覆蓋環126中的圓形凹槽,凹部使得覆蓋環126相對於基板支撐件108的縱向軸線而居中。
在一些實施例中,處理腔室100可包括感應線圈142。處理腔室100的感應線圈142可具有一匝或多於一匝。感應線圈142可恰好在內屏蔽件120內部並且定位在基板支撐件108之上方。感應線圈142可定位成比靶材114更靠近基板支撐件108。感應線圈142可由類似於靶 材114的成分(諸如(例如)鉭或鈮)的材料所形成,以充當次要濺射靶材。感應線圈142藉由複數個線圈間隔件140從內屏蔽件120支撐。線圈間隔件140可將感應線圈142與內屏蔽件120和其他腔室部件電隔離。
感應線圈142可耦接到功率源150。功率源150可具有穿過處理腔室100的側壁102、外屏蔽件122、內屏蔽件120和線圈間隔件140的電引線。電引線連接到感應線圈142上的接頭144,用於向感應線圈142提供功率。接頭144可具有用於向感應線圈142提供功率的複數個絕緣電連接件。另外,接頭144可經配置成與線圈間隔件140介面連接並支撐感應線圈142。在一個實施例中,功率源150向感應線圈142施加電流,以在處理腔室100內感應RF場並將功率耦合到電漿以增加電漿密度,亦即,反應離子的濃度。在一些實施例中,感應線圈142在RF功率頻率下操作,該RF功率頻率小於RF功率源180的RF功率頻率。在一個實施例中,供應給感應線圈142的RF功率頻率為約2MHz。在其他實施例中,RF功率頻率可在約1.8MHz至約2.2MHz的範圍中操作。在其他實施例中,RF功率頻率可在從約0.1MHz至99MHz的範圍內。在一些實施例中,感應線圈142由可被濺射到基板上的材料(諸如金屬材料)製成。功率源150也可接著將DC功率施加到感應線圈142,以在將RF功率耦合到電漿的同時使得感應線圈142能夠濺射。
控制器198耦接到處理腔室100。控制器198包括中央處理單元(CPU)160、記憶體158和支援電路162。控制器198用以控制處理順序、調節從氣體源110到處理腔室100的氣體流並控制靶材114和感應線圈142的離子轟擊。在一個實施例中,當濺射靶材及/或感應線圈時及當調節進入處理腔室100的內部容積106中的蝕刻氣體流時,控制器198調整第一電源(如,RF功率源180)的第一RF功率位準、第二電源(如,功率源150)的第二RF功率位準、第二電源(如,功率源150)的第一DC功率位準及第三電源(如,電源117)的第二DC功率位準。
CPU 160可為可在工業環境中使用的任何形式的通用電腦處理器。軟體常式可儲存在記憶體158中,該記憶體諸如隨機存取記憶體,唯讀記憶體,軟碟或硬碟驅動器,或其他形式的數位記憶體。支援電路162通常耦接到CPU 160,並可包含快取、時脈電路、輸入/輸出子系統、電源及類似者。當由CPU 160執行時,軟體常式將CPU 160變換成控制處理腔室100的專用電腦(控制器)198,使得根據本揭露書執行處理。軟體常式也可由位於遠離處理腔室100的第二控制器(未顯示)儲存及/或執行。
第2圖是在處理基板218期間處理腔室100的內部容積106的代表圖200。為了說明的目的,基板218沒有按比例顯示,使得可容易地看到基板218上的裝置的 特徵。當處理基板218時,PVD處理腔室使用電源117和功率源150來濺射金屬(諸如(例如)鉭或鈮或其衍生物等)。在一些實施例中,電源117操作以產生DC功率,以濺射金屬靶材,同時功率源150作為DC源操作以濺射感應線圈142,並在低於RF功率源180的操作RF頻率的頻率下作為RF功率源操作,以增加內部容積106中的電漿密度。在一些實施例中,功率源150在約0.1MHz至99MHz的RF功率頻率下操作。在其他實施例中,功率源150在約1.8MHz至約2.2MHz的RF功率頻率下操作。
在一些實施例中,靶材114和感應線圈142由相同的材料(諸如(例如)鉭或鈮等)組成。雙源有助於提供穩定的電漿和足夠的能量來選擇性地蝕刻氮,同時保持金屬膜完整或至少最低限度地蝕刻。RF功率源180在大於功率源150的操作RF功率頻率的RF功率頻率下操作,以偏壓基板218。在一些實施例中,RF功率源180在約1MHz至約100MHz的RF功率頻率下操作。在其他實施例中,RF功率源在約13.56MHz的RF功率頻率下操作。
在一些實施例中,氣體源110將氣體208供應到內部容積106中。在一些實施例中,氣體208可為惰性氣體,諸如(例如)氬氣(Ar),氦氣(He),氙氣(Xe),氖氣(Ne),或氪氣(Kr)。在一些實施例中,氣體208也可為反應性氣體,諸如(例如)氮氣(N2)或氧氣(O2)。在一些實施例中,氣體208也可為一種或多種惰性氣體和一種或多種反應性氣體的結合。將氣體208引入形成在基 板218之上方的電漿202中。泵212將內部容積106保持在小於約10毫托的壓力下,同時熱控制器138將基板218保持在約攝氏200至約攝氏400度或在室溫(約攝氏15度至約攝氏30度)下。靶材114以隨機角度將離子濺射入射到基板218,且通常這些角度不能在垂直或接近垂直(傾斜)的特徵上提供良好的覆蓋。感應線圈142提供以銳角204、206濺射到基板218的離子,以提供對基板218上的結構的側壁、斜面和傾斜特徵的覆蓋。
第3圖是根據本揭露書的實施例的用於處理沉積在基板上的膜的方法300。處理以有順序的方式顯示,但並不要求處理以確切的順序執行,或必須執行所有的處理。某些處理可能會在其他處理之前或之後出現,或可能會同時執行。在執行其他處理之前,在處理之間會發生疊代。參考第1圖和第2圖兩者中所示的元件。將基板上的ALD膜插入PVD腔室中,且方法300如302所示藉由將處理腔室加壓到大於零壓力至小於約10mTorr的壓力而開始。在一些實施例中,處理腔室維持在約3mTorr。
在一些實施例中,ALD膜/基板溫度在處理期間可處於室溫。在其他實施例中,代替在室溫下(如,約攝氏15度至約攝氏30度)利用基板執行處理,ALD膜/基板可任選地被加熱至約攝氏200度至約攝氏400度,如304所示。在其他實施例中,ALD膜/基板可任選地從約攝氏15度加熱到約攝氏400度。在ALD膜處理期間,PVD腔室環境可保持在室溫或在中等到高溫和非常低的 壓力環境下。在一些實施例中,基板及/或ALD膜的溫度保持在約攝氏325度。基板上的ALD膜可由任何類型的材料或材料的結合所組成。為了簡潔起見,實施例的實例使用TaN或NbN作為待處理的ALD膜。在PVD腔室中處理之前的ALD膜具有與ALD相關聯的典型性質,因為若用作阻障膜,膜是共形的但具有低密度和高電阻率,使得ALD膜成為不良的阻障膜。
如306和308所示,功率被施加到靶材(諸如靶材114)、線圈(諸如感應線圈142)和偏壓部件(諸如RF功率源180),以產生濺射/摻雜和電漿。靶材114通常是金屬材料並使用來自電源(諸如電源117)的DC功率進行濺射。若靶材114是金屬氧化物材料,則可使用RF功率。在一個實施例中,線圈(諸如感應線圈142)作為DC功率源和作為具有約0.1MHz至約99MHz的頻率(如,在一些實施例中約1.8MHz至約2.2MHz)的RF功率源來操作,而偏壓部件(諸如RF功率源180)以大於用於感應線圈142的頻率(如,在一些實施例中約13.56MHz的頻率)的頻率而操作(DC功率也可與RF功率一起施加到感應線圈142)。如第2圖所示,濺射靶材114釋放隨機引導的離子,離子通常以基本上垂直的入射角度撞擊基板218,以用來自靶材114的材料(如,鉭、鈮等)摻雜ALD膜。感應線圈142也被濺射,且來自感應線圈142的離子以銳角204、206而引導到基板218的表面。來自感應線圈142的濺射以來自感應線圈142的材 料(如,鉭、鈮等)摻雜基板218的側壁、斜面和傾斜。雙源允許選擇性摻雜ALD膜。
ALD膜被同時地摻雜以增加密度並被蝕刻以移除膜中的氮,如310所示。PVD腔室環境(諸如內部容積106)填充有至少一種氣體(諸如(例如)氬氣,或氬氣和氮氣,或其它惰性氣體及/或反應氣體),且在大於零壓力且小於約10毫托的壓力下。氣體(諸如第2圖的氣體208)用以提供基板(諸如基板218)的蝕刻,以從ALD膜釋放氮氣。若壓力不能保持在非常低,則一些材料(諸如鉭)就是非常好的吸氧劑,而較高的壓力會產生氮氧化物,從而導致氮移除的效率低下。
在發生ALD膜的摻雜的同時,氣體208(諸如氬氣,或氬氣和氮氣等)提供對基板218的表面的低能量(0v至-300v)蝕刻。低能量蝕刻允許從ALD膜選擇性地移除氮。低能量蝕刻是選擇性的,因為蝕刻移除氮而鉭或其他材料的移除可忽略或沒有移除。蝕刻通常對垂直於基板支撐件的表面(諸如將用作連接點的通孔220的底部)具有最大的影響。因為通孔220的底部的蝕刻速率較高,因此通孔220的電阻率大大降低。感應線圈142的濺射有助於保護將被過度蝕刻的基板218的那些特徵,從而保持這些區域中的材料厚度。雙源(材料的第一源和第二源)-靶材114和感應線圈142-為側壁提供斜面保護和偏角(銳角)處理兩者。處理持續時間高達約10秒。在一些實施例中,只有具有低電壓(0v至-1000v)的感應 線圈142在處理期間(靶材114未被濺射)用作源並執行氬蝕刻。感應線圈142的低電壓顯著減少了感應線圈142的濺射,主要僅留下氬蝕刻。通常在氬蝕刻之後進行PVD快閃以保護基板上的裝置的任何斜面特徵。PVD快閃沉積PVD膜的薄層(如,約3至約20埃),以改善表面形態。
在一個實施例中,用於感應線圈142的RF功率為約100瓦至約5000瓦,其中偏壓功率在約100瓦至約1000瓦或更小。由氣體源110提供的氣體流率為約100sccm(每分鐘標準立方厘米)或更少。內部容積106的壓力保持在約3毫托。基板的溫度藉由熱控制器138保持在大約攝氏325度。處理持續時間為約2秒至約3秒。短的持續時間允許更高的處理量(如,產出),特別是當使用整合系統或群集工具時(參見下面的第4圖)。
在PVD腔室中處理之後,ALD膜具有與PVD處理相關聯的典型特質,但具有ALD膜的共形特質。動態處理的製程創造出具有高密度和低電阻率的長效高品質阻障膜。
於此描述的方法可在單獨的處理腔室中執行,這些處理腔室可以獨立的配置提供,或作為群集工具(例如,下面關於第4圖描述的整合工具400(亦即,群集工具))的一部分提供。使用整合工具400的優點在於在PVD腔室中處理之前不存在真空破壞且不需要對基板進行脫氣和預清潔。整合工具400的實例包括可從加州聖克 拉拉市的應用材料公司獲得的CENTURA®和ENDURA®整合工具。然而,於此描述的方法可使用具有合適的處理腔室的其他群集工具,或在其他合適的處理腔室中實施。例如,在一些實施例中,上面討論的本發明方法可有利地在整合工具中執行,使得在處理之間存在有限的真空破壞或沒有真空破壞。例如,減少的真空破壞可限制或防止基板的污染。
整合工具400包括真空密封處理平台401、工廠介面404和系統控制器402。處理平台401包含可操作地耦接到真空基板傳送腔室(傳送腔室403A、403B)的多個處理腔室(諸如414A、414B、414C、414D、414E和414F)。工廠介面404藉由一個或多個裝載閘腔室(兩個裝載閘腔室,諸如第4圖所示的406A和406B)而可操作地耦接至傳送腔室403A。
在一些實施例中,工廠介面404包含至少一個對接站407、至少一個工廠介面機器人438,以促進半導體基板的傳送。對接站407被配置為接受一或多個前開式晶圓盒(FOUP)。在第4圖的實施例中顯示了四個FOUP(諸如405A、405B、405C和405D)。工廠介面機器人438被配置為通過裝載閘腔室(諸如406A和406B)將基板從工廠介面404傳送到處理平台401。裝載閘腔室406A和406B的每一個具有耦接到工廠介面404的第一埠和耦接到傳送腔室403A的第二埠。裝載閘腔室406A和406B耦接到壓力控制系統(未顯示),該壓力 控制系統抽空並排空裝載閘腔室406A和406B,以促進在傳送腔室403A的真空環境和工廠介面404的基本周遭(如,大氣)環境之間傳送基板。傳送腔室403A、403B具有佈置在各個傳送腔室403A、403B中的真空機器人442A、442B。真空機器人442A能夠在裝載閘腔室406A、406B、處理腔室414A和414F以及冷卻站440或預清潔站442之間傳送基板421。真空機器人442B能夠在冷卻站440或預清潔站442及處理腔室414B、414C、414D和414E之間傳送基板421。
在一些實施例中,處理腔室414A、414B、414C、414D、414E和414F耦接到傳送腔室403A、403B。處理腔室414A、414B、414C、414D、414E和414F至少包含原子層沉積(ALD)處理腔室和物理氣相沉積(PVD)處理腔室。還可提供額外的腔室,諸如CVD腔室,退火腔室,額外的ALD腔室,額外的PVD腔室,或類似者。如上所論述的,ALD和PVD腔室可包括適合於執行於此所述的方法的全部或部分的任何腔室。
在一些實施例中,一或多個任選的服務腔室(顯示為416A和416B)可耦接至傳送腔室403A。服務腔室416A和416B可被配置成執行其他基板處理,諸如脫氣、取向、基板計量、冷卻及類似者。
系統控制器402使用處理腔室414A、414B、414C、414D、414E和414F的直接控制或者替代地藉由控制與處理腔室414A、414B、414C、 414D、414E和414F及工具400相關聯的電腦(或控制器)來控制工具400的操作。在操作中,系統控制器402使得來自各個腔室和系統的數據收集和反饋能夠優化工具400的效能。系統控制器402通常包括中央處理單元(CPU)430、記憶體434和支援電路432。CPU 430可為可在工業環境中使用的任何形式的通用電腦處理器。支援電路432通常耦接到CPU 430,且可包含快取、時脈電路、輸入/輸出子系統、電源及類似者。軟體常式(諸如上述的方法)可儲存在記憶體434中,且當由CPU 430執行時,將CPU 430變換為專用電腦(系統控制器402)。軟體常式也可由位於遠離工具400的第二控制器(未顯示)儲存及/或執行。
儘管前述內容涉及本揭露書的實施例,但可在不背離本揭露書的基本範圍的情況下,可設計本揭露書的其他和進一步的實施例。
100‧‧‧處理腔室
102‧‧‧側壁
103‧‧‧底部
104‧‧‧蓋組件
105‧‧‧腔室主體
106‧‧‧內部容積
108‧‧‧基板支撐件
109‧‧‧基板傳送埠
110‧‧‧氣體源
111‧‧‧支撐表面
112‧‧‧泵
113‧‧‧背板
114‧‧‧靶材
116‧‧‧源組件
117‧‧‧電源
118‧‧‧基板
120‧‧‧內屏蔽件
122‧‧‧外屏蔽件
123‧‧‧徑向凸緣
126‧‧‧覆蓋環
136‧‧‧邊緣沉積環
138‧‧‧熱控制器
140‧‧‧線圈間隔件
142‧‧‧感應線圈
144‧‧‧接頭
150‧‧‧功率源
158‧‧‧記憶體
160‧‧‧中央處理單元/CPU
162‧‧‧支援電路
180‧‧‧RF功率源
182‧‧‧箭頭
198‧‧‧控制器

Claims (18)

  1. 一種用於對一基板上的一原子層沉積(ALD)膜執行一動態處理的方法,包含以下步驟:將一處理腔室加壓到大於零至小於約10毫托的一壓力;藉由將一第一材料的一第一源和一第二材料的一第二源濺射到該ALD膜上而摻雜該ALD膜,該第一材料的該第一源用RF功率或DC功率供應,且該第二材料的該第二源用在一第一RF功率頻率下的RF功率和用DC功率供應;用在一第二RF功率頻率下的一RF功率偏壓該ALD膜;及藉由在濺射該第一材料的該第一源和該第二材料的該第二源的同時用一惰性氣體、一氮基氣體或一氧基氣體中的至少一者蝕刻該ALD膜,而從該ALD膜選擇性移除氮。
  2. 如請求項1所述之方法,進一步包含:使用該第二材料的該第二源以一銳角濺射到該ALD膜。
  3. 如請求項1所述之方法,進一步包含:以約1.8MHz至約2.2MHz的該第一RF功率頻率使用該第二材料的該第二源濺射。
  4. 如請求項1所述之方法,進一步包含:使用大於該第一RF功率頻率的該第二RF功率頻率偏壓該ALD膜。
  5. 如請求項1所述之方法,進一步包含:在約攝氏15度至約攝氏400度的一溫度下處理該ALD膜。
  6. 如請求項1所述之方法,進一步包含:進行該動態處理高達約10秒。
  7. 如請求項6所述之方法,進一步包含:進行該動態處理約2秒至約3秒。
  8. 如請求項1所述之方法,進一步包含:對該ALD膜進行脫氣和預清潔。
  9. 如請求項1所述之方法,進一步包含:當在約0伏特到約-1000伏特下濺射該第二材料的該第二源時,用該惰性氣體、該氮基氣體或該氧基氣體中的該至少一者在約0伏特到約-300伏特的能量狀態下蝕刻該ALD膜。
  10. 如請求項9所述之方法,進一步包含:將該第二材料的該第二源以一銳角濺射到該基板的一表面。
  11. 如請求項1所述之方法,進一步包含:藉由用至少部分基於鉭或鈮的該第一材料和該第二 材料濺射該ALD膜而摻雜該ALD膜。
  12. 如請求項1所述之方法,進一步包含:處理包含氮化鉭或氮化鈮的至少一種的該ALD膜。
  13. 如請求項1所述之方法,進一步包含:在製造一膜堆疊的一處理的至少一部分期間應用該動態處理,該膜堆疊包含選自由一氮化鉭/鈷膜堆疊、一氮化鉭/鈷/銅膜堆疊、一氮化鉭/鉭/釕/銅膜堆疊及一氮化鉭/釕/銅膜堆疊所組成的群組的至少一種。
  14. 一種使用一整合工具在一基板上處理一原子層沉積(ALD)膜的方法,包含以下步驟:在一ALD處理腔室中的一基板上沉積一ALD膜;在沒有一真空破壞的情況下將該基板傳送到一物理氣相沉積(PVD)處理腔室;將該PVD處理腔室加壓到大於零且小於約10mTorr的一壓力;同時用一第一材料和一第二材料摻雜該ALD膜;藉由使用DC功率濺射該第一材料而用該第一材料摻雜該ALD膜;藉由使用一DC功率和在一第一RF功率頻率下的一RF功率濺射該第二材料而用該第二材料摻雜該ALD膜; 以在一第二RF功率頻率下的RF功率偏壓該基板;及藉由在用該第一材料和該第二材料摻雜該ALD膜的同時用一惰性氣體、一氮基氣體或一氧基氣體中的至少一者蝕刻該ALD膜,而從該ALD膜選擇性移除氮。
  15. 如請求項14所述之方法,進一步包含:以約100瓦至約5000瓦的一功率位準供應該第一RF功率頻率;及以約100瓦至約1000瓦的一功率位準供應該第二RF功率頻率。
  16. 如請求項14所述之方法,進一步包含:以小於約100sccm的一速率流動該惰性氣體、該氮基氣體或該氧基氣體中的該至少一者,以蝕刻該ALD膜。
  17. 如請求項14所述之方法,進一步包含:以位於與該基板的一表面成一銳角的該第二材料的一源摻雜該ALD膜。
  18. 一種用於在一基板上進行膜沉積的設備,包含:一處理腔室,具有一內部容積,該內部容積具有一基板支撐件、一第一濺射材料的一靶材和位於該基板 支撐件與該靶材之間的一第二濺射材料的一感應線圈;一氣體供應源,流體耦合到該處理腔室的該內部容積,提供一蝕刻氣體;一第一電源,與該基板支撐件相互作用,以供應在一第一頻率下的一RF功率;一第二電源,與該感應線圈相互作用,以供應一第一DC功率和在小於該第一頻率的一第二頻率下的一RF功率;一第三電源,與該靶材相互作用,以供應一第二DC功率;及一控制器,當濺射該第一濺射材料的該靶材和該第二濺射材料的該感應線圈時及當調節該蝕刻氣體到該處理腔室的該內部容積的一流量時,調整該第一電源的一第一RF功率位準、該第二電源的一第二RF功率位準、該第二電源的一第一DC功率位準及該第三電源的一第二DC功率位準,該控制器經配置成在藉由濺射該第一濺射材料和該第二濺射材料而摻雜一原子層沉積(ALD)膜期間藉由蝕刻該ALD膜,而從該ALD膜選擇性移除氮。
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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018188354A (ja) * 2017-04-27 2018-11-29 ショット アクチエンゲゼルシャフトSchott AG 光学部品、好ましくは耐劣化性を向上させた光学部品およびその製造方法
US10566232B2 (en) * 2017-05-18 2020-02-18 Taiwan Semiconductor Manufacturing Co., Ltd. Post-etch treatment of an electrically conductive feature
US10964590B2 (en) * 2017-11-15 2021-03-30 Taiwan Semiconductor Manufacturing Co., Ltd. Contact metallization process
CN112201618A (zh) * 2020-09-30 2021-01-08 上海华力集成电路制造有限公司 一种优化衬垫层质量的方法
TWI834028B (zh) * 2021-03-11 2024-03-01 台灣積體電路製造股份有限公司 物理氣相沉積裝置、沉積薄膜的方法和形成半導體結構的方法
US20220364230A1 (en) * 2021-05-12 2022-11-17 Applied Materials, Inc. Pulsing plasma treatment for film densification

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050263390A1 (en) * 2004-05-26 2005-12-01 Applied Materials, Inc. Multi-step process for forming a metal barrier in a sputter reactor
US20060057843A1 (en) * 2002-09-11 2006-03-16 Applied Materials, Inc. Methods and apparatus for forming barrier layers in high aspect ratio vias
CN104428441A (zh) * 2012-07-02 2015-03-18 应用材料公司 由物理气相沉积形成的氮化铝缓冲层和活性层

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6187151B1 (en) 1997-01-02 2001-02-13 Micron Technology, Inc. Method of in-situ cleaning and deposition of device structures in a high density plasma environment
US6077402A (en) 1997-05-16 2000-06-20 Applied Materials, Inc. Central coil design for ionized metal plasma deposition
US6345588B1 (en) 1997-08-07 2002-02-12 Applied Materials, Inc. Use of variable RF generator to control coil voltage distribution
US6350353B2 (en) 1999-11-24 2002-02-26 Applied Materials, Inc. Alternate steps of IMP and sputtering process to improve sidewall coverage
US6482733B2 (en) 2000-05-15 2002-11-19 Asm Microchemistry Oy Protective layers prior to alternating layer deposition
US6951804B2 (en) * 2001-02-02 2005-10-04 Applied Materials, Inc. Formation of a tantalum-nitride layer
US20030029715A1 (en) 2001-07-25 2003-02-13 Applied Materials, Inc. An Apparatus For Annealing Substrates In Physical Vapor Deposition Systems
US7049226B2 (en) 2001-09-26 2006-05-23 Applied Materials, Inc. Integration of ALD tantalum nitride for copper metallization
US6866255B2 (en) * 2002-04-12 2005-03-15 Xerox Corporation Sputtered spring films with low stress anisotropy
JP2007523994A (ja) 2003-06-18 2007-08-23 アプライド マテリアルズ インコーポレイテッド バリヤ物質の原子層堆積
US20050098427A1 (en) 2003-11-11 2005-05-12 Taiwan Semiconductor Manufacturing Co., Ltd. RF coil design for improved film uniformity of an ion metal plasma source
US20050277292A1 (en) * 2004-05-28 2005-12-15 Chao-Hsien Peng Method for fabricating low resistivity barrier for copper interconnect
US7202187B2 (en) * 2004-06-29 2007-04-10 International Business Machines Corporation Method of forming sidewall spacer using dual-frequency plasma enhanced CVD
US7829471B2 (en) * 2005-07-29 2010-11-09 Applied Materials, Inc. Cluster tool and method for process integration in manufacturing of a photomask
US7837838B2 (en) * 2006-03-09 2010-11-23 Applied Materials, Inc. Method of fabricating a high dielectric constant transistor gate using a low energy plasma apparatus
US20080132060A1 (en) * 2006-11-30 2008-06-05 Macronix International Co., Ltd. Contact barrier layer deposition process
JP2009270158A (ja) * 2008-05-08 2009-11-19 Canon Anelva Corp マグネトロンスパッタリング装置及び薄膜の製造法
US20100096255A1 (en) * 2008-10-22 2010-04-22 Applied Materials, Inc. Gap fill improvement methods for phase-change materials
US20100314244A1 (en) * 2009-06-12 2010-12-16 Applied Materials, Inc. Ionized Physical Vapor Deposition for Microstructure Controlled Thin Film Deposition
US20100314245A1 (en) * 2009-06-12 2010-12-16 Applied Materials, Inc. Ionized Physical Vapor Deposition for Microstructure Controlled Thin Film Deposition
JP6329839B2 (ja) * 2014-07-29 2018-05-23 東京エレクトロン株式会社 プラズマ処理装置及びプラズマ処理方法
US10096548B2 (en) * 2015-03-16 2018-10-09 Tokyo Electron Limited Method of manufacturing Cu wiring

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060057843A1 (en) * 2002-09-11 2006-03-16 Applied Materials, Inc. Methods and apparatus for forming barrier layers in high aspect ratio vias
US20050263390A1 (en) * 2004-05-26 2005-12-01 Applied Materials, Inc. Multi-step process for forming a metal barrier in a sputter reactor
CN104428441A (zh) * 2012-07-02 2015-03-18 应用材料公司 由物理气相沉积形成的氮化铝缓冲层和活性层

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