TWI797802B - Plasma processing apparatus - Google Patents

Plasma processing apparatus Download PDF

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TWI797802B
TWI797802B TW110140367A TW110140367A TWI797802B TW I797802 B TWI797802 B TW I797802B TW 110140367 A TW110140367 A TW 110140367A TW 110140367 A TW110140367 A TW 110140367A TW I797802 B TWI797802 B TW I797802B
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Taiwan
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hole
pin
conductive
plasma processing
electrostatic chuck
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TW110140367A
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Chinese (zh)
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TW202207306A (en
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佐佐木康晴
石川聡
千葉諒
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日商東京威力科創股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68742Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32431Constructional details of the reactor
    • H01J37/32715Workpiece holder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833Details of electrostatic chucks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T279/00Chucks or sockets
    • Y10T279/23Chucks or sockets with magnetic or electrostatic means

Abstract

A plasma processing apparatus includes an electrostatic chuck and a lifter pin. The electrostatic chuck has a mounting surface on which a target object is mounted and a back surface opposite to the mounting surface, and a through hole formed through the mounting surface and the back surface. The lifter pin is at least partially formed of an insulating member and has a leading end accommodated in the through hole. The lifter pin vertically moves with respect to the mounting surface to vertically transfer the target object. A conductive material is provided at at least one of a leading end portion of the lifter pin which corresponds to the through hole and a wall surface of the through hole which faces the lifter pin.

Description

電漿處理裝置Plasma treatment device

本發明之各種態樣及實施形態係關於一種電漿處理裝置。Various aspects and embodiments of the present invention relate to a plasma processing device.

自先前以來,已知有使用電漿對晶圓等被處理體進行電漿處理之電漿處理裝置。此種電漿處理裝置例如於能夠構成真空空間之處理容器內,具有兼用作電極之保持被處理體的載置台。電漿處理裝置藉由對載置台施加特定之高頻電力,從而對配置於載置台之被處理體進行電漿處理。於載置台,形成有收容有升降銷之貫通孔。電漿處理裝置中,於搬送被處理體之情形時,使升降銷自貫通孔突出,利用升降銷自背面支持被處理體使其脫離載置台。關於升降銷,為了抑制因暴露於電漿而引起之異常放電的產生,而由絕緣性構件形成,下部由導電材料形成。 [先前技術文獻] [專利文獻] [專利文獻1]日本專利特開2000-195935號公報Conventionally, there has been known a plasma processing apparatus that performs plasma processing on an object to be processed, such as a wafer, using plasma. This type of plasma processing apparatus has, for example, a mounting table that also serves as an electrode and holds an object to be processed in a processing container that can constitute a vacuum space. The plasma processing device performs plasma processing on the object to be processed arranged on the mounting table by applying specific high-frequency power to the mounting table. A through hole in which the lift pin is accommodated is formed on the mounting table. In the plasma processing apparatus, when the object to be processed is transported, the lift pins are protruded from the through holes, and the object to be processed is supported from the back side by the lift pins so as to be detached from the mounting table. The lift pin is formed of an insulating member and the lower part is formed of a conductive material in order to suppress the generation of abnormal discharge caused by exposure to plasma. [Prior Art Literature] [Patent Document] [Patent Document 1] Japanese Patent Laid-Open No. 2000-195935

[發明所欲解決之問題] 且說,近年來,電漿處理裝置為了進行電漿處理而使施加至載置台之高頻電力高電壓化。於使施加至載置台之高頻電力高電壓化之情形時,存在於收容有升降銷之貫通孔產生異常放電的情況。電漿處理裝置中,若於貫通孔產生異常放電,則有使被處理體之品質惡化,成為良率惡化之主要原因之虞。 [解決問題之技術手段] 揭示之電漿處理裝置於1個實施形態中,具有靜電吸盤及升降銷。靜電吸盤具有供載置被處理體之載置面及與載置面相對之背面,且形成有貫通載置面與背面之通孔。升降銷係至少一部分由絕緣性構件形成,前端收容於通孔,藉由相對於載置面於上下方向移動而於上下方向搬送被處理體。電漿處理裝置於升降銷之與通孔對應之前端部分、及通孔之與升降銷相對向之壁面之至少一者具有導電性構件。 [發明之效果] 根據揭示之電漿處理裝置之1個態樣,發揮能抑制貫通孔內之異常放電之產生的效果。[Problem to be solved by the invention] In addition, in recent years, plasma processing apparatuses have increased the voltage of high-frequency power applied to the mounting table in order to perform plasma processing. When the high-frequency power applied to the mounting table is increased in voltage, abnormal discharge may occur in the through-holes in which the lift pins are accommodated. In a plasma processing apparatus, if an abnormal discharge occurs in a through-hole, the quality of an object to be processed may deteriorate, which may become a factor of deterioration in yield. [Technical means to solve the problem] In one embodiment, the disclosed plasma processing apparatus has an electrostatic chuck and lift pins. The electrostatic chuck has a loading surface on which the object to be processed is placed and a back surface opposite to the loading surface, and a through hole penetrating the loading surface and the back surface is formed. At least a part of the lift pin is formed of an insulating member, the tip is accommodated in the through hole, and the object to be processed is conveyed in the vertical direction by moving in the vertical direction with respect to the mounting surface. The plasma processing device has a conductive member on at least one of the front end portion of the lift pin corresponding to the through hole and the wall surface of the through hole opposite to the lift pin. [Effect of Invention] According to one aspect of the disclosed plasma processing apparatus, the effect of suppressing the occurrence of abnormal discharge in the through hole is exhibited.

以下,參照圖式對本申請案所揭示之電漿處理裝置之實施形態進行詳細說明。再者,對各圖式中相同或相當之部分標註相同符號。又,所揭示之發明並不受本實施形態之限定。各實施形態可於不會使處理內容產生矛盾之範圍內適當組合。對各圖式中相同或相當之部分標註相同符號。又,「上」「下」之用語係基於圖示之狀態者,且係為求方便者。 (第1實施形態) [電漿處理裝置之構成] 圖1係表示本實施形態之電漿處理裝置之構成之概略剖視圖。電漿處理裝置100具有氣密地構成且電性上設為接地電位之處理容器1。該處理容器1呈圓筒狀,例如包含鋁等。處理容器1劃分形成生成電漿之處理空間。於處理容器1內,設有水平地支持作為被處理體(work-piece)之半導體晶圓(以下,簡稱為「晶圓」)W的載置台2。載置台2包含基材(底座)2a及靜電吸盤(ESC:Electrostatic chuck)6而構成。基材2a包含導電性之金屬、例如鋁等,具有作為下部電極之功能。靜電吸盤6具有用以靜電吸附晶圓W之功能。載置台2由支持台4支持。支持台4由例如包含石英等之支持構件3支持。又,於載置台2上方之外周,設有由例如單晶矽形成之聚焦環5。進而,於處理容器1內,以包圍載置台2及支持台4之周圍之方式,設有例如包含石英等之圓筒狀之內壁構件3a。 於基材2a,經由第1整合器11a而連接有第1 RF(radio frequency,射頻)電源10a,又,經由第2整合器11b而連接有第2 RF電源10b。第1 RF電源10a係用以產生電漿者,且以自該第1 RF電源10a向載置台2之基材2a供給特定頻率之高頻電力之方式構成。又,第2 RF電源10b係用於離子提取(用於偏壓)者,且以自該第2 RF電源10b向載置台2之基材2a供給低於第1 RF電源10a之特定頻率之高頻電力之方式構成。如此,載置台2構成為能夠施加電壓。另一方面,於載置台2之上方,以與載置台2平行地相對向之方式,設有具有作為上部電極之功能的簇射頭16。簇射頭16與載置台2作為一對電極(上部電極與下部電極)發揮功能。 靜電吸盤6係於該絕緣體6b之間介置電極6a而構成,於電極6a連接有直流電源12。並且構成為,藉由自直流電源12向電極6a施加直流電壓,而利用庫侖力吸附晶圓W。 於載置台2之內部形成有冷媒流路2d,於冷媒流路2d連接有冷媒入口配管2b、冷媒出口配管2c。並且構成為,藉由使適當之冷媒、例如冷卻水等在冷媒流路2d中循環,而能夠將載置台2控制為特定的溫度。又,以貫通載置台2等之方式,形成有用以向晶圓W之背面供給氦氣等冷熱傳遞用氣體(背面氣體(back side gas))之氣體供給管30,氣體供給管30連接於未圖示之氣體供給源。利用該等構成,將藉由靜電吸盤6而吸附保持於載置台2之上表面的晶圓W控制為特定的溫度。 於載置台2設有複數個、例如3個銷用貫通孔200(圖1中僅表示1個),於該等銷用貫通孔200之內部分別配設有升降銷61。升降銷61連接於驅動機構62,藉由驅動機構62而上下活動。關於銷用貫通孔200及升降銷61之構造將於下文敍述。 上文所述之簇射頭16設於處理容器1之頂壁部分。簇射頭16具備本體部16a及構成電極板之上部頂板16b,且經由絕緣性構件95而被支持於處理容器1之上部。關於本體部16a,包含導電性材料、例如表面經過陽極氧化處理之鋁,且構成為於其下部能夠將上部頂板16b裝卸自如地支持。 本體部16a於內部設有氣體擴散室16c。又,本體部16a中,以位於氣體擴散室16c之下部之方式,於底部形成有多個氣體流經孔16d。又,上部頂板16b中,以與上文所述之氣體流經孔16d重疊之方式,設有於厚度方向上貫通該上部頂板16b的氣體導入孔16e。藉由此種構成,被供給至氣體擴散室16c之處理氣體經由氣體流經孔16d及氣體導入孔16e而呈簇射狀分散地被供給至處理容器1內。 於本體部16a,形成有用以向氣體擴散室16c導入處理氣體之氣體導入口16g。於氣體導入口16g連接有氣體供給配管15a之一端。於該氣體供給配管15a之另一端,連接有供給處理氣體之處理氣體供給源(氣體供給部)15。於氣體供給配管15a,自上游側依序設有質量流量控制器(MFC)15b及開關閥V2。自處理氣體供給源15經由氣體供給配管15a將用於電漿蝕刻之處理氣體供給至氣體擴散室16c。自氣體擴散室16c經由氣體流經孔16d及氣體導入孔16e向處理容器1內呈簇射狀分散地供給處理氣體。 於上文所述之作為上部電極之簇射頭16,經由低通濾波器(LPF)71電性連接有可變直流電源72。該可變直流電源72構成為可藉由啟閉開關73而實現饋電之啟閉。可變直流電源72之電流、電壓以及啟閉開關73之啟閉係由下述控制部90控制。再者,如下文所述,當自第1 RF電源10a、第2 RF電源10b對載置台2施加高頻而於處理空間產生電漿時,根據需要而藉由控制部90使啟閉開關73開啟,而對作為上部電極之簇射頭16施加特定的直流電壓。 以自處理容器1之側壁延伸至較簇射頭16之高度位置更靠上方之方式設有圓筒狀之接地導體1a。該圓筒狀之接地導體1a於其上部具有頂壁。 於處理容器1之底部,形成有排氣口81。於排氣口81,經由排氣管82而連接有第1排氣裝置83。第1排氣裝置83具有真空泵,且構成為藉由使該真空泵作動而能夠將處理容器1內減壓至特定的真空度。另一方面,於處理容器1內之側壁,設有晶圓W之搬入搬出口84,於該搬入搬出口84,設有將該搬入搬出口84打開或關閉之閘閥85。 於處理容器1之側部內側,沿內壁面設有積存物遮罩86。積存物遮罩86防止蝕刻副產物(積存物)附著於處理容器1。於該積存物遮罩86之與晶圓W大致相同之高度位置,設有以能夠控制對於接地之電位而連接的導電性構件(GND塊)89,藉此防止異常放電。又,於積存物遮罩86之下端部,設有沿內壁構件3a延伸之積存物遮罩87。積存物遮罩86、87被設為裝卸自如。 上述構成之電漿處理裝置100係藉由控制部90統一地控制其動作。於該控制部90設有具備CPU(Central Processing Unit,中央處理單元)且控制電漿處理裝置100之各部的製程控制器91、使用者介面92及記憶部93。 使用者介面92包含供工程管理者進行指令之輸入操作以管理電漿處理裝置100的鍵盤、或將電漿處理裝置100之運行狀況可視化地顯示的顯示器等。 於記憶部93,儲存有用以於製程控制器91之控制下實現電漿處理裝置100所執行之各種處理的控制程式(軟體)或記憶有處理條件資料等之製程配方。並且,根據需要,按照來自使用者介面92之指示等自記憶部93叫出任意製程配方並由製程控制器91執行,藉此,於製程控制器91之控制下,進行電漿處理裝置100中之所期望之處理。又,控制程式或處理條件資料等製程配方可利用儲存於電腦可讀取之電腦記憶媒體(例如,硬碟、CD(Compact Disc,光碟)、軟碟、半導體記憶體等)等之狀態者,或亦能夠自其他裝置經由例如專用線路隨機傳輸而於線上使用。 [載置台之主要部分構成] 繼而,參照圖2及圖3,對載置台2之主要部分構成進行說明。圖2及圖3係表示圖1之電漿處理裝置中之載置台之概略剖視圖。圖2表示使升降銷61上升而支持晶圓W之情形,圖3表示使升降銷61下降而將晶圓W支持於靜電吸盤6上之情形。如上所述,載置台2包含基材2a及靜電吸盤6,且構成為,升降銷61能夠自基材2a之下方向靜電吸盤6之上方插通。 靜電吸盤6呈圓板狀,且具有用以載置晶圓W之載置面21及與該載置面21相對向之背面22。載置面21呈圓形,與晶圓W之背面接觸而支持圓板狀之晶圓W。基材2a接合於靜電吸盤6之背面22。 於載置面21,形成有氣體供給管30之端部(氣孔)。氣體供給管30供給冷卻用之氦氣等。氣體供給管30之端部係由形成於靜電吸盤6之貫通孔30a及形成於基材2a之貫通孔30b形成。貫通孔30a係以自靜電吸盤6之背面22貫通至載置面21之方式設置。即,貫通孔30a之內壁由靜電吸盤6形成。另一方面,貫通孔30b係以自基材2a之背面貫通至與靜電吸盤6之接合面之方式設置。即,貫通孔30b之內壁由基材2a形成。貫通孔30b之孔徑例如大於貫通孔30a之孔徑。並且,以貫通孔30a及貫通孔30b連通之方式配置靜電吸盤6及基材2a。於氣體供給管30,配置有氣體用套管204及氣體用間隔件202。 又,於載置面21,形成有收容升降銷61之銷用貫通孔200。銷用貫通孔200係由形成於靜電吸盤6之貫通孔200a及形成於基材2a之貫通孔200b形成。貫通孔200a形成於靜電吸盤6,貫通孔200b形成於基材2a。形成銷用貫通孔200之貫通孔200a係設為與升降銷61之外徑吻合之孔徑、即略大於升降銷61之外徑(例如大0.1~0.5 mm左右)的孔徑,於內部能夠收容升降銷61。貫通孔200b之孔徑例如大於貫通孔200a之孔徑。並且,於貫通孔200a之內壁及貫通孔200b之內壁、與升降銷61之間,配置有銷用套管203及銷用間隔件201。本實施形態之靜電吸盤6中,藉由銷用套管203及銷用間隔件201形成銷用貫通孔200。 升降銷61之至少一部分由絕緣性構件形成。例如,升降銷61具有由絕緣性之陶瓷或樹脂等形成為銷形狀之銷本體部61a。該銷本體部61a呈圓筒形狀,外徑具有例如數mm左右。銷本體部61a之與晶圓W接觸之銷上端部61b係藉由對銷本體部61a進行倒角而形成,且具有球狀之面。該球狀之面例如曲率非常大,使升降銷61之銷上端部61b整體靠近晶圓W背面。 又,升降銷61於與銷用貫通孔200對應之前端部分,具有由導電性構件形成之導電膜61c。例如,升降銷61自銷本體部61a之銷上端部61b側起於與靜電吸盤6之厚度相應之範圍具有導電膜61c。升降銷61之銷上端部61b由於與晶圓W接觸,故而較佳為不被導電膜61c覆蓋。再者,升降銷61之銷上端部61b亦可被導電膜61c覆蓋。 升降銷61藉由圖1所示之驅動機構62而於銷用貫通孔200內上下活動,且自載置台2之載置面21出沒自如地動作。再者,當升降銷61被收容時,驅動機構62以使升降銷61之銷上端部61b位於晶圓W背面正下方之方式調整升降銷61之停止位置之高度。 如圖2所示,於已使升降銷61上升之狀態下,成為銷本體部61a之一部分及銷上端部61b自載置台2之載置面21突出之狀態,且成為於載置台2之上部支持有晶圓W之狀態。另一方面,如圖3所示,於已使升降銷61下降之狀態下,成為銷本體部61a收容於銷用貫通孔200內之狀態,且晶圓W被載置於載置面21。如此,升降銷61於上下方向搬送晶圓W。 且說,電漿處理裝置100使施加至載置台2之高頻電力高電壓化。於使施加至載置台2之高頻電力高電壓化之情形時,存在於銷用貫通孔200產生異常放電之情形。 圖4係模式性地表示靜電吸盤之銷用貫通孔附近之電位之狀態的圖。如圖4所示,靜電吸盤6具有載置面21及與載置面21相對向之背面22。又,於載置面21載置有晶圓W。又,於靜電吸盤6形成有銷用貫通孔200。電漿處理裝置100中,若對載置台2施加高頻電力,則因靜電吸盤6之靜電電容而於晶圓W與靜電吸盤6之背面22之間產生電位差。圖4中,以虛線表示當對載置台2施加高頻電力時產生之RF電位之等電位線。例如,電漿處理裝置100係若使施加至載置台2之高頻電力高電壓化,而銷用貫通孔200內產生之RF電位之電位差超過產生放電之臨界值,則會產生異常放電。 因此,電漿處理裝置100中,如圖2及圖3所示,於升降銷61之與銷用貫通孔200對應之前端部分形成有由導電性構件形成之導電膜61c。 [導電膜之電氣特性之變化例] 使用圖5及圖6,說明藉由在升降銷61之前端部分形成導電膜61c而引起的載置台2之電氣特性之變化。圖5及圖6係模式性地表示收容於銷用貫通孔之升降銷之前端部分的圖。如圖5及圖6所示,載置台2之靜電吸盤6形成有銷用貫通孔200,且載置有晶圓W。靜電吸盤6由基材2a支持。於基材2a,形成有用於絕緣之絕緣體2e。又,圖5中示出於升降銷61之前端部分不存在導電膜61c之狀態。圖6中示出於升降銷61之前端部分存在導電膜61c之狀態。於對載置台2施加有高頻電力之情形時,絕緣體2e之部分於電性上可視為例如電容器C1、C2。又,升降銷61及銷用貫通孔200之升降銷61周圍之空間可視為電容器C3。於圖5及圖6之右側,示出等效地表示施加有高頻電力時之電性狀態的等效電路EC1、EC2。如圖5所示,於對載置台2施加有高頻電力之情形時,載置台2之銷用貫通孔200附近可視為電容器C1、C2、C3相對於供給高頻電力之電源PV串聯連接而成的等效電路EC1。作為電源PV,例如第1 RF電源10a、第2 RF電源10b符合。將等效電路EC1之電源PV與電容器C3之連接點設為P1。將電容器C3與電容器C2之連接點設為P2。連接點P1與連接點P2之電位差相當於銷用貫通孔200內產生之RF電位差。若使自電源PV供給之高頻電力高電壓化,則連接點P1與連接點P2之電位差變大,會產生異常放電。 另一方面,如圖6所示,於在升降銷61之前端部分存在導電膜61c之情形時,如等效電路EC2所示,導電膜61c可視為並聯連接於電容器C3之電阻R。於如此般電阻R並聯連接於電容器C3之情形時,能減小連接點P1與連接點P2之電位差。即,導電膜61c能緩和銷用貫通孔200內產生之RF電位差。 作為用於導電膜61c之導電性構件,只要為具有導電性之材料即可,可列舉例如矽、碳、碳化矽、氮化矽、二氧化鈦、鋁等導電性材料或金屬。 導電膜61c只要以成為如下電阻值之方式形成即可,即,可將因施加至載置台2之高頻電力而產生於銷用貫通孔200內之RF電位差抑制為未達產生放電之臨界值。另一方面,於導電膜61c之電阻值過低之情形時,導電膜61c中會過度地產生電流。因此,導電膜61c較佳為設為不會過度地流通電流之厚度。導電膜61c係高頻電力之頻率越高,則電流越集中於其表面。該現象被稱為集膚效應(skin depth、Skin effect),如以下之式(1)般表示。 [數1]

Figure 02_image001
此處,δ係距流通電流之表面的厚度(深度)。ρ係用於導電膜61c之導電性構件之電阻率。μ係用於導電膜61c之導電性構件之磁導率。μs係用於導電膜61c之導電性構件之相對磁導率。F係高頻電力之頻率。 圖7係表示集膚效應之算出結果之一例的圖。圖7之例示出針對第1導電性構件、第2導電性構件、第3導電性構件之3種導電性構件算出頻率f為40 MHz及400 kHz之情形時之δ所得的結果。例如,第1導電性構件之電阻率ρ為4.5 e2 ,相對磁導率μs為1。第1導電性構件於頻率f為40 MHz之情形時,算出厚度δ為1.69[m]。又,第2導電性構件之電阻率ρ為1.0 e6 ,相對磁導率μs為1。第2導電性構件於頻率f為40 MHz之情形時,算出厚度δ為7.96 e1 [m]。 導電膜61c於較用於導電膜61c之導電性構件之集膚效應之厚度δ薄之情形時,限制電流之流動,電阻增加,產生之電流減少。因此,導電膜61c較佳為設為用於導電膜61c之導電性構件之集膚效應之厚度δ的10%以下,更佳為,期望設為1%以下。藉此,能抑制於導電膜61c過度地產生電流。 再者,導電膜61c亦可以無階差之平坦狀態形成於升降銷61之前端部分。圖8係表示於升降銷之前端部分形成有導電膜之一例的圖。升降銷61於銷本體部61a之前端部分,以與導電膜61c之膜厚對應之深度形成凹部61d。並且,升降銷61亦可於銷本體部61a之凹部61d形成導電膜61c。 又,升降銷61係為了減少與晶圓W接觸之部分,而使前端部分形成得較細。本實施例之升降銷61係前端部分呈圓筒形狀,外徑設為例如數mm左右。存在升降銷61之前端部分之外徑較用於導電膜61c之導電性構件之集膚效應之厚度δ小的情形。於此種情形時,升降銷61亦可前端部分由導電性構件形成。例如,於升降銷61之前端部分之外徑為導電性構件之集膚效應之厚度δ之10%以下、較理想為1%以下之情形時,升降銷61亦可前端部分由導電性構件形成。例如,第2導電性構件係於頻率f為40 MHz之情形時,厚度δ為7.96 e1 [m],為升降銷61之前端部分之外徑之1%以下。於該情形時,亦可利用第2導電性構件形成升降銷61之前端部分。圖9係表示利用導電性構件形成升降銷之前端部分之一例的圖。升降銷61設有導電部61e,該導電部61e係將自升降銷61之銷上端部61b側起與靜電吸盤6之厚度相應之範圍由導電性構件形成而得。 再者,升降銷61亦可設為於與銷用貫通孔200對應之前端部分內含導電性構件之構成。即,升降銷61亦可於與銷用貫通孔200對應之前端部分之內部埋入由導電性構件形成之導電部。圖10係表示於升降銷之前端部分之內部埋入有導電部之一例的圖。圖10所示之升降銷61於與銷用貫通孔200對應之前端部分之內部埋入有由導電性構件形成之導電部61f。導電部61f亦可為複數個。圖11係表示於升降銷之前端部分之內部埋入有導電部之另一例的圖。圖11所示之升降銷61於與銷用貫通孔200對應之前端部分之內部埋入有2個由導電性構件形成之導電部61f。導電部61f亦可埋入3個以上。 [電位變化之模擬] 圖12係使用等效電路模擬銷用貫通孔內之電位之變化的圖。圖12(A)中示出表示電位變化之3個波形W1~W3。波形W1表示圖5及圖6中所示之等效電路EC1、EC2之連接點P1之電位。波形W2表示圖5中所示之等效電路EC1之連接點P2之電位。即,波形W2表示於升降銷61之前端部分不存在導電膜61c之情形時之電位變化。波形W3表示圖6中所示之等效電路EC2之連接點P2之電位。即,波形W3表示於升降銷61之前端部分存在導電膜61c之情形時之電位變化。圖12(B)中示出將圖12(A)之波形W1~W3之波峰部分放大後之波形。圖12(B)所示之電位差d1係波形W1與波形W2之差,且表示於升降銷61之前端部分不存在導電膜61c之情形時產生之電位差。電位差d2係波形W1與波形W3之差,且表示於升降銷61之前端部分存在導電膜61c之情形時產生之電位差。與電位差d1相比,電位差d2有所減少。如此,於在升降銷61之前端部分存在導電膜61c之情形時,電位差減少。藉此,能抑制銷用貫通孔200內之異常放電之產生。 如此,第1實施形態之電漿處理裝置100具有靜電吸盤6及升降銷61。靜電吸盤6具有供載置晶圓W之載置面21及與載置面21相對之背面22,且形成有貫通載置面21與背面22之銷用貫通孔200。升降銷61係至少一部分由絕緣性構件形成,前端收容於銷用貫通孔200,藉由相對於載置面21於上下方向移動而於上下方向搬送晶圓W。電漿處理裝置100於升降銷61之與銷用貫通孔200對應之前端部分具有導電膜61c或導電部61e。藉此,電漿處理裝置100能抑制銷用貫通孔200內之異常放電之產生。 (第2實施形態) 於上文所述之第1實施形態之電漿處理裝置100中,針對在升降銷61之與銷用貫通孔200對應之前端部分具有導電性構件的情形進行了說明。於第2實施形態之電漿處理裝置100中,針對在銷用貫通孔200之與升降銷61相對向之壁面具有導電性構件的情形進行說明。 圖13係表示於銷用貫通孔之與升降銷相對向之壁面具有導電性構件之一例的圖。於靜電吸盤6形成有銷用貫通孔200,且載置有晶圓W。於銷用貫通孔200收容有升降銷61之前端。靜電吸盤6於銷用貫通孔200之與升降銷61相對向之壁面具有由導電性構件形成之導電膜6c。 再者,亦可代替導電膜6c,而於銷用貫通孔200內設置導電性之筒狀構件。圖14係模式性地表示靜電吸盤之銷用貫通孔附近的立體圖。於靜電吸盤6形成有銷用貫通孔200。亦可藉由將與銷用貫通孔200吻合地形成之導電性之筒狀構件6d插入至銷用貫通孔200,而於銷用貫通孔200之與升降銷61相對向之壁面設置導電性構件。再者,例如,亦可利用導電性構件形成銷用間隔件201之與靜電吸盤6對應之一部分、或整個銷用間隔件201。 作為導電膜6c、筒狀構件6d中使用之導電性構件,只要為具有導電性之材料即可,可列舉例如矽、碳、碳化矽、氮化矽、二氧化鈦、鋁等導電性材料或金屬。 該導電膜6c、筒狀構件6d係與第1實施形態之導電膜61c同樣地發揮電性作用,能緩和銷用貫通孔200內產生之RF電位差。 如此,第2實施形態之電漿處理裝置100於銷用貫通孔200之與升降銷61相對向之壁面具有導電膜6c或筒狀構件6d。藉此,電漿處理裝置100能抑制銷用貫通孔200內之異常放電之產生。 (第3實施形態) 繼而,對第3實施形態進行說明。第3實施形態之電漿處理裝置之構成係與圖1所示之電漿處理裝置10大致相同之構成,故而對於相同之部分標註相同符號並省略說明,主要針對不同部分進行說明。 圖15A係表示載置台之概略剖視圖。於載置台2,設有上述氣體供給管30,於前端部形成有氣體供給用貫通孔210。氣體供給用貫通孔210係由貫通孔210a及貫通孔210b形成。貫通孔210a形成於靜電吸盤6,貫通孔210b形成於基材2a。貫通孔210a及貫通孔210b例如以於常溫下位置一致之方式形成。於氣體供給用貫通孔210內,與氣體供給用貫通孔210之內壁隔以間隔而配置有埋入構件220。 且說,氣體供給用貫通孔210內之異常放電可藉由縮小埋入構件220與氣體供給用貫通孔210之間隔而抑制。因此,例如考慮將埋入構件220之前端部分形成得較粗,而縮小埋入構件220與氣體供給用貫通孔210之間隔。又,氣體供給用貫通孔210內之異常放電亦能藉由縮短導熱氣體路徑之直線部分而抑制。其原因在於,藉由縮短導熱氣體路徑之直線部分,會降低導熱氣體中之電子之能量。因此,氣體供給用貫通孔210係貫通孔210b之直徑形成為大於貫通孔210a之直徑,又,埋入構件220係與貫通孔210b對應之部分形成為較埋入構件220之前端部分粗。 然而,於縮小埋入構件220與氣體供給用貫通孔210之間隔之情形時,存在埋入構件220破損之情形。圖15B係說明埋入構件之破損之圖。載置台2於已進行過電漿處理之情形時,溫度例如自100℃達到200℃之高溫。靜電吸盤6及基材2a係若溫度達到高溫,則分別發生熱膨脹。並且,因靜電吸盤6與基材2a之熱膨脹之差而導致於貫通孔210a與貫通孔210b產生位置偏差。因此,例如,若將埋入構件220之前端部分形成得較粗,從而縮小埋入構件220與氣體供給用貫通孔210之間隔,則存在因貫通孔210a與貫通孔210b之位置偏差而造成埋入構件220破損之情形。 因此,將埋入構件220之一部分由彈性構件形成。例如,將埋入構件220之和貫通孔210a與貫通孔210b連通之部分對應的部分至少由彈性構件形成。 圖16A係說明第3實施形態之埋入構件之圖。例如,埋入構件220於被收容於氣體供給用貫通孔210之狀態下,自上端部220b側起,於與貫通孔210a之上半部分對應之前端部分形成由導電性構件形成之導電部220e,較導電部220e靠下部由彈性構件形成。彈性構件只要具有相對於因溫度變化引起之貫通孔210a與貫通孔210b之位置偏差不會破損之程度的彈性即可。又,彈性構件較佳為進而對電漿具有耐性。作為彈性構件,可列舉例如氟系樹脂。作為氟系樹脂,可列舉例如聚四氟乙烯。聚四氟乙烯作為絕緣性構件發揮功能。又,彈性構件並不限於氟系樹脂,可列舉楊氏模數為20 GPa以下之構件。尤其以楊氏模數為10 GPa以下之構件更佳。 圖16B係說明第3實施形態之埋入構件之圖。即便於實施電漿處理後靜電吸盤6及基材2a達到高溫,因靜電吸盤6及基材2a之熱膨脹之差而導致於貫通孔210a與貫通孔210b產生位置偏差之情形時,因埋入構件220之和貫通孔210a與貫通孔210b連通之部分對應的部分會發生變形,從而亦能抑制埋入構件220之破損之產生。又,於靜電吸盤6及基材2a恢復為常溫之情形時,如圖16A所示,貫通孔210a與貫通孔210b之位置無偏差,埋入構件220恢復為原來的形狀。藉此,即便於縮小埋入構件220與氣體供給用貫通孔210之間隔之情形時,亦能抑制埋入構件220之破損。 如此,第3實施形態之電漿處理裝置100具有靜電吸盤6及基材2a。靜電吸盤6具有供載置晶圓W之載置面21及與載置面21相對之背面22,且形成有貫通載置面21與背面22之貫通孔210a。基材2a具有支持靜電吸盤6之支持面,且形成有與貫通孔210a連通之貫通孔210b,於貫通孔210a及貫通孔210b內具有埋入構件220。埋入構件220係和靜電吸盤6之貫通孔210a與基材2a之貫通孔210b連通之部分對應的部分至少由彈性構件形成。藉此,電漿處理裝置100即便於為了抑制氣體供給用貫通孔210內之異常放電之產生而將埋入構件220與氣體供給用貫通孔210之間隔形成得較小之情形時,亦能抑制埋入構件220之破損之產生。 以上,對一實施形態進行了敍述,但本發明並不限定於該特定的實施形態,可於申請專利範圍內所記載之本發明之主旨之範圍內進行各種變化或變更。 例如,亦可將第1實施形態至第3實施形態加以組合而實施。例如,電漿處理裝置100亦可於升降銷61之與銷用貫通孔200對應之前端部分形成有導電膜61c,且於銷用貫通孔200之與升降銷61相對向之壁面形成有導電膜6c。又,電漿處理裝置100中,升降銷61亦可如埋入構件220般形成。埋入構件220亦可如升降銷61般形成有導電性構件。 又,第1實施形態之導電膜61c或導電部61e亦可並非設置於升降銷61之與銷用貫通孔200對應之前端部分的整個周面。例如,導電膜61c或導電部61e亦可相對於前端部分之圓周方向設置於一部分周面。又,例如,導電膜61c或導電部61e亦可於升降銷61之前端部分之周面以與靜電吸盤6之厚度對應之長度,在圓周方向上分離地設置有複數個。第2實施形態之導電膜6c亦可並非設置於銷用貫通孔200之與升降銷61相對向之整個壁面。例如,導電膜6c只要相對於銷用貫通孔200之圓周方向設置於一部分壁面即可。又,例如,導電膜61c亦可於銷用貫通孔200之壁面以銷用貫通孔200之長度,於圓周方向上分離地設置有複數個。 又,第1實施形態及第2實施形態中,電漿處理裝置100亦可使用由放射狀線槽孔天線(Radial line slotantenna)產生之電漿。Hereinafter, embodiments of the plasma processing apparatus disclosed in this application will be described in detail with reference to the drawings. In addition, the same code|symbol is attached|subjected to the same or equivalent part in each figure. In addition, the disclosed invention is not limited to this embodiment. Each embodiment can be appropriately combined within a range that does not cause conflicts in processing contents. Mark the same symbols for the same or equivalent parts in each drawing. Also, the terms "up" and "down" are based on the state of the illustration and are for convenience. (First Embodiment) [Structure of Plasma Treatment Apparatus] FIG. 1 is a schematic cross-sectional view showing the structure of a plasma treatment apparatus according to this embodiment. The plasma processing apparatus 100 has a processing container 1 that is configured airtight and is electrically grounded. The processing container 1 has a cylindrical shape and is made of, for example, aluminum. The processing container 1 is divided to form a processing space for generating plasma. In the processing container 1 , there is provided a stage 2 that horizontally supports a semiconductor wafer (hereinafter, simply referred to as “wafer”) W as a work-piece. The mounting table 2 includes a base material (pedestal) 2 a and an electrostatic chuck (ESC: Electrostatic chuck) 6 . The substrate 2a includes conductive metal, such as aluminum, and functions as a lower electrode. The electrostatic chuck 6 has the function of electrostatically holding the wafer W. The mounting table 2 is supported by a support table 4 . The support table 4 is supported by a support member 3 including, for example, quartz or the like. Also, on the outer periphery above the stage 2, a focus ring 5 formed of, for example, single crystal silicon is provided. Furthermore, a cylindrical inner wall member 3 a made of, for example, quartz or the like is provided in the processing container 1 so as to surround the mounting table 2 and the support table 4 . A first RF (radio frequency, radio frequency) power source 10a is connected to the substrate 2a via a first integrator 11a, and a second RF power source 10b is connected via a second integrator 11b. The first RF power source 10a is used to generate plasma, and is configured to supply high-frequency power of a specific frequency to the substrate 2a of the mounting table 2 from the first RF power source 10a. Also, the second RF power supply 10b is used for ion extraction (for bias voltage), and is supplied from the second RF power supply 10b to the substrate 2a of the mounting table 2 at a frequency higher than that of the first RF power supply 10a. Formed in the form of frequency power. In this manner, the stage 2 is configured to be capable of applying a voltage. On the other hand, shower head 16 having a function as an upper electrode is provided above mounting table 2 so as to face parallel to mounting table 2 . The shower head 16 and the mounting table 2 function as a pair of electrodes (an upper electrode and a lower electrode). The electrostatic chuck 6 is configured by interposing an electrode 6a between the insulators 6b, and a DC power supply 12 is connected to the electrode 6a. In addition, the wafer W is attracted by Coulomb force by applying a DC voltage from the DC power supply 12 to the electrode 6a. A refrigerant flow path 2d is formed inside the mounting table 2, and a refrigerant inlet pipe 2b and a refrigerant outlet pipe 2c are connected to the refrigerant flow path 2d. Furthermore, it is comprised so that the mounting table 2 can be controlled to a specific temperature by circulating an appropriate refrigerant|coolant, for example, cooling water etc. in the refrigerant|coolant flow path 2d. Also, a gas supply pipe 30 for supplying a heat transfer gas (back side gas) such as helium gas to the back surface of the wafer W is formed so as to penetrate the mounting table 2, etc., and the gas supply pipe 30 is connected to a The gas supply source shown in the figure. With these configurations, the wafer W held by suction on the upper surface of the mounting table 2 by the electrostatic chuck 6 is controlled to a specific temperature. A plurality of, for example, three through-holes 200 for pins (only one is shown in FIG. 1 ) are provided on the mounting table 2 , and lift pins 61 are arranged inside the through-holes 200 for pins, respectively. The lift pin 61 is connected to the driving mechanism 62 and moves up and down by the driving mechanism 62 . The structures of the pin through hole 200 and the lift pin 61 will be described below. The above-mentioned shower head 16 is disposed on the top wall of the processing container 1 . The shower head 16 includes a main body portion 16 a and an upper top plate 16 b constituting an electrode plate, and is supported on the upper portion of the processing container 1 via an insulating member 95 . The main body part 16a is made of a conductive material, for example, anodized aluminum on the surface, and is configured to detachably support the upper top plate 16b at its lower part. The main body portion 16a is provided with a gas diffusion chamber 16c inside. In addition, in the main body portion 16a, a plurality of gas passage holes 16d are formed at the bottom so as to be located at the lower portion of the gas diffusion chamber 16c. In addition, the upper top plate 16b is provided with a gas introduction hole 16e penetrating the upper top plate 16b in the thickness direction so as to overlap with the above-mentioned gas passage hole 16d. With such a configuration, the processing gas supplied to the gas diffusion chamber 16c is supplied into the processing container 1 in a shower-like dispersed manner through the gas flow hole 16d and the gas introduction hole 16e. A gas introduction port 16g for introducing a process gas into the gas diffusion chamber 16c is formed in the main body portion 16a. One end of the gas supply pipe 15a is connected to the gas introduction port 16g. The other end of the gas supply pipe 15a is connected to a processing gas supply source (gas supply unit) 15 for supplying a processing gas. In the gas supply pipe 15a, a mass flow controller (MFC) 15b and an on-off valve V2 are provided in this order from the upstream side. The processing gas for plasma etching is supplied from the processing gas supply source 15 to the gas diffusion chamber 16c through the gas supply pipe 15a. The processing gas is supplied into the processing chamber 1 from the gas diffusion chamber 16c through the gas flow-through hole 16d and the gas introduction hole 16e in a shower-like dispersed manner. The above-mentioned shower head 16 as the upper electrode is electrically connected to a variable DC power supply 72 via a low-pass filter (LPF) 71 . The variable DC power supply 72 is configured to be able to switch on and off the power feeding by opening and closing the switch 73 . The current and voltage of the variable DC power supply 72 and the opening and closing of the on-off switch 73 are controlled by the control unit 90 described below. Furthermore, as described below, when high frequency is applied to the stage 2 from the first RF power source 10a and the second RF power source 10b to generate plasma in the processing space, the on/off switch 73 is turned on and off by the control unit 90 as needed. Turn on, and apply a specific DC voltage to the shower head 16 as the upper electrode. A cylindrical ground conductor 1 a is provided so as to extend from the side wall of the processing container 1 to a position higher than the height of the shower head 16 . The cylindrical ground conductor 1a has a top wall on its upper portion. At the bottom of the processing container 1, an exhaust port 81 is formed. A first exhaust device 83 is connected to the exhaust port 81 via an exhaust pipe 82 . The first exhaust device 83 has a vacuum pump, and is configured to depressurize the inside of the processing chamber 1 to a specific vacuum degree by operating the vacuum pump. On the other hand, a loading/unloading port 84 for the wafer W is provided on the side wall of the processing container 1 , and a gate valve 85 that opens or closes the loading/unloading port 84 is provided at the loading/unloading port 84 . Inside the side portion of the processing container 1, a deposit cover 86 is provided along the inner wall surface. The deposit mask 86 prevents etching by-products (deposits) from adhering to the processing container 1 . A conductive member (GND block) 89 connected so as to be able to control the potential with respect to the ground is provided at a position substantially at the same height as the wafer W on the deposit cover 86 to prevent abnormal discharge. Also, at the lower end of the deposit cover 86, a deposit cover 87 extending along the inner wall member 3a is provided. The deposit covers 86 and 87 are designed to be detachable. The operation of the plasma processing apparatus 100 configured as described above is collectively controlled by the control unit 90 . The control unit 90 is provided with a process controller 91 having a CPU (Central Processing Unit) and controlling each unit of the plasma processing apparatus 100 , a user interface 92 and a memory unit 93 . The user interface 92 includes a keyboard for the project manager to input commands to manage the plasma processing device 100 , or a display for visually displaying the operating status of the plasma processing device 100 , and the like. The memory unit 93 stores control programs (software) for realizing various processes performed by the plasma processing apparatus 100 under the control of the process controller 91 or process recipes storing process condition data and the like. And, according to the instructions from the user interface 92, etc., any process recipe is called from the memory part 93 and executed by the process controller 91, thereby, under the control of the process controller 91, the plasma processing device 100 the desired treatment. In addition, if the process recipes such as control programs or processing condition data can be stored in a computer-readable computer storage medium (for example, hard disk, CD (Compact Disc, optical disk), floppy disk, semiconductor memory, etc.), Or it can also be used online from other devices via, for example, random transmission via a dedicated line. [Configuration of Main Parts of Mounting Table] Next, the configuration of main parts of the mounting table 2 will be described with reference to FIGS. 2 and 3 . 2 and 3 are schematic cross-sectional views showing a mounting table in the plasma processing apparatus of FIG. 1 . FIG. 2 shows a state where the lift pins 61 are raised to support the wafer W, and FIG. 3 shows a state where the lift pins 61 are lowered to support the wafer W on the electrostatic chuck 6 . As described above, the mounting table 2 includes the base material 2 a and the electrostatic chuck 6 , and is configured such that the lift pins 61 can be inserted from below the base material 2 a toward the upper side of the electrostatic chuck 6 . The electrostatic chuck 6 is disc-shaped, and has a loading surface 21 for loading the wafer W and a back surface 22 opposite to the loading surface 21 . The mounting surface 21 has a circular shape, and supports the disc-shaped wafer W in contact with the back surface of the wafer W. The substrate 2 a is bonded to the back surface 22 of the electrostatic chuck 6 . The end portion (gas hole) of the gas supply pipe 30 is formed on the mounting surface 21 . The gas supply pipe 30 supplies helium gas or the like for cooling. The end of the gas supply pipe 30 is formed by the through hole 30a formed in the electrostatic chuck 6 and the through hole 30b formed in the base material 2a. The through hole 30 a is provided so as to penetrate from the back surface 22 of the electrostatic chuck 6 to the mounting surface 21 . That is, the inner wall of the through hole 30 a is formed by the electrostatic chuck 6 . On the other hand, the through hole 30b is provided so as to penetrate from the back surface of the base material 2a to the bonding surface with the electrostatic chuck 6 . That is, the inner wall of the through hole 30b is formed of the base material 2a. The diameter of the through hole 30b is, for example, larger than that of the through hole 30a. Furthermore, the electrostatic chuck 6 and the base material 2a are arranged so that the through hole 30a and the through hole 30b communicate with each other. A gas sleeve 204 and a gas spacer 202 are disposed on the gas supply pipe 30 . In addition, pin through-holes 200 for accommodating the lift pins 61 are formed in the mounting surface 21 . The through hole 200 for the pin is formed by the through hole 200a formed in the electrostatic chuck 6 and the through hole 200b formed in the base material 2a. The through hole 200a is formed in the electrostatic chuck 6, and the through hole 200b is formed in the base material 2a. The through hole 200a forming the through hole 200 for the pin is set to have a diameter matching the outer diameter of the lifting pin 61, that is, a hole diameter slightly larger than the outer diameter of the lifting pin 61 (for example, about 0.1 to 0.5 mm larger), and can accommodate the lifting pin inside. pin 61. The diameter of the through hole 200b is, for example, larger than that of the through hole 200a. Furthermore, between the inner wall of the through hole 200a, the inner wall of the through hole 200b, and the lift pin 61, the bushing 203 for pins and the spacer 201 for pins are arrange|positioned. In the electrostatic chuck 6 of the present embodiment, the pin through-hole 200 is formed by the pin bushing 203 and the pin spacer 201 . At least a part of the lift pin 61 is formed of an insulating member. For example, the lift pin 61 has a pin main body portion 61 a formed in a pin shape from insulating ceramics, resin, or the like. The pin main body portion 61a has a cylindrical shape and has an outer diameter of, for example, about several mm. The pin upper end portion 61b of the pin body portion 61a that contacts the wafer W is formed by chamfering the pin body portion 61a, and has a spherical surface. The spherical surface, for example, has a very large curvature, so that the entire upper end portion 61b of the lift pin 61 is close to the back surface of the wafer W. Further, the lift pin 61 has a conductive film 61c formed of a conductive member at a front end portion corresponding to the pin through hole 200 . For example, the lift pin 61 has a conductive film 61c in a range corresponding to the thickness of the electrostatic chuck 6 from the pin upper end portion 61b side of the pin body portion 61a. Since the pin upper ends 61b of the lift pins 61 are in contact with the wafer W, it is preferable not to be covered with the conductive film 61c. Furthermore, the pin upper end 61b of the lift pin 61 may be covered with a conductive film 61c. The lift pin 61 moves up and down in the pin through hole 200 by the drive mechanism 62 shown in FIG. 1 , and freely moves in and out from the mounting surface 21 of the mounting table 2 . Furthermore, when the lift pins 61 are accommodated, the drive mechanism 62 adjusts the height of the stop position of the lift pins 61 so that the pin upper ends 61b of the lift pins 61 are located directly below the back surface of the wafer W. As shown in FIG. 2 , in the state where the lift pin 61 has been raised, a part of the pin body portion 61a and the pin upper end portion 61b protrude from the mounting surface 21 of the mounting table 2, and are placed on the upper portion of the mounting table 2. The state of having wafer W is supported. On the other hand, as shown in FIG. 3 , when the lift pins 61 are lowered, the pin main body portions 61 a are accommodated in the pin through holes 200 , and the wafer W is placed on the loading surface 21 . In this way, the lift pins 61 transport the wafer W in the vertical direction. In other words, the plasma processing apparatus 100 increases the voltage of the high-frequency power applied to the mounting table 2 . When the high-frequency power applied to the mounting table 2 is increased in voltage, abnormal discharge may occur in the pin through hole 200 . FIG. 4 is a diagram schematically showing the state of the potential in the vicinity of the through-hole for the pin of the electrostatic chuck. As shown in FIG. 4 , the electrostatic chuck 6 has a loading surface 21 and a back surface 22 opposite to the loading surface 21 . Further, wafer W is placed on loading surface 21 . In addition, a pin through-hole 200 is formed in the electrostatic chuck 6 . In the plasma processing apparatus 100 , when high-frequency power is applied to the stage 2 , a potential difference is generated between the wafer W and the back surface 22 of the electrostatic chuck 6 due to the electrostatic capacitance of the electrostatic chuck 6 . In FIG. 4 , the equipotential lines of the RF potential generated when high-frequency power is applied to the stage 2 are shown by dotted lines. For example, if the plasma processing apparatus 100 increases the voltage of the high-frequency power applied to the mounting table 2 and the potential difference of the RF potential generated in the pin through hole 200 exceeds the threshold value for generating a discharge, an abnormal discharge will occur. Therefore, in the plasma processing apparatus 100 , as shown in FIGS. 2 and 3 , a conductive film 61 c formed of a conductive member is formed on the front end portion of the lift pin 61 corresponding to the pin through hole 200 . [Examples of Changes in Electrical Characteristics of Conductive Film] Using FIGS. 5 and 6 , changes in the electrical characteristics of the mounting table 2 caused by forming the conductive film 61 c at the front end portions of the lift pins 61 will be described. 5 and 6 are diagrams schematically showing the front end portion of the lift pin accommodated in the pin through hole. As shown in FIG. 5 and FIG. 6 , the electrostatic chuck 6 of the stage 2 is formed with a through-hole 200 for a pin, and a wafer W is placed thereon. The electrostatic chuck 6 is supported by the base material 2a. An insulator 2e for insulation is formed on the base material 2a. In addition, FIG. 5 shows a state where the conductive film 61c is not present at the front end portion of the lift pin 61. As shown in FIG. FIG. 6 shows a state where a conductive film 61c is present at the front end portion of the lift pin 61. As shown in FIG. When high-frequency power is applied to the mounting table 2, the part of the insulator 2e can be electrically regarded as, for example, capacitors C1 and C2. Also, the lift pin 61 and the space around the lift pin 61 of the pin through hole 200 can be regarded as a capacitor C3. On the right side of FIGS. 5 and 6 , equivalent circuits EC1 and EC2 equivalently representing the electrical state when high-frequency power is applied are shown. As shown in FIG. 5 , when high-frequency power is applied to the mounting table 2, the vicinity of the pin through hole 200 of the mounting table 2 can be regarded as being connected in series with respect to the power supply PV that supplies the high-frequency power. into the equivalent circuit EC1. As the power supply PV, for example, the first RF power supply 10a and the second RF power supply 10b correspond. Let the connection point of the power supply PV and the capacitor C3 of the equivalent circuit EC1 be P1. Let the connection point of capacitor C3 and capacitor C2 be P2. The potential difference between the connection point P1 and the connection point P2 corresponds to the RF potential difference generated in the pin through-hole 200 . If the voltage of the high-frequency power supplied from the power supply PV is increased, the potential difference between the connection point P1 and the connection point P2 will increase, and abnormal discharge will occur. On the other hand, as shown in FIG. 6, when the conductive film 61c exists at the front end of the lift pin 61, the conductive film 61c can be considered as a resistor R connected in parallel to the capacitor C3 as shown in the equivalent circuit EC2. In such a case where the resistor R is connected in parallel to the capacitor C3, the potential difference between the connection point P1 and the connection point P2 can be reduced. That is, the conductive film 61c can relax the RF potential difference generated in the pin through-hole 200 . As the conductive member used for the conductive film 61c, any material may be used as long as it has conductivity, and examples thereof include conductive materials or metals such as silicon, carbon, silicon carbide, silicon nitride, titanium dioxide, and aluminum. The conductive film 61c should only be formed so that the resistance value can suppress the RF potential difference generated in the pin through hole 200 due to the high-frequency power applied to the mounting table 2 below the critical value at which discharge occurs. . On the other hand, when the resistance value of the conductive film 61c is too low, an excessive current is generated in the conductive film 61c. Therefore, the conductive film 61c is preferably set to a thickness that does not excessively flow an electric current. The higher the frequency of the high-frequency power in the conductive film 61c, the more current is concentrated on its surface. This phenomenon is called a skin effect (skin depth, Skin effect), and is represented by the following formula (1). [number 1]
Figure 02_image001
Here, δ is the thickness (depth) from the surface through which current flows. ρ is the resistivity of the conductive member used for the conductive film 61c. μ is the magnetic permeability of the conductive member used for the conductive film 61c. μs is the relative magnetic permeability of the conductive member used for the conductive film 61c. F is the frequency of high-frequency power. Fig. 7 is a diagram showing an example of the calculation results of the skin effect. The example in FIG. 7 shows the results of calculating δ when the frequencies f are 40 MHz and 400 kHz for three types of conductive members: the first conductive member, the second conductive member, and the third conductive member. For example, the resistivity ρ of the first conductive member is 4.5 e 2 , and the relative permeability μs is 1. When the frequency f of the first conductive member is 40 MHz, the calculated thickness δ is 1.69 [m]. In addition, the resistivity ρ of the second conductive member was 1.0 e 6 , and the relative magnetic permeability μs was 1. When the frequency f of the second conductive member is 40 MHz, the calculated thickness δ is 7.96 e 1 [m]. When the conductive film 61c is thinner than the thickness δ of the skin effect of the conductive member used in the conductive film 61c, the flow of current is restricted, the resistance increases, and the generated current decreases. Therefore, the conductive film 61c is preferably set to be 10% or less of the thickness δ of the skin effect of the conductive member used for the conductive film 61c, and more preferably, is set to be 1% or less. Thereby, excessive generation of electric current in the conductive film 61c can be suppressed. Furthermore, the conductive film 61c may be formed on the front end portion of the lift pin 61 in a flat state without any step difference. FIG. 8 is a view showing an example of a conductive film formed on the front end portion of the lift pin. In the lift pin 61, a concave portion 61d is formed at the front end portion of the pin main body portion 61a at a depth corresponding to the film thickness of the conductive film 61c. In addition, the lift pin 61 may also form a conductive film 61c in the concave portion 61d of the pin body portion 61a. In addition, the lift pin 61 is formed so that the front end portion thereof is thinner in order to reduce the portion in contact with the wafer W. As shown in FIG. The elevating pin 61 of this embodiment has a cylindrical shape at the front end, and its outer diameter is set to about several mm, for example. There are cases where the outer diameter of the front end portion of the lift pin 61 is smaller than the thickness δ of the skin effect of the conductive member used for the conductive film 61c. In this case, the lift pin 61 may be formed of a conductive member at the front end. For example, when the outer diameter of the front end portion of the lift pin 61 is less than 10%, preferably less than 1%, of the thickness δ of the skin effect of the conductive member, the front end portion of the lift pin 61 may also be formed by a conductive member. . For example, when the frequency f is 40 MHz, the thickness δ of the second conductive member is 7.96 e 1 [m], which is 1% or less of the outer diameter of the front end portion of the lift pin 61 . In this case, the front end portion of the lift pin 61 may also be formed by the second conductive member. Fig. 9 is a view showing an example of forming the front end portion of the lift pin with a conductive member. The lift pin 61 is provided with a conductive portion 61e formed from a conductive member in a range corresponding to the thickness of the electrostatic chuck 6 from the pin upper end 61b side of the lift pin 61 . Furthermore, the lift pin 61 may be configured to include a conductive member in a front end portion corresponding to the pin through hole 200 . That is, the lift pin 61 may embed a conductive portion formed of a conductive member in the front end portion corresponding to the pin through hole 200 . Fig. 10 is a diagram showing an example of a conductive part embedded in the front end portion of the lift pin. In the lift pin 61 shown in FIG. 10 , a conductive portion 61f formed of a conductive member is embedded in a front end portion corresponding to the pin through hole 200 . The conductive part 61f may be plural. Fig. 11 is a diagram showing another example in which a conductive part is embedded in the front end portion of the lift pin. In the lift pin 61 shown in FIG. 11 , two conductive portions 61f formed of conductive members are embedded in the front end portion corresponding to the pin through hole 200 . Three or more conductive parts 61f may be embedded. [Simulation of Potential Change] FIG. 12 is a diagram for simulating the change of potential in the pin through-hole using an equivalent circuit. FIG. 12(A) shows three waveforms W1 to W3 representing potential changes. The waveform W1 represents the potential of the connection point P1 of the equivalent circuits EC1, EC2 shown in FIGS. 5 and 6 . The waveform W2 represents the potential of the connection point P2 of the equivalent circuit EC1 shown in FIG. 5 . That is, the waveform W2 represents a change in potential when the conductive film 61 c is not present at the front end portion of the lift pin 61 . The waveform W3 represents the potential of the connection point P2 of the equivalent circuit EC2 shown in FIG. 6 . That is, the waveform W3 represents a change in potential when the conductive film 61 c is present at the front end portion of the lift pin 61 . FIG. 12(B) shows enlarged waveforms of peak portions of the waveforms W1 to W3 in FIG. 12(A). The potential difference d1 shown in FIG. 12(B) is the difference between the waveform W1 and the waveform W2, and represents the potential difference generated when the conductive film 61c is not present at the front end portion of the lift pin 61. The potential difference d2 is a difference between the waveform W1 and the waveform W3, and represents a potential difference generated when the conductive film 61c is present at the front end portion of the lift pin 61 . Compared with the potential difference d1, the potential difference d2 is reduced. In this way, when the conductive film 61c exists at the front end portion of the lift pin 61, the potential difference decreases. Thereby, the occurrence of abnormal discharge in the through-hole 200 for pins can be suppressed. Thus, the plasma processing apparatus 100 of the first embodiment has the electrostatic chuck 6 and the lift pin 61 . The electrostatic chuck 6 has a mounting surface 21 on which the wafer W is mounted and a rear surface 22 opposite to the mounting surface 21 , and a pin through hole 200 penetrating the mounting surface 21 and the rear surface 22 is formed. The lift pins 61 are at least partially formed of an insulating member, and their tips are accommodated in the pin through holes 200 , and the wafer W is conveyed in the vertical direction by moving in the vertical direction with respect to the mounting surface 21 . The plasma processing apparatus 100 has a conductive film 61c or a conductive portion 61e at the tip portion of the lift pin 61 corresponding to the pin through hole 200 . Thereby, the plasma processing apparatus 100 can suppress the occurrence of abnormal discharge in the through-hole 200 for pins. (Second Embodiment) In the plasma processing apparatus 100 of the first embodiment described above, the case where the conductive member is provided at the tip portion of the lift pin 61 corresponding to the pin through hole 200 has been described. In the plasma processing apparatus 100 according to the second embodiment, a case where a conductive member is provided on the wall surface of the pin through hole 200 facing the lift pin 61 will be described. Fig. 13 is a view showing an example of having a conductive member on the wall surface of the pin through hole facing the lift pin. Through-holes 200 for pins are formed in the electrostatic chuck 6, and a wafer W is placed thereon. The front end of the lift pin 61 is accommodated in the pin through hole 200 . The electrostatic chuck 6 has a conductive film 6 c formed of a conductive member on the wall surface of the pin through hole 200 facing the lift pin 61 . In addition, instead of the conductive film 6c, a conductive cylindrical member may be provided in the pin through-hole 200 . FIG. 14 is a perspective view schematically showing the vicinity of through-holes for pins of the electrostatic chuck. A pin through-hole 200 is formed in the electrostatic chuck 6 . It is also possible to provide a conductive member on the wall surface of the pin through hole 200 that faces the lift pin 61 by inserting the conductive cylindrical member 6d formed in conformity with the pin through hole 200 into the pin through hole 200. . Furthermore, for example, a portion of the pin spacer 201 corresponding to the electrostatic chuck 6 or the entire pin spacer 201 may be formed using a conductive member. As the conductive member used for the conductive film 6c and the cylindrical member 6d, any material may be used as long as it has conductivity, and examples thereof include conductive materials or metals such as silicon, carbon, silicon carbide, silicon nitride, titanium dioxide, and aluminum. The conductive film 6c and the cylindrical member 6d function electrically similarly to the conductive film 61c of the first embodiment, and can alleviate the RF potential difference generated in the pin through hole 200 . Thus, the plasma processing apparatus 100 of the second embodiment has the conductive film 6c or the cylindrical member 6d on the wall surface of the pin through hole 200 facing the lift pin 61 . Thereby, the plasma processing apparatus 100 can suppress the occurrence of abnormal discharge in the through-hole 200 for pins. (Third Embodiment) Next, a third embodiment will be described. The configuration of the plasma processing apparatus of the third embodiment is substantially the same as that of the plasma processing apparatus 10 shown in FIG. 1 , so the same symbols are assigned to the same parts and their descriptions are omitted, and the different parts will be mainly described. Fig. 15A is a schematic sectional view showing a mounting table. The above-described gas supply pipe 30 is provided on the mounting table 2 , and a through-hole 210 for gas supply is formed at a front end thereof. The through-hole 210 for gas supply is formed by the through-hole 210a and the through-hole 210b. The through hole 210a is formed in the electrostatic chuck 6, and the through hole 210b is formed in the base material 2a. The through-hole 210a and the through-hole 210b are formed, for example, so that their positions coincide at normal temperature. In the through-hole 210 for gas supply, the embedded member 220 is arrange|positioned at intervals from the inner wall of the through-hole 210 for gas supply. In other words, the abnormal discharge in the gas supply through hole 210 can be suppressed by reducing the distance between the embedded member 220 and the gas supply through hole 210 . Therefore, for example, it is conceivable to form the front end portion of the embedded member 220 thicker, and to reduce the distance between the embedded member 220 and the through-hole 210 for gas supply. In addition, the abnormal discharge in the through hole 210 for gas supply can also be suppressed by shortening the straight portion of the heat transfer gas path. The reason for this is that by shortening the straight portion of the path of the heat transfer gas, the energy of the electrons in the heat transfer gas is reduced. Therefore, the diameter of the through hole 210b for gas supply is formed larger than the diameter of the through hole 210a, and the portion of the embedded member 220 corresponding to the through hole 210b is formed thicker than the front end portion of the embedded member 220. However, when the distance between the embedded member 220 and the through hole 210 for gas supply is reduced, the embedded member 220 may be damaged. Fig. 15B is a diagram illustrating failure of an embedded member. When the stage 2 has been subjected to plasma treatment, the temperature ranges from 100° C. to 200° C., for example. When the temperature of the electrostatic chuck 6 and the base material 2a reaches a high temperature, thermal expansion occurs respectively. Furthermore, a positional deviation occurs between the through hole 210 a and the through hole 210 b due to the difference in thermal expansion between the electrostatic chuck 6 and the base material 2 a. Therefore, for example, if the front end portion of the embedding member 220 is formed thick to reduce the distance between the embedding member 220 and the through-hole 210 for gas supply, there will be a problem of embedding due to the positional deviation between the through-hole 210a and the through-hole 210b. In case the member 220 is damaged. Therefore, a part of the embedding member 220 is formed of an elastic member. For example, a portion of the embedding member 220 corresponding to a portion where the through hole 210 a communicates with the through hole 210 b is formed at least by an elastic member. Fig. 16A is a diagram illustrating an embedding member according to a third embodiment. For example, when the embedded member 220 is housed in the through hole 210 for gas supply, a conductive portion 220e formed of a conductive member is formed at the front end portion corresponding to the upper half of the through hole 210a from the upper end portion 220b side. , the lower portion of the conductive portion 220e is formed of an elastic member. The elastic member should just have elasticity to the extent that it will not be damaged against the positional deviation of the through-hole 210a and the through-hole 210b by a temperature change. Furthermore, it is preferable that the elastic member has resistance to plasma. As an elastic member, a fluororesin is mentioned, for example. As a fluororesin, polytetrafluoroethylene is mentioned, for example. Teflon functions as an insulating member. In addition, the elastic member is not limited to fluorine-based resin, and a member having a Young's modulus of 20 GPa or less can be mentioned. In particular, components with Young's modulus below 10 GPa are better. Fig. 16B is a diagram illustrating an embedding member of the third embodiment. Even if the electrostatic chuck 6 and the substrate 2a reach a high temperature after the plasma treatment, when the positional deviation between the through hole 210a and the through hole 210b occurs due to the difference in thermal expansion between the electrostatic chuck 6 and the substrate 2a, due to the embedding member The part of 220 corresponding to the part where the through hole 210a communicates with the through hole 210b is deformed, so that the occurrence of damage to the embedded member 220 can also be suppressed. Also, when electrostatic chuck 6 and substrate 2a return to normal temperature, as shown in FIG. 16A , there is no deviation in the positions of through holes 210a and 210b, and embedded member 220 returns to its original shape. Thereby, even when the distance between the embedded member 220 and the through-hole 210 for gas supply is reduced, the damage of the embedded member 220 can be suppressed. Thus, the plasma processing apparatus 100 of the third embodiment has the electrostatic chuck 6 and the base material 2a. The electrostatic chuck 6 has a loading surface 21 on which the wafer W is placed and a back surface 22 opposite to the loading surface 21 , and a through hole 210 a penetrating the loading surface 21 and the back surface 22 is formed. The base material 2a has a supporting surface for supporting the electrostatic chuck 6, and is formed with a through hole 210b communicating with the through hole 210a, and has embedded components 220 in the through hole 210a and the through hole 210b. The embedded member 220 is at least formed of an elastic member at a portion corresponding to a portion where the through hole 210a of the electrostatic chuck 6 communicates with the through hole 210b of the base material 2a. Thereby, even when the distance between the embedded member 220 and the through-hole 210 for gas supply is formed to be small in order to suppress the occurrence of abnormal discharge in the through-hole 210 for gas supply, the plasma processing apparatus 100 can suppress The occurrence of damage to the embedded component 220 . One embodiment has been described above, but the present invention is not limited to this specific embodiment, and various changes or modifications can be made within the scope of the gist of the present invention described in the claims. For example, the first embodiment to the third embodiment may be combined and implemented. For example, the plasma processing apparatus 100 may also have a conductive film 61c formed on the front end portion of the lift pin 61 corresponding to the through hole 200 for the pin, and a conductive film may be formed on the wall surface of the through hole 200 for the pin opposite to the lift pin 61. 6c. In addition, in the plasma processing apparatus 100 , the lift pin 61 may be formed like the embedded member 220 . The embedded member 220 may also be formed with a conductive member like the lift pin 61 . In addition, the conductive film 61c or the conductive portion 61e of the first embodiment may not be provided on the entire peripheral surface of the front end portion of the lift pin 61 corresponding to the pin through hole 200 . For example, the conductive film 61c or the conductive portion 61e may be provided on a part of the peripheral surface with respect to the peripheral direction of the tip portion. Also, for example, a plurality of conductive films 61c or conductive parts 61e may be separately provided in the circumferential direction on the peripheral surface of the front end portion of the lift pin 61 with a length corresponding to the thickness of the electrostatic chuck 6 . The conductive film 6c of the second embodiment may not be provided on the entire wall surface of the pin through hole 200 facing the lift pin 61 . For example, the conductive film 6 c may be provided on a part of the wall surface with respect to the circumferential direction of the pin through-hole 200 . Also, for example, a plurality of conductive films 61 c may be provided separately in the circumferential direction on the wall surface of the through-hole 200 for the pin by the length of the through-hole 200 for the pin. In addition, in the first embodiment and the second embodiment, the plasma processing apparatus 100 may use plasma generated by a radial line slot antenna (Radial line slot antenna).

1:處理容器 1a:接地導體 2:載置台 2a:基材 2b:冷媒入口配管 2c:冷媒出口配管 2d:冷媒流路 2e:絕緣體 3:支持構件 3a:內壁構件 4:支持台 5:聚焦環 6:靜電吸盤 6a:電極 6b:絕緣體 6c:導電膜 6d:筒狀構件 10a:第1 RF電源 10b:第2 RF電源 11a:第1整合器 11b:第2整合器 12:直流電源 15:處理氣體供給源 15a:氣體供給配管 15b:質量流量控制器 16:簇射頭 16a:本體部 16b:上部頂板 16c:氣體擴散室 16d:氣體流經孔 16e:氣體導入孔 16g:氣體導入口 21:載置面 22:背面 30:氣體供給管 30a:貫通孔 30b:貫通孔 61:升降銷 61a:銷本體部 61b:銷上端部 61c:導電膜 61d:凹部 61e:導電部 61f:導電部 62:驅動機構 71:低通濾波器 72:可變直流電源 73:啟閉開關 81:排氣口 82:排氣管 83:第1排氣裝置 84:搬入搬出口 85:閘閥 86:積存物遮罩 87:積存物遮罩 89:導電性構件 90:控制部 91:製程控制器 92:使用者介面 93:記憶部 95:絕緣性構件 100:電漿處理裝置 200:銷用貫通孔 200a:貫通孔 200b:貫通孔 201:銷用間隔件 202:氣體用間隔件 203:銷用套管 204:氣體用套管 210:氣體供給用貫通孔 210a:貫通孔 210b:貫通孔 220:埋入構件 220b:上端部 220e:導電部 C1:電容器 C2:電容器 C3:電容器 EC1:等效電路 EC2:等效電路 PV:電源 P1:連接點 P2:連接點 R:電阻 V2:開關閥 W:晶圓1: Disposal container 1a: Grounding conductor 2: Carrying table 2a: Substrate 2b: Refrigerant inlet piping 2c: Refrigerant outlet piping 2d: Refrigerant flow path 2e: insulator 3: Support components 3a: Inner wall components 4: Support table 5: Focus ring 6: Electrostatic chuck 6a: Electrode 6b: Insulator 6c: Conductive film 6d: Cylindrical member 10a: The first RF power supply 10b: The second RF power supply 11a: 1st Integrator 11b: 2nd integrator 12: DC power supply 15: Process gas supply source 15a: Gas supply piping 15b: Mass flow controller 16:Shower head 16a: Body part 16b: Upper top plate 16c: Gas diffusion chamber 16d: Gas flows through the hole 16e: gas inlet hole 16g: Gas inlet 21: Loading surface 22: back 30: Gas supply pipe 30a: through hole 30b: through hole 61:Lift pin 61a: Pin body part 61b: Upper end of pin 61c: Conductive film 61d: concave part 61e: Conductive part 61f: conductive part 62: Driving mechanism 71: Low pass filter 72: Variable DC power supply 73: On and off switch 81: Exhaust port 82: exhaust pipe 83: 1st exhaust device 84: import and export 85: gate valve 86:Deposit mask 87:Deposit mask 89: Conductive member 90: Control Department 91: Process controller 92: User interface 93: memory department 95: insulating component 100: Plasma treatment device 200: Through hole for pin 200a: through hole 200b: through hole 201: spacer for pin 202: spacer for gas 203: Pin bushing 204: Sleeve for gas 210: Through hole for gas supply 210a: through hole 210b: through hole 220: Embedded components 220b: upper end 220e: Conductive part C1: Capacitor C2: Capacitor C3: Capacitor EC1: Equivalent Circuit EC2: Equivalent Circuit PV: power supply P1: connection point P2: connection point R: resistance V2: switch valve W: Wafer

圖1係表示本實施形態之電漿處理裝置之構成之概略剖視圖。 圖2係表示圖1之電漿處理裝置中之載置台之概略剖視圖。 圖3係表示圖1之電漿處理裝置中之載置台之概略剖視圖。 圖4係模式性地表示靜電吸盤之銷用貫通孔附近之電位之狀態的圖。 圖5係模式性地表示收容於銷用貫通孔之升降銷之前端部分的圖。 圖6係模式性地表示收容於銷用貫通孔之升降銷之前端部分的圖。 圖7係表示集膚效應之算出結果之一例的圖。 圖8係表示於升降銷之前端部分形成有導電膜之一例的圖。 圖9係表示利用導電性構件形成升降銷之前端部分之一例的圖。 圖10係表示於升降銷之前端部分之內部埋入有導電部之一例的圖。 圖11係表示於升降銷之前端部分之內部埋入有導電部之另一例的圖。 圖12(A)、(B)係使用等效電路模擬銷用貫通孔內之電位之變化的圖。 圖13係表示於銷用貫通孔之與升降銷相對向之壁面具有導電性構件之一例的圖。 圖14係模式性地表示靜電吸盤之銷用貫通孔附近之立體圖。 圖15A係表示載置台之概略剖視圖。 圖15B係說明埋入構件之破損之圖。 圖16A係說明第3實施形態之埋入構件之圖。 圖16B係說明第3實施形態之埋入構件之圖。Fig. 1 is a schematic cross-sectional view showing the configuration of a plasma processing apparatus according to this embodiment. Fig. 2 is a schematic cross-sectional view showing a mounting table in the plasma processing apparatus of Fig. 1 . Fig. 3 is a schematic cross-sectional view showing a mounting table in the plasma processing apparatus of Fig. 1 . FIG. 4 is a diagram schematically showing the state of the potential in the vicinity of the through-hole for the pin of the electrostatic chuck. Fig. 5 is a diagram schematically showing a front end portion of a lift pin accommodated in a through hole for a pin. Fig. 6 is a diagram schematically showing a front end portion of a lift pin accommodated in a through hole for a pin. Fig. 7 is a diagram showing an example of the calculation results of the skin effect. FIG. 8 is a view showing an example of a conductive film formed on the front end portion of the lift pin. Fig. 9 is a view showing an example of forming the front end portion of the lift pin with a conductive member. Fig. 10 is a diagram showing an example of a conductive part embedded in the front end portion of the lift pin. Fig. 11 is a diagram showing another example in which a conductive part is embedded in the front end portion of the lift pin. 12(A) and (B) are diagrams simulating changes in potential in pin through-holes using equivalent circuits. Fig. 13 is a view showing an example of having a conductive member on the wall surface of the pin through hole facing the lift pin. FIG. 14 is a perspective view schematically showing the vicinity of through-holes for pins of the electrostatic chuck. Fig. 15A is a schematic sectional view showing a mounting table. Fig. 15B is a diagram illustrating failure of an embedded member. Fig. 16A is a diagram illustrating an embedding member according to a third embodiment. Fig. 16B is a diagram illustrating an embedding member of the third embodiment.

2:載置台 2: Carrying table

2a:基材 2a: Substrate

5:聚焦環 5: Focus ring

6:靜電吸盤 6: Electrostatic chuck

6a:電極 6a: Electrode

6b:絕緣體 6b: Insulator

21:載置面 21: Loading surface

22:背面 22: back

30:氣體供給管 30: Gas supply pipe

30a:貫通孔 30a: through hole

30b:貫通孔 30b: through hole

61:升降銷 61:Lift pin

61a:銷本體部 61a: Pin body part

61b:銷上端部 61b: Upper end of pin

61c:導電膜 61c: Conductive film

200:銷用貫通孔 200: Through hole for pin

200a:貫通孔 200a: through hole

200b:貫通孔 200b: through hole

201:銷用間隔件 201: spacer for pin

202:氣體用間隔件 202: spacer for gas

203:銷用套管 203: Pin bushing

204:氣體用套管 204: Sleeve for gas

W:晶圓 W: Wafer

Claims (5)

一種電漿處理裝置,其特徵在於,具有:靜電吸盤,其具有供載置被處理體之載置面及與上述載置面相對之背面,且形成有貫通上述載置面與上述背面之第1通孔;及基台,其具有支持上述靜電吸盤之支持面,且形成有與上述第1通孔連通之第2通孔,於該第1通孔及第2通孔內具有埋入構件;且上述埋入構件於前端部分具有暴露於上述第1通孔之內部空間之導電性構件,與上述靜電吸盤之上述第1通孔和上述基台之上述第2通孔連通之部分相對應的上述埋入構件之部分至少由彈性構件形成,上述前端部分之上端部未被上述導電性構件覆蓋。 A plasma processing device, characterized by comprising: an electrostatic chuck having a mounting surface on which an object to be processed is mounted and a back surface opposite to the mounting surface, and a second surface penetrating the mounting surface and the rear surface is formed. 1 through hole; and a base, which has a supporting surface supporting the electrostatic chuck, and is formed with a second through hole communicating with the first through hole, and has embedded components in the first through hole and the second through hole and the above-mentioned embedded member has a conductive member exposed to the inner space of the above-mentioned first through hole at the front end, corresponding to the part where the above-mentioned first through-hole of the above-mentioned electrostatic chuck communicates with the above-mentioned second through-hole of the above-mentioned base At least part of the embedding member is formed of an elastic member, and the upper end of the front end portion is not covered by the conductive member. 如請求項1之電漿處理裝置,其中上述彈性構件係由楊氏模數為20GPa以下之構件形成。 The plasma processing device according to claim 1, wherein the elastic member is formed of a member whose Young's modulus is 20 GPa or less. 如請求項1或2之電漿處理裝置,其中上述埋入構件於上述第1通孔側之前端部分具有由導電性構件形成之導電膜。 The plasma processing apparatus according to claim 1 or 2, wherein the embedded member has a conductive film formed of a conductive member at a front end portion on the side of the first through hole. 如請求項1或2之電漿處理裝置,其中上述第1通孔及第2通孔之至少一者於與上述埋入構件相對向之壁面具有由導電性構件形成之導電膜。 The plasma processing device according to claim 1 or 2, wherein at least one of the first through hole and the second through hole has a conductive film formed of a conductive member on a wall surface facing the embedded member. 如請求項1或2之電漿處理裝置,其中於上述第1通孔及上述第2通孔內具有導電性之筒狀構件。 The plasma processing device according to claim 1 or 2, wherein a conductive cylindrical member is provided in the first through hole and the second through hole.
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Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110610840B (en) * 2018-06-14 2022-05-27 北京北方华创微电子装备有限公司 Bearing table and plasma equipment
JP7149739B2 (en) * 2018-06-19 2022-10-07 東京エレクトロン株式会社 Mounting table and substrate processing device
CN111326470A (en) * 2018-12-17 2020-06-23 夏泰鑫半导体(青岛)有限公司 Electrostatic chuck and semiconductor device
JP7134104B2 (en) * 2019-01-09 2022-09-09 東京エレクトロン株式会社 Plasma processing apparatus and mounting table for plasma processing apparatus
CN113035682B (en) * 2019-12-25 2023-03-31 中微半导体设备(上海)股份有限公司 Lower electrode assembly and plasma processing device thereof
US20220293451A1 (en) * 2021-03-12 2022-09-15 Applied Materials, Inc. Lift pin assembly
TW202333191A (en) * 2021-10-28 2023-08-16 日商東京威力科創股份有限公司 Plasma processing device and electrostatic chuck
JPWO2023153021A1 (en) * 2022-02-09 2023-08-17
US11764094B2 (en) 2022-02-18 2023-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor processing tool and methods of operation

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008028253A (en) * 2006-07-24 2008-02-07 Tokyo Seimitsu Co Ltd Wafer mounting table
JP2009054746A (en) * 2007-08-27 2009-03-12 Nikon Corp Electrostatic chuck, and electrostatic chucking method
JP2015023160A (en) * 2013-07-19 2015-02-02 Sppテクノロジーズ株式会社 Plasma processing apparatus

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05175318A (en) * 1991-12-20 1993-07-13 Fujitsu Ltd Attaching and detaching method for board of electrostatic chuck
JPH11340309A (en) * 1998-05-29 1999-12-10 Kyocera Corp Ceramic lift pin including conductor and electrostatic chuck using it
JP2000077507A (en) * 1998-09-02 2000-03-14 Tokyo Electron Ltd Substrate support device
KR100765539B1 (en) * 2001-05-18 2007-10-10 엘지.필립스 엘시디 주식회사 Chemical Vapor Deposition Apparatus
KR20040026427A (en) * 2002-09-24 2004-03-31 삼성전자주식회사 lift fin and method of wafer lifting using thereof
CN100423224C (en) * 2005-12-09 2008-10-01 北京圆合电子技术有限责任公司 Wafer lifting device and lifting method
JP2007329304A (en) * 2006-06-08 2007-12-20 Matsushita Electric Ind Co Ltd Electrostatic chuck device
KR20080061109A (en) * 2006-12-28 2008-07-02 세메스 주식회사 Electrostatic chuck and apparatus for manufacturing a substrate having the same
CN101872733B (en) * 2009-04-24 2012-06-27 中微半导体设备(上海)有限公司 System and method for sensing and removing residual charge of processed semiconductor process component
EP3128533A1 (en) * 2014-03-31 2017-02-08 SPP Technologies Co., Ltd. Heating device and plasma treatment device provided with same
JP2016090204A (en) * 2014-11-11 2016-05-23 富士通株式会社 Loop type heat pipe and electronic equipment

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008028253A (en) * 2006-07-24 2008-02-07 Tokyo Seimitsu Co Ltd Wafer mounting table
JP2009054746A (en) * 2007-08-27 2009-03-12 Nikon Corp Electrostatic chuck, and electrostatic chucking method
JP2015023160A (en) * 2013-07-19 2015-02-02 Sppテクノロジーズ株式会社 Plasma processing apparatus

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