TWI792776B - Process flow of manufacturing a semiconductor device and system for manufacturing a semiconductor device - Google Patents

Abstract

A process flow of manufacturing a semiconductor device includes the following steps is provided. Establishing a first process rule includes: performing a first process on a first film structure under the first process conditions. Establishing a second process rule includes: performing a second process on a second film structure under the second process conditions. A semiconductor device manufacturing process is performed according to the first process rule and the second process rule, which includes: performing a first semiconductor device manufacturing process on a first region of a device film structure; and performing a second semiconductor device manufacturing process on a first region of the device film structure. The specifications of the first region are the same as the specifications of the first film layer structure. The specifications of the second region are the same as the specifications of the second film structure. The conditions of the first semiconductor device manufacturing process are the same as the first process conditions. The conditions of the second semiconductor device manufacturing process are the same as the second process conditions.

Description

Semiconductor device manufacturing process and semiconductor device manufacturing system

The present invention relates to a device manufacturing process and a device manufacturing system, and in particular to a semiconductor device manufacturing process and a semiconductor device manufacturing system.

In the traditional yellow light lithography process, the rule-based sizing method (such as: topography proximity correction (TPC)) or optical proximity correction (Optical Proximity Correction, OPC) is often used. , so as to improve the process window (process window) and/or critical dimension (Critical Dimension, CD) accuracy of the yellow light lithography process.

However, for some structural parameters and/or some process conditions, the aforementioned adjustment/correction methods may consume relatively high resources and/or costs. Moreover, the process yield and/or quality improvement for semiconductor devices may be relatively limited.

The present invention provides a semiconductor device manufacturing process and/or a semiconductor device manufacturing system, which can improve the process yield and/or quality of the semiconductor device.

The manufacturing process of the semiconductor element of the present invention includes the following steps. The first process rule is established, which includes: forming a first film structure on the first semiconductor substrate; and performing a first semiconductor process on the first film structure on the first semiconductor substrate by using first process conditions. Establishing a second process rule, which includes: forming a second film structure on the second semiconductor substrate; and performing a second semiconductor process on the second film structure on the second semiconductor substrate under the second process conditions, wherein the first The semiconductor manufacturing process and the second semiconductor manufacturing process are homogeneous manufacturing processes. The semiconductor device is manufactured by the first process rule and the second process rule. The semiconductor element manufacturing process includes: providing a process substrate, which includes an element substrate and an element film structure formed on the element substrate; performing a first semiconductor element process on the first area of the element film structure on the element substrate; and performing a first semiconductor element process on the element substrate. The second region of the element film layer structure is subjected to the second semiconductor element manufacturing process. The element film structure has a first area and a second area, the specification of the first area is the same as that of the first film structure, and the specification of the second area is the same as that of the second film structure. The conditions of the first semiconductor device manufacturing process are the same as the first process conditions. The conditions of the second semiconductor device manufacturing process are the same as the second process conditions.

In an embodiment of the present invention, the first semiconductor substrate and the second semiconductor substrate are different substrates, and the first semiconductor substrate and the second semiconductor substrate are homogeneous substrates. Moreover, the first semiconductor manufacturing process, the second semiconductor manufacturing process, the first semiconductor element manufacturing process, and the second semiconductor element manufacturing process are homogeneous manufacturing processes.

In an embodiment of the present invention, the first film layer structure is formed on the first semiconductor substrate entirely, and the second film layer structure is formed entirely on the second semiconductor substrate.

In an embodiment of the invention, the specifications of the first film structure are different from those of the second film structure.

In an embodiment of the present invention, the first film layer structure includes a first film layer, the second film layer structure includes a second film layer, the thickness of the first film layer is different from the thickness of the second film layer, and the first semiconductor The manufacturing process, the second semiconductor manufacturing process, the first semiconductor element manufacturing process and the second semiconductor element manufacturing process include a lithography process.

In an embodiment of the present invention, the manufacturing process of the semiconductor device further includes the following steps. Establishing a third process rule, which includes: forming a third film structure on the third semiconductor substrate; and performing a third semiconductor process on the third film structure on the third semiconductor substrate under the third process conditions, wherein the third The semiconductor manufacturing process is homogeneous to the first semiconductor manufacturing process and the second semiconductor manufacturing process. The element film layer structure further has a third area, and the specification of the third area is the same as that of the third film layer structure. Moreover, the semiconductor element manufacturing process is further carried out according to the third process rule, which further includes: performing a third semiconductor element manufacturing process on the third region of the element film layer structure on the element substrate, wherein the conditions of the third semiconductor element manufacturing process are the same as those of the third semiconductor element manufacturing process. Process conditions.

In an embodiment of the present invention, the specification of the first film layer structure, the specification of the second film layer structure and the specification of the third film layer structure are different from each other.

In an embodiment of the present invention, the first film layer structure includes a first film layer, the second film layer structure includes a second film layer, and the third film layer structure includes a third film layer, the thickness of the first film layer, the second film layer The thickness of the second film layer and the thickness of the third film layer are different from each other, and the first semiconductor process, the second semiconductor process, the third semiconductor process, the first semiconductor element process, the second semiconductor element process and the third semiconductor element process include Huang Guangwei film process.

In an embodiment of the present invention, the specification of the first film structure, the specification of the second film structure and the specification of the third film structure respectively correspond to the conditions of the first semiconductor element manufacturing process and the conditions of the second semiconductor element manufacturing process The relationship with the conditions of the third semiconductor element manufacturing process is not a linear relationship.

The semiconductor device manufacturing system of the present invention includes a storage unit and a process unit. The storage unit is adapted to store at least a first process rule and a second process rule. The process unit signal is connected to the storage unit. The first process rule includes the specifications of the first film structure and the corresponding first process conditions. The second process rules include specifications of the second film layer structure and corresponding second process conditions. The process unit is suitable for performing semiconductor element process on the process substrate by the first process rule and the second process rule. The process substrate includes an element substrate and an element film layer structure formed on the element substrate. The element film layer structure has a first area and a second area. The specification of the first zone is the same as that of the first film layer structure. The specification of the second zone is the same as that of the second film layer structure. The semiconductor element manufacturing process includes performing a first semiconductor element manufacturing process on the first region of the element film layer structure on the element substrate. The conditions of the first semiconductor device manufacturing process are the same as the first process conditions. The semiconductor device manufacturing process further includes performing a second semiconductor device manufacturing process on the second region of the device film layer structure on the device substrate. The conditions of the second semiconductor device manufacturing process are the same as the second process conditions.

Based on the above, with the semiconductor device manufacturing process and/or semiconductor device manufacturing system of the present invention, the process yield and/or quality of the semiconductor device can be improved.

In the drawings, the thickness of elements or layers may be exaggerated for clarity. In the description or illustrations, the same reference numerals represent the same or similar elements or film layers. It will be understood that when a layer such as a film is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present.

It should be understood that although the terms "first", "second", "third" and the like may be used herein to describe various elements, steps, regions and/or layers, these elements, steps, regions and/or layers Layers should not be limited by these terms. These terms are only used to distinguish one element, step, region and/or layer from another element, step, region and/or layer.

Also, relative terms such as "below" or "upper" may be used herein to describe one element's relationship to another element as shown in the figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. Thus, the exemplary term "below" can encompass both an orientation of "below" and "upper," depending on the particular orientation of the drawing. Similarly, if the device in one of the figures is turned over, elements described as "below" other elements would then be oriented "above" the other elements.

As used herein, "substantially" includes stated values and averages within acceptable deviations from a particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the particular amount of error associated with the measurement (i.e. , limitations of the measurement system).

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted to have meanings consistent with their meanings in the context of the relevant art and the present invention, and will not be interpreted as idealized or excessive formal meaning, unless expressly so defined herein.

FIG. 1 is a schematic diagram of a partial process of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 2A is a schematic diagram of a partial structure of a manufacturing process of a semiconductor device according to an embodiment of the present invention. FIG. 2B is a partial structural schematic diagram of a manufacturing process of a semiconductor device according to an embodiment of the present invention. FIG. 2C is a partial structural schematic diagram of a manufacturing process of a semiconductor device according to an embodiment of the present invention. FIG. 3A is a partial schematic diagram of a system for manufacturing semiconductor devices according to an embodiment of the present invention. FIG. 3B is a partial structural schematic diagram of a manufacturing process of a semiconductor device according to an embodiment of the present invention. For example, in FIG. 2A , a figure similar to a circle is a schematic top view of a structure, and a figure similar to a rectangle is a schematic cross-sectional view of the structure along the line A-A'. For example, in FIG. 2B , a figure similar to a circle is a schematic top view of a structure, and a figure similar to a rectangle is a schematic cross-sectional view of the structure along the line B-B'. For example, in FIG. 2C , a figure similar to a circle is a schematic top view of a structure, and a figure similar to a rectangle is a schematic cross-sectional view of the structure along the line C-C'. For example, in FIG. 3B , the figure similar to a circle is a schematic top view of a structure, and the three figures similar to a rectangle are schematic cross-sectional views of the structure in three different regions.

Referring to FIG. 1 , the semiconductor device manufacturing process may include the following steps. Step S11: establishing a first process rule (process rule). Step S12: Establish a second process rule. Step S20 : at least using the first process rule and the second process rule to process the semiconductor device.

In this embodiment, the manufacturing process of the semiconductor device may further include the following steps. Step S13: Establish a third process rule. Moreover, in step S20 , at least the first process rule, the second process rule and the third process rule can be used to process the semiconductor device.

Examples of ways to create a process rule (eg, the aforementioned first process rule, second process rule, and/or third process rule) are as follows.

Please refer to FIG. 1 and FIG. 2A, the establishment method of the first process rule can be as follows: form the first film layer structure 110 on the first semiconductor substrate 140; A film structure 110 performs a first semiconductor process. In one embodiment, after the first semiconductor process is performed on the first film layer structure 110 on the first semiconductor substrate 140 , a corresponding first process structure (not directly shown) may be formed.

Please refer to FIG. 1 and FIG. 2B, the establishment method of the second process rule can be as follows: form the second film layer structure 210 on the second semiconductor substrate 240; The two-layer structure 210 is subjected to a second semiconductor process. In one embodiment, after the second semiconductor process is performed on the second film layer structure 210 on the second semiconductor substrate 240 , a corresponding second process structure (not directly shown) may be formed.

Please refer to FIG. 1 and FIG. 2C, the establishment method of the third process rule can be as follows: form the third film structure 310 on the third semiconductor substrate 340; The three-layer structure 310 is subjected to a third semiconductor process. In one embodiment, after the third semiconductor process is performed on the third film layer structure 310 on the third semiconductor substrate 340 , a corresponding third process structure (not directly shown) may be formed.

It should be noted that the present invention does not limit the order of establishing the first process rule, the second process rule and/or the third process rule.

In this embodiment, the first semiconductor substrate 140 , the second semiconductor substrate 240 and the third semiconductor substrate 340 are different substrates, but the first semiconductor substrate 140 , the second semiconductor substrate 240 and the third semiconductor substrate 340 are homogeneous substrates. That is to say, although the first semiconductor substrate 140 , the second semiconductor substrate 240 and the third semiconductor substrate 340 are different substrates, their materials and/or dimensions are basically the same or similar. For example, the first semiconductor substrate 140 , the second semiconductor substrate 240 and the third semiconductor substrate 340 may be different Si wafers. Of course, different silicon wafers may have slightly different detailed specifications (such as surface roughness, purity and/or doping concentration), but basically they should still be regarded as an equal range of "homogeneous substrates". For example, even if different wafers (wafers) are cut from the same ingot, the corresponding doping concentrations may be slightly different. In one embodiment, the first semiconductor substrate 140 , the second semiconductor substrate 240 and the third semiconductor substrate 340 may be different blank wafers.

In this embodiment, the first film layer structure 110 is formed on the first semiconductor substrate 140 comprehensively, the second film layer structure 210 is formed on the second semiconductor substrate 240 comprehensively, and the third film layer structure 310 is formed entirely on the third semiconductor substrate 340 . That is to say, when establishing the corresponding process rule, the corresponding film layer structure does not need to go through the step of patterning before the subsequent semiconductor process is performed. In this way, the establishment of process rules can be more efficient.

It is worth noting that, in this embodiment, "overall formation" may mean covering the later formed film layer by deposition, plating, coating or other similar methods without a patterning step. on the substrate and/or previously formed film layers. Of course, in the general semiconductor manufacturing process, it is possible for the film layer formed later to partially cover the edge of the substrate and/or the film layer formed earlier; Existing parts (such as: shadow frame for reducing side plating or fixed parts for fixing the substrate) may cause partial uncovered areas; or, the edge of the substrate (such as: Part of the film layer on the wafer edge region will be partially peeled; however, the above-mentioned situation should basically be regarded as an equal range of "fully formed".

Please refer to FIG. 2A to FIG. 2C , the specification of the first film structure 110 , the specification of the second film structure 210 and the specification of the third film structure 310 are different from each other. For example, in this embodiment, the first film layer structure 110 may include the first film layer 111, the second film layer structure 210 may include the second film layer 211, and the third film layer structure 310 may include the third film layer 311. Moreover, the material or form of the first film layer 111, the material or form of the second film layer 211 and the material or form of the third film layer 311 can be substantially the same or similar to each other, but the thickness of the first film layer 111 h1, the thickness h2 of the second film layer 211 and the thickness h3 of the third film layer 311 are different from each other.

In an unillustrated embodiment, the thickness or formation method of the first film layer 111, the thickness or formation method of the second film layer 211, and the thickness or formation method of the third film layer 311 may be substantially the same or similar to each other, However, the material of the first film layer 111 , the material of the second film layer 211 and the material of the third film layer 311 are different from each other. For example, different doping concentrations can be used to make different film layers have different refractive index (Refractive index; may be called: n value) and/or extinction coefficient (extinction coefficient; may be called: k value).

In this embodiment, the first film layer structure 110 may further include another film layer 112 located above the first film layer 111 , and the second film layer structure 210 may further include another film layer located above the second film layer 211 212, the third film layer structure 310 may further include another film layer 312 located above the third film layer 311, and the material, formation method and thickness of the film layer 112, the film layer 212 and the film layer 312 may be substantially the same as each other or resemblance. It should be noted that, in FIG. 2A to FIG. 2C , the film layer 112, the film layer 212 and the film layer 312 are only illustratively shown, and the film layer 112, the film layer 212 and the film layer 312 can be a single film layer or A stack of multiple film layers.

In this embodiment, the first film layer structure 110 may further include another film layer 113 located below the first film layer 111 , and the second film layer structure 210 may further include another film layer located below the second film layer 211 213, the third film layer structure 310 may further include another film layer 313 located below the third film layer 311, and the material, formation method and thickness of the film layer 113, the film layer 213 and the film layer 313 may be substantially the same as each other or resemblance. It should be noted that, in FIG. 2A to FIG. 2C , the film layer 113, the film layer 213 and the film layer 313 are only illustratively shown, and the film layer 113, the film layer 213 and the film layer 313 can be a single film layer or A stack of multiple film layers.

In one embodiment, in terms of electrical properties, one of the film layers in the first film layer structure 110 (such as: the first film layer 111, at least a part of the film layer 112 and/or at least a part of the film layer 113 a part), one of the film layers in the second film layer structure 210 (such as: the second film layer 211, at least a part of the film layer 212 and/or at least a part of the film layer 213) or the third film layer structure 310 One of the film layers (for example: the third film layer 311 , at least a part of the film layer 312 and/or at least a part of the film layer 313 ) may include one of an insulating layer, a conductive layer or a semiconductor layer.

In an embodiment, the first semiconductor process, the second semiconductor process and the third semiconductor process may be homogeneous processes. For example, the first semiconductor process, the second semiconductor process, and the third semiconductor process may be the same type of process performed by the same machine or the same type of machine (such as: lithography process; but not limited). Of course, in the same type of process, the detailed process parameters (such as: the value of a certain process parameter; but not limited) may be slightly different, but basically it should be regarded as an equal range of "homogeneous process". Taking the yellow light lithography process as an example, the same or similar wavelength can be irradiated by the same machine or the same type of machine, although the line width (line, L) or line distance (space, S) corresponding to the mask used ) may vary slightly, but should still be considered a homogenous yellow light lithography process.

The corresponding process rules (such as: the first process rule, the second process rule and/or the third process rule mentioned above) can be generally established in the above manner. Moreover, with the corresponding process rules (such as: the first process rule, the second process rule and/or the third process rule mentioned above), the corresponding semiconductor element manufacturing process can be performed, and the manner is exemplarily described as follows.

Referring to FIG. 1 and FIG. 3A , a semiconductor device manufacturing system 900 is provided. The semiconductor device manufacturing system 900 may include a storage unit 950 and a processing unit 960 that are signally connected to each other. The aforementioned first process rule, second process rule, third process rule and/or other similar process rules may be stored in the storage unit 950 of the semiconductor device manufacturing system 900 . The storage unit 950 includes, for example, a memory, a hard disk, a disk array, a database, and/or other similar units suitable for permanent or temporary data storage. The processing unit 960 may be suitable for performing appropriate semiconductor processing or semiconductor device processing.

In this embodiment, each process rule at least includes the parameters of the corresponding film layer structure and the corresponding process conditions. In an embodiment, each process rule may further include the corresponding parameters of the corresponding process structure formed after the corresponding process is performed on the corresponding film layer structure with the parameter under the corresponding process conditions. That is to say, in one embodiment, the data of each process rule stored in the storage unit 950 may include before, when and/or when the corresponding process is performed on the film layer structure formed on the empty wafer. Or subsequent related manufacturing process and/or corresponding structure information.

Referring to FIG. 1 , FIG. 3A and FIG. 3B , a process substrate 600 is provided. Moreover, according to each process rule stored in the storage unit 950 , the process unit 960 can be used to process the corresponding semiconductor element on the process substrate 600 .

In detail, please refer to FIG. 3A and FIG. 3B , the process substrate 600 includes an element substrate 640 and an element film layer structure 660 formed on the element substrate 640 . The element substrate 640 may be the same as or similar to the aforementioned first semiconductor substrate 140 , the aforementioned second semiconductor substrate 240 and/or the aforementioned third semiconductor substrate 340 . The device film layer structure 660 may have a first region R1 , a second region R2 and a third region R3 with different specifications. That is to say, at least a part of the element film layer structure 660 may not be comprehensively formed on the element substrate 640; and/or at least a part of the element film layer structure 660 may be comprehensively formed on the element substrate 640, Then, patterning, thinning, or removing steps are performed on the aforementioned comprehensively formed portion. In addition, in FIG. 3B , the relative positions of the first region R1 , the second region R2 , and the third region R3 are only shown as examples, and are not limited in the present invention.

Referring to FIG. 3B and FIG. 2A , in this embodiment, the specifications of the first region R1 in the device film layer structure 660 may be the same or similar to the specifications of the aforementioned first film layer structure 110 . For example, the first region R1 in the element film layer structure 660 may include the film layer 612 , the first film layer 611 and the film layer 613 . The material, thickness and formation method of the film layer 612 , the first film layer 611 and the film layer 613 may be the same or similar to the above-mentioned film layer 112 , the above-mentioned first film layer 111 and the above-mentioned film layer 113 respectively.

Referring to FIG. 3B and FIG. 2B , in this embodiment, the specifications of the second region R2 in the device film layer structure 660 may be the same or similar to the specifications of the aforementioned second film layer structure 210 . For example, the second region R2 in the element film layer structure 660 may include the film layer 622 , the second film layer 621 and the film layer 623 . The material, thickness and formation method of the film layer 622 , the second film layer 621 and the film layer 623 may be the same or similar to the aforementioned film layer 212 , the aforementioned second film layer 211 and the aforementioned film layer 213 .

Referring to FIG. 3B and FIG. 2C , in this embodiment, the specifications of the third region R3 in the device film layer structure 660 may be the same or similar to the specifications of the aforementioned third film layer structure 310 . For example, the third region R3 in the element film layer structure 660 may include the film layer 632 , the third film layer 631 and the film layer 633 . The material, thickness and formation method of the film layer 632 , the third film layer 631 and the film layer 633 may be the same or similar to the aforementioned film layer 312 , the aforementioned third film layer 311 and the aforementioned film layer 313 .

For the lithography process and/or subsequent processes (such as: etching process), at least a part of the film layer 612, the film layer 622 and/or the film layer 632 may include a photoresist layer (photoresist layer, PR layer), anti-reflection layer (anti-reflective layer, AR layer) or hard mask layer (hard mask layer, HM layer), the first film layer 611, the second film layer 621 and/or the third film layer 631 may include an etched layer (etched layer), and/or at least a part of the film layer 613 , the film layer 623 and/or the film layer 633 may include an etched layer or an etching stop layer, but the present invention is not limited thereto.

Please refer to FIG. 1, FIG. 2A, FIG. 3A and FIG. 3B, the first semiconductor element manufacturing process is performed on the first region R1 of the element film layer structure 660 on the element substrate 640, wherein the conditions of the first semiconductor element manufacturing process are the same or similar to the aforementioned First process condition. In this way, after the first semiconductor element manufacturing process is performed on the first region R1, the corresponding process structure can be the same or similar to that after the first semiconductor process is performed on the first film layer structure 110 on the first semiconductor substrate 140. The formed first process structure.

Please refer to FIG. 1, FIG. 2B, FIG. 3A and FIG. 3B, the second semiconductor element manufacturing process is performed on the second region R2 of the element film layer structure 660 on the element substrate 640, wherein the conditions of the second semiconductor element manufacturing process are the same or similar to the aforementioned Second process condition. In this way, after the second semiconductor element manufacturing process is performed on the second region R2, the corresponding process structure can be the same or similar to that after the second semiconductor process is performed on the second film layer structure 210 on the second semiconductor substrate 240. The formed second process structure.

Please refer to FIG. 1, FIG. 2C, FIG. 3A and FIG. 3B, the third semiconductor element manufacturing process is performed on the third region R3 of the element film layer structure 660 on the element substrate 640, wherein the conditions of the third semiconductor element manufacturing process are the same or similar to the aforementioned The third process condition. In this way, after the third semiconductor element manufacturing process is performed on the third region R3, the corresponding process structure can be the same or similar to that after the third semiconductor process is performed on the third film layer structure 310 on the third semiconductor substrate 340. The formed third process structure.

In the manufacturing process of semiconductor devices, the process parameters of a certain process may have a linear relative relationship with the process results; however, the process parameters of another process may not have a linear relative relationship with the process results. For example, taking the deposition process as an example, under the premise that other conditions are the same or similar, the deposition time and the corresponding thickness of the formed film generally have a linear relationship. However, under the premise that other conditions are the same or similar, the thickness of the film layer corresponds to the refractive index (n value), extinction coefficient (k value) and/or the value derived from the refractive index and extinction coefficient of the aforementioned film layer. Other parameters are not necessarily linear. Therefore, for some semiconductor manufacturing processes, it may be impossible or difficult to estimate another corresponding parameter and/or corresponding process parameter from one parameter by linear relationship (eg, linear interpolation or extrapolation).

It is worth noting that, in this embodiment, the "linear relationship" between two sets of data can be determined by the aforementioned two sets of data through linear regression, and its coefficient of determination (Coefficient of determination, R ² ) is greater than or equal to 0.9 and less than or equal to 1. That is to say, two sets of data having a "linear relationship" does not mean that the aforementioned two sets of data are completely positively correlated or completely negatively correlated.

Taking the yellow light lithography process as an example, the refractive index and/or extinction coefficient of the film layer may affect the process parameters related to optical properties. For example, the refractive index and/or extinction coefficient of the film layer may correspondingly affect the corresponding line width or line distance formed by the lithography process. In this way, through the semiconductor device manufacturing process of this embodiment, the process conditions (such as: process parameters, film thickness, refractive index and/or extinction coefficient) can be closer to the actual semiconductor device process conditions (such as: process parameters, film thickness, refractive index and/or extinction coefficient) and/or The corresponding process structure formed after the aforementioned semiconductor device process. Therefore, the process yield and/or quality of the semiconductor device can be improved.

To sum up, with the semiconductor device manufacturing process and/or semiconductor device manufacturing system of the present invention, the process yield and/or quality of the semiconductor device can be improved.

110, 210, 310: film layer structure 111, 112, 113, 211, 212, 213, 311, 312, 313: film layer 140, 240, 340: semiconductor substrate 600: Process substrate 640: component substrate 660: Component film layer structure 611, 612, 613, 621, 622, 623, 631, 632, 633: film layer 900:Semiconductor component manufacturing system 950: storage unit 960: Process unit h1, h2, h3: thickness R1, R2, R3: Zones S11, S12, S13, S20: steps

FIG. 1 is a schematic diagram of a partial process of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 2A is a schematic diagram of a partial structure of a manufacturing process of a semiconductor device according to an embodiment of the present invention. FIG. 2B is a partial structural schematic diagram of a manufacturing process of a semiconductor device according to an embodiment of the present invention. FIG. 2C is a partial structural schematic diagram of a manufacturing process of a semiconductor device according to an embodiment of the present invention. FIG. 3A is a partial schematic diagram of a system for manufacturing semiconductor devices according to an embodiment of the present invention. FIG. 3B is a partial structural schematic diagram of a manufacturing process of a semiconductor device according to an embodiment of the present invention.

S11, S12, S13, S20: steps

Claims (8)

A manufacturing process of a semiconductor element, including: establishing a first process rule, which includes: forming a first film layer structure on a first semiconductor substrate; The first semiconductor process is performed on the film structure; the second process rule is established, which includes: forming a second film structure on the second semiconductor substrate; The second semiconductor process is carried out with a two-layer structure, wherein the first semiconductor process and the second semiconductor process are homogeneous processes; and the semiconductor element process is performed by the first process rule and the second process rule, which Including: providing a process substrate, which includes an element substrate and an element film structure formed on the element substrate, wherein the element film structure has a first area and a second area, and the specification of the first area is the same as that of the The specifications of the first film layer structure, and the specification of the second area is the same as the specification of the second film layer structure; the first area of the element film layer structure on the element substrate is subjected to the second A semiconductor element manufacturing process, wherein the conditions of the first semiconductor element manufacturing process are the same as the first process conditions; and performing a second semiconductor element manufacturing process on the second region of the element film layer structure on the element substrate , wherein the conditions of the second semiconductor element manufacturing process are the same as Same as the second process condition, wherein: the first semiconductor substrate and the second semiconductor substrate are different substrates, and the first semiconductor substrate and the second semiconductor substrate are homogeneous substrates; A semiconductor process, the second semiconductor process, the first semiconductor element process, and the second semiconductor element process are homogeneous processes; the specification of the first film structure is different from the specification of the second film structure ; the first film structure is not formed on the second semiconductor substrate; and the second film structure is not formed on the first semiconductor substrate. The manufacturing process of semiconductor elements according to claim 1, wherein: the first film layer structure is formed on the first semiconductor substrate; and the second film layer structure is formed on the entire surface on the second semiconductor substrate. The semiconductor element manufacturing process as claimed in claim 1, wherein: the first film layer structure includes a first film layer; the second film layer structure includes a second film layer; the thickness of the first film layer is different from The thickness of the second film layer; and the first semiconductor process, the second semiconductor process, the first semiconductor element process, and the second semiconductor element process include a lithography process. The semiconductor element manufacturing process as described in claim 1 further includes: establishing a third process rule, which includes: forming a third film structure on a third semiconductor substrate; and performing a third semiconductor process on the third film structure on the third semiconductor substrate under third process conditions, wherein the third semiconductor process is the same as The first semiconductor manufacturing process and the second semiconductor manufacturing process are homogeneous manufacturing processes, wherein: the element film layer structure further has a third region, and the specification of the third region is the same as the specification of the third film layer structure and performing the semiconductor element manufacturing process according to the third process rule, which further includes: performing a third semiconductor element manufacturing process on the third region of the element film layer structure on the element substrate, wherein the The conditions of the third semiconductor element manufacturing process are the same as the third manufacturing process conditions. The manufacturing process of the semiconductor element according to claim 4, wherein the specification of the first film layer structure, the specification of the second film layer structure and the specification of the third film layer structure are different from each other. The semiconductor element manufacturing process as claimed in item 5, wherein: the first film layer structure includes a first film layer; the second film layer structure includes a second film layer; and the third film layer structure includes a third film layer structure film layer; the thickness of the first film layer, the thickness of the second film layer and the thickness of the third film layer are different from each other; and the first semiconductor process, the second semiconductor process, the first Three semiconductor manufacturing processes, the first semiconductor element manufacturing process, the second semiconductor element manufacturing process and The third semiconductor element manufacturing process includes a yellow light lithography process. The semiconductor element manufacturing process as claimed in item 5, wherein: the specification of the first film layer structure, the specification of the second film layer structure and the specification of the third film layer structure respectively correspond to the first The relationship between the process conditions of the semiconductor element, the conditions of the second semiconductor element process and the conditions of the third semiconductor element process is not a linear relationship. A semiconductor element manufacturing system, comprising: a storage unit, adapted to store at least a first process rule and a second process rule, wherein the first process rule includes specifications of a first film structure and corresponding first process conditions, and the The second process rule includes the specification of the second film layer structure and the corresponding second process condition; and a process unit, the signal is connected to the storage unit, and the process unit is suitable for using the first process rule and the According to the second process rule, the semiconductor element manufacturing process is performed on the process substrate, and the process substrate includes an element substrate and an element film layer structure formed on the element substrate, wherein: the element film layer structure has a first area and a second area , the specification of the first zone is the same as the specification of the first film structure, and the specification of the second zone is the same as the specification of the second film structure; The first region of the element film layer structure on the substrate is subjected to a first semiconductor element manufacturing process, wherein the conditions of the first semiconductor element manufacturing process are the same as the first process conditions; and the semiconductor element manufacturing process further includes The element film on the element substrate The second region of the layer structure is subjected to a second semiconductor element manufacturing process, wherein the conditions of the second semiconductor element manufacturing process are the same as the second process conditions, wherein: the first film layer structure is on the first semiconductor substrate formed by performing a first semiconductor process; the second film layer structure is formed by performing a second semiconductor process on a second semiconductor substrate; the first semiconductor substrate and the second semiconductor substrate are different substrates, and the The first semiconductor substrate and the second semiconductor substrate are homogeneous substrates; the first semiconductor manufacturing process, the second semiconductor manufacturing process, the first semiconductor element manufacturing process, and the second semiconductor element manufacturing process are homogeneous manufacturing processes; The specifications of the first film structure are different from the specifications of the second film structure; the first film structure is not formed on the second semiconductor substrate; and the second film structure is not formed on the on the first semiconductor substrate.

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