TWI785651B - Package structure and its manufacturing method, circuit board and its manufacturing method - Google Patents

Abstract

The application proposes a packaging structure, which includes at least one semiconductor, at least one connector and a packaging body. The connector is arranged on the semiconductor, the connector is electrically connected with the semiconductor, the packaging body covers the semiconductor, and part of the connector is exposed on the packaging body. The package structure provided by the application does not need to set micro through holes, which is beneficial to improving the reliability of semiconductor electrical connection. In addition, the application also provides a manufacturing method of a packaging structure, and in addition, the application also provides a circuit board and a manufacturing method thereof.

Description

Package structure and manufacturing method thereof, circuit board and manufacturing method thereof

The present application relates to a packaging structure and a manufacturing method thereof, a circuit board and a manufacturing method thereof.

As a common power semiconductor, Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET) is widely used in circuit boards to realize power conversion and circuit control. In the conventional technology, after the power semiconductor is embedded in the circuit board, the conduction with the circuit layer in the circuit board is usually achieved through micro-vias, but the micro-vias are not only difficult to process, but also have poor reliability.

In order to solve the problems involved in the prior art, the present application provides a package structure with a semiconductor.

In addition, it is also necessary to provide a manufacturing method with the above packaging structure.

In addition, it is also necessary to provide a circuit board with the above packaging structure.

In addition, it is also necessary to provide a method for manufacturing the above-mentioned circuit board.

A manufacturing method of a packaging structure includes the steps of: providing a wafer, and the wafer includes a plurality of semiconductors. A connecting board is arranged on the wafer, and the connecting board includes a plurality of connecting pieces, and each connecting piece is electrically connected to at least one of the semiconductors to obtain a first intermediate body. A packaging body is provided outside the first intermediate body, and the packaging body covers the wafer and the connecting board. removing a portion of the package body corresponding to the connector to obtain a second intermediate body, and dividing the second intermediate body to obtain a plurality of the package structures, wherein each package structure includes at least one of the A semiconductor and at least one connector electrically connected to the semiconductor.

A packaging structure, comprising at least one semiconductor, at least one connector and a package body, the connector is disposed on the semiconductor, the connector is electrically connected to the semiconductor, the package covers the semiconductor, partly The connector is exposed from the package.

Further, the semiconductor is a power semiconductor, and the connector includes a lead frame, a metal clip or a metal sheet.

Further, the semiconductor includes a semiconductor body, a source, a gate and a drain, the source and the gate are arranged on one side of the semiconductor body, and the drain is arranged on the other side of the semiconductor body On one side, the gate is insulated from the drain or the source, and a PN junction is provided between the drain and the source.

Further, the connector includes a connector body, an inner connection pad and an outer connection pad, the connector body is arranged between the inner connection pad and the outer connection pad, and the inner connection pad is electrically connected to the The source, the gate or the drain, and the outer connection pads are exposed in the package.

Further, the package structure further includes a conductor, and the conductor is disposed between the inner connection pad and the source, the gate or the drain.

A method for manufacturing a circuit board, comprising the steps of: providing a first circuit substrate, the first circuit substrate includes a dielectric layer and a copper foil layer disposed on the dielectric layer, and the first circuit substrate is provided with openings.

The above packaging structure is provided, and the packaging structure is disposed in the opening. Electroplating on the copper foil layer to form an electroplating layer, the electroplating layer covering the connector, and etching the electroplating layer and the copper foil layer to form a circuit layer, the circuit layer is electrically connected to the connector . Provide a second circuit substrate and an adhesive layer, arrange the adhesive layer between the circuit layer and the second circuit substrate, press the circuit board, the second circuit substrate and the adhesive layer, to obtain the circuit board.

Further, it also includes the step of: providing a through hole on the circuit board, the through hole passing through the first circuit substrate, the adhesive layer and the second circuit substrate, and providing a conductive connection in the through hole. body, and the conducting body is electrically connected to the circuit layer and the second circuit substrate.

A circuit board, comprising a first circuit substrate, a second circuit substrate, an adhesive layer and the packaging structure as described above, the first circuit substrate comprises a dielectric layer and a circuit layer arranged on the dielectric layer, the second A circuit substrate is provided with an opening, the packaging structure is provided in the opening, the packaging structure is provided in the opening, the connector is electrically connected to the circuit layer, and the adhesive layer is provided in the Between the second circuit substrate and the circuit layer.

Further, the thickness of the first circuit substrate is the same as that of the packaging structure.

The packaging structure provided by this application connects the semiconductor and the connectors together through the package body, the connectors are electrically connected to the semiconductor, and the connectors partially exposed from the package body can be used to connect the circuit layer in the circuit board, so that there is no need to set up micro-connections The hole is beneficial to improve the reliability of the electrical connection between the semiconductor and the circuit layer.

100: Package structure

10: Semiconductor

11: Semiconductor body

12: source

13:Gate

14: Drain

21: The first connector

211: The first connection body

212: First inner connection pad

213: first outer connection pad

22: Second connector

221: The second connection body

222: second inner connection pad

223: second outer connection pad

231: The first conductor

232: Second conductor

30: Encapsulation

41: The first copper foil layer

42: Second copper foil layer

43: The first medium layer

44: opening

51: The first electroplating layer

52: Second electroplating layer

61: The first line layer

62: Second line layer

200: circuit board

203: Conductor

300: the first circuit substrate

301: The third intermediate

302: through hole

400: the second circuit substrate

401: Second dielectric layer

402: Third line layer

D1, D2: Thickness

FIG. 1 is a schematic diagram of a semiconductor provided by an embodiment of the present application.

FIG. 2 is a schematic diagram of the semiconductor shown in FIG. 1 after the first connecting member and the second connecting member are provided.

FIG. 3 is a schematic diagram of a packaging structure used in an embodiment of the present application.

FIG. 4 is a schematic diagram of a first circuit substrate provided by an embodiment of the present application.

FIG. 5 is a schematic diagram of the first circuit substrate shown in FIG. 4 after being provided with a packaging structure.

FIG. 6 is a schematic diagram of the first electroplating layer and the second electroplating layer formed by electroplating the first circuit substrate shown in FIG. 5 .

FIG. 7 is a schematic diagram of the first circuit substrate, the adhesive layer, and the second circuit substrate shown in FIG. 6 before lamination.

FIG. 8 is a schematic diagram of the first circuit substrate, the adhesive layer, and the second circuit substrate shown in FIG. 6 after lamination.

FIG. 9 is a schematic diagram of a circuit board provided by an embodiment of the present application.

The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them.

It should be noted that when an element is referred to as being “fixed” to another element, it can be directly on the other element or there can also be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or intervening elements may also be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present.

Referring to FIG. 1 to FIG. 9, an embodiment of the present application provides a method for manufacturing a circuit board 200, including steps:

S1: Referring to FIG. 3 , a package structure 100 is provided, the package structure 100 includes at least one semiconductor 10 , at least one first connector 21 , at least one second connector 22 and a package 30 . The first connector 21 and the second connector 22 are disposed on opposite sides of the semiconductor 10 . The first connecting member 21 and the second connecting member 22 are electrically connected to the semiconductor 10 . The package 30 covers the semiconductor 10 , and part of the first connector 21 and the second connector 22 are exposed in the package 30 .

In this embodiment, the first connector 21 includes a first connection body 211, a first inner connection pad 212 and a first outer connection pad 213, and the first inner connection pad 212 and the first outer connection pad 213 are respectively disposed on opposite sides of the first connecting body 211 . The second connector 22 includes a second connection body 221, a second inner connection pad 222 and a second outer connection pad 223, and the second inner connection pad 222 and the second outer connection pad 223 are respectively arranged on the Two opposite sides of the second body 221 are connected. The semiconductor 10 includes a semiconductor body 11, a source 12, a gate 13 and a drain 14, the source 12 and the gate 13 are arranged on one side of the semiconductor body 11, and the drain 14 is arranged on The other side of the semiconductor body 11 . The gate 13 is insulated from the drain 14 or the source 12 , and there are two PN junctions between the drain 14 and the source 12 . The first inner connection pad 212 is electrically connected to Connected to the source 12 and the gate 13 , the second inner connection pad 222 is electrically connected to the drain 14 . The first outer connection pad 213 and the second outer connection pad 223 are exposed from the package body 30 .

In this embodiment, please refer to FIG. 1 to FIG. 3 , in step S1, the manufacturing method of the packaging structure 100 includes:

S10: Provide a wafer (not shown in the figure), the wafer includes a plurality of semiconductors 10 (see FIG. 1 ) arranged in a matrix, and the semiconductors 10 are power semiconductors.

S11: setting a first connecting plate (not shown) on one side of the wafer and setting a second connecting plate (not shown) on the other side of the wafer, the first connecting plate includes a plurality of The first connector 21, the second connector board includes a plurality of second connectors 22, please refer to FIG. 2, each of the semiconductors 10 corresponds to one first connector 21 and one second connector 22. Two connectors 22 to obtain a first intermediate body (not shown). Wherein, the first inner connection pad 212 is electrically connected to the source 12 and the gate 13 , and the second inner connection pad 222 is electrically connected to the drain 14 . The first connecting member 21 or the second connecting member 22 includes a lead frame, a metal clip or a metal sheet and the like.

In this embodiment, please refer to FIG. 2 , step S11 includes: disposing a first conductor 231 between the first inner connection pad 212 and the source 12 or the gate 13 , and A second conductor 232 is disposed between the second inner connection pad 222 and the drain 14 , and the first conductor 231 is used for connecting and electrically conducting the first inner connection pad 212 and the source 12 . Or the gate 13 , the second conductor 232 is used to connect and conduct electrically the second inner connection pad 222 and the drain 14 . Materials of the first conductor 231 and the second conductor 232 include conductive glue, solder and the like.

S12: Disposing the packaging body 30 outside the first intermediate body, the packaging body 30 covering the wafer and the connecting board.

S13: Referring to FIG. 3 , remove the part of the package body 30 corresponding to the first outer connection pad 213 and the second outer connection pad 223 so that the first outer connection pad 213 and the second outer connection pad The outer connection pads 223 are exposed outside the package body 30 to obtain a second intermediate body (not shown).

S14: Divide the second intermediate body to obtain a plurality of packaging structures 100 .

S2: Please refer to FIG. 4 , providing a first circuit substrate 300, the first circuit substrate 300 includes a first copper foil layer 41, a second copper foil layer 42 and is arranged on the first copper foil layer 41 and the second copper The first dielectric layer 43 between the foil layers 42, the first circuit substrate 300 has an opening 44, and the opening 44 runs through the first copper foil layer 41, the first dielectric layer 43 and the The second copper foil layer 42 .

S3: Please refer to FIG. 5, dispose the package structure 100 in the opening 44, the thickness D1 of the first circuit substrate 300 is approximately the same as the thickness D2 of the package structure 100 (see FIG. 3 ), so that The outer surface of the first outer connection pad 213 is substantially flush with the outer surface of the first copper foil layer 41 , and the outer surface of the second outer connection pad 223 is substantially flush with the outer surface of the second copper foil layer 42 . Outer sides are flush.

S4: Please refer to FIG. 6, forming a first electroplating layer 51 on the first copper foil layer 41 by electroplating, and the first electroplating layer 51 covers the first outer connection pad 213; and on the second copper foil A second electroplating layer 52 is formed by electroplating on the layer 42 , and the second electroplating layer 52 covers the second outer connection pad 223 .

S5: Please refer to FIG. 7, etch the first copper foil layer 41 and the first electroplating layer 51 to form a first wiring layer 61, etch the second copper foil layer 42 and the second electroplating layer 52 to form The second circuit layer 62 is formed to obtain a third intermediate body 301 . Wherein, the first circuit layer 61 is electrically connected to the first outer connection pad 213 , and the second circuit layer 62 is electrically connected to the second outer connection pad 223 .

S6: providing a second circuit substrate 400 and an adhesive layer 70, arranging the adhesive layer 70 between the third intermediate body 301 and the second circuit substrate 400, and pressing the third intermediate body 301 , the adhesive layer 70 and the second circuit substrate 400 to obtain the circuit board 200 .

In this embodiment, the second circuit substrate 400 includes a plurality of second dielectric layers 401 and a plurality of third circuit layers 402, and the third circuit layers 402 and the second dielectric layers 401 are stacked alternately, so The adhesive layer 70 is disposed between the outermost third wiring layer 402 and the first wiring layer 61 . After step S6, it also includes: setting a through hole 302 in the circuit board 200, the through hole 302 passing through the second circuit substrate 400, the adhesive layer 70 and the third intermediate body 301, and A conductive body 203 is disposed in the through hole 302 , and the conductive body 203 is electrically connected to the first circuit layer 61 , the second circuit layer 62 and the plurality of third circuit layers 402 .

Compared with the prior art, the manufacturing method of the circuit board 200 provided by the present application has the following advantages:

(1) By first preparing the package structure 100, the package structure 100 includes the semiconductor 10, the connector (the first connector 21, the second connector 22) and the package covering the semiconductor 10 and the connector 30, and then embed the packaging structure 100 in the circuit board 200, the packaging structure 100 is electrically connected to the circuit layer (the first circuit layer 61, the second circuit layer 62), so that there is no need to set micro via holes, which can improve the reliability of the semiconductor 10 connecting the circuit layer, and the method has simple steps.

(2) The packaging structure 100 is electrically connected to the circuit layer through the first outer connection pad 213 or the second outer connection pad 223, and the areas of the first outer connection pad 213 and the second outer connection pad 223 are significantly different from the micro via holes. Therefore, the heat conduction efficiency of the semiconductor 10 through the first outer connection pad 213 or the second outer connection pad 223 can be improved to the circuit board or even the outside world.

(3) By preparing the package structure 100 first and then testing the package structure 100 , the yield rate of the final circuit board 200 can be effectively improved.

(4) By first preparing the packaging structure 100, then embedding the packaging structure 100 in the circuit board 200, and finally adding layers to the circuit board 200 by pressing, the semiconductor 10 can be reduced in the pressing process. risk of damage.

Please refer to FIG. 9, the present application also provides a circuit board 200, the circuit board 200 includes a first circuit substrate 300, a second circuit substrate 400, an adhesive layer 70 and the packaging structure 100, the first circuit substrate 300 includes a first dielectric layer 43 and a first circuit layer 61 disposed on the first dielectric layer 43, the first circuit substrate 300 is provided with an opening 44, and the packaging structure 100 is disposed in the opening 44 Inside, the first connector 21 is electrically connected to the first circuit layer 61 , and the adhesive layer 70 is disposed between the second circuit substrate 400 and the first circuit layer 60 .

The above description is only an optimized specific implementation manner of the present application, but it should not be limited to this implementation manner only in the actual application process. For those of ordinary skill in the art, other deformations and changes made according to the technical concept of the present application should fall within the scope of protection of the present application.

100: Package structure

12: source

11: Semiconductor body

14: Drain

223: second outer connection pad

221: The second connection body

222: Second inner connection pad

22: Second connector

30: Encapsulation

13:Gate

213: first outer connection pad

211: The first connection body

212: First inner connection pad

21: The first connector

231: The first conductor

232: Second conductor

D2: Thickness

Claims (6)

A packaging structure, including at least one semiconductor, at least one connector and a package body, the connector is disposed on the semiconductor, the connector is electrically connected to the semiconductor, the package covers the semiconductor , part of the connector is exposed in the package; the semiconductor includes a semiconductor body, a source, a gate, and a drain, the source and the gate are arranged on one side of the semiconductor body, the The drain is disposed on the other side of the semiconductor body, the gate is insulated from the drain or the source, and a PN junction is provided between the drain and the source; the connecting member includes A connector body, an inner connection pad and an outer connection pad, the connector body is disposed between the inner connection pad and the outer connection pad, the inner connection pad is electrically connected to the source and the gate or the drain, the outer connection pad is exposed in the package; the package structure further includes a conductor, the conductor is arranged on the inner connection pad and the source, the gate or the between the drain electrodes. The package structure according to claim 1, wherein the semiconductor is a power semiconductor, and the connecting member includes a lead frame, a metal clip or a metal sheet. A method for manufacturing a circuit board, including the steps of: providing a first circuit substrate, the first circuit substrate includes a dielectric layer and a copper foil layer disposed on the dielectric layer, and the first circuit substrate is provided with openings ; Provide the packaging structure as described in any one of claims 1 to 2, the packaging structure is arranged in the opening; electroplating on the copper foil layer to form an electroplating layer, the electroplating layer covers the A connector; etching the electroplating layer and the copper foil layer to form a circuit layer, the circuit layer is electrically connected to the connector; providing a second circuit substrate and an adhesive layer, and the adhesive layer is arranged on The circuit board, the second circuit substrate and the adhesive layer are pressed together between the circuit layer and the second circuit substrate to obtain the circuit board. The manufacturing method according to claim 3, further comprising the step of: providing a through hole on the circuit board, the through hole passing through the first circuit substrate, the adhesive layer and the second circuit substrate; as well as, A conducting body is disposed in the through hole, and the conducting body is electrically connected to the circuit layer and the second circuit substrate. A circuit board, including a first circuit substrate, a second circuit substrate, an adhesive layer, and the packaging structure according to any one of claims 1 to 2, the first circuit substrate includes a dielectric layer and is arranged on the The circuit layer on the dielectric layer, the first circuit substrate is provided with an opening, the packaging structure is provided in the opening, the connector is electrically connected to the circuit layer, and the adhesive layer is provided in the Between the second circuit substrate and the circuit layer. The circuit board according to claim 5, wherein the thickness of the first circuit substrate is the same as that of the package structure.

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