TWI785174B - 用於深度學習人工類神經網路中的類比非揮發性記憶體的可程式化神經元 - Google Patents
用於深度學習人工類神經網路中的類比非揮發性記憶體的可程式化神經元 Download PDFInfo
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- TWI785174B TWI785174B TW107146980A TW107146980A TWI785174B TW I785174 B TWI785174 B TW I785174B TW 107146980 A TW107146980 A TW 107146980A TW 107146980 A TW107146980 A TW 107146980A TW I785174 B TWI785174 B TW I785174B
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- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
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- G—PHYSICS
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- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
- G06N3/065—Analogue means
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
- G06F17/10—Complex mathematical operations
- G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
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- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/045—Combinations of networks
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- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/0464—Convolutional networks [CNN, ConvNet]
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- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/04—Architecture, e.g. interconnection topology
- G06N3/048—Activation functions
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- G06—COMPUTING OR CALCULATING; COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
- G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
- G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
- G06G7/14—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for addition or subtraction
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- G—PHYSICS
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- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
- G06G7/18—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals
- G06G7/184—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals using capacitive elements
- G06G7/186—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for integration or differentiation; for forming integrals using capacitive elements using an operational amplifier comprising a capacitor or a resistor in the feedback loop
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06G—ANALOGUE COMPUTERS
- G06G7/00—Devices in which the computing operation is performed by varying electric or magnetic quantities
- G06G7/12—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor
- G06G7/24—Arrangements for performing computing operations, e.g. operational amplifiers specially adapted therefor for evaluating logarithmic or exponential functions, e.g. hyperbolic functions
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45524—Indexing scheme relating to differential amplifiers the FBC comprising one or more active resistors and being coupled between the LC and the IC
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45269—Complementary non-cross coupled types
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Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201862613373P | 2018-01-03 | 2018-01-03 | |
| US62/613,373 | 2018-01-03 | ||
| US15/936,983 US11354562B2 (en) | 2018-01-03 | 2018-03-27 | Programmable neuron for analog non-volatile memory in deep learning artificial neural network |
| US15/936,983 | 2018-03-27 | ||
| PCT/US2018/063147 WO2019135839A1 (en) | 2018-01-03 | 2018-11-29 | Programmable neuron for analog non-volatile memory in deep learning artificial neural network |
| WOPCT/US18/63147 | 2018-11-29 | ||
| ??PCT/US18/63147 | 2018-11-29 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201931214A TW201931214A (zh) | 2019-08-01 |
| TWI785174B true TWI785174B (zh) | 2022-12-01 |
Family
ID=67058374
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107146980A TWI785174B (zh) | 2018-01-03 | 2018-12-25 | 用於深度學習人工類神經網路中的類比非揮發性記憶體的可程式化神經元 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US11354562B2 (https=) |
| EP (1) | EP3735656B1 (https=) |
| JP (1) | JP7244525B2 (https=) |
| KR (1) | KR102616978B1 (https=) |
| CN (1) | CN111542840B (https=) |
| TW (1) | TWI785174B (https=) |
| WO (1) | WO2019135839A1 (https=) |
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| US10956814B2 (en) * | 2018-08-27 | 2021-03-23 | Silicon Storage Technology, Inc. | Configurable analog neural memory system for deep learning neural network |
| US10489483B1 (en) * | 2018-09-21 | 2019-11-26 | National Technology & Engineering Solutions Of Sandia, Llc | Circuit arrangement and technique for setting matrix values in three-terminal memory cells |
| US10877752B2 (en) * | 2018-09-28 | 2020-12-29 | Intel Corporation | Techniques for current-sensing circuit design for compute-in-memory |
| US11500442B2 (en) | 2019-01-18 | 2022-11-15 | Silicon Storage Technology, Inc. | System for converting neuron current into neuron current-based time pulses in an analog neural memory in a deep learning artificial neural network |
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| US11449741B2 (en) * | 2019-07-19 | 2022-09-20 | Silicon Storage Technology, Inc. | Testing circuitry and methods for analog neural memory in artificial neural network |
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2018
- 2018-03-27 US US15/936,983 patent/US11354562B2/en active Active
- 2018-11-29 JP JP2020537005A patent/JP7244525B2/ja active Active
- 2018-11-29 CN CN201880085396.0A patent/CN111542840B/zh active Active
- 2018-11-29 WO PCT/US2018/063147 patent/WO2019135839A1/en not_active Ceased
- 2018-11-29 KR KR1020207019410A patent/KR102616978B1/ko active Active
- 2018-11-29 EP EP18898774.7A patent/EP3735656B1/en active Active
- 2018-12-25 TW TW107146980A patent/TWI785174B/zh active
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| Title |
|---|
| 專書 Xinjie Guo Mixed Signal Neurocomputing Based on Floating-gate Memories dissertation UCSB March, 2017 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111542840B (zh) | 2023-08-18 |
| JP7244525B2 (ja) | 2023-03-22 |
| KR102616978B1 (ko) | 2023-12-21 |
| EP3735656A1 (en) | 2020-11-11 |
| US20190205729A1 (en) | 2019-07-04 |
| KR20200096808A (ko) | 2020-08-13 |
| CN111542840A (zh) | 2020-08-14 |
| EP3735656A4 (en) | 2021-10-13 |
| WO2019135839A8 (en) | 2020-07-09 |
| US11354562B2 (en) | 2022-06-07 |
| TW201931214A (zh) | 2019-08-01 |
| WO2019135839A1 (en) | 2019-07-11 |
| EP3735656B1 (en) | 2023-12-27 |
| JP2021509514A (ja) | 2021-03-25 |
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