TWI783404B - Stack structure and touch sensor - Google Patents

Stack structure and touch sensor Download PDF

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TWI783404B
TWI783404B TW110108697A TW110108697A TWI783404B TW I783404 B TWI783404 B TW I783404B TW 110108697 A TW110108697 A TW 110108697A TW 110108697 A TW110108697 A TW 110108697A TW I783404 B TWI783404 B TW I783404B
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silver
nano
layer
stacked structure
touch sensor
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TW110108697A
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TW202236065A (en
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蕭仲欽
練修成
邱逸文
蕭啟帆
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大陸商天材創新材料科技(廈門)有限公司
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一種疊構結構,包含:一基材;一奈米銀線層,其係設置於該基材之上;以及一金屬層,其係設置於該奈米銀線層之上,其中,該奈米銀線層係包含:複數個奈米銀線;以及銦錫氧化物,其係覆蓋該複數個奈米銀線,其中,該奈米銀線層之區間厚度:銦錫氧化物之厚度的比例係介於2.35~24之間。一種包含上述疊構結構的觸控感應器。 A stacked structure, comprising: a substrate; a silver nano wire layer, which is arranged on the substrate; and a metal layer, which is arranged on the silver nano wire layer, wherein the nano silver wire layer The nano-silver wire layer system includes: a plurality of nano-silver wires; and indium tin oxide, which covers the plurality of nano-silver wires, wherein, the thickness of the interval of the nano-silver wire layer: the thickness of indium tin oxide The ratio is between 2.35 and 24. A touch sensor comprising the above stacked structure.

Description

疊構結構及觸控感應器 Stack structure and touch sensor

本發明係關於一種疊構結構,尤指一種包含奈米銀線層的疊構結構。本發明亦關於一種觸控感應器,尤指一種包含上述疊構結構的觸控感應器。 The present invention relates to a laminated structure, especially a laminated structure comprising a nano-silver wire layer. The present invention also relates to a touch sensor, in particular to a touch sensor comprising the above-mentioned stacked structure.

包含奈米銀線及金屬層的疊構結構可應用於觸控感測器中。傳統上的疊構結構中,奈米銀線的表面會有保護層覆蓋著,其材質為不具導電性之樹酯,主要提供防刮傷、防止奈米銀線剝落及提高奈米銀線與基材之附著性等功能,且此保護層會永久留在奈米銀線表面與基板上,故為了滿足觸控感測器在可視區中光學特性之需求,保護層須具備高穿透、低霧度、低b*之光學特性。 The stacked structure including silver nanowires and metal layers can be applied to touch sensors. In the traditional stacked structure, the surface of the nano-silver wire is covered with a protective layer, which is made of non-conductive resin, which mainly provides anti-scratch, prevents the nano-silver wire from peeling off and improves the contact between the nano-silver wire and Substrate adhesion and other functions, and this protective layer will remain permanently on the surface of the silver nanowires and the substrate, so in order to meet the requirements of the optical characteristics of the touch sensor in the visible area, the protective layer must have high penetration, Optical properties of low haze and low b*.

一般保護層因永久留在奈米銀線表面上,其保護層厚度對於蝕刻製程中的奈米銀線蝕刻效率扮演重要的關鍵因素,且對於蝕刻液的選擇性要求較高,不具導電性的保護層材質易使得接觸阻抗提高,以及對於靜電放電(Electrostatic discharge,ESD)抑制能力不佳。 Generally, the protective layer remains permanently on the surface of silver nanowires. The thickness of the protective layer plays an important key factor for the etching efficiency of silver nanowires in the etching process, and the selectivity of the etching solution is high, and non-conductive The material of the protective layer tends to increase the contact resistance and has a poor ability to suppress electrostatic discharge (ESD).

為改善先前技術之疊構結構中,使用不具導電性之樹酯所造成之接觸阻抗提高,以及對於ESD抑制能力不佳的問題,本發明係提供新穎之疊構結構及觸控感應器。 In order to improve the problem of increased contact resistance and poor ESD suppression ability caused by the use of non-conductive resin in the stacked structure of the prior art, the present invention provides a novel stacked structure and touch sensor.

為達上述目的及其他目的,本發明係提供一種疊構結構,包含:一基材;一奈米銀線層,其係設置於該基材之上;以及一金屬層,其係設置於該奈米銀線層之上,其中,該奈米銀線層係包含:複數個奈米銀線;以及銦錫氧化物,其係覆蓋該複數個奈米銀線,其中,該奈米銀線層之區間厚度:銦錫氧化物之厚度的比例係介於2.35~24之間。 In order to achieve the above and other purposes, the present invention provides a laminated structure, comprising: a substrate; a silver nanowire layer disposed on the substrate; and a metal layer disposed on the substrate On the silver nanowire layer, wherein the silver nanowire layer includes: a plurality of silver nanowires; and indium tin oxide, which covers the silver nanowires, wherein the silver nanowire Interval thickness of the layer: the ratio of the thickness of the indium tin oxide is between 2.35~24.

上述之疊構結構,其中,該奈米銀線層之區間厚度可介於40~120nm之間。 In the above stacked structure, the thickness of the silver nano wire layer can be between 40nm and 120nm.

上述之疊構結構,其中,該奈米銀線層中所包含銦錫氧化物之厚度可介於5~17nm之間。 In the aforementioned stacked structure, the thickness of the indium tin oxide contained in the silver nano wire layer can be between 5nm and 17nm.

上述之疊構結構,其中,該奈米銀線層之表面電阻可為5~100ops。 In the above stacked structure, the surface resistance of the silver nano wire layer can be 5-100 ops.

上述之疊構結構,其中,可進一步包含:一第二奈米銀線層,其係設置於該基材之下;以及一第二金屬層,其係設置於該第二奈米銀線層之下,其中,該第二奈米銀線層係包含:複數個奈米銀線;以及銦錫氧化物,其係覆蓋該複數個奈米銀線,其中,該第二奈米銀線層之區間厚度:銦錫氧化物之厚度的比例係介於2.35~24之間。 The above stacked structure may further include: a second silver nanowire layer disposed under the base material; and a second metal layer disposed on the second silver nanowire layer Below, wherein, the second nano silver wire layer system includes: a plurality of nano silver wires; and indium tin oxide, which covers the plurality of nano silver wires, wherein the second nano silver wire layer Interval thickness: The ratio of the thickness of indium tin oxide is between 2.35 and 24.

為達上述目的及其他目的,本發明亦提供一種觸控感測器,包含:上述之疊構結構。 To achieve the above and other purposes, the present invention also provides a touch sensor, comprising: the above-mentioned stacked structure.

上述之觸控感測器,其中,該觸控感測器中所包含之疊構結構中的該奈米銀線層及該金屬層可被圖案化。 In the touch sensor mentioned above, the silver nanowire layer and the metal layer in the stacked structure included in the touch sensor can be patterned.

上述之觸控感測器,其中,該觸控感測器可包含2層上述之疊構結構,且其中該奈米銀線層及該金屬層可被圖案化。 The above-mentioned touch sensor, wherein the touch sensor can comprise two layers of the above-mentioned stacked structure, and wherein the silver nanowire layer and the metal layer can be patterned.

上述之觸控感測器,其中,該觸控感測器中所包含之疊構結構中的該奈米銀線層、該第二奈米銀線層、該金屬層及該第二金屬層可被圖案化。 The touch sensor mentioned above, wherein, the silver nanowire layer, the second silver nanowire layer, the metal layer and the second metal layer in the stacked structure included in the touch sensor Can be patterned.

本發明之疊構結構及觸控感應器,可在不影響光學情況下能降低接觸阻抗、抑制ESD影響及提升可靠度分析(Reliability Analysis,RA)下的耐受性。 The stacked structure and the touch sensor of the present invention can reduce the contact impedance, suppress the impact of ESD and improve the tolerance under reliability analysis (Reliability Analysis, RA) without affecting the optics.

10:疊構結構 10:Stack structure

10’:疊構結構 10': stacked structure

11:基材 11: Substrate

11’:基材 11': Substrate

12:奈米銀線層 12: Nano silver wire layer

12’:奈米銀線層 12': nano silver wire layer

13:金屬層 13: metal layer

13’:金屬層 13': metal layer

20:疊構結構 20: Stacked structure

22:第二奈米銀線層 22: The second nano silver wire layer

23:第二金屬層 23: Second metal layer

30:觸控感測器 30:Touch sensor

31:光阻 31: photoresist

32:操作區域 32: Operating area

33:走線區域 33: Routing area

34:第二光阻 34: Second photoresist

40:觸控感測器 40:Touch sensor

41:光阻 41: photoresist

42:操作區域 42: Operating area

43:走線區域 43: Routing area

44:第二光阻 44: Second photoresist

45:第三光阻 45: The third photoresist

46:操作區域 46: Operating area

47:走線區域 47: Routing area

48:第四光阻 48: The fourth photoresist

49:第一覆蓋層 49: First Overlay

49’:第二覆蓋層 49': Second overlay

50:觸控感測器 50:Touch sensor

51:光阻 51: photoresist

52:操作區域 52: Operating area

53:走線區域 53: Routing area

54:第二光阻 54: Second photoresist

Rx:感應電極 Rx: sensing electrode

Tx:驅動電極 Tx: drive electrode

〔圖1〕係為本發明實施例1之疊構結構的示意圖。 [FIG. 1] is a schematic diagram of the stacked structure of Embodiment 1 of the present invention.

〔圖2〕係為本發明實施例2之疊構結構的示意圖。 [Fig. 2] is a schematic diagram of the stacked structure of Embodiment 2 of the present invention.

〔圖3〕係為本發明實施例3之觸控感測器及其製備流程的示意圖。 [ FIG. 3 ] is a schematic diagram of a touch sensor and its manufacturing process according to Embodiment 3 of the present invention.

〔圖4〕係為本發明實施例4之觸控感測器及其製備流程的示意圖。 [ FIG. 4 ] is a schematic diagram of a touch sensor and its manufacturing process according to Embodiment 4 of the present invention.

〔圖5〕係為本發明實施例5之觸控感測器及其製備流程的示意圖。 [FIG. 5] is a schematic diagram of a touch sensor and its manufacturing process according to Embodiment 5 of the present invention.

以下係藉由特定的具體實施例說明本發明之實施方式,熟習此技藝之人士可由本說明書所揭示之內容瞭解本發明之其他優點與功效。本發明也可藉由 其他不同的具體實施例加以實施或應用,本說明書中的各項細節亦可基於不同觀點與應用,在不悖離本發明之精神下進行各種修飾與變更。 The implementation of the present invention is described below through specific examples, and those skilled in the art can understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be achieved by Other different specific embodiments are implemented or applied, and various modifications and changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

除非文中另有說明,否則說明書及所附申請專利範圍中所使用之單數形式「一」及「該」包括複數含義。 As used in the specification and the appended claims, the singular forms "a" and "the" include plural references unless otherwise stated in the context.

除非文中另有說明,否則說明書及所附申請專利範圍中所使用之術語「或」包括「及/或」之含義。 Unless otherwise stated in the text, the term "or" used in the specification and the appended claims includes the meaning of "and/or".

實施例1 Example 1

圖1係為本發明實施例1之疊構結構10的示意圖。如圖1所示,實施例1之疊構結構10包含:一基材11;一奈米銀線層12,其係設置於該基材11之上;以及一金屬層13,其係設置於該奈米銀線層12之上,其中,該奈米銀線層12係包含:複數個奈米銀線部分;以及銦錫氧化物,其係覆蓋該複數個奈米銀線。 FIG. 1 is a schematic diagram of a stacked structure 10 according to Embodiment 1 of the present invention. As shown in Figure 1, the laminated structure 10 of embodiment 1 comprises: a base material 11; A nano silver wire layer 12, it is arranged on this base material 11; And a metal layer 13, it is arranged on On the nano-silver wire layer 12, wherein the nano-silver wire layer 12 includes: a plurality of nano-silver wire parts; and indium tin oxide, which covers the plurality of nano-silver wires.

實施例1之疊構結構中,奈米銀線層之區間厚度:銦錫氧化物之厚度的比例係為8(40nm:5nm),但本發明並不限於此,該比例只要介於2.35~24之間即可。本文中,奈米銀線層之區間厚度係指奈米銀線層的總體厚度,其係包含複數個奈米銀線部分及銦錫氧化物。 In the stacked structure of Example 1, the ratio of the interval thickness of the silver nanowire layer: the thickness of indium tin oxide is 8 (40nm: 5nm), but the present invention is not limited thereto, as long as the ratio is between 2.35~ Between 24. Herein, the section thickness of the silver nanowire layer refers to the overall thickness of the silver nanowire layer, which includes a plurality of silver nanowire parts and ITO.

實施例1之疊構結構中,基材之材料係選用PET,但本發明並不限於此,其他合適之材料包含但不限於:COP、CPI及UTG。 In the laminated structure of Example 1, the material of the substrate is PET, but the present invention is not limited thereto. Other suitable materials include but are not limited to: COP, CPI and UTG.

實施例1之疊構結構中,奈米銀線層之區間厚度係為40nm,但本發明並不限於此,較佳地,奈米銀線層之區間厚度係介於40~120nm之間。 In the stacked structure of Example 1, the interval thickness of the silver nanowire layer is 40nm, but the present invention is not limited thereto. Preferably, the interval thickness of the silver nanowire layer is between 40nm and 120nm.

實施例1之疊構結構中,奈米銀線層的表面電阻控制在50ops,但本發明並不限於此,較佳地,奈米銀線層之表面電阻係介於5~100ops之間。 In the stacked structure of Example 1, the surface resistance of the silver nanowire layer is controlled at 50 ops, but the present invention is not limited thereto. Preferably, the surface resistance of the silver nanowire layer is between 5-100 ops.

實施例1之疊構結構中,金屬層之材料係選用銅,但本發明並不限於此,其他合適之材料包含但不限於:鉬及鋁。 In the stacked structure of Embodiment 1, the material of the metal layer is copper, but the present invention is not limited thereto. Other suitable materials include but are not limited to: molybdenum and aluminum.

實施例1之疊構結構可藉由下列流程製備,但本發明並不限於此:(1)取一基材;(2)於該基材上塗佈奈米銀線;(3)將銦錫氧化物濺鍍在經塗佈奈米銀線的基材上,以形成一奈米銀線層;以及(4)於該奈米銀線層上方覆蓋一金屬層。 The stacked structure of Example 1 can be prepared by the following procedures, but the present invention is not limited thereto: (1) take a substrate; (2) coat nano-silver wires on the substrate; (3) apply indium Tin oxide is sputtered on the substrate coated with silver nano wires to form a silver nano wire layer; and (4) covering a metal layer on the silver nano wire layer.

實施例2 Example 2

圖2係為本發明實施例2之疊構結構20的示意圖。如圖2所示,實施例2之疊構結構與實施例1之疊構結構同樣地包含:一基材11;一奈米銀線層12,其係設置於該基材11之上;以及一金屬層13,其係設置於該奈米銀線層12之上,其中,該奈米銀線層12係包含:複數個奈米銀線;以及銦錫氧化物,其係覆蓋該複數個奈米銀線。 FIG. 2 is a schematic diagram of a stacked structure 20 according to Embodiment 2 of the present invention. As shown in Figure 2, the stacked structure of Example 2 includes the same as the stacked structure of Example 1: a substrate 11; a silver nanowire layer 12, which is arranged on the substrate 11; and A metal layer 13, which is disposed on the silver nanowire layer 12, wherein the silver nanowire layer 12 includes: a plurality of silver nanowires; and indium tin oxide, which covers the plurality of silver nanowires nano silver wire.

相較於實施例1,實施例2之疊構結構20進一步包含:一第二奈米銀線層22,其係設置於該基材11之下;以及一第二金屬層23,其係設置於該第二奈米銀線層22之下,其中,該第二奈米銀線層22係包含:複數個奈米銀線;以及銦錫氧化物,其係覆蓋該複數個奈米銀線。 Compared with Embodiment 1, the stacked structure 20 of Embodiment 2 further includes: a second silver nanowire layer 22, which is disposed under the substrate 11; and a second metal layer 23, which is disposed Under the second nano-silver wire layer 22, wherein the second nano-silver wire layer 22 comprises: a plurality of nano-silver wires; and indium tin oxide, which covers the plurality of nano-silver wires .

實施例2之疊構結構20中,第二奈米銀線層22之區間厚度:銦錫氧化物之厚度的比例、第二奈米銀線層22之區間厚度以及第二金屬層23之材料係與實施例1之奈米銀線層12以及金屬層13相同,於此不再贅述。 In the stacked structure 20 of Embodiment 2, the thickness of the second nano silver wire layer 22: the ratio of the thickness of indium tin oxide, the thickness of the second nano silver wire layer 22 and the material of the second metal layer 23 They are the same as the silver nanowire layer 12 and the metal layer 13 in Embodiment 1, and will not be repeated here.

實施例2之疊構結構20中,第二奈米銀線層22及第二金屬層23可以依照上述實施例1中所示例的方法製備。 In the stacked structure 20 of the second embodiment, the second silver nanowire layer 22 and the second metal layer 23 can be prepared according to the method exemplified in the above-mentioned embodiment 1.

實施例3 Example 3

圖3為本發明實施例3之觸控感測器30及其製備流程的示意圖。如圖3所示,實施例3之觸控感測器30係包含如實施例1所述之疊構結構10,且該疊構結構10係被圖案化,以符合觸控感測器之需求。 FIG. 3 is a schematic diagram of a touch sensor 30 and its manufacturing process according to Embodiment 3 of the present invention. As shown in FIG. 3 , the touch sensor 30 of Embodiment 3 includes the stacked structure 10 described in Embodiment 1, and the stacked structure 10 is patterned to meet the requirements of the touch sensor. .

如圖3所示,實施例3之觸控感測器30之製備流程包含:1.取實施例1之疊構結構10;2.塗佈光阻31與光蝕刻,其中係藉由所塗佈之光阻31的圖案於該疊構結構10中定義位於中心之操作區域32以及位於二側之走線區域33;3.蝕刻金屬層13;4.去除光阻31;5.蝕刻奈米銀線層12;6.塗佈第二光阻34;7.第二次光蝕刻;8.第二次蝕刻金屬層13;以及9.去除第二光阻34,以完成實施例3之觸控感測器30。 As shown in FIG. 3 , the manufacturing process of the touch sensor 30 of Embodiment 3 includes: 1. Taking the stacked structure 10 of Embodiment 1; 2. Coating photoresist 31 and photoetching, wherein by coating The pattern of the photoresist 31 in the stack structure 10 defines the operation area 32 in the center and the wiring area 33 on both sides; 3. Etching the metal layer 13; 4. Removing the photoresist 31; 5. Etching the nanometer 6. Coating the second photoresist 34; 7. The second photoetching; 8. Etching the metal layer 13 for the second time; and 9. Removing the second photoresist 34 to complete the touch of embodiment 3 control sensor 30.

實施例4 Example 4

圖4係為本發明實施例4之觸控感測器40及其製備流程的示意圖。如圖4所示,實施例4之觸控感測器40係包含二層如實施例1所述之疊構結構10、10’,且該等疊構結構10、10’係被圖案化,以符合觸控感測器之需求。 FIG. 4 is a schematic diagram of a touch sensor 40 and its manufacturing process according to Embodiment 4 of the present invention. As shown in FIG. 4 , the touch sensor 40 of Embodiment 4 includes two layers of stacked structures 10 , 10 ′ as described in Embodiment 1, and these stacked structures 10 , 10 ′ are patterned, To meet the needs of touch sensors.

如圖4所示,實施例4之觸控感測器40之製備流程包含: 1-1 取實施例1之疊構結構10;1-2.塗佈光阻41與光蝕刻,其中係藉由所塗佈之光阻41的圖案於該疊構結構10中定義位於中心之操作區域42以及位於二側之走線區域43;1-3.蝕刻金屬層13;1-4.去除光阻41;1-5.蝕刻奈米銀線層12;1-6.塗佈第二光阻44;1-7.第二次光蝕刻;1-8.第二次蝕刻金屬層13;1-9.去除第二光阻44,以完成實施例4之觸控感測器40中的驅動電極Tx;2-1 取另一實施例1之疊構結構10’;2-2.塗佈第三光阻45與光蝕刻,其中係藉由所塗佈之第三光阻45的圖案於該疊構結構10’中定義位於中心之操作區域46以及位於二側之走線區域47;2-3.蝕刻金屬層13’;2-4.去除第三光阻45;2-5.蝕刻奈米銀線層12’;2-6.塗佈第四光阻48;2-7.第二次光蝕刻;2-8.第二次蝕刻金屬層13’;2-9.去除第四光阻48,以完成實施例4之觸控感測器40中的感應電極Rx; 3.分別於步驟1-9所製得之驅動電極Tx及步驟2-9所製得之感應電極Rx上設置第一覆蓋層49及第二覆蓋層49’,以及疊合經設置第一覆蓋層49及第二覆蓋層49’的驅動電極Tx及感應電極Rx,以完成實施例4之觸控感測器40。 As shown in FIG. 4 , the manufacturing process of the touch sensor 40 in Embodiment 4 includes: 1-1 Take the stacked structure 10 of Embodiment 1; 1-2. Coating photoresist 41 and photoetching, wherein the pattern of the coated photoresist 41 defines the center of the stacked structure 10 The operation area 42 and the wiring area 43 on both sides; 1-3. Etching the metal layer 13; 1-4. Removing the photoresist 41; 1-5. Etching the nano silver wire layer 12; 1-6. Two photoresist 44; 1-7. The second photoetching; 1-8. The second etching of the metal layer 13; 1-9. Removal of the second photoresist 44 to complete the touch sensor 40 of the fourth embodiment The drive electrode Tx in ; 2-1 Take the stacked structure 10' of another embodiment 1; 2-2. Coating the third photoresist 45 and photoetching, wherein the third photoresist 45 coated 2-3. Etching the metal layer 13'; 2-4. Removing the third photoresist 45; 2- 5. Etching the silver nanowire layer 12'; 2-6. Coating the fourth photoresist 48; 2-7. The second photoetching; 2-8. Etching the metal layer 13' for the second time; 2-9. Removing the fourth photoresist 48 to complete the sensing electrode Rx in the touch sensor 40 of the fourth embodiment; 3. Set the first covering layer 49 and the second covering layer 49' on the driving electrodes Tx prepared in steps 1-9 and the sensing electrodes Rx prepared in steps 2-9 respectively, and stack the first covering layer The driving electrodes Tx and sensing electrodes Rx of the layer 49 and the second cover layer 49 ′ are used to complete the touch sensor 40 of the fourth embodiment.

實施例5 Example 5

圖5係為本發明實施例5之觸控感測器50及其製備流程的示意圖。如圖5所示,實施例5之觸控感測器50係包含如實施例2所述之疊構結構20,且該疊構結構20係被圖案化,以符合觸控感測器之需求。 FIG. 5 is a schematic diagram of a touch sensor 50 and its manufacturing process according to Embodiment 5 of the present invention. As shown in FIG. 5 , the touch sensor 50 of Embodiment 5 includes the stacked structure 20 described in Embodiment 2, and the stacked structure 20 is patterned to meet the requirements of the touch sensor. .

如圖5所示,實施例5之觸控感測器50之製備流程包含:1.取實施例2之疊構結構20;2.雙面塗佈光阻51與光蝕刻,其中係藉由所塗佈之光阻51的圖案於該疊構結構20中定義位於中心之操作區域52以及位於二側之走線區域53;3.蝕刻金屬層13及第二金屬層23;4.去除光阻51;5.蝕刻奈米銀線層12及第二奈米銀線層22;6.雙面塗佈第二光阻54;7.第二次光蝕刻;8.第二次蝕刻金屬層13及第二金屬層23;以及9.去除第二光阻54,以完成實施例5之觸控感測器50。 As shown in FIG. 5 , the manufacturing process of the touch sensor 50 in Embodiment 5 includes: 1. Taking the stacked structure 20 in Embodiment 2; 2. Double-sided coating of photoresist 51 and photoetching, wherein by The pattern of the coated photoresist 51 defines the operation area 52 in the center and the wiring area 53 on both sides in the stacked structure 20; 3. Etching the metal layer 13 and the second metal layer 23; 4. Removing light Resist 51; 5. Etching the silver nanowire layer 12 and the second silver nanowire layer 22; 6. Double-sided coating of the second photoresist 54; 7. Photoetching for the second time; 8. Etching the metal layer for the second time 13 and the second metal layer 23; and 9. Removing the second photoresist 54 to complete the touch sensor 50 of the fifth embodiment.

比較例1 Comparative example 1

為對照本發明之疊構結構中的奈米銀線層中所包含的銦錫氧化物對於該疊構結構的抑制ESD能力的影響,比較例1係依照實施例1所述製備疊構結構, 但將奈米銀線層中所包含的銦錫氧化物替換為傳統之不具導電性之樹脂壓克力樹脂。 In order to compare the influence of the indium tin oxide contained in the silver nanowire layer in the stacked structure of the present invention on the ESD suppression ability of the stacked structure, Comparative Example 1 prepared the stacked structure according to the description in Example 1. However, the indium tin oxide contained in the silver nano wire layer is replaced with a traditional non-conductive resin acrylic resin.

測試例1 test case 1

測試例1係分別取實施例1及比較例1之疊構結構,經去除金屬層後,以利用靜電放電模擬裝置對經去除金屬層之實施例1與比較例1之疊構結構進行靜電轟擊,若疊構結構的抗靜電能力較好,則靜電轟擊造成的損傷較小(阻值變化較小),反之若疊構結構的抗靜電能力較差,則靜電轟擊造成的損傷較大,使疊構結構的阻值上升甚至造成其中所包含之奈米銀線斷裂。 Test Example 1 is to take the stacked structure of Example 1 and Comparative Example 1 respectively. After removing the metal layer, use an electrostatic discharge simulation device to carry out electrostatic bombardment on the stacked structure of Example 1 and Comparative Example 1 after removing the metal layer. , if the antistatic ability of the laminated structure is better, the damage caused by electrostatic bombardment is small (the change in resistance value is small), on the contrary, if the antistatic ability of the laminated structure is poor, the damage caused by electrostatic bombardment is greater, making the laminated structure The resistance value of the structural structure increases and even causes the silver nano wires contained therein to break.

測試例1之測試結果係如下列表1所示(測量單位為ohm):

Figure 110108697-A0305-02-0010-1
The test results of Test Example 1 are shown in Table 1 below (the measurement unit is ohm):
Figure 110108697-A0305-02-0010-1

由表1之測試結果可見,實施例1之疊構結構的抗靜電放電(Electrostatic discharge,ESD)能力明顯優於比較例1,其係由於實施例1之疊構結構的奈米銀線層中使用了銦錫氧化物來取代傳統之不具導電性之樹脂所致。 As can be seen from the test results in Table 1, the anti-static discharge (Electrostatic discharge, ESD) ability of the stacked structure of Example 1 is obviously better than that of Comparative Example 1, which is due to the silver nanowire layer of the stacked structure of Example 1 Indium tin oxide is used to replace the traditional non-conductive resin.

測試例2 test case 2

測試例2係依實施例1所示之方式設置疊構結構,但將奈米銀線層之區間厚度控制在40nm,且將奈米銀線層的表面電阻控制在50ops。測試例2中,各樣本的差異僅在於奈米銀線層之區間厚度:銦錫氧化物之厚度的比例。 In Test Example 2, the stacked structure was set up in the manner shown in Example 1, but the thickness of the silver nanowire layer was controlled at 40nm, and the surface resistance of the silver nanowire layer was controlled at 50ops. In Test Example 2, the difference between the samples is only the ratio of the thickness of the silver nanowire layer: the thickness of the ITO.

Figure 110108697-A0305-02-0011-2
Figure 110108697-A0305-02-0011-2

如表2所示,在奈米銀線層之區間厚度相同的情況下,銦錫氧化物之厚度只要大於5nm即可提供良好的抗靜電放電(Electrostatic discharge,ESD)能力。進一步考量銦錫氧化物之厚度對於該疊構結構之可視性的影響,當銦錫氧化物之厚度介於5nm~17nm之間時,可兼顧良好的抗靜電放電(Electrostatic discharge,ESD)能力以及可視性,若銦錫氧化物之厚度大於17nm,將對於可視性產生不良的影響。 As shown in Table 2, when the thickness of the silver nanowire layer is the same, the thickness of the indium tin oxide can provide good anti-static discharge (ESD) capability as long as it is greater than 5 nm. Further consider the influence of the thickness of indium tin oxide on the visibility of the stacked structure. When the thickness of indium tin oxide is between 5nm and 17nm, good anti-static discharge (Electrostatic discharge, ESD) ability and Visibility, if the thickness of indium tin oxide is greater than 17nm, it will have a bad effect on visibility.

整體而言,本發明之疊構結構中該奈米銀線層之區間厚度係介於40~120nm之間,且銦錫氧化物之厚度係介於5nm~17nm。因此,本發明之疊構結構中該奈米銀線層之區間厚度:銦錫氧化物之厚度的比例係介於40:17~120:5,即2.35~24之間。 Overall, the thickness of the silver nanowire layer in the stacked structure of the present invention is between 40nm and 120nm, and the thickness of indium tin oxide is between 5nm and 17nm. Therefore, in the stacked structure of the present invention, the ratio of the interval thickness of the silver nanowire layer: the thickness of indium tin oxide is between 40:17~120:5, that is, between 2.35~24.

綜合上述,本發明之疊構結構及觸控感應器至少具有下列優異的技術效果: In summary, the laminated structure and touch sensor of the present invention have at least the following excellent technical effects:

1.本發明之疊構結構的奈米銀線層中使用了銦錫氧化物來取代傳統之不具導電性之樹脂,使其蝕刻液選擇性較容易,使其可於金屬的蝕刻製程中,使用可蝕刻金屬層,但不會傷害到奈米銀線及銦錫氧化物之蝕刻液, 並於奈米銀線及銦錫氧化物之蝕刻液的蝕刻製程中,使用可蝕刻奈米銀線及銦錫氧化物之蝕刻液,但不會蝕刻金屬層之蝕刻液。 1. Indium tin oxide is used to replace the traditional non-conductive resin in the silver nanowire layer of the stack structure of the present invention, so that the etchant is more selective and can be used in the metal etching process, Use an etchant that can etch the metal layer, but will not harm the silver nanowires and indium tin oxide, And in the etching process of the etchant of silver nanometer wire and indium tin oxide, an etchant that can etch nanometer silver wire and indium tin oxide, but does not etch the metal layer is used.

2.透過奈米銀線所構成的網路的延展特性並結合銦錫氧化物連續導電的特性,使本發明之疊構結構可在不影響光學情況下能降低接觸阻抗、抑制ESD影響及提升可靠度分析下的耐受性。 2. Through the extension characteristics of the network formed by nano-silver wires and the continuous conduction characteristics of indium tin oxide, the stacked structure of the present invention can reduce contact impedance, suppress ESD effects and improve Tolerance under reliability analysis.

3.因應現今市場主流銦錫氧化物導電薄膜,在不過於影響改變產線製程狀態下,可快速將奈米銀線薄膜技術導入現有的銦錫氧化物光學薄膜製程,結合兩種材料優勢同時能擁有更佳的光學及導電特性。 3. In response to the mainstream indium tin oxide conductive film in the market today, the nano-silver wire film technology can be quickly introduced into the existing indium tin oxide optical film process without too much impact on the change of the production line process, combining the advantages of the two materials at the same time Can have better optical and conductive properties.

上述實施例僅例示性說明本發明,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修飾與改變。因此,本發明之權利保護範圍,應如後述之申請專利範圍所載。 The above-mentioned embodiments are only illustrative of the present invention, not intended to limit the present invention. Anyone skilled in the art can make modifications and changes to the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be set forth in the scope of patent application described later.

10:疊構結構 10:Stack structure

11:基材 11: Substrate

12:奈米銀線層 12: Nano silver wire layer

13:金屬層 13: metal layer

Claims (10)

一種疊構結構,包含:一基材;一奈米銀線層,其係設置於該基材之上;以及一金屬層,其係設置於該奈米銀線層之上,其中,該奈米銀線層係包含:複數個奈米銀線;以及銦錫氧化物,其係覆蓋該複數個奈米銀線,其中,該奈米銀線層之區間厚度:銦錫氧化物之厚度的比例係介於2.35~24之間。 A stacked structure, comprising: a substrate; a silver nano wire layer, which is arranged on the substrate; and a metal layer, which is arranged on the silver nano wire layer, wherein the nano silver wire layer The nano-silver wire layer system includes: a plurality of nano-silver wires; and indium tin oxide, which covers the plurality of nano-silver wires, wherein, the thickness of the interval of the nano-silver wire layer: the thickness of indium tin oxide The ratio is between 2.35 and 24. 如請求項1所述之疊構結構,其中,該奈米銀線層之區間厚度係介於40~120nm之間。 The stacked structure according to claim 1, wherein the thickness of the silver nanowire layer is between 40nm and 120nm. 如請求項1所述之疊構結構,其中,該奈米銀線層中所包含銦錫氧化物之厚度係介於5~17nm之間。 The stacked structure according to claim 1, wherein the thickness of the indium tin oxide included in the silver nano wire layer is between 5nm and 17nm. 如請求項1至3任一項所述之疊構結構,其中,該奈米銀線層之表面電阻為5~100ops。 The stacked structure according to any one of claims 1 to 3, wherein the surface resistance of the silver nanowire layer is 5-100 ops. 如請求項1至3任一項所述之疊構結構,其中,進一步包含:一第二奈米銀線層,其係設置於該基材之下;以及一第二金屬層,其係設置於該第二奈米銀線層之下,其中,該第二奈米銀線層係包含:複數個奈米銀線;以及銦錫氧化物,其係覆蓋該複數個奈米銀線, 其中,該第二奈米銀線層之區間厚度:銦錫氧化物之厚度的比例係介於2.35~24之間。 The stacked structure according to any one of claims 1 to 3, further comprising: a second silver nanowire layer disposed under the base material; and a second metal layer disposed under the base material Under the second nano-silver wire layer, wherein the second nano-silver wire layer includes: a plurality of nano-silver wires; and indium tin oxide, which covers the plurality of nano-silver wires, Wherein, the ratio of the interval thickness of the second nano silver wire layer: the thickness of indium tin oxide is between 2.35-24. 一種觸控感測器,包含:如請求項1至4項中任一項所述之疊構結構。 A touch sensor, comprising: the stacked structure according to any one of claims 1 to 4. 如請求項6所述之觸控感測器,其中,該奈米銀線層及該金屬層係被圖案化。 The touch sensor according to claim 6, wherein the silver nanowire layer and the metal layer are patterned. 如請求項6所述之觸控感測器,其中,該觸控感測器係包含2層如請求項1至4項中任一項所述之疊構結構,且其中該奈米銀線層及該金屬層係被圖案化。 The touch sensor as described in claim 6, wherein the touch sensor comprises 2 layers of the stacked structure as described in any one of claims 1 to 4, and wherein the silver nanowire layer and the metal layer are patterned. 一種觸控感測器,包含:如請求項5所述之疊構結構。 A touch sensor, comprising: the stacked structure described in Claim 5. 如請求項9所述之觸控感測器,其中,該奈米銀線層、該第二奈米銀線層、該金屬層及該第二金屬層係被圖案化。 The touch sensor according to claim 9, wherein the silver nanowire layer, the second silver nanowire layer, the metal layer and the second metal layer are patterned.
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TW201546823A (en) * 2014-06-11 2015-12-16 Nat Univ Tsing Hua A method for fabricating hybrid conductive materials and a conductive thin film made thereof
CN105320328A (en) * 2014-07-25 2016-02-10 南京瀚宇彩欣科技有限责任公司 Touch display panel
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