TWI776768B - Heat dissipating sheet and chip on film package structure - Google Patents
Heat dissipating sheet and chip on film package structure Download PDFInfo
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- TWI776768B TWI776768B TW111101259A TW111101259A TWI776768B TW I776768 B TWI776768 B TW I776768B TW 111101259 A TW111101259 A TW 111101259A TW 111101259 A TW111101259 A TW 111101259A TW I776768 B TWI776768 B TW I776768B
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- 239000010410 layer Substances 0.000 claims abstract description 105
- 229910052751 metal Inorganic materials 0.000 claims abstract description 84
- 239000002184 metal Substances 0.000 claims abstract description 84
- 239000012790 adhesive layer Substances 0.000 claims abstract description 60
- 238000007373 indentation Methods 0.000 claims abstract description 13
- 239000011241 protective layer Substances 0.000 claims abstract description 12
- 230000017525 heat dissipation Effects 0.000 claims description 126
- 238000004806 packaging method and process Methods 0.000 claims description 10
- 239000010408 film Substances 0.000 description 16
- 239000000463 material Substances 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- 230000002950 deficient Effects 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 239000000945 filler Substances 0.000 description 3
- 239000011888 foil Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- BVKZGUZCCUSVTD-UHFFFAOYSA-L Carbonate Chemical compound [O-]C([O-])=O BVKZGUZCCUSVTD-UHFFFAOYSA-L 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229920012266 Poly(ether sulfone) PES Polymers 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000011889 copper foil Substances 0.000 description 1
- 238000004049 embossing Methods 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J7/00—Adhesives in the form of films or foils
- C09J7/20—Adhesives in the form of films or foils characterised by their carriers
- C09J7/29—Laminated material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
- C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2301/00—Additional features of adhesives in the form of films or foils
- C09J2301/10—Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet
- C09J2301/16—Additional features of adhesives in the form of films or foils characterized by the structural features of the adhesive tape or sheet by the structure of the carrier layer
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Organic Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Laminated Bodies (AREA)
Abstract
Description
本發明是有關於一種貼片以及封裝結構,且特別是有關於一種散熱貼片以及採用此散熱貼片的薄膜覆晶封裝結構。The present invention relates to a patch and a package structure, and particularly to a heat dissipation patch and a film-on-chip packaging structure using the heat dissipation patch.
現行的薄膜覆晶封裝(Chip on Film,COF)為增進散熱效果,會貼附具可撓性的薄型散熱貼片於封裝結構的表面上,特別是針對發熱源(例如晶片)所在位置。一般而言,當貼附有散熱貼片的薄膜覆晶封裝結構判定為不良品時,為了避免對不良品進行衝切製程(punch process)時散熱貼片的黏膠殘留於刀具而造成刀具損耗,一般需先將散熱貼片撕除,再進行衝切。然而,由於現行的散熱貼片為可撓薄層結構且其貼附表面為平整面,因此散熱貼片通常會服貼於薄膜覆晶封裝結構上,造成撕除不易且耗時。In the current chip on film (COF) package, in order to improve the heat dissipation effect, a flexible thin heat dissipation patch is attached to the surface of the package structure, especially where the heat source (such as a chip) is located. Generally speaking, when the chip-on-film packaging structure with the heat dissipation chip attached is judged to be a defective product, in order to avoid the adhesive of the heat dissipation chip remaining on the tool during the punching process of the defective product, the tool loss will be caused , Generally, the heat dissipation patch needs to be torn off first, and then punched. However, since the current heat dissipation patch is a flexible thin layer structure and its attaching surface is a flat surface, the heat dissipation patch is usually adhered to the film-on-chip package structure, which is difficult and time-consuming to remove.
本發明提供一種散熱貼片,其可提升使用者撕除時的便利性,且可有效縮短作業時間。The present invention provides a heat-dissipating patch, which can improve the convenience of tearing off by a user, and can effectively shorten the operation time.
本發明提供一種薄膜覆晶封裝結構,包括上述的散熱貼片,可提升使用者撕除散熱貼片時的便利性,以有效縮短作業時間。The present invention provides a film-on-chip packaging structure, including the above-mentioned heat dissipation patch, which can improve the convenience of a user when removing the heat dissipation patch, thereby effectively shortening the operation time.
本發明的散熱貼片,其包括絕緣保護層、散熱金屬層、第一膠層以及第二膠層。散熱金屬層具有彼此相對的第一側面與第二側面。第二側面上具有多個凹紋,且凹紋位於第二側面的至少一邊緣處。第一膠層設置於絕緣保護層與散熱金屬層的第一側面之間。散熱金屬層透過第一膠層貼附於絕緣保護層上。第二膠層設置於散熱金屬層的第二側面上。The heat dissipation patch of the present invention includes an insulating protective layer, a heat dissipation metal layer, a first adhesive layer and a second adhesive layer. The heat dissipation metal layer has a first side surface and a second side surface opposite to each other. The second side surface has a plurality of concave grooves, and the concave grooves are located at at least one edge of the second side surface. The first adhesive layer is disposed between the insulating protection layer and the first side surface of the heat dissipation metal layer. The heat dissipation metal layer is attached to the insulating protection layer through the first adhesive layer. The second adhesive layer is disposed on the second side surface of the heat dissipation metal layer.
在本發明的一實施例中,上述的凹紋的深度小於散熱金屬層的厚度的1/2。In an embodiment of the present invention, the depth of the above-mentioned concave grooves is less than 1/2 of the thickness of the heat dissipation metal layer.
在本發明的一實施例中,上述的凹紋所佔面積小於散熱金屬層的總面積的1/3。In an embodiment of the present invention, the area occupied by the concave grooves is less than 1/3 of the total area of the heat dissipation metal layer.
在本發明的一實施例中,上述的第二膠層暴露出凹紋。In an embodiment of the present invention, the above-mentioned second adhesive layer exposes indentations.
在本發明的一實施例中,上述的凹紋位於散熱金屬層的第二側面相連的二個邊緣處。In an embodiment of the present invention, the above-mentioned concave grooves are located at two edges connected to the second side surface of the heat dissipation metal layer.
本發明的薄膜覆晶封裝結構,其包括可撓性線路載板、晶片以及散熱貼片。可撓性線路載板具有相對的第一表面與第二表面以及定義於第一表面的晶片設置區。晶片配置於晶片設置區內並與可撓性線路載板電性連接。散熱貼片配置於可撓性線路載板的第一表面或第二表面上並對應晶片設置區。散熱貼片包括絕緣保護層、散熱金屬層、第一膠層以及第二膠層。散熱金屬層具有彼此相對的第一側面與第二側面。第二側面上具有多個凹紋,且凹紋位於第二側面的至少一邊緣處。第一膠層設置於絕緣保護層與散熱金屬層的第一側面之間。散熱金屬層透過第一膠層貼附於絕緣保護層上。第二膠層設置於散熱金屬層的第二側面上。散熱貼片透過第二膠層貼附於可撓性線路載板的第一表面與晶片上或可撓性線路載板的第二表面上。The film-on-chip package structure of the present invention includes a flexible circuit carrier board, a chip and a heat dissipation patch. The flexible circuit carrier has a first surface and a second surface opposite to each other and a chip setting area defined on the first surface. The chip is arranged in the chip setting area and is electrically connected with the flexible circuit carrier board. The heat dissipation patch is disposed on the first surface or the second surface of the flexible circuit carrier and corresponds to the chip setting area. The heat dissipation patch includes an insulating protection layer, a heat dissipation metal layer, a first adhesive layer and a second adhesive layer. The heat dissipation metal layer has a first side surface and a second side surface opposite to each other. The second side surface has a plurality of concave grooves, and the concave grooves are located at at least one edge of the second side surface. The first adhesive layer is disposed between the insulating protection layer and the first side surface of the heat dissipation metal layer. The heat dissipation metal layer is attached to the insulating protection layer through the first adhesive layer. The second adhesive layer is disposed on the second side surface of the heat dissipation metal layer. The heat dissipation patch is attached to the first surface of the flexible circuit carrier and the chip or the second surface of the flexible circuit carrier through the second adhesive layer.
在本發明的一實施例中,上述的凹紋的深度小於散熱金屬層的厚度的1/2。In an embodiment of the present invention, the depth of the above-mentioned concave grooves is less than 1/2 of the thickness of the heat dissipation metal layer.
在本發明的一實施例中,上述的凹紋所佔面積小於散熱金屬層的總面積的1/3。In an embodiment of the present invention, the area occupied by the concave grooves is less than 1/3 of the total area of the heat dissipation metal layer.
在本發明的一實施例中,上述的第二膠層暴露出凹紋。In an embodiment of the present invention, the above-mentioned second adhesive layer exposes indentations.
在本發明的一實施例中,上述的凹紋位於散熱金屬層的第二側面相連的二個邊緣處。In an embodiment of the present invention, the above-mentioned concave grooves are located at two edges connected to the second side surface of the heat dissipation metal layer.
基於上述,由於凹紋是位於散熱金屬層的第二側面的至少一邊緣處,因而使得本發明的散熱貼片在邊緣處形成具高低差的粗糙表面,藉此,在衝切不良品的薄膜覆晶封裝結構前進行撕除散熱貼片的步驟中,可提升使用者撕除的便利性,以有效縮短作業時間。此外,本發明採用此散熱貼片的薄膜覆晶封裝結構,則可有效地提升生產效率。Based on the above, since the indentations are located at at least one edge of the second side surface of the heat-dissipating metal layer, the heat-dissipating patch of the present invention forms a rough surface with a height difference at the edge, thereby, the film of the defective product can be punched In the step of peeling off the heat dissipation patch before the flip chip package structure, the convenience for the user to peel off can be improved, and the operation time can be effectively shortened. In addition, the present invention adopts the film-on-chip packaging structure of the heat dissipation patch, which can effectively improve the production efficiency.
為了讓本發明的上述特徵及優點能夠更明顯易懂,下文特舉實施例,並配合所附圖式詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.
參照本實施例之圖式以更全面地闡述本發明。然而,本發明亦可以各種不同的形式體現,而不應限於本文中所述之實施例。圖式中的層或區域的厚度、尺寸或大小會為了清楚起見而放大。The present invention is more fully described with reference to the drawings of this embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thickness, size or size of layers or regions in the drawings may be exaggerated for clarity.
應說明的是,下述圖式的薄膜覆晶封裝結構係以捲帶傳輸的方式作業,儘管下述圖式的散熱貼片僅示意地繪示應用於形成薄膜覆晶封裝結構的捲帶上的一個元件區(device area),然而,本發明不限於此,下述圖式的散熱貼片可以同時應用於捲帶上的多個元件區。It should be noted that the chip-on-film packaging structure in the following figures is operated in a tape-and-reel mode, although the heat sink in the figures below is only schematically shown applied to the tape and tape forming the chip-on-film packaging structure. However, the present invention is not limited to this, and the heat dissipation patches of the following figures can be applied to a plurality of device areas on the tape at the same time.
圖1是依照本發明的一實施例的一種散熱貼片的透視示意圖。圖2A是沿圖1的A-A’線剖面的散熱貼片的一實施例的剖面示意圖。圖2B是沿圖1的A-A’線剖面的散熱貼片的另一實施例的剖面示意圖。為了清楚示意,圖1省略繪示部分構件(如第一膠層130及第二膠層140),僅示意地繪示絕緣保護層110、散熱金屬層120及多個凹紋124。FIG. 1 is a schematic perspective view of a heat dissipation patch according to an embodiment of the present invention. FIG. 2A is a schematic cross-sectional view of an embodiment of a heat dissipation patch taken along the line A-A' of FIG. 1 . Fig. 2B is a schematic cross-sectional view of another embodiment of the heat dissipation patch taken along the line A-A' of Fig. 1 . For the sake of clarity, FIG. 1 omits to illustrate some components (eg, the first
請同時參考圖1及圖2A,在本實施例中,散熱貼片100包括絕緣保護層110、散熱金屬層120、第一膠層130以及第二膠層140。絕緣保護層110的材料例如是聚醯亞胺(polyimide,PI)等可撓性材料,用以保護散熱金屬層120,以避免散熱金屬層120刮傷受損。散熱金屬層120具有彼此相對的第一側面121與第二側面122,其中散熱金屬層120的材料可包括金屬箔或石墨類薄膜,而金屬箔例如是鋁箔或銅箔,但本發明不以此為限。第一膠層130設置於絕緣保護層110與散熱金屬層120的第一側面121之間,且散熱金屬層120透過第一膠層130貼附於絕緣保護層110上。第二膠層140設置於散熱金屬層120的第二側面122上,有助於後續將散熱金屬層120貼附於發熱元件(如薄膜覆晶封裝結構)上。Please refer to FIG. 1 and FIG. 2A simultaneously. In this embodiment, the
特別是,在本實施例中,散熱金屬層120的第二側面122上具有多個凹紋124,且這些凹紋124位於第二側面122的至少一邊緣123處。舉例來說,在本實施例中,這些凹紋124可位於散熱金屬層120的第二側面122相連的二個邊緣123a、123b處,但本發明不以此為限。凹紋124可例如是立體壓紋,但不以此為限,只要能形成非平整表面的圖案,皆屬於本發明所欲保護的範圍。In particular, in this embodiment, the
應理解的是,本實施例僅示例性地繪示位於散熱金屬層120的第二側面122相連的二個邊緣123a、123b處的凹紋124,但並非用以限定本發明。於其他未繪示的實施例中,這些凹紋124可依實際需求設置於散熱金屬層120的第二側面122上任何一個或多個的邊緣處。It should be understood that the present embodiment merely illustrates the
在一實施例中,散熱金屬層120具有一厚度T1,而位於散熱金屬層120的第二側面122上的這些凹紋124具有一深度T2。較佳地,這些凹紋124的深度T2例如是小於散熱金屬層120的厚度T1的1/2,但本發明不以此為限。在其他實施例中,這些凹紋124的深度T2亦可依實際需求調整。此處,散熱金屬層120的厚度T1例如是25微米或50微米,但不以此為限。In one embodiment, the heat
在一實施例中,位於散熱金屬層120的第二側面122上的這些凹紋124所佔的面積例如是小於散熱金屬層120的總面積的1/3,但本發明不以此為限。在其他實施例中,這些凹紋124所佔的面積大小可依實際需求調整,以利於使用者撕除散熱貼片100。In one embodiment, the area occupied by the
此外,結合圖1及圖2A所示,在本實施例中,設置於散熱金屬層120的第二側面122上的第二膠層140可覆蓋散熱金屬層120的第二側面122的大部分但暴露出這些凹紋124,使得第二膠層140的側壁大部分與散熱金屬層120的邊緣切齊,但其中的一個側壁140s則位在這些凹紋124的區域之外。也就是說,這些凹紋124並未被第二膠層140覆蓋,因而使得在這些凹紋124處的粗糙表面被暴露出,但本發明不以此為限。在其他實施例中,第二膠層140亦可不暴露出這些凹紋124。舉例而言,請參考圖2B,第二膠層140的側壁與散熱金屬層120的邊緣完全切齊,也就是說,第二膠層140完整覆蓋散熱金屬層120的第二側面122。此外,第二膠層140在這些凹紋124處可與散熱金屬層120呈共形設置,因而使得第二膠層140的表面142也具有與這些凹紋124相似的非平整表面。In addition, as shown in FIG. 1 and FIG. 2A , in this embodiment, the second
在一實施例中,第一膠層130的尺寸可大致等於散熱金屬層120的尺寸並位於散熱金屬層120的範圍,以使散熱金屬層120與絕緣保護層110之間達到最大貼合面積,可提升兩者間的接合效果。第一膠層130的厚度T3小於第二膠層140的厚度T4,其中第一膠層130的厚度T3例如是20微米,而第二膠層140的厚度T4例如是60微米,但不以此為限。In one embodiment, the size of the first
在一實施例中,絕緣保護層110的尺寸大於散熱金屬層120的尺寸,且絕緣保護層110完全覆蓋散熱金屬層120,以確實保護散熱金屬層120,但本發明不限於此。In one embodiment, the size of the insulating
圖3是依照本發明的另一實施例的一種散熱貼片的透視示意圖。圖4A是沿圖3的B-B’線剖面的散熱貼片的一實施例的剖面示意圖。圖4B是沿圖3的B-B’線剖面的散熱貼片的另一實施例的剖面示意圖。圖3的透視示意圖大致相似於圖1的透視示意圖,因此兩實施例中所記載的相同構件可參照前述內容,而兩實施例中相同的配置,在此不再贅述。3 is a schematic perspective view of a heat dissipation patch according to another embodiment of the present invention. FIG. 4A is a schematic cross-sectional view of an embodiment of a heat dissipation patch taken along the line B-B' of FIG. 3 . FIG. 4B is a schematic cross-sectional view of another embodiment of the heat dissipation patch taken along the line B-B' of FIG. 3 . The perspective schematic diagram of FIG. 3 is substantially similar to the perspective schematic diagram of FIG. 1 , so the same components described in the two embodiments may refer to the foregoing content, and the same configurations in the two embodiments will not be repeated here.
請同時參考圖3及圖4A,在本實施例的散熱貼片100’中,散熱金屬層120的第二側面122上具有多個凹紋124’,且這些凹紋124’位於第二側面122的其中一個邊緣123a處。舉例來說,如圖3所示,這些凹紋124’可位於散熱金屬層120的第二側面122的一個短邊的中央處,但本發明不以此為限,在其他未繪示的實施例中,這些凹紋124’可依實際需求設置於任一個邊緣的任意處。此外,於其他未繪示的實施例中,這些凹紋124’亦可依實際需求設置於散熱金屬層120的第二側面122上多個邊緣的任意處。Referring to FIG. 3 and FIG. 4A at the same time, in the
請再參考圖4A,相似於圖2A的剖面示意圖,在本實施例中,設置於散熱金屬層120的第二側面122上的第二膠層140亦可覆蓋散熱金屬層120的第二側面122的大部分但暴露出這些凹紋124’。也就是說,這些凹紋124’並未被第二膠層140覆蓋。並且,結合圖3及圖4A所示,由於本實施例中這些凹紋124’位於第二側面122的一個邊緣123a處且第二膠層140暴露出這些凹紋124’,因此設置於散熱金屬層120的第二側面122上的第二膠層140的局部的側壁140s’可圍繞於這些凹紋124’之外以暴露出凹紋124’處的粗糙表面,但本發明不以此為限。在其他實施例中,第二膠層140亦可不暴露出這些凹紋124’。舉例而言,請參考圖4B,第二膠層140的側壁與散熱金屬層120的邊緣完全切齊,也就是說,第二膠層140完整覆蓋散熱金屬層120的第二側面122。此外,第二膠層140在這些凹紋124’處可與散熱金屬層120呈共形設置,因而使得第二膠層140的表面142’也具有與這些凹紋124’相似的非平整表面。Please refer to FIG. 4A again. Similar to the schematic cross-sectional view of FIG. 2A , in this embodiment, the second
由於散熱貼片100、100’分別具有位於散熱金屬層120的第二側面122上的至少一邊緣123處的這些凹紋124、124’,因而使得散熱貼片100、100’在邊緣處形成具高低差的粗糙表面,有利於使用者撕除時的便利性,可有效縮短作業時間。Since the
在此必須說明的是,以下實施例沿用上述實施例的元件標號與部分內容,其中採用相同或近似的標號來表示相同或近似的元件,並且省略了相同技術內容的說明,關於省略部分的說明可參考前述實施例,下述實施例不再重複贅述。It must be noted here that the following embodiments use the element numbers and parts of the above-mentioned embodiments, wherein the same or similar numbers are used to represent the same or similar elements, and the description of the same technical content is omitted, and the description of the omitted part is omitted. Reference may be made to the foregoing embodiments, and detailed descriptions in the following embodiments will not be repeated.
圖5是依照本發明的如圖1所示的實施例的一種薄膜覆晶封裝結構的俯視示意圖。圖6是圖5的薄膜覆晶封裝結構的剖面示意圖。為了清楚示意,圖5省略繪示部分構件,省略的部分可參考圖6的剖面示意圖加以理解。FIG. 5 is a schematic top view of a chip on film package structure according to the embodiment shown in FIG. 1 according to the present invention. FIG. 6 is a schematic cross-sectional view of the chip on film package structure of FIG. 5 . For the sake of clarity, some components are omitted in FIG. 5 , and the omitted parts can be understood with reference to the schematic cross-sectional view in FIG. 6 .
請同時參考圖1、圖5及圖6,本實施例的薄膜覆晶封裝結構10包括例如是上述的散熱貼片100、可撓性線路載板200以及晶片300。可撓性線路載板200具有相對的第一表面201與第二表面202以及定義於第一表面201的晶片設置區201a。晶片300可以是採用覆晶(flip-chip)的方式配置於晶片設置區201a內並與可撓性線路載板200電性連接。散熱貼片100配置於可撓性線路載板200的第一表面201上並對應晶片設置區201a,其中散熱貼片100可透過第二膠層140貼附於可撓性線路載板200的第一表面201且覆蓋晶片300。Please refer to FIG. 1 , FIG. 5 and FIG. 6 at the same time, the chip on
應說明的是,儘管在本實施例中散熱貼片100僅設置於第一表面201上,然而,本發明不限制散熱貼片100所貼附的表面,也不限制貼附的表面及其數量。只要散熱貼片100至少設置於第一表面201與第二表面202的其中之一上,皆屬於本發明的保護範圍。舉例來說,在其他實施例中,散熱貼片100 亦可以是僅設置於第二表面202或同時設置於第一表面201與第二表面202上。也就是說,於其他實施例中,散熱貼片100亦可配置於可撓性線路載板200的第二表面202上並對應晶片設置區201a,且散熱貼片100可透過第二膠層140貼附於可撓性線路載板200的第二表面202上;或者是,可以有兩個散熱貼片100,分別設置在可撓性線路載板200的第一表面201及第二表面202上,上述皆屬於本發明所欲保護的範圍。It should be noted that, although the
於此,可撓性線路載板200可包括可撓性基板210、多個引腳220以及防焊層230。可撓性基板210的材質例如是聚乙烯對苯二甲酸酯(polyethylene terephthalate,PET)、聚醯亞胺(polyimide,PI)、聚醚(polyethersulfone,PES)、碳酸脂(polycarbonate,PC)或其他適合的可撓性材料。可撓性基板210具有彼此相對的上表面211與下表面212,而引腳220設置於可撓性基板210的上表面211上。防焊層230設置於可撓性基板210的上表面211上,且位於晶片設置區201a外並局部覆蓋多個引腳220,以避免引腳220受損或因異物而橋接短路。多個引腳220被防焊層230裸露出的部分可用於與晶片300或外部元件電性連接。防焊層230的材料例如是綠漆,於此並不加以限制。Here, the
在一實施例中,薄膜覆晶封裝結構10還包括填充膠層310,其中填充膠層310可填充於可撓性基板210與晶片300之間,以防止水氣或異物侵入造成電性接點損壞或電性異常。填充膠層310的材料例如是底部填充膠(underfill),但不以此為限。In one embodiment, the chip on
由於本實施例的薄膜覆晶封裝結構10包括散熱貼片100,且散熱貼片100具有位於散熱金屬層120的第二側面122上的至少一邊緣123處的這些凹紋124,可使散熱貼片100易於被撕除,進而可提升薄膜覆晶封裝結構10的生產效率。應理解的是,儘管僅示出包括散熱貼片100的薄膜覆晶封裝結構10的實施例,但並非用以限定本發明。於其他未繪示的實施例中,薄膜覆晶封裝結構也可包括前述的散熱貼片100’。Since the chip on
綜上所述,由於凹紋是位於散熱金屬層的第二側面的至少一邊緣處,因而使得本發明的散熱貼片在邊緣處形成具高低差的粗糙表面,藉此,在衝切不良品的薄膜覆晶封裝結構前進行撕除散熱貼片的步驟中,可提升使用者撕除的便利性,以有效縮短作業時間。此外,本發明採用此散熱貼片的薄膜覆晶封裝結構,則可有效地提升生產效率。To sum up, since the concave grooves are located at at least one edge of the second side surface of the heat dissipation metal layer, the heat dissipation patch of the present invention forms a rough surface with a height difference at the edge, thereby preventing the punching of defective products. In the step of peeling off the heat dissipation patch before the thin film-on-chip package structure, the convenience of the user's peeling can be improved, and the operation time can be effectively shortened. In addition, the present invention adopts the film-on-chip packaging structure of the heat dissipation patch, which can effectively improve the production efficiency.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.
10:薄膜覆晶封裝結構
100、100’:散熱貼片
110:絕緣保護層
120:散熱金屬層
121:第一側面
122:第二側面
123、123a、123b:邊緣
124、124’:凹紋
130:第一膠層
140:第二膠層
140s、140s’:側壁
142、142’:表面
211:上表面
212:下表面
200:可撓性線路載板
201:第一表面
201a:晶片設置區
202:第二表面
210:可撓性基板
220:引腳
230:防焊層
300:晶片
310:填充膠層
T1、T3、T4:厚度
T2:深度10: Thin film flip
圖1是依照本發明的一實施例的一種散熱貼片的透視示意圖。 圖2A是沿圖1的A-A’線剖面的散熱貼片的一實施例的剖面示意圖。 圖2B是沿圖1的A-A’線剖面的散熱貼片的另一實施例的剖面示意圖。 圖3是依照本發明的另一實施例的一種散熱貼片的透視示意圖。 圖4A是沿圖3的B-B’線剖面的散熱貼片的一實施例的剖面示意圖。 圖4B是沿圖3的B-B’線剖面的散熱貼片的另一實施例的剖面示意圖。 圖5是依照本發明的一實施例的一種薄膜覆晶封裝結構的俯視示意圖。 圖6是圖5的薄膜覆晶封裝結構的剖面示意圖。 FIG. 1 is a schematic perspective view of a heat dissipation patch according to an embodiment of the present invention. FIG. 2A is a schematic cross-sectional view of an embodiment of a heat dissipation patch taken along the line A-A' of FIG. 1 . Fig. 2B is a schematic cross-sectional view of another embodiment of the heat dissipation patch taken along the line A-A' of Fig. 1 . 3 is a schematic perspective view of a heat dissipation patch according to another embodiment of the present invention. FIG. 4A is a schematic cross-sectional view of an embodiment of a heat dissipation patch taken along the line B-B' of FIG. 3 . FIG. 4B is a schematic cross-sectional view of another embodiment of the heat dissipation patch taken along the line B-B' of FIG. 3 . FIG. 5 is a schematic top view of a chip on film package structure according to an embodiment of the present invention. FIG. 6 is a schematic cross-sectional view of the chip on film package structure of FIG. 5 .
100:散熱貼片 100: heat dissipation patch
110:絕緣保護層 110: Insulation protective layer
120:散熱金屬層 120: heat dissipation metal layer
123、123a、123b:邊緣 123, 123a, 123b: Edge
124:凹紋 124: Indentation
140s:側壁 140s: Sidewalls
Claims (10)
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US20110143625A1 (en) * | 2007-07-20 | 2011-06-16 | Choi Kyoung-Sei | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same |
US20190363051A1 (en) * | 2018-05-28 | 2019-11-28 | Samsung Electronics Co., Ltd. | Film package and package module including the same |
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US20110143625A1 (en) * | 2007-07-20 | 2011-06-16 | Choi Kyoung-Sei | Tape for heat dissipating member, chip on film type semiconductor package including heat dissipating member, and electronic apparatus including the same |
US20190363051A1 (en) * | 2018-05-28 | 2019-11-28 | Samsung Electronics Co., Ltd. | Film package and package module including the same |
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