TWI760574B - Simulation automation method - Google Patents
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本發明是有關於一種信號模擬方法,且特別是有關於一種模擬自動化方法。The present invention relates to a signal simulation method, and in particular to a simulation automation method.
印刷電路板經常使用於電子產品,而信號模擬則是電子產品開發用來除錯、驗證的工具之一。一般而言,當工程師欲使用模擬軟體分析該類電子產品的信號品質時,需要由工程師手動設定印刷電路板的各層厚度、材料特性、金屬蝕刻角度等參數,並且手動設定導通孔的材料、孔壁電鍍厚度等參數。Printed circuit boards are often used in electronic products, and signal simulation is one of the tools used for debugging and verification in electronic product development. Generally speaking, when engineers want to use simulation software to analyze the signal quality of such electronic products, they need to manually set the thickness of each layer of the printed circuit board, material properties, metal etching angle and other parameters, and manually set the materials and holes of the via holes. Parameters such as wall plating thickness.
由於信號模擬的時間長,需要由具有模擬經驗的信號模擬工程師進行操作。然而,由於模擬軟體的許可(license)個數有限,因此倘若操作時間過常便會延遲下一個模擬的時間。故,倘若能縮短操作設定的時間,便能提高模擬軟體的使用效率,並且縮短模擬時間。Due to the long time for signal simulation, it needs to be performed by a signal simulation engineer with simulation experience. However, since the number of licenses for simulation software is limited, if the operation time is too long, the time of the next simulation will be delayed. Therefore, if the operation setting time can be shortened, the use efficiency of the simulation software can be improved, and the simulation time can be shortened.
本發明提供一種模擬自動化方法,可有效降低產品開發時所需的信號模擬時間。The invention provides a simulation automation method, which can effectively reduce the signal simulation time required for product development.
本發明的模擬自動化方法,用於電腦可執行的模擬軟體,模擬自動化方法包括:透過語法轉換模組自印刷電路板的疊構表與佈局設計圖獲得多個參數;藉由語法轉換模組將每一參數轉換為符合模擬軟體可識別的自動化語法;以及將轉換後的該自動化語法套入至模擬軟體,據以透過模擬軟體來進行模擬。The simulation automation method of the present invention is used for computer-executable simulation software, and the simulation automation method includes: obtaining a plurality of parameters from the stack-up table and layout design diagram of the printed circuit board through a syntax conversion module; Each parameter is converted into an automation syntax that can be recognized by the simulation software; and the converted automation syntax is inserted into the simulation software, so as to perform simulation through the simulation software.
在本發明的一實施例中,所述模擬自動化方法,更包括:透過佈局圖讀取模組讀取佈局設計圖,並將自佈局設計圖所獲得的參數輸入至語法轉換模組。In an embodiment of the present invention, the simulation automation method further includes: reading the layout design drawing through the layout drawing reading module, and inputting the parameters obtained from the layout design drawing to the syntax conversion module.
在本發明的一實施例中,所述參數包含多個堆疊參數以及多個佈局參數。透過語法轉換模組自疊構表與佈局設計圖獲得所述參數的步驟包括:自疊構表獲得所述堆疊參數;以及自佈局設計圖獲得所述佈局參數。In an embodiment of the present invention, the parameters include a plurality of stacking parameters and a plurality of layout parameters. The step of obtaining the parameters from the stacking table and the layout design drawing through the syntax conversion module includes: obtaining the stacking parameters from the stacking table; and obtaining the layout parameters from the layout design drawing.
在本發明的一實施例中,所述堆疊參數至少包括:電路板層數、電路板種類、每一介電層的厚度、每一介電層的介電常數、每一介電層的散逸因數以及每一金屬層的厚度。所述佈局參數至少包括多個層名稱、多個導通孔名稱以及多個導通孔種類。In an embodiment of the present invention, the stacking parameters at least include: the number of circuit board layers, the type of circuit boards, the thickness of each dielectric layer, the dielectric constant of each dielectric layer, and the dissipation of each dielectric layer factor and the thickness of each metal layer. The layout parameters include at least a plurality of layer names, a plurality of via hole names, and a plurality of via hole types.
在本發明的一實施例中,透過語法轉換模組自疊構表與佈局設計圖獲得所述參數的步驟更包括:根據疊構表所記載的堆疊關係,計算多個金屬層各自的介電常數、散逸因數以及蝕刻角度。In an embodiment of the present invention, the step of obtaining the parameters from the stack-up table and the layout design diagram through the syntax conversion module further includes: calculating the respective dielectrics of the plurality of metal layers according to the stacking relationship recorded in the stack-up table Constants, dissipation factor, and etch angle.
在本發明的一實施例中,所述模擬自動化方法,更包括:透過語法轉換模組轉換所述厚度的單位以符合模擬軟體的格式。In an embodiment of the present invention, the simulation automation method further includes: converting the thickness unit through a syntax conversion module to conform to the format of the simulation software.
在本發明的一實施例中,藉由語法轉換模組將每一參數轉換為符合模擬軟體可識別的自動化語法的步驟包括:搭配所述層名稱轉換所述堆疊參數為符合模擬軟體可識別的自動化語法。In an embodiment of the present invention, the step of converting each parameter into an automatic syntax identifiable by the simulation software by the syntax conversion module includes: converting the stacking parameter into an automatic syntax identifiable by the simulation software in combination with the layer name automation grammar.
在本發明的一實施例中,所述模擬自動化方法,更包括:語法轉換模組依據所述導通孔名稱以及所述導通孔種類來設定多個導通孔參數。In an embodiment of the present invention, the simulation automation method further includes: the syntax conversion module sets a plurality of via parameters according to the via hole name and the via hole type.
基於上述,本發明提出疊構設定自動化的解決方案,期望能解決解決疊構設定需要人工設定的問題,並且為信號模擬全自動化奠定基礎。Based on the above, the present invention proposes an automated solution for stack setting, which is expected to solve the problem of manual setting for stack setting, and lay a foundation for full automation of signal simulation.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following embodiments are given and described in detail with the accompanying drawings as follows.
圖1是依照本發明一實施例的系統架構圖。請參照圖1,實現模擬自動化方法的系統架構包括疊構表(stackup table)110、佈局設計圖(board file)120、語法轉換模組130、佈局圖讀取模組140以及模擬軟體150。FIG. 1 is a system architecture diagram according to an embodiment of the present invention. Referring to FIG. 1 , the system architecture for implementing the simulation automation method includes a stackup table 110 , a
本實施例是利用具有運算能力的電子裝置來執行。所述電子裝置包括處理器、儲存裝置等設備。在儲存裝置中儲存有多個模組,處理器驅動這些模組來實現模擬自動化方法。This embodiment is implemented by using an electronic device with computing capability. The electronic device includes a processor, a storage device and other equipment. A plurality of modules are stored in the storage device, and the processor drives the modules to implement the simulation automation method.
所述處理器可採用中央處理單元(Central Processing Unit,CPU)、圖像處理單元(Graphic Processing Unit,GPU)、物理處理單元(Physics Processing Unit,PPU)、可程式化之微處理器(Microprocessor)、嵌入式控制晶片、數位訊號處理器(Digital Signal Processor,DSP)、特殊應用積體電路(Application Specific Integrated Circuits,ASIC)或其他類似裝置等來實現。所述儲存設備是任意型式的固定式或可移動式隨機存取記憶體(Random Access Memory,RAM)、唯讀記憶體(Read-Only Memory,ROM)、快閃記憶體(Flash memory)、安全數位卡(Secure Digital Memory Card,SD)、硬碟或其他類似裝置或這些裝置的組合。The processor may adopt a central processing unit (Central Processing Unit, CPU), a graphics processing unit (Graphic Processing Unit, GPU), a physical processing unit (Physics Processing Unit, PPU), a programmable microprocessor (Microprocessor) , embedded control chip, digital signal processor (Digital Signal Processor, DSP), special application integrated circuit (Application Specific Integrated Circuits, ASIC) or other similar devices to achieve. The storage device is any type of fixed or removable random access memory (Random Access Memory, RAM), read-only memory (Read-Only Memory, ROM), flash memory (Flash memory), security Secure Digital Memory Card (SD), hard disk or other similar device or a combination of these devices.
疊構表110是基於佈局設計圖120與模擬軟體150之間的差異而設計。疊構表110中記載了印刷電路板的堆疊參數。堆疊參數至少包括:電路板層數、電路板種類、多個介電層各自的厚度、各介電層的介電常數(Dielectric Constant,DK)、各介電層的散逸因數(Dissipation Factor,DF)以及多個金屬層各自的厚度。The stackup table 110 is designed based on the difference between the
本實施例中以一般常用的文件格式來設計疊構表110,因此可不限定於由信號模擬工程師來填寫堆疊參數,而能夠方便一般工程師來填寫堆疊參數。例如,以Excel等電子試算表來設計疊構表110。據此,一般的使用者可以於疊構表110中輸入印刷電路板的堆疊參數。由使用者將原先在模擬軟體150中需要手動設定的堆疊參數填寫於疊構表110中。在此,部分的堆疊參數可以利用疊構表110內的功能自動計算,或者由外部程式來計算。In this embodiment, the stackup table 110 is designed in a commonly used file format, so it is not limited to fill in the stacking parameters by a signal simulation engineer, but can be convenient for general engineers to fill in the stacking parameters. For example, the overlay table 110 is designed in a spreadsheet such as Excel. Accordingly, a general user can input the stacking parameters of the printed circuit board in the stacking table 110 . The stacking parameters that need to be manually set in the
佈局設計圖120記載多個佈局參數。這些佈局參數至少包括多個層名稱、多個導通孔名稱以及多個導通孔種類。佈局圖讀取模組140可讀取佈局設計圖120的資訊,比對層數資訊是否正確,並讀取各層名稱。The
圖2是依照本發明一實施例的模擬自動化方法的流程圖。請參照圖1及圖2,在步驟S205中,透過語法轉換模組130自疊構表110與佈局設計圖120獲得多個參數。在此,所述參數包含多個堆疊參數以及多個佈局參數。透過佈局圖讀取模組140讀取佈局設計圖120,並將自佈局設計圖120所獲得的佈局參數輸入至語法轉換模組130。FIG. 2 is a flowchart of a simulation automation method according to an embodiment of the present invention. Referring to FIG. 1 and FIG. 2 , in step S205 , a plurality of parameters are obtained from the stacking table 110 and the layout design diagram 120 through the
在步驟S210中,藉由語法轉換模組130將每一個參數轉換為符合模擬軟體150可識別的自動化語法。之後,在步驟S215中,將轉換後的自動化語法套入至模擬軟體150中,據以透過模擬軟體150來進行模擬。In step S210 , each parameter is converted into an automatic grammar that can be recognized by the
具體而言,語法轉換模組130中包括模擬軟體所支援的自動化語法的對應關係。語法轉換模組130在讀取疊構表110內的堆疊參數並且自佈局圖讀取模組140獲得多個佈局參數之後,透過所述對應關係,將所述參數(堆疊參數以及佈局參數)轉化成模擬軟體150的自動化語法,以將轉換後的自動化語法套入至模擬軟體150中來自動設定各項參數。Specifically, the
舉例來說,疊構表110提供了使用者介面供使用者來選取或直接輸入適合的電路板層數。並且,疊構表110的使用者介面還進一步提供了多個電路板種類(例如Type 1~Type 4)供使用者選擇。之後,疊構表110可基於所選擇的電路板層數以及電路板種類自動產生具有各層名稱以及種類的表格,以供使用者開始填入各層(包括介電層與金屬層)的厚度、介電層的介電常數、介電層的散逸因數等其他堆疊參數。For example, the build-up table 110 provides a user interface for the user to select or directly input the appropriate number of circuit board layers. In addition, the user interface of the stacking table 110 further provides a plurality of circuit board types (eg, Type 1 to Type 4) for the user to select. Afterwards, the build-up table 110 can automatically generate a table with the name and type of each layer based on the selected number of layers of the circuit board and the type of the circuit board, so that the user can start to fill in the thickness, The dielectric constant of the electrical layer, the dissipation factor of the dielectric layer, and other stacking parameters.
底下以電路板層數為4層且電路板種類為Type 3的印刷電路板的模擬來進行說明。The following description is based on the simulation of a printed circuit board with 4 layers and the type of circuit board is Type 3.
表1
在本實施例中,假設疊構表110記載了電路板層數為4,電路板種類為Type 3,並且記載如表1所示的各層厚度、介電常數(DK)、散逸因數(DF)等堆疊參數。In this embodiment, it is assumed that the stacking table 110 records that the number of layers of the circuit board is 4, the type of the circuit board is Type 3, and the thickness, dielectric constant (DK), and dissipation factor (DF) of each layer as shown in Table 1 are recorded. and other stacking parameters.
在選擇了電路板層數(4層)以及電路板種類(Type 3)之後,參照表1,疊構表110便基於所選擇的電路板層數以及電路板種類而自動產生層名稱以及種類兩個欄位的內容。在層名稱的欄位中,L1~L4為金屬層,“Solder Mask 1”、“Solder Mask 2”與“Medium 1”~“Medium 3”為介質層。在種類的欄位中,“DIELECTRIC”代表介質,而“CONDUCTOR”代表導體。而厚度、介電常數、散逸因數這三個欄位的內容則是由使用者輸入。After selecting the number of circuit board layers (4 layers) and the type of circuit board (Type 3), referring to Table 1, the stack-up table 110 will automatically generate the layer name and type two based on the selected number of circuit board layers and circuit board type. content of a field. In the layer name column, L1 to L4 are metal layers, and "Solder Mask 1", "Solder Mask 2", and "Medium 1" to "Medium 3" are dielectric layers. In the category field, "DIELECTRIC" represents the medium, and "CONDUCTOR" represents the conductor. The contents of the three fields of thickness, dielectric constant and dissipation factor are input by the user.
一般在輸入各層的參數時,不會輸入金屬層L1~L4的介質的介電常數以及散逸因數。在此,可由疊構表110或外部軟體利用已知的堆疊參數,來自動計算出其他堆疊參數。例如,根據疊構表110所記載的堆疊關係,計算多個金屬層L1~L4各自的介質的介電常數、散逸因數以及蝕刻角度。Generally, when inputting the parameters of each layer, the dielectric constant and dissipation factor of the medium of the metal layers L1 to L4 are not input. Here, other stacking parameters can be automatically calculated by the stacking table 110 or external software using the known stacking parameters. For example, according to the stacking relationship described in the stacking table 110 , the dielectric constant, dissipation factor, and etching angle of the medium of each of the plurality of metal layers L1 to L4 are calculated.
底下舉例來說明金屬層L1~L4各自的介質的介電常數、散逸因數以及蝕刻角度的計算公式。The calculation formulas of the dielectric constants, dissipation factors and etching angles of the respective mediums of the metal layers L1 to L4 are described below with an example.
在印刷電路板為對稱堆疊,層數為N(N為2的倍數)且電路板種類為Type 3的情況下,假設蝕刻角度為75度或105度,則金屬層第i層(1≤i≤N)的蝕刻角度A(i)的判斷公式為如下所示: A(i)=75,i≤1; A(i)=75,1<i<N & mod(N/2-i,2)=0; A(i)=105,1<i<N & mod(N/2-i,2)=1; A(i)=105,i≥N。When the printed circuit board is symmetrically stacked, the number of layers is N (N is a multiple of 2) and the type of circuit board is Type 3, assuming that the etching angle is 75 degrees or 105 degrees, the metal layer i-th layer (1≤i The judging formula for the etching angle A(i) of ≤N) is as follows: A(i)=75, i≤1; A(i)=75, 1<i<N & mod(N/2-i, 2)=0; A(i)=105, 1<i<N & mod(N/2-i, 2)=1; A(i)=105, i≥N.
在印刷電路板為對稱堆疊,層數為N(N為2的倍數)且電路板種類為Type 3的情況下,以DK(i-0.5)及DF(i-0.5)分別代表金屬層第i-1層到第i層(1≤i≤N)之間的介質層的介電常數及散佚因數;以DK(i+0.5)及DF(i+0.5)分別代表金屬層第i層到第i+1層的介質層的介電常數及散佚因數,以DK(i)及DF(i)分別表示金屬層第i層的介電常數及散佚因數,其判斷公式為如下所示: DK(i)=DK(i-0.5) ,i≤1; DF(i)=DF(i-0.5),i≤1; DK(i)=DK(i-0.5),1<i<N & mod(N/2-i,2)=0; DF(i)=DF(i-0.5),1<i<N & mod(N/2-i,2)=0; DK(i)=DK(i+0.5),1<i<N & mod(N/2-i,2)=1; DF(i)=DF(i+0.5),1<i<N & mod(N/2-i,2)=1; DK(i)=DK(i+0.5),i≥N; DF(i)=DF(i+0.5),i≥N。When the printed circuit board is symmetrically stacked, the number of layers is N (N is a multiple of 2), and the type of circuit board is Type 3, DK(i-0.5) and DF(i-0.5) represent the i-th metal layer respectively. The dielectric constant and scattering factor of the dielectric layer between -1 layer and the i-th layer (1≤i≤N); DK(i+0.5) and DF(i+0.5) respectively represent the metal layer i-th layer to The dielectric constant and dispersion factor of the dielectric layer of the i+1th layer are represented by DK(i) and DF(i), respectively, to represent the dielectric constant and dispersion factor of the i-th metal layer. The judgment formula is as follows : DK(i)=DK(i-0.5), i≤1; DF(i)=DF(i-0.5), i≤1; DK(i)=DK(i-0.5), 1<i<N &mod(N/2-i,2)=0; DF(i)=DF(i-0.5), 1<i<N &mod(N/2-i,2)=0; DK(i)= DK(i+0.5), 1<i<N &mod(N/2-i,2)=1; DF(i)=DF(i+0.5), 1<i<N & mod(N/2- i,2)=1; DK(i)=DK(i+0.5), i≥N; DF(i)=DF(i+0.5), i≥N.
在印刷電路板為對稱堆疊,層數為N(N為2的倍數)、電路板種類為Type 4且為m-n-m的堆疊方式(例如1-n-1)的情況下,假設金屬層的蝕刻角度為75度或105度,則金屬層第i層(1≤i≤N)的蝕刻角度A(i)的判斷公式為如下所示: A(i)=75,i≤(1+m); A(i)=75,(1+m)<i<(N-m) & mod(N/2-i,2)=0; A(i)=105,(1+m)<i<(N-m) & mod(N/2-i,2)=1; A(i)=105,i≥(N-m)。When the printed circuit board is symmetrically stacked, the number of layers is N (N is a multiple of 2), the type of circuit board is Type 4 and the stacking method is m-n-m (for example, 1-n-1), it is assumed that the etching angle of the metal layer is 75 degrees or 105 degrees, then the judgment formula of the etching angle A(i) of the i-th metal layer (1≤i≤N) is as follows: A(i)=75, i≤(1+m); A(i)=75, (1+m)<i<(N-m) &mod(N/2-i,2)=0; A(i)=105, (1+m)<i<(N-m) &mod(N/2-i,2)=1; A(i)=105, i≥(N-m).
同上,金屬層第i層的介電常數DK(i)、散佚因數DF(i)的判斷公式為如下所示: DK(i)=DK(i-0.5),i≤(1+m); DF(i)=DF(i-0.5),i≤(1+m); DK(i)=DK(i-0.5),(1+m)<i<(N-m) & mod(N/2-i,2)=0; DF(i)=DF(i-0.5),(1+m)<i<(N-m) & mod(N/2-i,2)=0; DK(i)=DK(i+0.5),(1+m)<i<(N-m) & mod(N/2-i,2)=1; DF(i)=DF(i+0.5),(1+m)<i<(N-m) & mod(N/2-i,2)=1; DK(i)=DK(i+0.5),i≥(N-m); DF(i)=DF(i+0.5),i≥(N-m)。Same as above, the judgment formulas for the dielectric constant DK(i) and the scatter factor DF(i) of the i-th metal layer are as follows: DK(i)=DK(i-0.5), i≤(1+m) ; DF(i)=DF(i-0.5), i≤(1+m); DK(i)=DK(i-0.5), (1+m)<i<(N-m) & mod(N/2 -i,2)=0; DF(i)=DF(i-0.5), (1+m)<i<(N-m) &mod(N/2-i,2)=0; DK(i)= DK(i+0.5), (1+m)<i<(N-m) &mod(N/2-i,2)=1; DF(i)=DF(i+0.5), (1+m)< i<(N-m) &mod(N/2-i,2)=1; DK(i)=DK(i+0.5), i≥(N-m); DF(i)=DF(i+0.5), i ≥(N-m).
在印刷電路板為對稱堆疊,層數為N(N為2的倍數)且任意電路板種類的情況下,假設金屬蝕刻角度為75度或105度,則金屬層第i層(1≤i≤N)的蝕刻角度A(i) 的判斷公式為如下所示: A(i)=75,i≤(N/2); A(i)=105,i≥(N/2+1)。In the case that the printed circuit board is symmetrically stacked, the number of layers is N (N is a multiple of 2) and any type of circuit board, assuming that the metal etching angle is 75 degrees or 105 degrees, then the metal layer i-th layer (1≤i≤ The judging formula of the etching angle A(i) of N) is as follows: A(i)=75, i≤(N/2); A(i)=105, i≥(N/2+1).
同上,金屬層第i層的介電常數DK(i)、散佚因數DF(i)的判斷公式為如下所示: DK(i)=DK(i-0.5),i≤(N/2); DF(i)=DF(i-0.5),i≤(N/2); DK(i)=DK(i+0.5),i≥(N/2+1); DF(i)=DF(i+0.5),i≥(N/2+1)。Same as above, the judging formulas for the dielectric constant DK(i) and the scatter factor DF(i) of the i-th metal layer are as follows: DK(i)=DK(i-0.5), i≤(N/2) ; DF(i)=DF(i-0.5), i≤(N/2); DK(i)=DK(i+0.5), i≥(N/2+1); DF(i)=DF( i+0.5), i≥(N/2+1).
以表1為例,透過公式可計算出如表2所示的L1~L4這4個金屬層的介電常數、散逸因數以及蝕刻角度。以表1而言,L1~L4分別表示金屬層第1層~第4層。而表2的材料欄位例如可由疊構表110依據電路板種類來自動產生。Taking Table 1 as an example, the dielectric constant, dissipation factor and etching angle of the four metal layers L1 to L4 shown in Table 2 can be calculated through the formula. In Table 1, L1 to L4 represent the first to fourth metal layers, respectively. For example, the material field in Table 2 can be automatically generated by the build-up table 110 according to the type of the circuit board.
表2
佈局設計圖120的各層名稱與模擬軟體150經過轉檔之後的佈局設計圖的各層名稱有一定的對應關係,但並非完全一致。為了能夠在模擬軟體150中進行各項參數的自動化設定,故,語法轉換模組130必須先了解此對應關係,據此,即可透過讀取佈局設計圖讀取模組140所提供的各層名稱,轉化為模擬軟體150中實際設定的名稱,並且搭配各層的參數以及自動化語法的對應關係,即可進行各層的自動化參數設定。The names of the layers of the layout design diagram 120 have a certain corresponding relationship with the names of the layers of the layout design diagram after the
圖3A~圖3F是依照本發明一實施例的自動化語法的部分程式碼的示意圖。本實施例僅是其中一種實施方式,並不以此為限。程式碼310用來設定各層的層名稱。於符號“$”之後所接的名稱為層名稱。金屬層的層名稱“TOP”、“VCC”、“IN1以及“BOTTOM”是由語法轉換模組130自佈局設計圖120中所獲得,而介質層的層名稱“medium40”、“medium42”、“medium44”、“medium46”、“medium48”則是由模擬軟體150自動產生的名稱。在此,金屬層“TOP”、“VCC”、“IN1以及“BOTTOM”分別對應至表2的L1~L4,介質層“medium40”、“medium42”、“medium44”、“medium46”、“medium48”分別對應至表2的“Solder Mask 1”、“Medium 1”~“Medium 3”、“Solder Mask 2”。3A-3F are schematic diagrams of partial code of an automation grammar according to an embodiment of the present invention. This embodiment is only one implementation manner, and is not limited thereto. The
程式碼320用來設定各層的介電常數(DK)及散逸因數(DF)。以程式碼320的第1行為例,其用以設定介質層“medium40”的介電常數為4.5,而散逸因數為0.017。其他亦以此類推。The
程式碼330用來設定金屬層的材料。在本實施例中,模擬軟體150直接將金屬層“TOP”、“VCC”、“IN1以及“BOTTOM”的材料設定為銅(copper),然,在此僅為舉例說明,可視需求來變更金屬層的材料。The
程式碼340用來設定各層的厚度。在此,假設模擬軟體150所使用的厚度單位為公尺。而由於在疊構表110(如表1所示)中所使用的厚度單位為密耳(mil),因此可透過語法轉換模組130轉換厚度的單位以符合模擬軟體150的格式。即,可利用下述換算式來進行單位轉換:h密耳=(h*2.54*10-5)公尺。
程式碼350用來設定金屬層“TOP”、“VCC”、“IN1以及“BOTTOM”的蝕刻角度。在此,蝕刻角度75、105僅為其中一種實施範例,在其他實施例中亦可以將蝕刻角度設定為70、110或其他角度。The
程式碼360用來設定導通孔的相關資訊。從佈局設計圖120中可以取得導通孔名稱(例如“VIA20D10A28”),也可以取得導通孔種類(例如THOUGH),也會取得導通孔導通與否的資訊。而模擬軟體150會依照這些資訊來設定導通孔的材料以及導通孔的鍍金屬厚度。The
本實施例利用佈局圖讀取模組140來讀取佈局設計圖120的資訊,並且利用語法轉換模組130讀取疊構表110以及佈局設計圖120中的資訊,依照對應關係轉化成模擬軟體150的自動化程式,以在模擬軟體150中自動設定疊構以及導通孔的各項參數。In this embodiment, the layout
綜上所述,本發明可以有效降低在產品開發時所需的信號模擬時間,也可以避免模擬軟體廠商或晶片廠商推出一些工具簡化競爭對手的模擬流程。To sum up, the present invention can effectively reduce the signal simulation time required in product development, and can also avoid simulation software manufacturers or chip manufacturers from introducing some tools to simplify the simulation process of competitors.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed above by the embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The protection scope of the present invention shall be determined by the scope of the appended patent application.
110:疊構表120:佈局圖設計圖130:語法轉換模組140:佈局圖讀取模組150:模擬軟體310~360:程式碼S205~S215:模擬自動化方法的各步驟110: Stacking table 120: Layout drawing design drawing 130: Syntax conversion module 140: Layout drawing reading module 150:
圖1是依照本發明一實施例的系統架構圖。 圖2是依照本發明一實施例的模擬自動化方法的流程圖。 圖3A~圖3F是依照本發明一實施例的自動化語法的部分程式碼的示意圖。FIG. 1 is a system architecture diagram according to an embodiment of the present invention. FIG. 2 is a flowchart of a simulation automation method according to an embodiment of the present invention. 3A-3F are schematic diagrams of partial code of an automation grammar according to an embodiment of the present invention.
S205~S215:模擬自動化方法的各步驟 S205~S215: Simulate the steps of the automated method
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