TWI756446B - Interface currents channeling circuit, light-emitting diode (led) lighting system and light-emitting diode (led) device - Google Patents

Abstract

An interface currents channeling circuit may be used to convert two current channels of a conventional two-channel driver into three driving currents for the three strings of LEDs. By doing so, the same two channel driver can be used for applications requiring just two LED arrays as well as three LED arrays.

Description

Interface current channel circuit, LED lighting system and LED device

Tunable white lighting is one of the biggest trends in commercial and home lighting. A tunable white light source is typically capable of changing its color and light output level along two independent axes.

An interface current channel circuit can be used to convert two current channels of a conventional dual channel driver into three drive currents for three LED arrays. Thereby, the same dual-channel driver can be used for applications that only require two LED arrays as well as three LED arrays.

102: McAdam Ellipse (MAE)

104: Center

106: Black Body Line (BBL)

202: First straight line

204: First Step Line

206: Second Step Line

302: Dual channel driver

304: first channel

306: First Light Emitting Diode (LED) Array

308: Second channel

310: Second LED Array

312: Electrical connection

316: Welding point

318: LED board

402: Dual channel driver

404: Converter Printed Circuit Board (PCB)

406: LED board

408: First LED Array

410: Second LED Array

412: 3rd LED array/1st channel

414: Second channel

416: The first set of connections

418: Second set of electrical connections

420: Welding point

502: First sense resistor (Rs)

504: Second Rs

506: First diode (D1)

508: Second diode (D2)

510: First Light Emitting Diode (LED) String

512: Second LED string

514: Third LED string

516: First resistor (R1)

518: Second resistor (R2)

520: First Low Pass Filter (LPF)

522: First resistor (R1)

524: Second resistor (R2)

526: Second LPF

528: first operational amplifier (opamp)

530: Second opamp

532: Gate control block

536: First amplifier (amp)

538: Second amp

540: First resistor (R5)

542: Second resistor (R6)

544: Pull-up resistor (R7)

560: The first arithmetic circuit

562: Second arithmetic circuit

564: Rs

566: Rs

570: First Shunt Regulator

572: Second Shunt Regulator

574: First resistor (R5)

576: Second resistor (R6)

602: Step

604: Step

606: Steps

608: Steps

610: Steps

I1: The first input current

I2: The second input current

M1: first transistor

M2: second transistor

M3: The third transistor

V _a : Voltage

V _aa : Voltage

V _b : Voltage

V _bb : Voltage

V _c : voltage/node

V _CW : Voltage

V _f : Voltage

V _g1 : Voltage

V _g2 : Voltage

V _WW : Voltage

VDD: voltage supply

A more detailed understanding can be obtained from the following description, given by way of example in conjunction with the accompanying drawings, in which: Figure 1 represents a chromaticity diagram of a color space; Figure 2 depicts different correlated color temperatures (CCTs) and their associated chromaticity diagrams A diagram of the relationship of the black body line (BBL) above; FIG. 3 is a diagram for a light emitting diode (LED) array having a corresponding number and a driver A block diagram of the hardware in a tunable white light engine for one driver channel; FIG. 4 is a block diagram showing the hardware in a tunable white light engine with more LED arrays than driver channels; FIG. 5 is a A circuit diagram of an interface current channel circuit; and FIG. 6 is a flowchart illustrating a method for providing two-step linear CCT tunability in one or more LED arrays.

In the following description, numerous specific details are set forth, such as specific structures, components, materials, dimensions, processing steps and techniques, to provide a thorough understanding of one embodiment of the present invention. However, it will be understood by those of ordinary skill that the embodiments may be practiced without these specific details. In other instances, well-known structures or processing steps have not been described in detail so as not to obscure the embodiments. It will be understood that when an element such as a layer, region or substrate is referred to as being "on" or "over" another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly over" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "under", "beneath" or "beneath" another element, it can be directly under or under the other element, or it can be Intervening elements are present. In contrast, when an element is referred to as being "directly under" or "directly under" another element, there are no intervening elements present.

To avoid obscuring the embodiments presented in the following detailed description, some processing steps or operations known in the art have been presented and illustrated in combination and, in some instances, are not described in detail or operation. In other instances, some processing steps or operations known in the art may not be described at all. It should be appreciated that the following description focuses more on the unique features or elements of the various embodiments described herein.

Referring to FIG. 1, a chromaticity diagram representing a color space is shown. A color space is a three-dimensional space, that is, a color is specified by a set of three numbers specifying the color and brightness of a particular homogeneous visual stimulus. The three numbers can be the International Commission on Illumination (CIE) coordinates X, Y and Z or other values such as hue, chromaticity and brightness. Based on the fact that the human eye has three different types of color-sensing cones, these three "tristimulus values" are best used to describe the eye's response.

A chromaticity map is projected onto a color in a two-dimensional space that ignores luminance. For example, the standard CIE XYZ color space projects directly to the corresponding chromaticity space specified by two chromaticity coordinates called x and y, as shown in FIG. 1 .

Chroma is an objective description of the quality of a color that has nothing to do with its brightness. Chroma consists of two independent parameters commonly designated as hue and chroma, where chroma is also known as saturation, chroma, intensity, or excitation purity. A chromaticity diagram can contain all the colors that can be perceived by the human eye. Chromaticity diagrams can provide high accuracy because the parameters are based on the spectral power distribution (SPD) of light emitted from a colored object and include sensitivity curve factors that have been measured for the human eye. Any color can be represented exactly with two color coordinates x and y.

The average human eye cannot distinguish between all the colors in a particular area (called the MacAdam ellipse (MAE) 102 ) and the color at the center 104 of the ellipse. A chromaticity diagram can have multiple MAEs. Standard deviation color matching in LED lighting uses the deviation from MAE to describe the color accuracy of a light source.

The chromaticity diagram contains the Planckian locus or black body line (BBL) 106 . BBL 106 is the path or locus that the color of an incandescent blackbody takes in a specific chromaticity space as the temperature of the blackbody changes. It changes from deep red at low temperatures to orange, yellow-white, white, and finally blue-white at ultra-high temperatures. In general, the human eye prefers not too far from the white point of the BBL 106 . The dots above the black body line will tend towards greenish, while the dots below it will tend towards pinkish.

One method of using light emitting diodes (LEDs) to generate white light may be the additive mixing of red, green, and blue light. However, this method requires accurate calculation of the mixing ratio so that the resulting color point is on or close to the BBL 106 . Another approach may be to mix two or more phosphor-converted white LEDs of different correlated color temperatures (CCTs). This method will be described in additional detail below.

A tunable white light engine can be created using LEDs with different CCTs on each end of a desired tuning range. For example, a first LED may have a CCT of 2700K (which is warm white), and a second LED may have a color temperature of 4000K (which is neutral white). A temperature sensor with a temperature between 2700K and 4000K can be obtained by only varying the mixing ratio of the power supplied to the first LED through a first channel of a driver and the power supplied to the second LED through a second channel of the driver. White.

Referring now to FIG. 2, a diagram illustrating different CCTs and their relationship to the BBL 106 is shown. When plotted in a chromaticity diagram, mixing the achievable color points of two LEDs with different CCTs can form a first straight line 202 . Assuming that the 2700K and 4000K color points are just above the BBL 106 , the color point between these two CCTs will be below the BBL 106 . This may not be a problem since the maximum distance of points on this line from the BBL 106 may be relatively small.

In practice, however, it may be desirable to provide a wider color temperature tuning range (which may be cool white or daylight), eg, between 2700K and 6500K. If only 2700K LEDs and 6500K LEDs are used in the mix, the first straight line 202 between the two colors can be farther below the BBL 106 . As shown in FIG. 2 , the color point at 4000K can be very far from the BBL 106 .

To remedy this, a third channel of neutral white LEDs (4000K) can be added between the two LEDs and a two-step tuning procedure can be performed. For example, a first step line 204 can be between 2700K and 4000K and a second step line 206 can be between 4000K and 6500K between K. This provides three-step MAE BBL color temperature tunability within a wide range of CCTs. A first LED array with a warm white (WW) CCT, a second LED array with a neutral white (NW) CCT, and a third LED array with a cool white (CW) CCT and a two-step tuning procedure Three-step MAE BBL CCT tunability can be used to achieve a wide range of CCTs.

Referring now to FIG. 3, there is shown a block diagram illustrating hardware used in a tunable white light engine having a corresponding number of LED arrays and driver channels. As described above, a dual channel driver 302 can be used to power two LED arrays with CCTs at the ends of a desired tuning range. The dual channel driver 302 may be one of the conventional LED drivers known in the art. Two LED arrays can be mounted on an LED board 318 . A first channel 304 of the dual channel driver 302 can power a first LED array 306 of a first CCT and a second channel 308 of the dual channel driver 302 can power a second LED array 310 of a second CCT. The dual channel driver 302 can provide two drive currents to the LED board 318 through one or more electrical connections 312, such as wires or direct board-to-board connections. One or more electrical connections 312 may be connected to one or more solder joints 316 .

Three channel drivers can be used to control three LED arrays in a similar manner. However, a three-channel driver can be more complex and expensive than a conventional two-channel driver. It may be desirable to multiply the output of a driver to power more LED arrays than the number of channels, such that the ratio of driver channels to LED array is greater than 1:1.

Referring now to FIG. 4, there is shown a block diagram illustrating the hardware used in a tunable white light engine having more LED arrays than driver channels. An interface current channel circuit can be used to convert the two current channels of a dual channel driver 402 into three drive channels to achieve two-stage linear color temperature tunability near the BBL 106 .

In one embodiment, the interface current channel circuit may be mounted on a converter printed circuit board (PCB) 404 between the dual channel driver 402 and an LED board 406 . Dual channel driver The driver 402 may be a conventional LED driver known in the art. The interface current channel circuit can allow the dual channel driver 402 to be used in applications requiring two LED arrays as well as applications with three LED arrays. Since the same dual channel driver 402 can be used in both cases, circuit complexity, size and cost can be reduced.

It should be noted that although Figure 3 shows an interface channel circuit that can be used to use a dual channel driver to power one of three LED arrays, the principles to be described below can be applied to one of the drivers used to power more LEDs than the number of output channels. Any configuration of the array. Additionally, although the following description refers to the tunability of LED arrays with different CCTs, those skilled in the art will appreciate that the embodiments described herein can be applied to any desired tunability range, such as color range, infrared (IR) range and ultraviolet (UV) range.

As will be described in more detail below, an interface current channel circuit mounted on the converter PCB 404 enables the dual channel driver 402 to power two LED arrays at the ends of a desired tunable range and approximately in the middle of the desired tunable range One of the extra LED arrays. A first LED array 408 with a first CCT, a second LED array 410 with a second CCT, and a third LED array 412 with a third CCT can be mounted on the LED board 406 . A first channel 412 and a second channel 414 of the dual channel driver 402 may be connected to the PCB 404 by a first set of connections 416, such as wires or direct board-to-board connections. The first channel 412 and the second channel 414 may each have a positive output and a negative output.

Converter PCB 404 can provide three drive currents to LED board 406 through a second set of electrical connections 418, such as wires or direct board-to-board connections. The second set of electrical connections 418 may be connected to one or more solder joints 420 on the LED board 406 . The second set of electrical connections 418 may include three separate negative outputs for the first LED array 408 , the second LED array 410 , and the third LED array 412 . One of the LED+ outputs from the converter PCB 404 can be connected to one of the positive outputs of the dual-channel driver 402. out. The LED+ output can be connected to the anode terminals of the first LED array 408 , the second LED array 410 and the third LED array 412 .

I2，則I_WW=I1-I2，I_NW=2×I2，I_CW=0 方程式(1) The mathematical relationship between the input and output of the interface current channel circuit is described herein. In the following equations, a first input current may be I1 and a second input current may be I2. The output current of a warm white (WW) LED may be I _WW , the output current of a neutral white (NW) LED may be I _NW , and the output current of a cool white (CW) LED may be I _CW . The relationship can be defined as follows: If I1

I2, then I _WW =I1-I2, I _NW =2×I2, I _CW =0 Equation (1)

Otherwise I _WW =0, I _NW =2×I1, I _CW =I2-I1 Equation (2)

If I1>I2, the WW channel can receive a current equal to the difference between I1 and I2, and the NW channel can receive twice the current of I2. The sum of I _WW and I _NW may still be I1+I2. It should be noted that the actual sum will be slightly less than I1+I2 because part of the total current is used to power the interface current channel circuit.

If current I1 is 0 and I1 corresponds to a WW LED, then all current I2 will flow to the CW LED and no current to the WW LED or NW LED. Likewise, if current I2 is 0 and I2 corresponds to a CW LED, then all current I1 will flow to the WW LED and no current will flow to the CW LED or NW LED.

Referring now to FIG. 5, a circuit diagram of an interface current channel circuit is shown. The interface current channel circuit utilizes various analog techniques such as voltage sensing, low pass filtering and analog signal subtraction. All voltages shown in the figures refer to ground. The converter PCB can use a voltage controlled current source to control the current flowing through the WW LEDs and CW LEDs. Additionally, the converter PCB can perform ON/OFF only control of the current flowing through the NW LEDs. WW LEDs and CW LEDs can have CCTs at the ends of a desired tunable range. The NW LED may have a CCT positioned approximately in the middle of the desired tunable range.

The first input current I1 can be connected to a first sense resistor (Rs) 502 . The second input current I2 can be connected to a second Rs 504 . The first Rs 502 and the second Rs 504 may have the same resistance value. A first diode D1 506 prevents the injection of the first input current I1 into the second input current I2. A second diode D2 508 prevents the injection of the second input current I2 into the first input current I1. The first Rs 502 and the second Rs 504 can share a common terminal _Vc , which can be connected to a first LED string 510 including WW LEDs, a second LED string 512 including NW LEDs, and a third LED string including CW LEDs Anode of LED string 514 . The voltages Va and _Vb represent the current flowing through the first Rs 502 and the second Rs 504 according to _a common mode component (which is the voltage _Vc ).

As shown in a first operational circuit 560 , the voltage V _b may be attenuated by a resistive divider including a first resistor ( R1 ) 516 and a second resistor ( R2 ) 518 . The resulting signal can be sent through a first low pass filter (LPF) 520 to generate _Vbb in a low voltage domain. V _bb can be defined as follows: V _bb = LPF ( V _b × α ) Equation (3) where α is an attenuation factor, which can be defined as follows:

As shown in a second operational circuit 562 , the voltage Va may be attenuated by _a resistive divider including a first resistor ( R1 ) 522 and a second resistor ( R2 ) 524 . In one embodiment, the first resistor (R1) 522 may have the same value as the first resistor (R1) 516 and the second resistor (R2) 524 may have the same value as the second resistor (R2) 518. value. The resulting signal can be sent through a second LPF 526 to generate _Vaa in a low voltage domain. In one embodiment, the second LPF 526 may perform the same operations as the first LPF 520 . _Vaa can be defined as follows: _{Vaa =} LPF ( V a × α ) Equation (5) where α is the attenuation factor defined in Equation (4) above.

_Vbb may be fed to a first operational amplifier (opamp) 528 configured to perform the subtraction between _Vbb and _Vaa . The output of the first opamp 528 may be V _WW . V _WW can be defined as follows: V _WW =( V _aa - V _bb ) × β equation (6) where β = R4/R3 equation (7)

V _WW can also be defined as follows: V _WW = ( I 1 - I 2 ) × R _S × α × β Equation (8)

Therefore, the current I _WW can be defined as follows: I _WW = V _WW / R = (I 1 -I 2 ) × α × β × R _S / R Equation (9)

When α*β/R is equal to the value of 1/Rs, the current I _WW will be equal to I1-I2.

_Vaa may be fed to a second opamp 530 that is configured to perform the subtraction between _Vaa and _Vbb . The output of the second opamp 530 may be V _CW . V _CW can be defined as follows: V _CW =( V _bb − Vaa )× _β Equation (10) where β is as defined in Equation (7) above. In one embodiment, R3 and R4 in the first operation circuit 560 and the second operation circuit 562 may have the same value.

V _CW can also be defined as follows: V _CW =( I 2 - I 1) × R _S × α × β Equation (11)

Therefore, the current I _WW can be defined as follows: I _CW = V _CW / R = ( I 2 - I 1) × α × β × R _S / R Equation (12)

When α*β/R is equal to the value of 1/Rs, the current I _CW will be equal to I2-I1.

V _WW may be fed to a voltage controlled current source which may be implemented by a first amplifier (amp) 536 . The first amp 536 can output a voltage V _g1 . The voltage V _g1 can be input to a first transistor M1 for providing a driving current to the first LED string 510 . The first transistor M1 can be a conventional metal oxide semiconductor field effect transistor (MOSFET). The first transistor M1 can be an n-channel MOSFET.

The first amp 536 can adjust the voltage V _g1 in a closed loop such that the current flowing through the first transistor M1 is equal to V _WW /Rs. In a closed loop regulation, the inputs to the first amp 536 can be very close to each other. The first amp 536 may compare the value of _VWW to the sense voltage across Rs 564 at the source of the first transistor M1. The Rs 564 may have the same resistance value as the first Rs 502 and/or the second Rs 504 . If the sense voltage is lower than V _WW , the first amp 536 may raise V _g1 to increase the current in the first transistor M1 until the sense voltage is approximately equal to V _WW . Likewise, if the sense voltage is higher than V _WW , the first amp 536 can reduce V _g1 , which can reduce the current in the first transistor M1 .

V _CW can be fed to a voltage controlled current source which can be implemented by a second amp 538 . The second amp 538 can output a voltage V _g2 . The voltage V _g2 can be input to a third transistor M3 for providing a driving current to the third LED string 514 . The third transistor M3 can be a conventional metal oxide semiconductor field effect transistor (MOSFET). The third transistor M3 can be an n-channel MOSFET.

The second amp 538 can adjust the voltage V _g2 in a closed loop such that the current flowing through the third transistor M3 is equal to V _CW /Rs. In a closed loop regulation, the inputs to the second amp 538 can be very close to each other. The second amp 538 may compare the value of V _CW to the sense voltage across Rs 566 at the source of the third transistor M3. The Rs 566 may have the same resistance value as the first Rs 502 and/or the second Rs 504 . If the sense voltage is lower than V _CW , the second amp 538 may raise V _g2 to increase the current in the third transistor M3 until the sense voltage is approximately equal to V _CW . Likewise, if the sense voltage is higher than V _CW , the second amp 538 can reduce V _g2 , which can reduce the current in the third transistor M3 .

When the difference between the input of the first amp 536 and the input of the second amp 538 is negative, the output of the first amp 536 and the output of the second amp 538 may be clamped to zero.

A second transistor M2 can control the power to the second LED string 512 . The second transistor M2 can be a conventional metal oxide semiconductor field effect transistor (MOSFET). The second transistor M2 can be an n-channel MOSFET. The second transistor M2 may only be turned on when both the first input current I1 and the second input current I2 are in regulation. The second transistor M2 may have a pull-up resistor (R7) 544 connected to Vc. Pull-up resistor (R7) 544 can be tied to node Vc because the low voltage supply VDD may not be available at startup. Therefore, the first transistor M1 and the third transistor M3 will be in an off state. If the second transistor M2 (which provides a drive current to the second LED string 512) is also turned off, the entire circuit will appear as a circuit disconnected from the current source. This can trigger open circuit protection and result in a no-start condition. Connecting the gate of M2 to node Vc provides a current path available at startup.

The currents generated by the voltage-controlled current sources of the first LED string 510 and the third LED string 514 may be slightly larger than the absolute value of (I1-I2). This ensures that the second LED string 512 switches off when either I1 or I2 is carrying zero current. In other words, at either end of the desired tuning range, only one LED string can be turned on at a time.

The AND logic of switching transistors may be implemented by gate control block 532 . The gate control block 532 takes advantage of the fact that the output of the first amp 536 (V _g1 ) and the output of the second amp 538 (V _g2 ) in a voltage controlled current source can swing to their supply rails (V g2 ) when regulation cannot be maintained ( VDD). VDD may be selected in such a way that the voltages V _g1 and V _g2 are significantly lower than VDD when the first amp 536 and the second amp 538 are in regulation under all operating conditions.

V _g1 may be attenuated by a resistive divider including a first resistor ( R5 ) 540 and a second resistor ( R6 ) 542 and then fed to a REF input of a first shunt regulator 570 . V _g2 can be attenuated by a resistive divider including a first resistor ( R5 ) 574 and a second resistor ( R6 ) 576 and then fed to a REF input of a second shunt regulator 572 . In one embodiment, the first resistor ( R5 ) 540 and the second resistor ( R6 ) 542 may have the same value as the first resistor ( R5 ) 574 and the second resistor ( R6 ) 576 . The first shunt regulator 570 and the second shunt regulator 572 may have an internal reference voltage of 2.5V. The first shunt regulator 570 and the second shunt regulator 572 may draw a large current when the voltage applied at their REF node is higher than 2.5V. When the voltage applied at their REF node is lower than 2.5V, the first shunt regulator 570 and the second shunt regulator 572 can draw a very small quiescent current.

The large current draw can pull down the gate voltage of the second transistor M2 to a level below its threshold, which can turn off the second transistor M2. The first shunt regulator 570 and the second shunt regulator 572 may not be able to pull their cathodes, which are greater than a diode's _Vf , below their REF nodes. Therefore, the second transistor M2 may have a threshold voltage higher than 2V. Alternatively, a shunt regulator with a lower internal reference voltage (such as 1.5V) can be used.

If V _g1 and V _g2 will be a maximum value of about 3V, then VDD can be set to 5V and the attenuation factor α can be set to 0.6. When the first amp 536 and the second amp 538 are in regulation, the voltage presented at the REF node of the shunt regulator will be a maximum value of 1.8V, the shunt regulator can draw a minimum current and the second transistor The gate of M2 can be pulled high towards VDD. If either the first amp 536 or the second amp 538 is not in regulation, the shunt regulator may turn off the NMOS.

It should be noted that the well-known structures shown in FIG. 5 (which include one or more resistors, diodes, and capacitors) and processing steps have not been described in detail so as not to obscure the embodiments described herein.

Referring now to FIG. 6, there is shown a schematic diagram for providing one or more of the LED arrays A flow diagram of one method of two-step linear CCT tunability. In step 602 , a first input current I1 may be received from the first channel 412 of the dual-channel LED driver 402 . In step 604 , a second input current I2 may be received from the second channel 414 of the dual-channel LED driver 402 . In step 606, a ratio of the first input current I1 to the second input current I2 may be determined. In step 608, the first input current I1 and the second input current I2 may be converted into a first output current, a second output current and a third output current based on the ratio. In step 610, a first output current may be provided to a first LED array 510 of a CCT at approximately one end having a desired CCT range, and a second output current may be provided at approximately an opposite end having a desired CCT range A second LED array 512 of a CCT and can provide a third output current to a third LED array 514 of a CCT approximately in the middle of a desired CCT range.

The method shown in FIG. 6 may be performed by an interface current channel circuit. The interface current channel circuit may include a first sense resistor 502 for sensing a first input voltage from a first input current I1 from a first channel 412 of a dual-channel LED driver 402 . A second sense resistor 504 can sense a second input voltage from a second input current I2 of a second channel 414 of the dual-channel LED driver 402 . The first sense resistor 502 and the second sense resistor 504 are connected to a common node V _c . A first arithmetic circuit 560 can be configured to subtract the second input voltage from the first input voltage to generate a first output voltage to power a first LED array with a CCT at approximately one end of a desired CCT range 510. A second arithmetic circuit 562 can be configured to subtract the first input voltage from the second input voltage to generate a second output voltage to power a second LED array with a CCT at the substantially opposite end of the desired CCT range 512. If both the first input current I1 and the second input current I2 are in regulation, a gate control block 532 can be configured to generate a third output voltage to power a circuit having a desired CCT range approximately in the middle A third LED array 514 for a CCT.

Although features and elements are described above in particular combinations, it will be understood by those of ordinary skill that each feature or element can be used alone or in any combination with other features and elements. Additionally, the methods described herein can be implemented in a computer program, software, or firmware incorporated in a computer-readable medium for execution by a computer or processor. Examples of computer-readable media include electronic signals (transmitted over wired or wireless connections) and computer-readable storage media. Examples of computer-readable storage media include, but are not limited to, read only memory (ROM), random access memory (RAM), scratchpad memory, cache memory, semiconductor memory devices, magnetic media (such as internal hard drives) discs and removable disks), magneto-optical media, and optical media such as CD-ROMs and digital versatile discs (DVDs).

502: First sense resistor (Rs)

504: Second Rs

506: First diode (D1)

508: Second diode (D2)

510: First Light Emitting Diode (LED) String

512: Second LED string

514: Third LED string

516: First resistor (R1)

518: Second resistor (R2)

520: First Low Pass Filter (LPF)

522: First resistor (R1)

524: Second resistor (R2)

526: Second LPF

528: first operational amplifier (opamp)

530: Second opamp

532: Gate control block

536: First amplifier (amp)

538: Second amp

540: First resistor (R5)

542: Second resistor (R6)

544: Pull-up resistor (R7)

560: The first arithmetic circuit

562: Second arithmetic circuit

564: Rs

566: Rs

570: First Shunt Regulator

572: Second Shunt Regulator

574: First resistor (R5)

576: Second resistor (R6)

I1: The first input current

I2: The second input current

M1: first transistor

M2: second transistor

M3: The third transistor

V _a : Voltage

V _aa : Voltage

V _b : Voltage

V _bb : Voltage

V _c : voltage/node

V _CW : Voltage

V _g1 : Voltage

V _g2 : Voltage

V _WW : Voltage

VDD: voltage supply

Claims (17)

An interface current channel circuit comprising: a first input terminal configured to receive a first current having a first current level from a first current channel; a second input terminal configured to receive a second current having a second current level from a second current channel; a first current generator configured to provide a first drive current at the first current a level greater than the second current level and equal to a first condition other than zero having a level equal to the first current level minus the second current level; a second current generator, It is configured to provide a second drive current having under a second condition that the first current level is greater than the second current level and which is equal to twice the first current level a level equal to twice the second current level; and a controller configured to provide a third drive current that is greater than the second current level at the first current level And it is equal to the second current level minus a level equal to zero under a third condition other than the first current level. The circuit of claim 1, further comprising a circuit board, the circuit board comprising the first input terminal and the second input terminal, and the first current generator, the second current generator and the controller are disposed in on the board. The circuit of claim 1, wherein the first current generator comprises at least: a first circuit electrically coupled to receive a first input voltage based on the first current and to provide a first input voltage based on the first input voltage an output voltage; and a first voltage-controlled current source electrically coupled to receive the first output voltage and provide the first drive current based on a level of the first output voltage. 3. The circuit of claim 3, wherein the second current generator comprises at least: a second circuit electrically coupled to receive a second input voltage based on the second current and provide a first input voltage based on the second input voltage two output voltages; and a second voltage-controlled current source electrically coupled to receive the second output voltage and provide the second drive current based on a level of the second output voltage. The circuit of claim 4, wherein the controller is configured to be based on the level of the first input voltage and under a condition that both the level of the first current and the level of the second current are greater than zero The level of the second input voltage provides the third driving current with a level. The circuit of claim 1, wherein the controller includes a switch and gate control logic, the gate control logic configured to open the switch in response to the first current level and the second current level Both are greater than the condition of zero, otherwise the switch is turned off. A light emitting diode (LED) lighting system comprising: a first LED array configured to emit light having a first correlated color temperature (CCT) at a first end of a first range; a second LED array configured to emit light with a second CCT at a second end of the first range; a third LED array configured to emit light with a second CCT at the first CCT and the light of a third CCT in a range between the second CCT; a dual channel LED driver having two output terminals configured to be at each of the two output terminals providing a separate drive current; and a converter circuit having two input terminals and three output terminals, each of the two input terminals being electrically coupled to each of the two output terminals of the dual-channel LED driver (a respective one), each of the three output terminals is electrically coupled to an individual one of the first LED array, the second LED array and the third LED array via respective first drive channels, second drive channels and a third drive channel to provide a separate drive current to each of the first LED array, the second LED array, and the third LED array, the converter circuit comprising: a first arithmetic circuit electrically coupled to receive a first voltage based on a first drive current of the dual channel LED driver and configured to provide a first output voltage having a level equal to a second input the level of the voltage minus the level of a first input voltage; a second arithmetic circuit electrically coupled to receive a second input voltage based on a second drive current of the dual-channel LED driver, and configured to provide a second output voltage with a level, the level of the second output voltage is equal to the level of the first input voltage minus the level of the second input voltage; a first current generator, which is configured to generate a first drive current with a level based on the level of the first output voltage; a second current generator configured to generate a second drive current having a level based on the level of the second output voltage; and a control circuit configured to generate a second drive current at the first drive current A third drive with a level is provided based on the level of the first input voltage and the level of the second input voltage under a condition that both the level of the second input voltage and the level of the second drive current are greater than zero current. The system of claim 7, further comprising: a first circuit board, at least the first LED array, the second LED array and the third LED array are disposed on the first circuit board; and a second circuit board , the converter circuit is arranged on the second circuit board. The system of claim 7, wherein the first CCT corresponds to warm white light, the second CCT corresponds to cool white light, and the third CCT corresponds to neutral white light. The system of claim 7, wherein the first drive current, the second drive current and the third drive current adjust a light of an individual of the first LED array, the second LED array and the third LED array The brightness of the output to control a composite light output of the system in a tuning range between 2700K and 6500K. The system of claim 7, wherein the first operational circuit comprises: a first voltage divider resistor configured to attenuate the first input voltage; a first low pass filter configured to filter the the attenuated first input voltage; and a first operational amplifier. The system of claim 7, wherein the second operational circuit comprises: a second voltage divider resistor configured to attenuate the first input voltage; a second low pass filter configured to filter the the attenuated first input voltage; and a second operational amplifier. The system of claim 7, wherein under a condition that a difference between the first input voltage and the second input voltage is negative, the first operational circuit is configured to reduce the first output voltage to about zero. The system of claim 7, wherein under a condition that a difference between the second input voltage and the first input voltage is negative, the second arithmetic circuit is configured to reduce the second output voltage to about zero. A light emitting diode (LED) device comprising: a dual channel LED driver having two output terminals, the dual channel LED driver configured to provide a separate drive current at each of the two output terminals ; and a converter circuit having two input terminals and three output terminals, each of the two input terminals being electrically coupled to each of the two output terminals of the dual-channel LED driver, the three output terminals Each of the terminals is configured to provide an individual LED drive current, a first of the two input terminals of the converter circuit is configured to be first from one of the two output terminals of the dual channel LED driver the receiver has a first current level standard a first current, and a second one of the two input terminals of the converter circuit is configured to receive a second current from a second one of the two output terminals of the dual channel LED driver a second current level, the converter circuit further comprising: a first current generator configured to provide a first drive current that is greater than the second current level at the first current level a current level having a level equal to the first current level minus the second current level at a condition other than zero, a second current generator configured to provide a second drive current , the second drive current has a level equal to twice the second current level under a condition that the first current level is greater than the second current level and equal to twice the first current level , and a controller configured to provide a third drive current greater than the second current level at the first current level and equal to the second current level minus the first current level Has a level equal to zero under a condition other than a current level. The apparatus of claim 15, further comprising a circuit board, the circuit board including the first input terminal and the second input terminal, and the first current generator, the second current generator and the controller are disposed in on the board. 16. The apparatus of claim 15, wherein the converter circuit comprises: a first operational circuit electrically coupled to receive a first voltage based on a first drive current of the dual channel LED driver and configured to provide A first output voltage with a level equal to the level of a second input voltage minus the level of the first output voltage a level of a first input voltage; a second operational circuit electrically coupled to receive a second voltage based on a second drive current of the dual-channel LED driver, and configured to provide a level with a a second output voltage having a level equal to the level of the first input voltage minus the level of the second input voltage; a first current generator configured to be based on the first an output voltage level to generate the first drive current with a level; a second current generator configured to generate the second drive current with a level based on the second output voltage level drive current; and a control circuit configured to be based on the level of the first input voltage and under a condition that both the level of the first input voltage and the level of the second input voltage are greater than zero The level of the second input voltage provides a third driving current with a level.

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