TWI755470B - Conductive film, optoelectronic semiconductor device and manufacturing method of the same - Google Patents
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- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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Abstract
Description
本發明係關於一種垂直方向導電薄膜、光電半導體裝置及其製造方法。 The present invention relates to a vertical conductive film, an optoelectronic semiconductor device and a manufacturing method thereof.
由微發光二極體(Micro LED,μLED)所組成的微發光二極體陣列(Micro LED Array)顯示器,相較於傳統例如液晶顯示器而言,其因無需額外的背光光源,更有助於達成輕量化及薄型化等目的。 The Micro LED Array (Micro LED Array) display composed of Micro Light Emitting Diodes (Micro LED, μLED) is more helpful than the traditional liquid crystal display because it does not need an additional backlight light source. Achieve lightweight and thinning purposes.
傳統發光二極體(邊長大於150微米以上)在製造光電裝置的過程中,是以磊晶(Epitaxy)、黃光、鍍金屬、蝕刻等製程製作發光二極體之後,經切割得到一顆一顆的發光二極體晶粒,並利用打線接合或共晶接合使發光二極體的電極與電路基板電連接。但是,對於微發光二極體而言,由於尺寸相當小(例如只有25微米或更小),無法以傳統的打線接合或共晶接合的設備進行電極的電連接。 In the process of manufacturing optoelectronic devices, traditional light-emitting diodes (side lengths greater than 150 microns) are produced by epitaxy, yellow light, metal plating, etching and other processes, and then cut to obtain a light-emitting diode. One light-emitting diode die, and the electrode of the light-emitting diode is electrically connected with the circuit substrate by wire bonding or eutectic bonding. However, for micro light emitting diodes, due to the relatively small size (eg, only 25 microns or less), the electrical connection of the electrodes cannot be made with conventional wire bonding or eutectic bonding equipment.
有鑑於上述,本發明的目的為提供一種導電薄膜、光電半導體裝置及其製造方法,可解決因微尺寸半導電元件的尺寸太小而無法以傳統的打線或共晶接合製程進行電連接的問題。 In view of the above, the purpose of the present invention is to provide a conductive film, an optoelectronic semiconductor device and a manufacturing method thereof, which can solve the problem that the size of the micro-sized semiconducting element is too small to be electrically connected by the traditional wire bonding or eutectic bonding process. .
為達上述目的,依據本發明之一種導電薄膜,與至少一微尺寸半導體元件及一矩陣基板配合應用,矩陣基板具有一基材及一矩陣電路,矩陣電路設置於基材上,導電薄膜包括一第一膜層以及一第二膜層。第一膜層設置於矩陣電路上,並具有多個導電粒子與一絕緣材料,絕緣材料具有黏著性,且該些導電粒子混合於絕緣材料中。第二膜層為絕緣層並 具有黏著性,且設置於第一膜層上;其中,至少部分微尺寸半導體元件位於導電薄膜內,並具有至少一電極,電極藉由部分該些導電粒子於矩陣基板的垂直方向上與矩陣電路電性連接。 In order to achieve the above purpose, a conductive film according to the present invention is used in conjunction with at least one micro-sized semiconductor element and a matrix substrate, the matrix substrate has a base material and a matrix circuit, the matrix circuit is arranged on the base material, and the conductive film includes a a first film layer and a second film layer. The first film layer is arranged on the matrix circuit, and has a plurality of conductive particles and an insulating material, the insulating material has adhesiveness, and the conductive particles are mixed in the insulating material. The second film layer is an insulating layer and It has adhesiveness and is arranged on the first film layer; wherein, at least part of the micro-sized semiconductor elements are located in the conductive film and have at least one electrode, and the electrode is connected to the matrix circuit in the vertical direction of the matrix substrate through some of the conductive particles Electrical connection.
為達上述目的,依據本發明之一種光電半導體裝置,包括一矩陣基板、一導電薄膜以及至少一微尺寸半導體元件。矩陣基板具有一基材及一矩陣電路,矩陣電路設置於基材上。導電薄膜包括一第一膜層及一第二膜層。第一膜層設置於矩陣電路上,並具有多個導電粒子與一絕緣材料,絕緣材料具有黏著性,且該些導電粒子混合於絕緣材料中。第二膜層為絕緣層並具有黏著性,且設置於第一膜層上。微尺寸半導體元件至少部分設置於導電薄膜內,微尺寸半導體元件具有至少一電極,電極藉由部分該些導電粒子於矩陣基板的垂直方向上與矩陣電路電性連接。 In order to achieve the above object, an optoelectronic semiconductor device according to the present invention includes a matrix substrate, a conductive film and at least one micro-sized semiconductor element. The matrix substrate has a base material and a matrix circuit, and the matrix circuit is arranged on the base material. The conductive film includes a first film layer and a second film layer. The first film layer is arranged on the matrix circuit, and has a plurality of conductive particles and an insulating material, the insulating material has adhesiveness, and the conductive particles are mixed in the insulating material. The second film layer is an insulating layer and has adhesiveness, and is disposed on the first film layer. The micro-sized semiconductor element is at least partially disposed in the conductive film, the micro-sized semiconductor element has at least one electrode, and the electrode is electrically connected with the matrix circuit in the vertical direction of the matrix substrate through some of the conductive particles.
在一實施例中,於室溫時,第二膜層的流動性與黏著性皆大於第一膜層,第二膜層的硬度小於第一膜層的硬度。 In one embodiment, at room temperature, the fluidity and adhesion of the second film layer are greater than those of the first film layer, and the hardness of the second film layer is smaller than that of the first film layer.
在一實施例中,第一膜層的厚度介於2.5微米與3.5微米之間,第二膜層的厚度介於2微米與4微米之間,且導電薄膜的總厚度不大於6.5微米。 In one embodiment, the thickness of the first film layer is between 2.5 μm and 3.5 μm, the thickness of the second film layer is between 2 μm and 4 μm, and the total thickness of the conductive film is not greater than 6.5 μm.
在一實施例中,第二膜層在25℃至50℃之間對玻璃的黏著力大於1100克/平方公分。 In one embodiment, the adhesion of the second film layer to glass between 25°C and 50°C is greater than 1100 g/cm 2 .
在一實施例中,第一膜層與第二膜層在60℃經過4分鐘皆不會固化。 In one embodiment, neither the first film layer nor the second film layer is cured at 60° C. for 4 minutes.
在一實施例中,微尺寸半導體元件的邊長尺寸小於等於150微米。 In one embodiment, the side length dimension of the micro-sized semiconductor device is less than or equal to 150 microns.
為達上述目的,依據本發明之一種光電半導體裝置的製造方法,包括:提供一矩陣基板,其中矩陣基板包括一基材與一矩陣電路,矩陣電路設置於基材上;提供一導電薄膜貼合在矩陣電路上,其中導電薄膜包括一第一膜層及一第二膜層,第一膜層設置於矩陣電路上,並具有多個導電粒子與一絕緣材料,絕緣材料具有黏著性,且該些導電粒子混合於絕緣材料中,第二膜層為絕緣層並具有黏著性,且並設置於第一膜層上;設置至少一微尺寸半導體元件於第二膜層上,其中微尺寸半導體元件的至少 一電極面向第二膜層;在一第一溫度下以一第一壓力將微尺寸半導體元件由第二膜層壓向第一膜層之該些導電粒子並持續一第一時間;將溫度提昇至一第二溫度,同時在不卸壓的情況下將壓力提昇至一第二壓力並持續一第二時間;以及使第一膜層及第二膜層固化,進而使微尺寸半導體元件的電極藉由部分該些導電粒子於矩陣基板的垂直方向上與矩陣電路電性連接。 In order to achieve the above object, a method for manufacturing an optoelectronic semiconductor device according to the present invention includes: providing a matrix substrate, wherein the matrix substrate includes a base material and a matrix circuit, and the matrix circuit is arranged on the base material; On the matrix circuit, the conductive film includes a first film layer and a second film layer, the first film layer is disposed on the matrix circuit, and has a plurality of conductive particles and an insulating material, the insulating material has adhesion, and the Some conductive particles are mixed in the insulating material, the second film layer is an insulating layer and has adhesiveness, and is arranged on the first film layer; at least one micro-sized semiconductor element is arranged on the second film layer, wherein the micro-sized semiconductor element of at least An electrode faces the second film layer; at a first temperature, with a first pressure, the micro-sized semiconductor element is pressed from the second film layer to the conductive particles of the first film layer for a first time; the temperature is raised to a second temperature, while raising the pressure to a second pressure for a second time without depressurizing; and curing the first film layer and the second film layer, thereby making the electrodes of the microscale semiconductor element A part of the conductive particles are electrically connected with the matrix circuit in the vertical direction of the matrix substrate.
在一實施例中,第一溫度的範圍介於50℃與80℃之間,第一壓力介於1MPa與10MPa之間,第一時間介於5秒與40秒之間。 In one embodiment, the range of the first temperature is between 50° C. and 80° C., the first pressure is between 1 MPa and 10 MPa, and the first time is between 5 seconds and 40 seconds.
在一實施例中,第二溫度的範圍介於140℃與200℃之間,第二壓力介於50MPa與100MPa之間,第二時間介於5秒與60秒之間。 In one embodiment, the second temperature ranges between 140° C. and 200° C., the second pressure is between 50 MPa and 100 MPa, and the second time is between 5 seconds and 60 seconds.
承上所述,在本發明之導電薄膜、光電半導體裝置及其製造方法中,是利用垂直方向的導電薄膜使微尺寸半導體元件的電極可與矩陣電路電性連接,因此,可解決因微尺寸半導電元件的尺寸太小而無法以傳統的打線或共晶接合製程與矩陣電路的電連接的問題。此外,相較於習知轉置與接合技術而言,本發明的光電半導體裝置的製程也較簡單且快速,而且可依據設計需求而應用於不同的領域上,同時也具有較低製造時間與成本。 Based on the above, in the conductive thin film, optoelectronic semiconductor device and manufacturing method thereof of the present invention, the conductive thin film in the vertical direction is used to electrically connect the electrodes of the micro-sized semiconductor element with the matrix circuit, so the problem of The problem with the size of the semiconducting elements is too small to be electrically connected to the matrix circuit by conventional wire bonding or eutectic bonding processes. In addition, compared with the conventional transposition and bonding technology, the fabrication process of the optoelectronic semiconductor device of the present invention is also simpler and faster, and can be applied to different fields according to design requirements, and also has lower manufacturing time and cost. cost.
1、1a‧‧‧光電半導體裝置 1. 1a‧‧‧Optoelectronic semiconductor devices
11‧‧‧矩陣基板 11‧‧‧Matrix substrate
111‧‧‧基材 111‧‧‧Substrate
112‧‧‧矩陣電路 112‧‧‧Matrix Circuits
12‧‧‧導電薄膜 12‧‧‧Conductive film
121‧‧‧第一膜層 121‧‧‧First film layer
1211‧‧‧導電粒子 1211‧‧‧Conductive particles
1212‧‧‧絕緣材料 1212‧‧‧Insulating material
122‧‧‧第二膜層 122‧‧‧Second film
13、13a‧‧‧微尺寸半導體元件 13. 13a‧‧‧Micro-sized semiconductor components
D1、D2‧‧‧電性連接墊 D1, D2‧‧‧Electrical connection pad
E1、E2‧‧‧電極 E1, E2‧‧‧electrode
P1‧‧‧第一壓力 P1‧‧‧First Pressure
P2‧‧‧第二壓力 P2‧‧‧Second pressure
S01至S06‧‧‧步驟 Steps S01 to S06‧‧‧
圖1為本發明較佳實施例之一種光電半導體裝置製造方法的流程步驟示意圖。 FIG. 1 is a schematic flow chart of a method for manufacturing an optoelectronic semiconductor device according to a preferred embodiment of the present invention.
圖2A至圖2F分別為本發明一實施例之一種光電半導體裝置的製造過程示意圖。 2A to 2F are schematic diagrams of a manufacturing process of an optoelectronic semiconductor device according to an embodiment of the present invention, respectively.
圖3為本發明另一實施例的光電半導體裝置的示意圖。 FIG. 3 is a schematic diagram of an optoelectronic semiconductor device according to another embodiment of the present invention.
以下將參照相關圖式,說明依本發明較佳實施例之導電薄膜、光電半導體裝置及其製造方法,其中相同的元件將以相同的參照符號加以說明。 The conductive thin film, the optoelectronic semiconductor device and the manufacturing method thereof according to the preferred embodiments of the present invention will be described below with reference to the related drawings, wherein the same components will be described with the same reference symbols.
本發明所述的「光電半導體裝置」,可應用於顯示面板、廣告看板、感測裝置、半導體裝置或照明裝置等等,若光電半導體裝置為顯示器時,其可為單色或全彩顯示器。請參照圖1所示,其為本發明較佳實施例之一種光電半導體裝置製造方法的流程步驟示意圖。 The "optoelectronic semiconductor device" of the present invention can be applied to display panels, billboards, sensing devices, semiconductor devices or lighting devices, etc. If the optoelectronic semiconductor device is a display, it can be a monochrome or full-color display. Please refer to FIG. 1 , which is a schematic flow chart of a method for manufacturing an optoelectronic semiconductor device according to a preferred embodiment of the present invention.
如圖1所示,本發明的光電半導體裝置製造方法可包括:提供一矩陣基板,其中矩陣基板包括一基材與一矩陣電路,矩陣電路設置於基材上(步驟S01);提供一導電薄膜貼合在矩陣電路上,其中導電薄膜包括一第一膜層及一第二膜層,第一膜層設置於矩陣電路上,並具有多個導電粒子與一絕緣材料,該些導電粒子混合於絕緣材料中,且第二膜層為絕緣層並設置於第一膜層上(步驟S02);設置至少一微尺寸半導體元件於第二膜層上,其中微尺寸半導體元件的至少一電極面向第二膜層(步驟S03);在一第一溫度下以一第一壓力將微尺寸半導體元件由第二膜層壓向第一膜層之該些導電粒子並持續一第一時間(步驟S04);之後,將溫度提昇至一第二溫度,同時在不卸壓的情況下將壓力提昇至一第二壓力並持續一第二時間(步驟S05);以及使第一膜層及第二膜層固化,進而使微尺寸半導體元件的電極藉由部分該些導電粒子於矩陣基板的垂直方向上與矩陣電路電性連接(步驟S06)。 As shown in FIG. 1 , the method for manufacturing an optoelectronic semiconductor device of the present invention may include: providing a matrix substrate, wherein the matrix substrate includes a substrate and a matrix circuit, and the matrix circuit is arranged on the substrate (step S01 ); providing a conductive film It is attached to the matrix circuit, wherein the conductive film includes a first film layer and a second film layer, the first film layer is arranged on the matrix circuit, and has a plurality of conductive particles and an insulating material, and the conductive particles are mixed in In the insulating material, and the second film layer is an insulating layer and is arranged on the first film layer (step S02); at least one micro-sized semiconductor element is arranged on the second film layer, wherein at least one electrode of the micro-sized semiconductor element faces the first film layer. Two film layers (step S03 ); at a first temperature and a first pressure, the micro-sized semiconductor element is laminated from the second film layer to the conductive particles of the first film layer for a first time (step S04 ) ; after that, raising the temperature to a second temperature, and at the same time raising the pressure to a second pressure without releasing the pressure for a second time (step S05); and making the first film layer and the second film layer After curing, the electrodes of the micro-sized semiconductor elements are electrically connected to the matrix circuit in the vertical direction of the matrix substrate through some of the conductive particles (step S06 ).
以下,請配合參照圖2A至圖2F,以說明上述步驟S01至步驟S06的詳細內容。其中,圖2A至圖2F分別為本發明一實施例之一種光電半導體裝置1的製造過程示意圖。
In the following, please refer to FIG. 2A to FIG. 2F to describe the details of the above steps S01 to S06 . 2A to 2F are schematic diagrams of a manufacturing process of an
如圖2A所示,首先,先提供一矩陣基板11,其中矩陣基板11包括一基材111與一矩陣電路112,矩陣電路112設置於基材111上(步驟S01)。基材111可為可透光材質,例如但不限於是玻璃、石英或類似物、塑膠、橡膠、玻璃纖維或其他高分子材料。基材111亦可為不透光材質,例如是金屬-玻璃纖維複合板、金屬-陶瓷複合板。另外,基材111也可以是硬板或軟板。軟板具有可撓性(Flexible),又稱可撓式基板,例如軟性電路板,其材料可包含有機高分子材料,並為熱塑性材料,例如但不限於為聚醯亞胺(PI)、聚乙烯(Polyethylene,PE)、聚氯乙烯(Polyvinylchloride,PVC)、聚苯乙烯(PS)、壓克力(丙烯,acrylic)、氟化聚合物(Fluoropolymer)、
聚酯纖維(polyester)或尼龍(nylon)等,在此不做任何限制。另外,本實施例的矩陣電路112可包含多個電性連接墊D1、D2,電性連接墊D1、D2可為一組,且間隔配置。此外,依照基材111上所佈設的矩陣電路112的形式,矩陣基板11可為主動矩陣(active matrix)基板,或是被動矩陣(passive matrix)基板。舉例而言,若矩陣基板11為液晶顯示裝置中的主動式矩陣基板(TFT基板)時,其可佈設有交錯的資料線、掃描線與多個主動元件(例如TFT)。由於矩陣電路112與驅動主動式矩陣基板的技術為習知技術,也不是本發明的重點,本領域技術人員可找到相關內容,於此不再進一步作說明。
As shown in FIG. 2A , first, a
接著,如圖2B所示,提供一導電薄膜12貼合在矩陣電路112上,其中導電薄膜12包括一第一膜層121及一第二膜層122,第一膜層121設置於矩陣電路112上,並具有多個導電粒子1211與一絕緣材料1212,該些導電粒子1211混合於絕緣材料1212中,且第二膜層122為絕緣層並設置於第一膜層121上(步驟S02)。其中,絕緣材料1212與第二膜層122皆具有黏著性,且在室溫時(例如25℃),第二膜層122的黏著性大於第一膜層121,而第二膜層122的硬度小於第一膜層121的硬度,且第二膜層122在25℃至50℃之間對玻璃的黏著力需大於1100克/平方公分。具體來說,第二膜層122的黏著性要比第一膜層121大,且第二膜層122也比第一膜層121軟,使得微尺寸半導體元件(圖2C)設置並壓入第二膜層122時,可以順利被導電膜層12捕捉(黏住)。另外,第一膜層121與第二膜層122在轉置的過程不會固化,例如在60℃經過4分鐘不會固化,這樣才可順利進行微尺寸半導電元件的黏著並轉置至導電膜層12的製程。此外,在一些實施例中,第一膜層121的厚度可介於2.5微米與3.5微米之間(2.5μm≦第一膜層121的厚度≦3.5μm),而第二膜層122的厚度可介於2微米與4微米之間(2μm≦第二膜層122的厚度≦4μm,且導電薄膜12的總厚度不大於6.5微米(即≦6.5μm)。
Next, as shown in FIG. 2B , a
在一些實施例中,第一膜層121的導電粒子1211可為金屬材料製成,而金屬材料可例如但不限於為金、銀、銅或錫,或其合金;或者,導電粒子1211也可以是金屬層包覆絕緣的彈性粒子,金屬層的材料例
如但不限於為鎳/金。在一些實施例中,第一膜層121的絕緣材料1212與第二膜層122可包含例如但不限於Epoxy膠或壓克力膠。在一些實施例中,第一膜層121與第二膜層122可為熱固化材料,因此在高溫情況下會固化定形。此外,本實施例的該些導電粒子1211在垂直矩陣基板11的方向(z方向)上是以接近同一水平度並且粒子相互不接觸排列在矩陣電路112上為例,但在不同的實施例中,該些導電粒子1211也可以是隨機方式位於絕緣材料1212內,本發明並不限制。
In some embodiments, the
接著,如圖2C所示,設置至少一微尺寸半導體元件13於第二膜層122上,其中微尺寸半導體元件13的至少一電極E1面向第二膜層122(步驟S03)。本實施例的各微尺寸半導體元件13分別包含兩個電極E1、E2,且是間隔設置多個微尺寸半導體元件13在第二膜層122上,使得該些微尺寸半導體元件13的電極E1、E2可分別對應於矩陣電路11上的該些電性連接墊D1、D2。其中,該些微尺寸半導體元件13可依需求而排列成一直行、或一橫列、或行與列的矩陣狀,或是排列成多邊形或不規則狀,並不限制。此外,各微尺寸半導體元件13的邊長尺寸小於等於150微米,例如可介於1微米與150微米之間(1μm≦邊長≦150μm)。在一些實施例中,微尺寸半導體元件13的尺寸可例如為25μm×25μm,而且相鄰兩個微尺寸半導體元件13的最小間距例如可為1微米,或1微米以下,本發明並不限制。
Next, as shown in FIG. 2C , at least one
此外,微尺寸半導體元件13可以為雙電極元件(例如但不限於發光二極體),也可以是三電極元件(例如電晶體)。本實施例是以微尺寸半導體元件13為微發光二極體(μLED)為例進行說明。其中,微發光二極體的電極可為p極與n極在同一側(水平結構),或是p極與n極分別位在上下兩側(上下導通型或垂直結構)。本實施例的微尺寸半導體元件13是以水平結構的μLED為例,且其兩個電極E1、E2分別對應矩陣電路112上的一對電性連接墊D1、D2。此外,若以顯色波長來分類,當微尺寸半導體元件13為μLED時,其可為藍光發光二極體、或紅光、綠光、紅外線或紫外光等發光二極體,或其組合。
In addition, the
接著,如圖2D所示,在一第一溫度下以一第一壓力P1將
微尺寸半導體元件13由第二膜層122壓向第一膜層121之該些導電粒子1211並持續一第一時間(步驟S04)。其中,第一溫度的範圍可介於50℃與80℃之間(50℃≦T1≦80℃),第一壓力P1可介於1MPa與10MPa之間(1MPa≦P1≦10MPa),且第一時間可介於5秒與40秒之間(5秒≦t1≦40秒)。在一些實施例中,第一溫度例如可為50℃。於此,第一溫度、第一壓力P1及第一時間可視製程情況而在上述範圍中調整。
Next, as shown in FIG. 2D, at a first temperature and a first pressure P1
The
當利用第一壓力P1將微尺寸半導體元件13壓向第一膜層121之該些導電粒子1211時,由於第一膜層121流動性低且小於第二膜層122,因此導電粒子1211將不易因擠壓而往兩側水平移動,使得在水平方向上,導電粒子1211並不會使兩電極E1、E2之間短路或導通,但是,會有部分的導電粒子1211夾置於電極E1、E2與電性連接墊D1、D2之間。
When the
接著,如圖2E所示,將溫度提昇至一第二溫度,同時在不卸壓的情況下將壓力提昇至一第二壓力P2並持續一第二時間(步驟S05)。於此,在不卸壓(第一壓力P1)的情況下將壓力提高至第二壓力P2(P2>P1),以持續對微尺寸半導體元件13施壓,使微尺寸半導體元件13的電極E1、E2可分別利用導電粒子1211與電性連接墊D1、D2接觸完全。在此同時,因第一膜層121與第二膜層122為熱固化材料,因此在高溫(第二溫度)的情況下,第一膜層121及第二膜層122會漸漸固化成形,使得導電膜層12可穩固地捉住(黏住)微尺寸半導體元件13,並使電極E1、E2可分別利用導電粒子1211完全地接觸到電性連接墊D1、D2而使兩者電性連接。
Next, as shown in FIG. 2E , the temperature is raised to a second temperature, and the pressure is raised to a second pressure P2 for a second time without depressurizing at the same time (step S05 ). Here, the pressure is increased to the second pressure P2 (P2>P1) without releasing the pressure (the first pressure P1), so as to continuously press the
在一些實施例中,第二溫度需140℃以上,其範圍例如可介於140℃與200℃之間(140℃≦T2≦200℃),而第二壓力P2可介於50MPa與100MPa之間(50MPa≦P2≦100MPa),且第二時間介於5秒與60秒之間(5秒≦t2≦60秒)。於此,第二溫度、第二壓力P2及第二時間可視製程情況而在上述範圍中調整。 In some embodiments, the second temperature needs to be above 140°C, the range of which may be, for example, between 140°C and 200°C (140°C≦T2≦200°C), and the second pressure P2 may be between 50MPa and 100MPa (50MPa≦P2≦100MPa), and the second time is between 5 seconds and 60 seconds (5 seconds≦t2≦60 seconds). Here, the second temperature, the second pressure P2 and the second time can be adjusted within the above ranges depending on the process conditions.
最後,如圖2F所示,經過一段時間(即經第二時間)後,使第一膜層121及第二膜層122固化,進而使微尺寸半導體元件13的電極E1藉由部分該些導電粒子1211於矩陣基板11的垂直方向上與矩陣電路112
電性連接(步驟S06)。
Finally, as shown in FIG. 2F , after a period of time (ie, a second period of time), the
因此,本實施例的光電半導體裝置1可包括一矩陣基板11、一導電薄膜12以及多個微尺寸半導體元件13。矩陣基板11具有一基材111及一矩陣電路112,矩陣電路112設置於基材111上。導電薄膜12包括一第一膜層121及一第二膜層122,第一膜層121設置於矩陣電路112上,並具有多個導電粒子1211與一絕緣材料1212,該些導電粒子1211混合於絕緣材料1212中,第二膜層122為絕緣層並設置於第一膜層121上。該些微尺寸半導體元件13至少部分設置於導電薄膜12內,其中,各微尺寸半導體元件13分別具有二電極E1、E2,電極E1、E2是藉由導電薄膜12的部分該些導電粒子1211於矩陣基板11的垂直方向上分別與矩陣電路112的電性連接墊D1、D2電性連接。
Therefore, the
承上,在本實施例的光電半導體裝置1中,是利用垂直方向的導電薄膜12使微尺寸半導體元件13的電極E1、E2可分別與矩陣電路112電性連接,因此,可解決因微尺寸半導電元件13的尺寸太小而無法以傳統的打線或共晶接合製程與矩陣電路的電連接的問題。此外,相較於習知轉置與接合技術而言,本實施例的光電半導體裝置1的製程也較簡單且快速,而且可依據設計需求而應用於不同的領域上,同時也具有較低製造時間與成本。此外,由於微尺寸半導體元件13的尺寸相當小,其設置密度可相當高,使得製得的光電半導體裝置1可具有比較高的解析度,故特別適用於製作高解析度的顯示器,例如VR或AR頭戴式顯示器。
Continuing from the above, in the
圖3為本發明另一實施例的光電半導體裝置1a的示意圖。如圖3所示,本實施例的光電半導體裝置1a與圖2F的光電半導體裝置1主要的不同在於,本實施例的微尺寸半導體元件13a是以垂直結構的μLED為例。因此,只有一個電極E1藉由導電薄膜12的部分導電粒子1211於矩陣基板11的垂直方向上與矩陣電路112電性連接(另一電極E2可通過其他製程與其他的電路進行電連接,並不限定)。此外,光電半導體裝置1a及其製造方法的其他技術特徵可參照光電半導體裝置1的相同元件及其製造方法,在此不再贅述。
FIG. 3 is a schematic diagram of an optoelectronic semiconductor device 1 a according to another embodiment of the present invention. As shown in FIG. 3 , the main difference between the optoelectronic semiconductor device 1 a of the present embodiment and the
綜上所述,在本發明之導電薄膜、光電半導體裝置及其製造 方法中,是利用垂直方向的導電薄膜使微尺寸半導體元件的電極可與矩陣電路電性連接,因此,可解決因微尺寸半導電元件的尺寸太小而無法以傳統的打線或共晶接合製程與矩陣電路的電連接的問題。此外,相較於習知轉置與接合技術而言,本發明的光電半導體裝置的製程也較簡單且快速,而且可依據設計需求而應用於不同的領域上,同時也具有較低製造時間與成本。 In summary, the conductive thin film, optoelectronic semiconductor device and manufacturing thereof of the present invention In the method, the electrode of the micro-sized semiconductor element can be electrically connected with the matrix circuit by using the conductive film in the vertical direction. Therefore, it can solve the problem that the size of the micro-sized semi-conductive element is too small to use the traditional wire bonding or eutectic bonding process. Problems with the electrical connection to the matrix circuit. In addition, compared with the conventional transposition and bonding technology, the fabrication process of the optoelectronic semiconductor device of the present invention is also simpler and faster, and can be applied to different fields according to design requirements, and also has lower manufacturing time and cost. cost.
以上所述僅為舉例性,而非為限制性者。任何未脫離本發明之精神與範疇,而對其進行之等效修改或變更,均應包含於後附之申請專利範圍中。 The above description is exemplary only, not limiting. Any equivalent modifications or changes that do not depart from the spirit and scope of the present invention shall be included in the appended patent application scope.
S01至S06‧‧‧步驟 Steps S01 to S06‧‧‧
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Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003204142A (en) * | 2002-01-08 | 2003-07-18 | Sumitomo Metal Micro Devices Inc | Electronic component-mounting method and apparatus thereof |
JP2008210908A (en) * | 2007-02-26 | 2008-09-11 | Tokai Rubber Ind Ltd | Method for mounting electronic component |
TW201129994A (en) * | 2009-09-30 | 2011-09-01 | Sony Chem & Inf Device Corp | Anisotropic conducting film and method for manufacturing the same |
CN103069565A (en) * | 2010-08-25 | 2013-04-24 | 罗伯特·博世有限公司 | Method for producing an electrical circuit and electrical circuit |
TW201705618A (en) * | 2015-03-09 | 2017-02-01 | Hitachi Chemical Co Ltd | Method for producing connected structure |
CN107026124A (en) * | 2014-11-27 | 2017-08-08 | 广州硅芯电子科技有限公司 | Manufacture the method and miniature light-emitting diode display of miniature light-emitting diode display |
TW201735391A (en) * | 2016-03-02 | 2017-10-01 | 迪睿合股份有限公司 | Image display, method for manufacturing same, and light emitting device, method for manufacturing same |
CN107527930A (en) * | 2016-06-17 | 2017-12-29 | 优显科技股份有限公司 | Optoelectronic semiconductor device |
TW201800478A (en) * | 2016-02-22 | 2018-01-01 | 迪睿合股份有限公司 | Anisotropic conductive film |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4880533B2 (en) * | 2007-07-03 | 2012-02-22 | ソニーケミカル&インフォメーションデバイス株式会社 | Anisotropic conductive film, method for producing the same, and joined body |
JP5685473B2 (en) * | 2011-04-06 | 2015-03-18 | デクセリアルズ株式会社 | Anisotropic conductive film, method for manufacturing bonded body, and bonded body |
-
2018
- 2018-01-16 TW TW107101582A patent/TWI755470B/en active
- 2018-11-02 CN CN201811298368.5A patent/CN110047990B/en active Active
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Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003204142A (en) * | 2002-01-08 | 2003-07-18 | Sumitomo Metal Micro Devices Inc | Electronic component-mounting method and apparatus thereof |
JP2008210908A (en) * | 2007-02-26 | 2008-09-11 | Tokai Rubber Ind Ltd | Method for mounting electronic component |
TW201129994A (en) * | 2009-09-30 | 2011-09-01 | Sony Chem & Inf Device Corp | Anisotropic conducting film and method for manufacturing the same |
CN103069565A (en) * | 2010-08-25 | 2013-04-24 | 罗伯特·博世有限公司 | Method for producing an electrical circuit and electrical circuit |
CN107026124A (en) * | 2014-11-27 | 2017-08-08 | 广州硅芯电子科技有限公司 | Manufacture the method and miniature light-emitting diode display of miniature light-emitting diode display |
TW201705618A (en) * | 2015-03-09 | 2017-02-01 | Hitachi Chemical Co Ltd | Method for producing connected structure |
TW201800478A (en) * | 2016-02-22 | 2018-01-01 | 迪睿合股份有限公司 | Anisotropic conductive film |
TW201735391A (en) * | 2016-03-02 | 2017-10-01 | 迪睿合股份有限公司 | Image display, method for manufacturing same, and light emitting device, method for manufacturing same |
CN107527930A (en) * | 2016-06-17 | 2017-12-29 | 优显科技股份有限公司 | Optoelectronic semiconductor device |
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JP6688374B2 (en) | 2020-04-28 |
CN110047990B (en) | 2022-04-29 |
JP2019125780A (en) | 2019-07-25 |
CN110047990A (en) | 2019-07-23 |
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