TWI746837B - Sending device, receiving device, sending method and receiving method - Google Patents

Abstract

The interleaver interleaves the first to Nth codewords, the OFDM modulation circuit converts the interleaved first to Nth codewords into OFDM signals, and the sending RF circuit sends the OFDM signals. The number of data symbols contained in the first codeword is less than the number of data symbols contained in the second codeword. The interleaver will write in ascending order from the first codeword to the Nth codeword, starting from the second Start reading.

Description

Sending device, receiving device, sending method and receiving method

This disclosure relates to communication devices and communication methods.

IEEE802.11 is a type of wireless LAN related specifications. For example, there are IEEE802.11ad specifications and IEEE802.11ay specifications (hereinafter referred to as "11ad specifications" and "11ay specifications") (for example, refer to Non-Patent Documents 1-3 ).

When the number of data symbols contained in the code word is less than the number of data symbols contained in OFDM (Orthogonal Frequency Division Multiplexing) symbols, the data symbols are applicable to be included in the OFDM symbols "Interleave processing" of rearrangement. By interleaving, the data symbols contained in the codeword are scattered and arranged in a wide frequency range, so the communication quality in the frequency selective channel is improved.

Advanced technical literature Non-patent literature

Non-Patent Document 1: IEEE802.11 ^TM -2016 Page 2436 to Page 2496 Issued on December 14, 2016

Non-Patent Document 2: IEEE802.11-17/0589r0 issued on April 11, 2017

Non-Patent Document 3: IEEE802.11-17/0597r1 issued on April 25, 2017

However, when the codewords are fragmented and arranged in a plurality of OFDM symbols, the fragmented codewords are arranged in a wide frequency range. Such an interleaving pattern has not been fully reviewed, so it may occur in frequency selectivity. The communication quality of the channel has deteriorated.

One aspect of the present disclosure is helpful to provide the following transmitting device, receiving device, transmitting method, and receiving method: It can be constructed in a simple way, so that the codewords in the plural OFDM symbols can be arranged in a wide range. Interleaving in the frequency domain can improve the communication quality on frequency selective channels.

Regarding one aspect of the present disclosure, the transmitting device includes: an interleaver circuit that interleaves the first to Nth codewords; an OFDM modulation circuit that converts the first to Nth codewords that have undergone the interleaving into OFDM signals; And a transmitting circuit for transmitting the OFDM signal, the number of data symbols contained in the first codeword is less than the number of data symbols contained in the second codeword; the interleaver circuit is from the first codeword to The above-mentioned Nth codeword is written in ascending order, and the reading starts from the above-mentioned 2nd codeword.

Regarding one aspect of the present disclosure, a receiving device is provided with: a receiving circuit that receives OFDM signals including the first to Nth codewords interleaved in the transmitting device; and a DFT circuit that extracts the first interleaved first to Nth codewords from the OFDM signal. 1 to N-th codeword; and a deinterleaver circuit for de-interleaving the first to N-th codewords that have undergone the interleaving, and the first codeword includes The number of data symbols is less than the number of data symbols contained in the second codeword. The first to Nth codewords after the interleaving are generated as follows: The codewords are written in ascending order from the aforementioned Nth codeword, and the reading starts from the aforementioned second codeword.

Regarding one aspect of the present disclosure, the sending method is: interleaving the first to Nth codewords; converting the first to Nth codewords that have undergone the interleaving into OFDM signals; sending the aforementioned OFDM signal; The number of data symbols contained is less than the number of data symbols contained in the aforementioned second codeword; it will be written in ascending order from the aforementioned first codeword to the aforementioned Nth codeword, and read from the aforementioned second codeword .

The receiving method of one aspect of the present disclosure is: receiving an OFDM signal including the first to Nth codewords interleaved by the transmitting device; extracting the first to Nth codewords through the interleaving from the OFDM signal; De-interlace the first to Nth codewords that have undergone interleaving; the number of data symbols contained in the first codeword is less than the number of data symbols contained in the second codeword; the first codeword that has undergone the interleaving The Nth codeword is generated as follows: In the interleaver circuit of the transmission device, the first codeword to the Nth codeword are written in ascending order, and the reading starts from the second codeword.

In addition, the general or specific aspects of these can be realized by the system, device, method, integrated circuit, computer program, or recording medium, or by the system, device, method, integrated circuit, computer program And any combination of recording media.

According to one aspect of the present disclosure, it can be constructed by a simple structure, And by interleaving the codewords in the plural OFDM symbol segmentation in a wide frequency range, the communication quality in the frequency selective channel can be improved.

Further advantages and effects of one aspect of the present disclosure can be learned from the description and drawings. Although the related advantages and/or effects are provided separately based on the features described in several embodiments and the specification and drawings, it is not necessary to provide all of the same features to obtain one or more of the same features.

100, 100a: communication device

101: MAC control circuit

102: FEC encoding circuit

103: Modulation circuit

104, 104a, 104b, 104c: interleaver

105, 105a: OFDM modulation circuit

106: Transmit RF circuit

107: transmit antenna array

111: receiving antenna array

112: Receiving RF circuit

113: Synchronous circuit

114: DFT circuit

115: Equalization circuit

116, 116a: Deinterleaver

117, 117a: demodulation circuit

118: FEC decoding circuit

119: Channel estimation circuit

1040, 1052: memory

1041, 1041a: address counter

1042, 1161: Nx, N _y calculation circuit

1043, 1162: OFDM symbol counter

1044, 1044a, 1163: displacement calculation circuit

1045: Block interleaving address idx0 generation circuit

1046: Interleaved address idx1 generation circuit

1047, 1047a: address shift circuit

1048: Deinterleaved address table memory

1051: Data subcarrier address calculation circuit

1053: Guidance and protection subcarrier insertion circuit

1054: address generation circuit

1055: IDFT circuit

1056: CP attachment and window function circuit

1064: column counter

1065: Row counter

1166: Demultiplexer

S1001~S1004, S1101~S1104, S1202, S2003~S2004, S2103~2104, S3101~3102: steps

Fig. 1 is a block diagram showing a configuration example of the communication device of the first embodiment.

Fig. 2 is a diagram showing an example of the operation of the interleaver in the first embodiment.

Fig. 3 is a diagram showing another example of the operation of the interleaver in the first embodiment.

Fig. 4A is a flowchart showing the interleaving procedure of the first embodiment.

Fig. 4B is a flowchart showing the interleaving procedure of the first embodiment.

Fig. 4C is a flowchart showing the interleaving procedure of the first embodiment.

Fig. 5A is a diagram schematically illustrating the writing operation of the interleaver in the first embodiment.

Fig. 5B is a diagram schematically illustrating the reading operation of the interleaver in the first embodiment.

Fig. 5C is a diagram showing an example of the address table of the first embodiment.

Fig. 6A is a diagram showing the relationship between the interleaved two-dimensional array of OFDM symbol 0 and codewords in the first embodiment.

Fig. 6B shows the data of each codeword of OFDM symbol 0 in the first embodiment A diagram of the distribution of material symbols.

FIG. 7A is a diagram showing the relationship between the interleaved two-dimensional array of OFDM symbol 1 and codewords in the first embodiment.

Fig. 7B is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 1 in the first embodiment.

FIG. 8A is a diagram showing the relationship between the interleaved two-dimensional array of OFDM symbol 2 and codewords in the first embodiment.

Fig. 8B is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 2 in the first embodiment.

Fig. 9A is a flowchart showing another procedure of interleaving in the first embodiment.

Fig. 9B is a flowchart showing another procedure of interleaving in the first embodiment.

Fig. 9C is a flowchart showing another procedure of interleaving in the first embodiment.

FIG. 10A is a diagram schematically illustrating the reading operation of the interleaver in OFDM symbol 1 in Embodiment 1. FIG.

Fig. 10B is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 1 in the first embodiment.

FIG. 11A is a diagram schematically illustrating the writing operation of the interleaver when the writing start position of the OFDM symbol 1 is changed in the first embodiment.

11B is a diagram schematically illustrating the reading operation of the interleaver when the writing start position of the OFDM symbol 1 is changed in the first embodiment.

FIG. 12 is a diagram schematically illustrating the reading operation of the interleaver when the reading start position of the OFDM symbol 2 is changed in the first embodiment.

Fig. 13 is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 2 in the first embodiment.

Fig. 14 is a diagram showing an example of the values of idx1(n) and idx2(n,1) in OFDM symbol 1 in the first embodiment.

Fig. 15 is a block diagram showing an example of the structure of the interleaver in the first embodiment.

Fig. 16 is a block diagram showing another example of the structure of the interleaver in the first embodiment.

Fig. 17 is a diagram showing an example of the values of idx3(n) and idx4(n,1) in OFDM symbol 1 in the first embodiment.

Fig. 18 is a block diagram showing another example of the structure of the interleaver in the first embodiment.

Fig. 19 is a diagram showing an example of the correspondence between the data subcarrier sequence and the subcarrier number in the first embodiment.

FIG. 20 is a diagram schematically illustrating another operation example of the interleaver in OFDM symbol 0 in the first embodiment.

FIG. 21 is a diagram schematically illustrating another operation example of the interleaver in OFDM symbol 1 in the first embodiment.

Fig. 22 is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 0 in the first embodiment.

Fig. 23 is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 1 in the first embodiment.

Fig. 24 is a diagram schematically illustrating another operation example of the interleaver in OFDM symbol 0 in the first embodiment.

FIG. 25 is a diagram schematically illustrating another operation example of the interleaver in OFDM symbol 1 in Embodiment 1. FIG.

Figure 26 is a diagram showing the data of each codeword of OFDM symbol 0 in the first embodiment A diagram of the distribution of material symbols.

Fig. 27 is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 1 in the first embodiment.

Fig. 28 is a diagram schematically illustrating another operation example of the interleaver in OFDM symbol 0 in the first embodiment.

FIG. 29 is a diagram schematically illustrating another operation example of the interleaver in OFDM symbol 1 in Embodiment 1. FIG.

Fig. 30 is a flowchart showing a procedure of interleaving in a modification of the first embodiment.

Fig. 31 is a diagram showing an example of cyclic shift in a modification of the first embodiment.

Fig. 32 is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 1 in a modification of the first embodiment.

Fig. 33 is a block diagram showing a configuration example of the communication device of the second embodiment.

Fig. 34 is a block diagram showing an example of the structure of the deinterleaver of the second embodiment.

Fig. 35 is a diagram showing an example of the operation of the column counter and the row counter of the second embodiment.

Detailed description of the preferred embodiment

Hereinafter, the embodiments of the present disclosure will be described in detail with reference to the drawings.

In the 11ay standard, LDPC (Low Density Parity Check) coding is used, and rate matching (codeword size adjustment) is not performed. Therefore, in the 11ay standard, the calculation amount (complexity of calculation and circuit scale) of the encoding and decoding processing per 1 transmitted bit can be kept constant, and the circuit scale or power consumption can be reduced.

On the other hand, in the 11ay standard, there is no relationship between the number of bits contained in an OFDM symbol and the number of bits (codeword size) encoded by the LDPC code in multiples or factors. Therefore, there may be cases where the codeword is truncated and contained in different OFDM symbols, and certain interleaving methods may cause performance (communication quality) degradation.

In addition, in the 11ay standard, because of the wide frequency band (for example, the maximum 8.64GHz), the number of subcarriers and the number of bits in 1 OFDM symbol are large. The number of bits is small (small codeword size). Therefore, the following problem is prone to occur in the 11ay specification: the codewords of small size are truncated, and the codewords cannot be dispersed in a wide range in the frequency band, which causes performance degradation.

In addition, in other specifications, such as LTE, the frequency bandwidth is as small as 100MHz, and the codeword size is as large as 6144 bits. Therefore, in LTE, even if the codeword is truncated, the codeword data can be dispersed in a sufficiently wide range in the frequency band. In addition, in LTE, since turbo codes can be used to perform rate matching (puncturing) in a way that the codeword size matches the OFDM symbol size, or the codeword is dispersed, the above will not happen. It has the same problem as the 11ay specification. However, since puncturing (abandoned on the transmitter side) encodes and decodes bits that are not transmitted, the circuit scale and power consumption increase.

Also, in other specifications, such as 11ad specifications, code rulers Inch is a factor of the number of bits that can be contained in an OFDM symbol, so no code word truncation occurs.

Therefore, the present disclosure describes the following interleaving method: even if the codeword is truncated by a plurality of OFDM symbols like the 11ay standard, the codeword can be distributed in a wide frequency range to improve communication quality.

(Embodiment 1)

[Composition of communication device]

Fig. 1 is a diagram showing an example of the structure of a communication device. The communication device 100 includes a MAC (Medium Access Control) control circuit 101, an FEC (Forward Error Correction) encoding circuit 102, a modulation circuit 103, an interleaver 104, an OFDM modulation circuit 105, a transmitting RF circuit 106, and a transmitting antenna array 107. Receiving antenna array 111, receiving RF circuit 112, synchronization circuit 113, DFT (Discrete Fourier Transform) circuit 114, equalization circuit 115, deinterleaver 116, demodulation circuit 117, FEC decoding circuit 118, channel The structure of the estimation circuit 119.

In addition, in the communication device 100, the MAC control circuit 101, the FEC encoding circuit 102, the modulation circuit 103, the interleaver 104, the OFDM modulation circuit 105, the transmission RF circuit 106, and the transmission antenna array 107 constitute, for example, a transmission device. The receiving antenna array 111, the receiving RF circuit 112, the synchronization circuit 113, the DFT circuit 114, the equalization circuit 115, the deinterleaver 116, the demodulation circuit 117, the FEC decoding circuit 118, and the channel estimation circuit 119 constitute, for example, a receiving device.

The MAC control circuit 101 is based on the slave application processor (not (Illustration) The input data is generated to generate transmission data and input to the FEC encoding circuit 102. In addition, the MAC control circuit 101 determines the transmission parameters (for example, the wireless channel used, the size of the transmitted data, the number of channel bundles, the LDPC encoding method, the antenna directivity, etc.), and performs the FEC encoding circuit 102 and modulation based on the determined transmission parameters. Control of the variable circuit 103, the interleaver 104, the OFDM modulation circuit 105, the transmitting RF circuit 106, and the transmitting antenna array 107 (not shown).

In addition, the MAC control circuit 101 determines reception parameters (for example, the used wireless channel, the number of channel bundles, the received power threshold, the antenna directivity, etc.), and performs the reception antenna array 111, the reception RF circuit 112, and the receiving antenna array 111 based on the determined reception parameters. Control of the synchronization circuit 113, the DFT circuit 114, the equalization circuit 115, the deinterleaver 116, the demodulation circuit 117, the FEC decoding circuit 118, and the channel estimation circuit 119 (not shown). The MAC control circuit 101 receives the received data from the FEC decoding circuit 118 and outputs it to the application processor (not shown).

The FEC encoding circuit 102 performs error detection code addition, bit scramble and error correction encoding to the transmitted data. The error detection code is, for example, a CRC (Cyclic Redundancy Check) code. In bit scrambling, the FEC encoding circuit 102, for example, generates a pseudo-random sequence, an M sequence, or a Gold sequence, and performs XOR (logical exclusive OR) on the transmitted data. The error correction code uses, for example, an LDPC code, a turbo code, or a Li De Solomon code.

The modulation circuit 103 performs data modulation on the data (bit sequence) output by the FEC encoding circuit 102 and converts it into data symbols. Regarding the modulation method, for example, BPSK (Binary Phase Shift Keying), QPSK (Quadrature Phase Shift Keying), SQPSK (Spread QPSK), 16QAM (16-value Quadrature Amplitude Modulation), 64QAM (64-value QAM), 64NUC (64-value Non-Uniform Constellation).

The interleaver 104 rearranges the order of the data symbols in a block (codeword, etc.) containing a plurality of data symbols according to certain rules. The details of the interleaver 104 will be described later.

The OFDM modulation circuit 105 converts the interleaved codeword in the interleaver 104 into an OFDM signal. Specifically, the OFDM modulation circuit 105 inserts pilot symbols into the block of rearranged data symbols output by the interleaver 104, and decides to send each data symbol and pilot symbol The frequency (called subcarrier) of each data symbol and pilot symbol are arranged on the subcarrier (called subcarrier mapping), and IDFT (Inverse Discrete Fourier Transform) is performed to generate the time Field signal sequence (called OFDM symbol).

In addition, the OFDM modulation circuit 105 copies the data of the latter half of the OFDM symbol and adds it before the OFDM symbol (referred to as CP (Cyclic Prefix) addition). In addition, the OFDM modulation circuit 105 performs amplitude adjustment and filter application (referred to as a window function) at the head of the OFDM symbol added by the CP and near the terminal. In addition, CP is sometimes called GI (Guard Interval).

In addition, the communication device 100 may also be capable of generating information about the time domain signal sequence generated by the OFDM modulation circuit 105 The preamble generation circuit (not shown), the header signal generation circuit (not shown), and the beamforming training sequence signal generation circuit (not shown) of the preamble, the header, and the time domain signal sequence of the beamforming training sequence. In addition, the preamble, header, and beamforming training sequence can also be input to the OFDM modulation circuit 105 in the same way as the block of data symbols, and perform subcarrier mapping and IDFT to generate OFDM symbols.

In addition, the communication device 100 may also have a PHY frame generation circuit (not shown) after the OFDM modulation circuit 105. The PHY frame generation circuit is a time domain signal sequence generated by the OFDM modulation circuit 105. , And the time domain signal sequence of the preamble, header, and beamforming training sequence are combined to generate a PHY frame.

The transmitting RF circuit 106 uses a D/A converter to convert the time domain signal sequence output by the OFDM modulation circuit 105 and the PHY frame generation circuit (not shown) into an analog signal, and modulate (called up-conversion) into an analog signal. For wireless signals (such as 60GHz band signals), the power is increased.

The transmitting antenna array 107 has more than one antenna element, and transmits the signal output by the transmitting RF circuit 106 as a wireless signal. An example of the transmission antenna array 107 is a phased array antenna.

The receiving antenna array 111 has more than one antenna element to receive wireless signals. An example of the receiving antenna array 111 is a phased array antenna.

The receiving RF circuit 112 performs the amplification (AGC, Automatic Gain Control, automatic gain adjustment) of the wireless signal received by the receiving antenna array 111, which is demodulated by the wireless field signal The base frequency signal (called down frequency) is converted into a digital signal using an A/D converter, and is input to the synchronization circuit 113.

The synchronization circuit 113 performs leading signal detection, symbol timing detection, and carrier frequency offset correction for the signal output by the receiving RF circuit 112.

The DFT circuit 114 extracts the interleaved complex code word from the OFDM symbol (OFDM signal). Specifically, the DFT circuit 114 performs CP removal on the signal output by the synchronization circuit 113, and extracts the received OFDM symbol data. In addition, the DFT circuit 114 performs DFT on the received OFDM symbol data and converts it into a received signal in the frequency domain.

The equalization circuit 115 uses the reception pilot symbol signal contained in the received signal in the frequency domain and the channel information (called a channel estimation matrix) output by the channel estimation circuit 119 (described later) to perform the calculation of the reception signal contained in the frequency domain. Modification of the frequency characteristics of the received data subcarrier signal.

In addition, the equalization circuit 115 can also perform reception diversity integration, maximum ratio synthesis, and MIMO (Multi-Input Multi-Output) signal separation processing.

The equalization circuit 115, for example, can use the ZF (Zero-Forcing) method, the MMSE (Minimum Mean Square Error) method, the MLD (Maximum Likelihood Detection) method, the MRC (Maximum Ratio Combining) method, and the MMSE-IRC (MMSE Interference Rejection) method. Combining) method.

The deinterleaver 116 performs the rearrangement (deinterleaving) of the received data subcarrier signal after the frequency correction output by the equalization circuit 115. Regarding the rearrangement rule used by the deinterleaver 116, a rule opposite to the rearrangement rule used by the interleaver 104 may be used. The deinterleaver 116 may also perform the following processing: rearrange the data symbols rearranged by the interleaver 104 into the original order. The details of the deinterleaver 116 will be described later.

The demodulation circuit 117, for example, demodulates the modulation signals of BPSK, QPSK, SQPSK, 16QAM, 64QAM, and 64NUC, and converts them into a bit data sequence.

The FEC decoding circuit 118 performs error correction decoding (for example, using an LDPC decoder or a turbo decoder) and descramble (descramble) processing for the bit data sequence. The FEC decoding circuit 118 outputs the data obtained by performing error correction decoding and descramble to the MAC control circuit 101.

The channel estimation circuit 119 uses the received pilot signal and pilot subcarrier signal to calculate the channel estimation matrix.

In addition, the communication device 100 may also have a header receiving circuit (not shown) that receives the header signal, performs equalization, demodulation, and FEC decoding.

[Action of Interleaver]

<Operation example 1>

The operation of the interleaver 104 will be explained using FIG. 2. As an example, for the LDPC codeword size (represented as " _LCW ") is 672 bits, the modulation method is 16QAM, the number of bits per symbol (represented as "N _CBPS ") is 4, and the number of data subcarriers ( Denoted as "N _SD ") is 336 subcarriers for description.

The number of data symbols of 1 _{codeword is calculated by L CW} /N CBPS, and in the example of Figure 2 it is 168 symbols. That is, in Figure 2, the number of data subcarriers (N _SD =336) is a multiple (2 times) of the number of data symbols of the _{codeword (LCW} /N CBPS =168). Therefore, the interleaver 104 re-arranges the data whenever there is a data symbol corresponding to 2 code words (336 symbols in total) is input, and outputs the data of 336 subcarriers (equivalent to 1 OFDM symbol) .

In FIG. 2, the interleaver 104 rearranges data symbols in the following manner. First, the interleaver 104 arranges the first data symbol of the first codeword (referred to as codeword 1) on the first subcarrier (for example, the data subcarrier with the lowest frequency). Next, the interleaver 104 arranges the first data symbol of the second codeword (called codeword 2) on the second subcarrier (for example, only the first subcarrier is a data subcarrier with a lower frequency than that). ).

The data symbol of codeword 1 is represented as d(0)~d(167), the data symbol of codeword 2 is represented as d(168)~d(335), and the interleaver 104 converts the data symbol d(idx (k)) Arrange at subcarrier number k. idx(k) is calculated by Equation 1.

In Equation 1, the "mod" in the first term represents the modulus operation, and the second term represents the floor function (the second term in Equation 1 can also be written as a floor function: floor(x), and find no more than x The largest integer).

In addition, although Figure 2 illustrates the case where the number of data subcarriers (N _SD ) is twice the number of data symbols per _{codeword (L CW} /N CBPS ), as in Figure 2, the number of data subcarriers When (N _SD ) is a multiple of the number of data symbols ( _LCW /N _CBPS ) of one codeword, the interleaver 104 arranges the data symbol d(idx(k)) at the subcarrier number k. idx(k) is calculated by Equation 2.

Equation 2 can be expressed as Equation 3 _{using the variables N x} and N _y. In addition, the variables N _x and N _y are determined by Equation 4 and Equation 5.

[Equation 4] N _x = N _SD /( L _CW / N _CBPS ) = N _SD × N _CBPS / L _CW Equation 4

[Equation 5] N _y = L _CW / N _CBPS = N _SD / N _x Equation 5

In addition, in Fig. 2 and Equation 1, Equation 2, and Equation 3, the interleaver 104 takes out the data symbols one by one according to each codeword, from the head of the subcarrier (idx(k)= 0) To configure the situation. However, the interleaver 104 can also take out N _S data symbols (referred to as data symbol tuples) and N _S data symbols according to each codeword, and arrange them from the head of the subcarrier (idx(k)=0) ( It is called _{processing the symbols N S} N _S numbers). For _{example, N S} can be 8, or other values.

In addition, the interleaver 104 may also maintain the order of the data symbols in the data symbol group before and after the interleaving process. Moreover, the interleaver 104 can also rearrange the order of the data symbols in the data symbol group according to a certain rule before and after the interleaving process.

When the interleaver 104 _{processes the symbols N S} and N _S , the interleaver 104 arranges the data symbol d(idx(k)) at the subcarrier number k. idx(k) is calculated by Equation 6, Equation 7, Equation 8, and Equation 9.

[Equation 8] N _x = N _SD /( L _CW / N _CBPS ) = N _SD × N _CBPS / L _CW Equation 8

[Equation 9] N _y = L _CW / N _CBPS / N _S = N _SD / N _S / N _x Equation 9

The difference between Equation 7 and Equation 3 is that _{compared with the N y used in Equation 3, the value of N y} used in Equation 7 is one part of N _S (refer to Equation 9). When Equation 6 is used, the interleaver 104 can send _NS data symbols together (for example, write to memory). In addition, when Equation 6 is used, the interleaver 104 only needs to calculate one interleaving address for _{every NS data symbols.} In addition, when Equation 6 is used, since _{the values of N x} and N _{y are} small, the calculation of Equation 6 becomes easy, which can reduce the circuit scale and increase the processing speed (throughput) of the circuit.

In addition, Equation 6 can be expressed as Equation 10 using variables i and j. Equation 11 shows the relationship between i, j and k.

[Equation 10] idx ( N _S × i + j ) = idx 0( i ) × N _S + j Equation 10

[Equation 11] i =0,1,K, N _x , j =0,1,K, N _y , k = N _S × i + j

<Operation example 2>

FIG. 3 shows another example of showing the operation of the interleaver 104. In Figure 3, the LDPC codeword size (denoted as " _LCW ") is 672 bits, the modulation method is 16QAM, the number of bits per symbol (denoted as "N _CBPS ") is 4, and the number of data subcarriers ( Expressed as "N _SD ") is 728 subcarriers, and the processing unit (N _S ) is 8 symbols. In addition, CW stands for Code Word.

In addition, _NS data symbols are called "data symbol tuples", and _NS subcarriers are called "subcarrier groups". In Figure 3, 1 codeword contains 168 (=L _CW /N _CBPS ) data symbols. Therefore, 1 codeword contains 21 (=L _CW /N _CBPS /N _S ) data symbol tuples. Furthermore, in Figure 3, 1 OFDM symbol contains 728 (=N _SD ) data subcarriers. Therefore, 1 OFDM symbol contains 91 (=N _SD /N _S ) subcarrier groups.

In Fig. 3, unlike the case of Fig. 2, the number of data subcarriers is not a multiple of the number of symbols of the codeword. In this case, the interleaver 104 uses Equation 12 instead of Equation 8 to calculate N _x .

The right side of equation 12 is the ceiling function (the right side of equation 12 can also be written as ceiling function: ceiling(x), find the smallest integer above x).

Compared to Equation 8, Equation 12 adds a ceiling function, so even if N _SD cannot be divisible by _{L CW} /N _{CBPS , N x} becomes an integer.

4A, FIG. 4B, and FIG. 4C are examples of flowcharts showing the procedure of interleaving by the interleaver 104 in this embodiment. The interleaving procedure is schematically explained using a two-dimensional array (described later).

Fig. 4A is a method of directly realizing a program using a 2-dimensional array. In addition, FIG. 4B is a modification of the program of FIG. 4A, which is a method suitable for realizing a one-dimensional memory (such as RAM) instead of a two-dimensional array. Fig. 4C is a method of calculating the interleaved address of Fig. 4B in advance to reduce the circuit scale.

4A is a flowchart showing the procedure of the _{interleaver 104 using N x} and N _y calculated by Equation 12 and Equation 9 to perform interleaving. 5A and 5B are diagrams schematically illustrating the operation of the interleaver 104 in FIG. 4A.

In addition, in FIGS. 5A and 5B, d(k) represents the k-th data symbol group (k is an _{integer from 0 to L SD} /N _S -1). When the h-th data symbol is expressed as c(h) (h is an _{integer from 0 to N SD} -1), the sequence of data symbols represented by d(k) contains {c(k× N _S ),c(k×N _S +1),c(k×N _S +2),...,c(k×N _S +N _S -2),c(k×N _S +N _S -1)}.

In step S1001 of FIG. 4A, the interleaver 104 uses Equation 12 and Equation 9 to calculate (determine) the values of _{N x} and N _y. 5A and 5B illustrate the operation of the interleaver 104 in FIG. 4A _{using a two-dimensional array of N x} columns and N _{y rows.} Therefore, N _{x is} called the "number of columns" of the _{two-dimensional array, and N y is} called the "number of rows" of the two-dimensional array. The interleaver 104 can also use a memory or a register array to install a two-dimensional array. That is, the interleaver 104 has a memory size of _{N x} × N _y.

In step S1002, the interleaver 104 writes the data symbol group d(k) in the column direction of the 2-dimensional array (refer to FIG. 5A). The interleaver 104 writes N _y data symbol groups d(0) to d(N _y -1) in the row number 0 of the 2-dimensional array, and writes N _y data symbols in the row number 1 of the 2-dimensional array Groups d(N _y ) to d(2N _y -1). Interleaver 104 is the same manner as in writing each column, the column number N _x -1 (last column. In FIG. 5A is a column number of 4) N _y less the write data symbol group d ((N _x -1 )×N _y ) to d(N _SD /N _S -1).

In step S1003, the interleaver 104 writes dummy data to the remaining elements in the final column. For example, when the data symbol is 8-bit binary, it can also be 1000_0000 (decimal is -128), and the negative minimum value can be used as dummy data. In addition, the interleaver 104 can also make the remaining elements in the final column blank, without writing dummy data.

In step S1004, the interleaver 104 discards the dummy data and reads the data symbol group d(k) in the row direction of the 2-dimensional array. In FIG. 5B, the rows of data symbol tuples read by the interleaver 104 are, for example, {d(0),d(21),d(42),d(63),d(84),d(1) ),d(22),d(43),d(64),d(85),d(2),...,d(81),d(19),d(40),d(61) ,d(82),d(20),d(41),d(62),d(83)}.

FIG. 4B is a flowchart showing another procedure of the interleaver 104 performing interleaving in FIG. 3. Although Fig. 4B uses a different procedure from Fig. 4A, it outputs the same data symbol sequence. In addition, in FIG. 4B, the same operations as those in FIG. 4A are given the same symbols.

In step S1001 of FIG. 4B, the interleaver 104 uses Equation 12 and Equation 9 to calculate (determine) the number of columns N _x and the number of rows N _{y in the} same manner as in step S1001 of FIG. 4A.

In step S1101, the interleaver 104 uses the equation 13A to calculate the block interleaving address idx0(i) (i is an _{integer greater than 0 and less than N x} ×N _y -1).

Although the formula 13A is the same calculation formula as the formula 7, the range of the value of the index i is different, and 0 or more and N _x ×N _y -1 are used instead of 0 or more and N _SD /N _S -1 or less.

In step S1102, the interleaver 104 calculates the block interleaving address sequence {idx0(0),idx0(1),...,idx0(N _x ×N _y -2), idx0(N _x ×N _y -1)} Remove the value above the number of data symbol tuples (N _SD /N _S ) (that is, the block interleaving address idx0(i) above the _{index i=N SD} /N _S), And generate a sequence of interleaved addresses {idx1(0),idx1(1),...,idx1(N _SD /N _S -2), idx1(N _SD /N _S -1)}.

In step S1103, the interleaver 104 uses the ascending address to write the data symbol tuple d(k) into the memory (not shown). The interleaver 104 writes the data symbol tuple d(k) into the address k in the memory.

In step S1104, the interleaver 104 uses the interleave address idx1(k) generated in step S1102 to read the data symbol group from the memory. For example, the interleaver 104 sets the read address to the value of idx1(0) and reads the data symbol group from the memory as the first data of the subcarrier group. That is, the position of the subcarrier group number k is the data symbol group (d(idx1(k)) of the address idx1(k) stored in the memory.

In FIG. 4B, the rows of data symbol tuples read by the interleaver 104 are, for example, {d(idx1(0)),d(idx1(1)),d(idx1(2)),..., d(idx1(k)),...,d(idx1(N _SD /N _S -2)), d(idx1(N _SD /N _S -1))}.

FIG. 4C is a flowchart showing another procedure of interleaving performed by the interleaver 104 in FIG. 3. Although Fig. 4C uses a different procedure from Fig. 4A and Fig. 4B, the same data symbol sequence is output. In addition, in FIG. 4C, the same operations as those in FIG. 4B are given the same symbols.

In step S1202, the interleaver 104 calculates the interleaving address idx1(k) based on the _{number of data subcarriers N SD} and the code word size L _CW. The interleaver 104 can also calculate the interleaving address idx1(k) by using the same procedure as the steps S1001 to S1102 in FIG. 4B.

In addition, the interleaver 104 may also calculate the interleaving address idx1(k) in advance according to _{the combination of the number of data subcarriers N SD} and the code word size L _CW , and store it in a table (referred to as an "address table"). The address table can also be stored in ROM (Read Only Memory), RAM (Random Access Memory), register, etc.

Fig. 5C is a table showing an example of the address table. The address table in Figure 5C is used when the number of data symbol tuples N _SD /N _S is 91 and the code word size L _CW is 672.

According to the address table of FIG. 5C, for example, when the value of k is 0, the value of idx1(k) is 0, and when the value of k is 1, the value of idx1(k) is 21.

In Fig. 4C, step S1103 and step S1104 are the same as those in Fig. 4B same.

In FIG. 4C, the rows of data symbol tuples read by the interleaver 104 are, for example, {d(idx1(0)),d(idx1(1)),d(idx1(2)),..., d(idx1(N _SD /N _S -2)),d(idx1(N _SD /N _S -1))}. Here, according to the address table of FIG. 5C, _{the values of idx1(0) to idx1(N SD} /N _S -1) have been determined, so the row of data symbol tuples read by the interleaver 104 is, for example, { d(0),d(21),d(42),...,d(62),d(83))}. That is, it is the same as the sequence of the data symbol group obtained by the procedure of FIG. 4A.

FIG. 6A shows the 2-dimensional array (write and read) of FIGS. 5A and 5B when the data symbol group corresponding to OFDM symbol number 0 (OFDM symbol 0) of FIG. 3 is interleaved, and, Diagram of the relationship between codewords (CW).

In FIG. 6A, the data symbol group of codeword 1 (CW1) is arranged in row 0 of the 2-dimensional array. Similarly, the data symbol group of codeword j+1 (j is an _{integer greater than 0 and less than N x} -1) is arranged in the row number j of the two-dimensional array. In the final row (row number N _x -1), there may be the following situation: all configuration data symbol tuples that are not listed. It is also possible to make _{the data symbol group of a part of codeword N x} (codeword 5 (CW5) in Figure 6A) included in the final row of OFDM symbol 0, and make the remaining data symbols of codeword 5 (CW5) The group is included in the first column before the next OFDM symbol 1. The data allocation method of OFDM symbol 1 will be described later (refer to FIG. 7A).

In FIG. 6A, because each column is configured with different codeword data symbol groups, when the interleaver 104 reads the data in the row direction (refer to FIG. 5B, step S1004 of FIG. 4A, step S1004 of FIG. 4B, and FIG. 4C) S1104), even The next two data symbol tuples are data symbol tuples contained in different codewords.

So, for example, when the signal quality is degraded in a continuous frequency band (a certain frequency range narrower than the transmission band) due to channel multipath propagation, the degraded data symbol group is scattered among the plural numbers. numbers. Therefore, the quality of the codewords can be made uniform, and the degradation of the packet error rate can be prevented. That is, the interleaver 104 can prevent the quality degradation from being concentrated on the data symbol group contained in the specific codeword, so the error rate after error correction can be improved.

Furthermore, according to the configuration of Fig. 6A and the address table of Fig. 5C, for the data symbol tuple of codeword 1, the order (k) after reading is 0,5,10,15,20,25,30,35, 39,43,47,51,55,59,63,67,71,75,79,83,87. In addition, k=0 corresponds to the low frequency data subcarrier, and k=90 corresponds to the high frequency data subcarrier.

FIG. 6B is a diagram showing the distribution of data symbols of each codeword of OFDM symbol number 0 (OFDM symbol 0) in the frequency domain. In the case of the configuration of FIG. 6A, the interleaver 104 can make the data symbols of codeword 1, codeword 2, codeword 3, and codeword 4 spread across the low-frequency data sub-carriers to the high-frequency data sub-carriers to be widely distributed. .

As described above, the interleaver 104 can make the data symbol groups contained in each codeword be widely distributed from the low-frequency data sub-carriers to the high-frequency data sub-carriers. By this, for example, even if the reception quality varies at each frequency due to the multipath propagation of the channel, the quality deterioration can be prevented from being concentrated in the data symbol group contained in the specific codeword, so the error correction after the error correction can be improved. Error rate.

Next, FIG. 7A shows the two-dimensional array (write and read) of FIG. 5A and FIG. 5B when the data symbol group corresponding to OFDM symbol number 1 (OFDM symbol 1) of FIG. 3 is interleaved, And, a diagram of the relationship between codewords (CW).

In FIG. 7A, the interleaver 104 arranges the remaining data symbol groups in the code word 5 (CW5) that are not included in the OFDM symbol 0 in the row number 0. If the data symbol group of CW5 arranged in row number 0 is smaller than the size of row number 0 (the number of rows N _y ), the interleaver 104 arranges the data symbol group of CW6 in row number 0 sequentially from the head of CW The remaining elements (d(14) to d(20) in Fig. 7A). The interleaver 104 writes the remaining data symbol tuples that are not written to the row number 0 in CW6 from the head of the row number 1.

Similarly, the interleaver 104 starts writing data symbol tuples from the middle of the row (for example, row number 14, that is, the row with d(14)) according to each codeword, and moves to the next row for writing Enter up to one line (for example, line number 13) before the line where you started writing. In FIG. 7A, the interleaver 104 writes the 14 data symbol groups in the first half of the codeword (e.g. CW9) 1 row before the final row and writes the remaining 14 data symbols in the next OFDM symbol (e.g. OFDM symbol 2) The second half is a tuple of 7 data symbols.

FIG. 7B is a diagram showing the distribution of data symbols of each codeword of OFDM symbol 1 in the frequency domain. Since the interleaver 104 starts reading from d(0) in FIG. 7A, the data symbols of codeword 6, codeword 7, and codeword 8 can be spread from the low-frequency data sub-carrier to the high-frequency data sub-carrier. Distributed widely.

As above, the interleaver 104 can make the data contained in each codeword The symbol group is widely distributed from the low-frequency data sub-carrier to the high-frequency data sub-carrier. By this, for example, even if the reception quality varies at each frequency due to the multipath propagation of the channel, the quality deterioration can be prevented from being concentrated in the data symbol group contained in the specific codeword, so the error correction after the error correction can be improved. Error rate.

Next, FIG. 8A shows the two-dimensional array (write and read) of FIG. 5A and FIG. 5B when the data symbol group corresponding to OFDM symbol number 2 (OFDM symbol 2) of FIG. 3 is interleaved, And, a diagram of the relationship between codewords (CW).

In FIG. 8A, the interleaver 104 is the same as FIG. 7A. First, the remaining 7 data symbol groups of the final codeword (CW9) contained in the previous OFDM symbol (OFDM symbol 1) are written, and the Code words are written in order. Therefore, the interleaver 104 can spread the data symbol groups contained in each codeword from the low-frequency data sub-carriers to the high-frequency data sub-carriers to be widely distributed.

In addition, in FIG. 7A (OFDM symbol 1), the data symbol group at the beginning of each codeword is arranged at row number 14. This is because the number of remaining data symbol groups in the final codeword (CW5) in the previous OFDM symbol (OFDM symbol 0) is 14. In addition, in FIG. 8A (OFDM symbol 2), the data symbol group at the beginning of each codeword is arranged at row number 7. This is because the number of data symbol groups remaining in the final codeword (CW9) in the previous OFDM symbol (OFDM symbol 1) is 7. In addition, in FIG. 6A (OFDM symbol 0), the data symbol group at the beginning of each codeword is arranged at row number 0. This is because the number of remaining data symbol groups in the final codeword in the previous OFDM symbol (not shown) is zero.

Figure 8B shows the data symbol of each codeword of OFDM symbol 2 The graph of Yuanzhi's distribution in the frequency domain. Since the interleaver 104 starts reading from d(0) in FIG. 8A, it can make the data symbols of codeword 10, codeword 11, codeword 12, and codeword 13 spread across the low-frequency data subcarriers to high-frequency data symbols. The data subcarriers are widely distributed.

As above, although the row numbers of the data symbol tuples before each codeword are arranged are different according to each OFDM symbol, the interleaver 104 writes the data symbol tuples of each codeword with respect to the row number cyclically ( That is, when the writing position reaches the final position, return to the previous line and continue writing), so the data symbol group contained in each codeword can be spread across the low-frequency data subcarrier to the high-frequency data subcarrier Carriers are widely distributed. In this way, for example, when the reception quality varies at each frequency due to the multipath propagation of the channel, the quality degradation can be prevented from being concentrated on the data symbol group contained in the specific codeword, so the error after the error correction can be improved Rate.

<Operation example 3>

9A, 9B, and 9C are flowcharts showing other procedures of interleaving performed by the interleaver 104. In FIGS. 9A, 9B, and 9C, processing steps that are the same as those in FIGS. 4A, 4B, and 4C are given the same reference numerals, and their description is omitted. The difference between FIG. 9A, FIG. 9B, FIG. 9C, and FIG. 4A, FIG. 4B, and FIG. 4C is that the reading start position is changed for each OFDM symbol.

In step S2003 of FIG. 9A, the interleaver 104 calculates the position of the head symbol before the codeword and sets it to the start reading position.

For example, in the case of interleaving OFDM symbol 0, since the position of the header symbol before codeword 1 is column number 0 and row number 0 (the position of d(0) in FIG. 6A), the interleaver 104 will Column number 0, row number 0 Set to start reading position. That is, regarding OFDM symbol 0, the interleaver 104 is set to the same start reading position as in FIG. 5B.

Also, for example, in the case of interleaving OFDM symbol 1, since the position of the header symbol before the codeword 6 is column number 0 and row number 14 (the position of d(14) in FIG. 7A), the interleaver 104 It sets column number 0 and row number 14 as the starting position for reading. That is, regarding OFDM symbol 1, the interleaver 104 is set to a start reading position different from that of FIG. 5B.

Here, the header symbol before codeword 5 is included in OFDM symbol 0 (FIG. 6A), but not included in OFDM symbol 1 (FIG. 7A). Therefore, when performing interleaving of OFDM symbol 1, the interleaver 104 does not calculate code word 5 (for example, the position of d(0) in FIG. 7A), but calculates the position of the head symbol before code word 6 (in FIG. 7A). d(14) position), and set it to start reading position.

That is, as shown in Fig. 10A, the first to Nth codewords contained in OFDM symbol 1 (code 5 to code 9 in Fig. 10A), when the number of data symbols contained in code 5 is greater than the code When the number of data symbols contained in the word 6 is small, the interleaver 104 starts writing from the code word 5 in ascending order and reading from the code word 6. In addition, as shown in FIG. 10A, in OFDM symbol 1, at least the number of data symbols (21 symbols) contained in the codeword 6 including the start reading position is the same as the N _x ×N _y of the interleaver 104 _{N y} (that is, the number of rows) of the memory size is equal.

In addition, the interleaver 104 can also calculate the position of the head symbol before the codeword 6 when performing the interleaving of the OFDM symbol 1, and set it to the start reading position so that the data at the head of each codeword (for example, d( 14), d(35), d(56), d(77)) are read first.

In other words, the interleaver 104 can also be used in each OFDM Symbol, select the first code word that contains the first data symbol, and set the start reading position.

Thereby, the data symbols in each codeword contained in the OFDM symbols are read in the same order as the writing order. That is, before and after interleaving, the order of data symbols in each codeword is maintained. Therefore, the processing of the front and back stages of the interleaver 104 and the deinterleaver 116 becomes easy, and the circuit scale can be reduced.

For example, the equalization circuit 115 in the previous stage of the deinterleaver 116 may also perform equalization processing in accordance with the order of the subcarriers. In this case, the codewords contained in the output of the deinterleaver 116 are the first data symbols of the codewords and output in accordance with the order of the data symbols in the codewords. Thereby, the demodulation circuit 117 and the FEC decoding circuit 118 in the subsequent stage of the deinterleaver 116 can easily divide the codeword. For example, by dividing by each codeword number and holding data symbols and demodulation data in another memory, LDPC decoding based on each codeword will become easier, and the circuit scale and processing delay can be reduced.

Also, for example, in the case of interleaving OFDM symbol 2, since the position of the header symbol before the codeword 10 is column number 0 and row number 7 (the position of d(7) in FIG. 8A), the interleaver 104 It sets column number 0 and row number 7 as the starting position for reading. That is, regarding OFDM symbol 2, the interleaver 104 is set to a start reading position different from that of FIG. 5B.

In step S2004 of FIG. 9A, the interleaver 104 uses the start reading position set in step S2003 as the starting point, discards the dummy data, and reads the data in the row direction.

Figure 10A is an example of S2004 processing, interleaving The reading process in the case where the device 104 performs the interleaving of the OFDM symbol 1 is a diagram schematically shown.

In FIG. 10A, the interleaver 104 starts reading in the row direction from the reading start position (position of d(14)) set in step S2003. When the reading position reaches the final column of the final row (the position of d(83). Except for dummy data), the interleaver 104 moves the reading position to column number 0, row number 0, and continues reading in the row direction Pick.

The interleaver 104 sets a position (position of d(76)) before the reading start position as the final reading position. When the reading position reaches the final reading position, the reading process of step S2004 is completed.

FIG. 10B is a diagram showing the distribution of the data symbols of each code word contained in the OFDM symbol 1 in the frequency domain when the interleaver 104 uses the procedure of FIG. 9A for interleaving.

In FIG. 10B, similar to FIG. 7B, the interleaver 104 can spread the data symbols of the codeword 6, the codeword 7, and the codeword 8 across the low-frequency data subcarriers to the high-frequency data subcarriers.

Also, in Fig. 10B, different from Fig. 7B, the data symbol of code word 5 (the second half of the 14 data symbol group) is a subcarrier distributed in high frequency, and the data symbol of code word 9 (the first half of the 14 data symbol group) It is a subcarrier distributed in low frequency.

That is, when the interleaver 104 uses the procedures of FIG. 9A, FIG. 9B, and FIG. 9C, the first half 7 data symbol group of codeword 5 is included in OFDM symbol 0, as shown in FIG. The sub-carrier of the frequency, so that the 14 data symbol group after the code word 5 is included in the OFDM symbol 1, as shown in Figure 10B As shown, the subcarrier is configured at high frequency.

Therefore, in OFDM symbol 0, the data symbol group of codeword 5 is arranged on a low frequency subcarrier, and in OFDM symbol 1, it is arranged on a high frequency subcarrier. That is, although the data symbol group of codeword 5 is different from other codewords and is configured across plural OFDM symbols, it is the same as other codewords: data subcarriers in the frequency domain and low frequencies The data subcarriers of the highest frequency are widely distributed.

In addition, the interleaver 104 may also change the data start position in response to the OFDM symbol number in step S1002, instead of changing the start reading position in response to the OFDM symbol number in step S2003 as shown in FIG. 10A.

FIG. 11A is a diagram illustrating the following procedure: the interleaver 104 starts writing data in response to the change of the OFDM symbol number.

In FIG. 11A, although the interleaver 104 writes data symbol groups in the column direction as in FIG. 5A, the row number at which the writing starts is set to 7. Thus, in FIG. 11A, the header data symbol group before CW6, CW7, CW8, and CW9 is arranged at line number 0.

In addition, in FIG. 11A, the interleaver 104 determines the line number to start writing in such a way that the header symbol before CW6 is located at line number 0. However, instead, the interleaver 104 can also be such that the header symbol before CW6 is arranged at row number 0, and dummy data is written before CW5 in column number 0 (from row number 0 to row number 6).

FIG. 11B is a diagram showing a method of reading the data symbol group after the interleaver 104 performs writing in the method shown in FIG. 11A. staggered The device 104 skips the elements that have not been written in data in FIG. 11A (or skips the elements that are written in dummy data), and reads the data symbol tuples in the row direction. That is, in FIG. 11B, the interleaver 104 uses the column number 1 and the row number 0 (the position of d(14)) as the start reading position, and reads the data symbol group in the row direction.

The sequence of the data symbol group output by the interleaver 104 by the method of FIG. 11A and FIG. 11B is the same as the sequence of the data symbol output by the method of FIG. 10A. Therefore, the effect obtained by the method of FIG. 11A and FIG. 11B is the same as that of the method of FIG. 10A. In this embodiment, although the method described below can be similarly modified as shown in FIGS. 11A and 11B, since the effect is the same, the description is omitted.

FIG. 12 is a diagram showing, as an example, the reading process in the case where the interleaver 104 performs the interleaving of OFDM symbol 2, which is regarded as an example of the process of S2004.

In FIG. 12, the interleaver 104 starts from the reading start position (the position of d(7)) set in step S2003, and reads in the row direction as in FIG. 10A.

As shown in Figure 12, in the first to Nth code words contained in OFDM symbol 2 (code 9 to code 13 in Figure 12), the number of data symbols contained in code 9 is greater than that in code 10. The number of data symbols contained is small. In this case, the interleaver 104 starts writing from the codeword 9 in ascending order, and starts reading from the codeword 10.

FIG. 13 is a diagram showing the distribution of data symbols of each code word contained in OFDM symbol 2 in the frequency domain when the interleaver 104 uses the procedure of FIG. 9A to perform interleaving.

In Fig. 13, like Fig. 8B, the interleaver 104 can make the codeword 10. The data symbols of codeword 11, codeword 12, and codeword 13 are widely distributed from low-frequency data subcarriers to high-frequency data subcarriers.

Moreover, in FIG. 13, different from FIG. 7B, the data symbols of codeword 9 are distributed on high-frequency subcarriers.

The interleaver 104 is used to make the first half 14 data symbol group of the codeword 9 included in the OFDM symbol 2 when using the procedures of FIG. 9A, FIG. 9B, and FIG. 9C, as shown in FIG. Carrier, so that the second half of the code word 9 contains the 7 data symbol group in OFDM symbol 3, as shown in FIG. 13, which is arranged on the high-frequency subcarrier.

Therefore, the data symbol group of codeword 9 is a subcarrier of low frequency in OFDM symbol 0 and a subcarrier of high frequency in OFDM symbol 1. That is, although the data symbol group of codeword 9 is different from other codewords, it is arranged across a plurality of OFDM symbols, but it is the same as other codewords: data subcarriers in the frequency domain and low frequencies The data subcarriers of the highest frequency are widely distributed.

In addition, the interleaver 104 uses the processing of step S2004 to perform the read processing in the case of interleaving OFDM symbol 0, which is the same as the processing of step S1004 in FIG. 4A (refer to FIG. 5B).

FIG. 9B is a flowchart showing another procedure of interleaving performed by the interleaver 104 in FIG. 3. Although Fig. 9B uses a different program from Fig. 9A, it outputs the same data symbol sequence. In FIG. 9B, the same processing as in FIG. 4B is assigned the same number, and the description is omitted.

In step S1001, the interleaver 104 can also use equation 13B and equation 13C instead of equation 12 and equation 9 to calculate N _x and N _y .

Interleaver 104 may also be when the equation 12 by equation 9 is calculated, and the N _x, N _y is not an integer (described later), using equation 13B to 13C and the expression N _x, N _y is calculated.

In step S2103 of FIG. 9B, the interleaver 104 calculates the position of the previous head symbol in the OFDM symbol and sets it to the start reading position (n_offset), as in step S2003 (FIG. 9A).

The calculation method of the value of n_offset will be described in detail. The interleaver 104 uses Equation 14 to calculate the value of ^{k (q)} _offset.

k ^(q) _offset is expressed in the OFDM symbol number (q) (q is an integer greater than 0, for example, OFDM symbol 0 is equivalent to q=0), the previous OFDM symbol (OFDM symbol q-1) Among the final codewords contained, the number of symbols not included in the previous OFDM symbol but included in the current OFDM symbol (OFDM symbol q).

For example, in OFDM symbol 0 (q=0) in FIG. 6A, k ⁽⁰⁾ _offset can be expressed by Equation 15.

[Equation 17]

Furthermore, in OFDM symbol 1 (q=1) in FIG. 7A, k ⁽¹⁾ _offset can be expressed by Equation 16.

In addition, in OFDM symbol 2 (q=2) in FIG. 8A, k ⁽²⁾ _offset can be expressed by Equation 17.

In addition, the interleaver 104 can also use Equation 18 instead of Equation 14 to calculate the value of ^{k (q)} _offset.

Equation 18 is a recursive relationship. Compared with Equation 14, the number of multiplications and divisions is smaller. Therefore, the interleaver 104 can reduce the amount of calculation, circuit scale, and power consumption.

Next, interleaver 104 is a value calculated using the formula N _L 19.

N _L of the equation 19 is a two-dimensional array of data, the last column of the number of symbols contained in the group. For example, in FIGS. 6A, the last column contains the information symbols from the group 7 d (84) to d (90), so that the value of N _L 7. The length of the final column of OFDM symbol 0 in Fig. 6A (equivalent to N _L ) is the code word contained in column number 0 of OFDM symbol 1 (q=1) in Fig. 7A minus the length of the column (N _y) The value of the number of symbol tuples of 5 (equivalent to floor(k ⁽¹⁾ _offset /N _S )). Equation 19 uses this to calculate the value of _{N L.}

The interleaver 104 uses the equation 20A to calculate the value of the reading start position (n_offset). In addition, since the value of n_offset depends on the OFDM symbol number (q), it is sometimes described as n ^(q) _offset or n_offset(q).

The value of n_offset(q) is the number of data symbol tuples contained in the row before the row containing the start reading position in the 2-dimensional array. For example, in Figure 10A, the number of data symbol tuples contained in the row (the row containing d(0) to d(13)) before the row containing the start reading position (the row containing d(14)) There are 63, so the value of n_offset(1) is 63.

Further, in equation 20A, in accordance with _{^{(k (q) offset / N}} S) of the selected value is the first floor and the second Formula 1 Formula 2 or less than N _L N _L. The first formula (when the value of floor(k ^(q) _offset /N _S ) is _{below N L} ) is used in the cases shown in Figure 10B and Figure 12, that is, when the row containing the starting reading position is in the final column The case where the row of data symbol tuples is not included (in FIG. 10B and FIG. 12, any row of d(84) to d(90) is not included).

In addition, the second formula (the value of floor(k ^(q) _offset /N _S ) exceeds N _L ) is used in the following situation: the row containing the start reading position is the row containing the data symbol tuple in the final column ( In FIG. 10B and FIG. 12, the row containing any one of d(84) to d(90)) (not shown).

The above shows the method in which the interleaver 104 calculates the reading start position using the equation 14 to the equation 20A in step S2103.

In addition, although FIG. 9A illustrates the method for the interleaver 104 to calculate the reading start position, it is also possible to determine the row number 0, which is the reading start position, calculated in step S2003 as the j ^(q) _offset row, using the formula 20B and calculate the value of ^{j (q)} _offset.

^{If the values of k (0)} _offset , k ⁽¹⁾ _offset , and k ⁽²⁾ _offset calculated by Equation 15, Equation 16, and Equation 17 are used, then j ⁽⁰⁾ _offset , j ^{(1) )} _offset , j ⁽²⁾ _{The value of offset} is 0, 14, 7. This value means that the start reading positions in Figure 6A (OFDM symbol 0), Figure 10A (OFDM symbol 1), and Figure 12 (OFDM symbol 2) are row numbers 0, 14, and 7.

In step S2104 of FIG. 9B, the interleaver 104 uses the address idx2 after the interleaving address idx1 is cyclically shifted by n_offset(q) to read from the memory. idx2 is calculated by Equation 21.

That is, the interleaver 104 uses a shift (the interleaving address generated according to the size of the interleaving, corresponding to the data symbol contained in the code word contained in the preceding OFDM symbol (for example, code word 5 in FIG. 10A) Number to be shifted) after the address, read the code word 6 containing the start reading position.

FIG. 9C is a flowchart showing another procedure of interleaving performed by the interleaver 104 in FIG. 3. Although Fig. 9C uses a different program from Figs. 9A and 9B, the same data symbol sequence is output. In FIG. 9C, the same processing as in FIG. 9B and FIG. 4C is assigned the same reference numeral, and the description is omitted.

Similar to the case where the address calculation in FIG. 4B is replaced by a lookup address table in FIG. 4C, the address calculation in FIG. 4B (steps S1001, S1101, S1102) can also be replaced by a lookup address table in FIG. 9C (Refer to the description of step S1202 in FIG. 4C).

In FIG. 9C, the reading procedure of the data symbol group is the same as that in FIG. 9B (steps S2103, S2104).

In addition, the interleaver 104 may also use the address table of idx1 (for example, FIG. 5C) to calculate the value of idx2 in step S2104 of FIG. 9C, thereby replacing the calculation using equation 21. For example, in FIG. 10A, when n is 87 and n_offset(1) is 63, the value of idx2(87,1) is 13 calculated by Equation 22.

This shows that in Figure 10A, the symbol block group d(13) is the 87th read. In this way, the interleaver 104 determines the n-th read data in the OFDM symbol number q as d(idx2(n, q)).

The table in Fig. 14 shows an example of the value of idx2(n,1) in OFDM symbol 1 (q=1).

As above, when the interleaver 104 is used in FIG. 4A, FIG. 4B, In the case of the program in Figure 4C, let the data symbol group of the first half of codeword 5 be included in OFDM symbol 0. As shown in Figure 6B, the data symbol of the second half of codeword 5 is arranged on the low-frequency subcarrier. The group is included in OFDM symbol 1, as shown in Fig. 6B, and is arranged on a low-frequency subcarrier.

Therefore, whether the data symbol group of codeword 5 is OFDM symbol 0 or OFDM symbol 1, they are all configured on low-frequency subcarriers, so the distribution is biased. Thus, for example, when the signal quality of the low-frequency sub-carrier is degraded more than that of the high-frequency sub-carrier, the error rate of the code word 5 will increase more than other code words.

On the other hand, when the interleaver 104 uses the procedures shown in Figs. 9A, 9B, and 9C, the data symbol group in the first half of code word 5 is included in OFDM symbol 0, as shown in Fig. 6B, which is arranged in For the low-frequency subcarrier, the data symbol group in the second half of codeword 5 is included in OFDM symbol 1, as shown in FIG. 10B, which can be configured on the high-frequency subcarrier.

Therefore, in OFDM symbol 0, the data symbol group of codeword 5 is arranged on a low frequency subcarrier, and in OFDM symbol 1, it is arranged on a high frequency subcarrier. Although different from other codewords, which are arranged across a plurality of OFDM symbols, the same as other codewords is that they are widely distributed in the frequency domain.

In this way, even when the number of data subcarriers is not a multiple of the number of symbols of the codeword, the communication device 100 can make the error rate of each codeword uniform, reduce the packet error rate, and increase the data throughput.

For example, due to the short OFDM symbol length (e.g., 291 nanoseconds), the channel change between OFDM symbols is small to high-frequency and high-speed communication. Information (including 11ad specifications and 11ay specifications) is valid.

For example, when the signal quality of the low-frequency sub-carrier is degraded more than that of the high-frequency sub-carrier, although the data symbol group of code word 5 distributed on the low frequency side of OFDM symbol 0 suffers a greater quality However, the data symbol group of code word 5 in the sub-carrier distribution of the high frequency of OFDM symbol 1 is affected by a smaller quality degradation. In the FEC decoding circuit 118 of the receiving device, the data symbol group of code word 5 of OFDM symbol 0 and the data symbol group of code word 5 of OFDM symbol 1 are error-corrected and decoded together, thereby reducing the low frequency The influence of the deterioration of the signal quality of the sub-carrier, reducing the error rate.

FIG. 15 is a diagram showing an example of the structure of the interleaver 104 (the interleaver 104a). The interleaver 104a performs interleaving based on the procedure of FIG. 9B.

The interleaver 104a has a memory 1040, an address counter 1041, N _x , N _y calculation circuit 1042, an OFDM symbol number counter 1043, a shift amount calculation circuit 1044, a block interleaving address idx0 generating circuit 1045, and an interleaving address idx1 A generating circuit 1046 and an address shifting circuit 1047.

The MAC control circuit 101, for example, combines the number of channel bundles (N _CB ), the number of data subcarriers (N _SD ), the LDPC code word size (L _CW ), and the number of bits per symbol (N _CBPS ) into parameters Input from the interleaver 104a.

The modulation circuit 103 inputs the data symbols that have undergone data modulation (for example, 16QAM) into the interleaver 104a _{according to each data symbol group (each NS symbol).}

The memory 1040 of the interleaver 104a is, for example, formed by a RAM or a register array.

The address counter 1041 of the interleaver 104a, for example, uses an ascending address to generate an address for writing the data of the data symbol group to the memory 1040. For example, the address counter 1041 generates an address by writing the data symbol tuple d(n, q) to the address n (equivalent to step S1103 in FIG. 9B).

The N _x and N _y calculation circuit 1042 of the interleaver 104a uses the formula 13B and the formula 13C to calculate the number of columns N _x and the number of rows N _{y of the} two-dimensional array, and the shift amount calculation circuit 1044 and the block interleaving position The address idx0 generating circuit 1045 is input (equivalent to step S1001 in FIG. 9B).

The OFDM symbol counter 1043 of the interleaver 104a determines the value of the OFDM symbol number (q) in response to the symbol number (not shown) input from the modulation circuit 103, and inputs it to the shift amount calculation circuit 1044.

The shift amount calculation circuit 1044 of the interleaver 104a uses Equation 14, Equation 19, and Equation 20A to calculate the value of n_offset(q) (corresponding to step S2103 in FIG. 9B).

The block interleaving address idx0 generating circuit 1045 of the interleaver 104a calculates idx0(i) using equation 13A (equivalent to step S1101 in FIG. 9B).

The interleaving address idx1 generating circuit 1046 of the interleaver 104a calculates idx1(n) using the procedure of step 1102 in FIG. 9B.

The address shift circuit 1047 of the interleaver 104a uses Equation 21 to calculate idx2(n, q) (equivalent to step S2104 in FIG. 9B). The interleaver 104a uses the idx2(n,q) generated by the address shift circuit 1047 as the read address, reads the data symbol group from the memory 1040, and sends it to the OFDM modulation circuit 105 output.

In addition, the deinterleaver 116 can also be constructed as follows: in the interleaver 104a, the output (idx2(n,q)) of the address shift circuit 1047 is used as the write address, and the address counter 1041 is The output is used as the read address.

FIG. 16 is a diagram showing another example of the structure of the interleaver 104 (the interleaver 104b). In FIG. 16, the same components as those in FIG. 15 are assigned the same reference numerals, and the description is omitted. The interleaver 104a in FIG. 15 uses the data symbol group number (n) at the write address, and uses the address corresponding to the interleaving method at the read address, thereby performing interleaving processing. In contrast, the interleaver 104b in FIG. 16 uses an address corresponding to the interleaving method at the write address, and uses the data symbol tuple number (n) at the read address to perform the interleaving process.

Although the interleaver 104b in FIG. 16 has a different structure from the interleaver 104a in FIG. 15, the same interleaving result can be obtained. As described later, the de-interleaved address table memory 1048 only needs to generate the corresponding interleaved addresses in sequence in response to the input of the data symbol group from the modulation circuit 103, and the address shift circuit 1047a can add and The analog-digital processing is performed, so the circuit configuration is simple and the power consumption can be reduced.

The address counter 1041a generates the data symbol group number (n) in response to the output of the modulation circuit 103.

The deinterleaving address memory 1048 is calculated by calculating the deinterleaving address idx3(n) in such a way that idx3(n) satisfies Equation 23.

[Numerical formula 26] n = idx 1( idx 3( n )) formula 23

In addition, idx3(n) that satisfies equation 23 will satisfy equation 24.

[Equation 27] n = idx 3( idx 1( n )) Equation 24

By formula 23 and formula 24, idx3(n,q) is the reverse lookup address of idx1(n,q).

The deinterleaving address memory 1048 can also store the address table calculated by idx3(n) in, for example, ROM or RAM to calculate idx3(n).

The address shift circuit 1047a uses Equation 25 to calculate the interleaved address idx4(n, q) of the adjusted read initial value.

In Fig. 10A, the interleaver 104 advances the reading position by the component of n_offset(q). Correspondingly, Equation 25 means that the writing position is delayed by the component of n_offset(q), and both sides obtain the same effect.

The idx4(n,q) generated by the address shift circuit 1047a satisfies the formula 26 and the formula 27. idx4(n,q) is the reverse lookup address of idx2(n,q).

[Numerical formula 29] n = idx 2( idx 4( n , q ), q ) Formula 26

[Numeral 30] n = idx 4( idx 2( n , q ), q ) Equation 27

Fig. 17 shows examples of idx3(n) and idx4(n, 1) values corresponding to the examples of idx1(n) shown in Fig. 14. In Figure 14, for example, the value of idx1(4) is 84. Corresponding to this, the value of idx3(84) is 4. Also, in Figure 14, for example, the value of idx2(6,1) is 57. Corresponding to this, the value of idx4(57,1) is 6.

The address counter 1041a generates the data symbol tuple number (n). The address counter 1041a, for example, generates ascending addresses (n=0, 1,..., floor(N _SD /N _S )-1).

The interleaver 104b uses the address (idx4(n,q)) generated by the address shift circuit 1047a to write the data symbol group to the memory, and uses the address generated by the address counter 1041a to read from the memory Read the data symbol tuples to perform interleaving.

The correspondence between the interleaver 104b in FIG. 16 and FIG. 10A will be described. The interleaver 104b considers the reading sequence such as the initial read data as address 0, and the next read data as address 1, and controls the data in response to the interleaving process (FIG. 9A, FIG. 9B, and FIG. 9C). The position where the symbol tuple is written, thereby achieving interleaving.

For example, in FIG. 10A, in order to make the initial read data symbol group d(14), d(14) is written to address 0. That is, the interleaver 104b calculates the write address in a manner of idx4(14,1)=0.

FIG. 18 is a diagram showing another example of the structure of the interleaver 104 (the interleaver 104c). FIG. 18 includes an example of the configuration of the OFDM modulation circuit 105 (OFDM modulation circuit 105a). In FIG. 18, the same components as those in FIG. 15 and FIG. 16 are assigned the same reference numerals, and the description is omitted.

Different from the interleaver 104b, the interleaver 104c inputs the address idx4(n, q) calculated by the address shift circuit 1047a to the OFDM modulation circuit 105a. Moreover, the interleaver 104c may not have the memory 1040 and the address counter 1041a.

In addition, the modulation circuit 103 can also transfer the data symbol group to The OFDM modulation circuit 105a is input instead of the interleaver 104c. The communication device 100 uses the write address calculated by the interleaver 104c to substantially perform the interleaving process by the OFDM modulation circuit 105a.

The OFDM modulation circuit 105a includes a data subcarrier address calculation circuit 1051, a memory 1052, a guide and protection subcarrier insertion circuit 1053, an address generation circuit 1054, an IDFT circuit 1055, a CP addition and window function circuit 1056.

The data subcarrier address calculation circuit 1051 of the OFDM modulation circuit 105a calculates the subcarrier number (k) corresponding to the data subcarrier sequence (r) after interleaving. The data subcarrier sequence (r) after interleaving means, for example, the data reading sequence in FIG. 5B, FIG. 10A, and FIG. 12.

For example, in Figure 10A, the order of the data subcarriers of the data symbols contained in the data symbol group d(14) is from 0 to N _S -1, and the data subcarriers of the data symbols contained in the data symbol group d(35) The order is from N _S to 2N _S -1. The interleaver 104c determines the data subcarrier sequence of the data symbol tuple d(n) from idx4(n,q)×N _S to idx4(n,q)×N _S +N _S -1.

FIG. 19 shows an example of the correspondence between the data subcarrier sequence (r) and the subcarrier number (k) (referred to as subcarrier mapping). The subcarrier mapping can also take different values according to the number of channel bundles (N _CB ), the number of DFT points (N _DFT ), the number of data subcarriers (N _SD ), and the channel number (ch). Figure 19 is an example of the case where N _CB =2, N _DFT =1024, N _SD =728, and the channel number is 9.

The range of values of the sub-carrier number k is -N _DFT / 2 or more, N _DFT / 2-1 or less (in the embodiment of FIG. 19 is more than -512, 511 or less). In Fig. 19, the subcarriers whose k is less than -383 and over 383 are called guard bands or guard subcarriers. The symbol value of the protection subcarrier is set to 0. In Fig. 19, the subcarriers whose k value is -1,0,1 are called DC subcarriers. The value of the symbol of the DC subcarrier is determined to be zero.

In addition, the value of k other than the guard subcarrier and the DC subcarrier and not shown in FIG. 19 is called the pilot subcarrier. An example of the subcarrier number k of the pilot subcarrier is {-372, -350, -328, -306, -284, -262, -240, -218, -196, -174, -152, -130, -108 ,-86,-64,-42,-20,-3,7,24,46,68,90,112,134,156,178,200,222,244,266,288,310,332,354,376}.

The data subcarrier address calculation circuit 1051 writes the data symbol c(h,q) into the memory 1052 in response to the subcarrier number (k) calculated from the data subcarrier sequence (r). Here, c(h, q) is the hth data symbol (h is an integer _{greater than 0 and less than N SD) in the OFDM symbol number q.} The number k of the data symbol group d(n,q) containing the data symbol c(h,q) is calculated by Equation 28.

The data subcarrier address calculation circuit 1051, for example, writes the data of the subcarrier k to the address k+N _DFT /2 of the memory 1052.

In the communication device 100, the interleaver 104c calculates the interleaving address idx4(n,q) related to the data symbol group d(k,q) containing the data symbol c(h,q). The OFDM modulation circuit 105a is based on the data sequence of the data symbols contained in the data symbol group d(k,q) (from idx4(n,q)×N _S to idx4(n,q)×N _S +N _S -1) The subcarrier number k is calculated, and the data symbol is written to the address corresponding to the subcarrier number in the memory 1052.

The guidance and protection subcarrier insertion circuit 1053 calculates the positions of the protection subcarrier and the DC subcarrier, and writes them into the memory 1052 in such a way that the value of the symbol is 0. In addition, the guidance and protection subcarrier insertion circuit 1053 calculates the subcarrier number of the guidance subcarrier, and writes the value of the predetermined pilot symbol into the memory 1052.

The address generation circuit 1054 is for the IDFT circuit 1055 to perform IDFT and generate an address for reading subcarrier data (which may also include data subcarriers, DC subcarriers, pilot subcarriers, and guard subcarriers) from the memory 1052. The address generating circuit 1054 may generate an ascending address according to the circuit configuration of the IDFT circuit 1055, or may generate a bit reversed address.

The IDFT circuit 1055 performs discrete Fourier inverse transformation on the subcarrier data read from the address generated by the address generation circuit 1054, and converts the subcarrier data into a time domain signal. The CP addition and window function circuit 1056 adds CP to the time domain signal and applies the window function.

As described above, compared with the interleaver 104b of FIG. 16, the interleaver 104c of FIG. 18 does not require the memory 1040, so the circuit scale and power consumption can be reduced, and the processing delay can be reduced.

<Operation example 4>

20 and 21 are diagrams showing other examples of interleaving performed by the interleaver 104. In Figure 20 and Figure 21, it is explained that since the number of symbols of one codeword (L _CW /N _CBPS ) is not a multiple of the number of symbols of one data symbol group (N _S ), there are plural numbers in the data symbol group. The situation of the data symbol of the codeword. Although the case where the interleaver 104 uses the procedure of FIG. 9A is described here, the same effect can be obtained in the case of using FIGS. 9B and 9C.

FIG. 20 shows an example in which the interleaver 104 performs OFDM symbol 0 (q=0) interleaving _{when N SD} is 728, L _CW is 624, and N _{CBPS is 4, as an example.} Although the interleaver 104 performs writing in each column in the same manner as in FIG. 5A, in FIG. 20, the arrows for showing the writing order are omitted. In addition, the interleaver 104 performs writing in each column in the same manner as in FIGS. 5B, 10A, and 12. In FIG. 20, in order to make the reading position clear, the first 2 rows of the arrow used to display the reading order are marked, but the parts related to the remaining row numbers are omitted.

In step S1001, the interleaver 104 uses the equation 13B and the equation 13C to calculate the values of _{N x} and N _y. For example, N _y is 20 and N _x is 5.

In FIG. 20, the number of data symbol tuples per _{codeword (L CW} /N CBPS /N _S ) is 19.5, which is different from _{the value of N y} calculated by the interleaver 104 (=20). According to the formula 13B, _{the value of N y is} the value obtained by ceiling the number of data symbol groups (L _CW /N _CBPS /N _{S) of 1 codeword.} Therefore, the symbol (d(19)) in the last row of column number 0 is a mixture of the last 4 symbols of codeword 1 and the first 4 symbols before codeword 2. That is, the correspondence between the columns of the 2-dimensional array and the codewords is shifted. In column number 0, the symbols that are different from codeword 1 are 4 symbols, so the offset is 4 symbols.

In addition, the offset will be accumulated in each row. The offset of row number 1 is 8 symbols, which is equivalent to 1 data symbol tuple. Therefore, the rows (d(20) to d(38)) other than the final row (d(39)) of column number 1 are the data symbol tuples containing codeword 2, and the final row of column number 1 (d(39)) ) Is the data containing code 3 Symbol tuples.

In addition, the offset of row number 2 is 12 symbols, which is equivalent to 1.5 data symbol tuples. Therefore, the rows (d(40) to d(57)) other than the last 2 rows (d(58), d(59)) of column number 1 are data symbol groups containing codeword 3, and d(58) is Data symbols of codeword 3 and codeword 4 are mixed, and the final line (d(59)) is the data symbol group containing codeword 4.

FIG. 21 shows an example of interleaving OFDM symbol 1 (q=1) when the interleaver 104 uses the same parameters as in FIG. 20 (for example, N _SD = 728, L _CW = 624, and N _{CBPS = 4).} In Fig. 21, similar to Fig. 20, the arrow mark for displaying the reading sequence in the 2 rows containing the start reading position is marked, and the arrow for writing and the arrow for reading on the remaining rows are added. Be omitted.

In each column of Figure 21, when the data symbol tuple containing the character code of the row at the start reading position (d(7)) is included in the row before the row containing the start reading position, it is The number of data symbols is regarded as the offset.

For example, in column number 0 in Figure 21, since the start reading position is d(7), the code word 6 is read from the first data symbol tuple, and the code word 7 is the second data symbol from the body. The d(27) of the tuple is read.

Therefore, regarding code word 6, since the row (the row containing d(6)) before the row containing the start reading position (d(7)) contains the 4 symbols of CW6 (the first 4 symbols), Therefore, the offset is 4 symbols. Regarding code word 7, since the row (the row containing d(26)) before the row containing the start reading position (d(27)) contains the symbol 8 of CW7, the offset is 8. Symbol. close For code word 8, because the line (d(45), d(46)) before the line containing the start reading position (the line containing d(47)) contains the symbol 4 of CW8 and 8 Symbols, so the offset is 12 symbols. Regarding the code word 9, because the line (d(65), d(66)) before the line containing the start reading position (the line containing d(67)) contains the symbol 8 of CW9 and 8 Symbols, so the offset is 16 symbols. Regarding code word 10, because the line (d(84), d(85), d(86)) that contains the symbol of CW10 is before the line containing the starting reading position (the line containing d(87)) 4 symbols, 8 symbols, and 8 symbols, so the offset is 20 symbols.

Fig. 22 and Fig. 23 are diagrams showing the distribution of the data symbols of the codeword in the frequency domain when the interleaver 104 performs the interleaving of the OFDM symbols 0 and 1 of Figs. 20 and 21.

_{The interleaver 104 determines the number of rows N y} based on the number of symbols in one codeword in step S1001 in FIGS. 9A and 9B. Therefore, the codewords 1, 2, 3, 4, 6, 7, 8, and 9 are widely distributed from the low-frequency sub-carriers of the OFDM symbol to the high-frequency sub-carriers.

In addition, the interleaver 104 determines the start in step S2003 of FIG. 9A and step S2103 of FIG. 9B according to the number of data subcarriers (N _SD ) of the OFDM symbol and the number of symbols per _{codeword (L CW} /N CBPS) Read the position. Therefore, when the codeword is split and arranged in a plurality of OFDM symbols, the frequency repetition in the codeword can be reduced, and the subcarriers of the low frequency of the OFDM symbols can be widely dispersed from the subcarriers of the high frequency. Configuration.

In addition, in FIG. 22 and FIG. 23, code word 5 is a repetition of the distribution of data symbols on the high-frequency subcarriers due to the offset. However, the interleaver 104 is determined in such a way that the offset is not accumulated in each OFDM symbol Read the initial value (for example, refer to Equation 14, Equation 19, and Equation 20A). Therefore, the offset can be made a small value compared with the number of subcarriers of the OFDM symbol, which can reduce the performance degradation caused by the repetition of the data symbol distribution.

In addition, in FIG. 22 and FIG. 23, the interleaver 104 maintains the order of the data symbols in the codeword except for the header part corresponding to the offset for the data symbols of each codeword, and is arranged in the OFDM symbol Yuan's subcarrier.

As a result, when the communication device 100 receives FIG. 22 and FIG. 23, the deinterleaver 116 can easily maintain the order of the data symbols of each codeword to output data, so the demodulation circuit 117 and FEC decoding in the subsequent stage The circuit configuration of the circuit 118 can be simplified. In addition, it becomes easier for the communication device 100 to perform parallel processing according to each code word, so the data throughput can be improved.

<Action example 5>

24 and 25 are diagrams showing other examples of interleaving performed by the interleaver 104. In Figures 24 and 25, similar to Figures 20 and 21, it is explained that since the number of symbols per _{codeword (L CW} /N CBPS) is not a multiple of the number of symbols per data symbol group (N _{S ),} The case where the data symbol group is mixed with plural code words. Although the description is for the case where the interleaver 104 uses the program of FIG. 9A, the same effect is also obtained in the case of using FIG. 9B and FIG. 9C.

FIG. 24 shows an example in which the interleaver 104 performs OFDM symbol 0 (q=0) interleaving _{when N SD} = 728, L _CW = 624, and N _{CBPS = 4, as an example.} Although the interleaver 104 performs writing in each column in the same manner as in FIG. 5A, in FIG. 20, the arrows for showing the writing order are omitted. In addition, the interleaver 104 performs writing in each column in the same manner as in FIGS. 5B, 10A, and 12. In FIG. 20, in order to make the reading position clear, the first 2 rows of the arrow used to display the reading order are marked up, but the parts related to the remaining rows are omitted.

In step S1001, the interleaver 104 calculates the values of _{N x} and N _{y according to Equation 29 and Equation 30.}

Different from Equation 13B, Equation 29 uses the floor function instead of the ceiling function. Although the expression 30 is the same as the expression 13C, _{the value of N y} calculated by the expression 29 is used. For example, N _y is 19 and N _x is 5.

In FIG. 24, the number of data symbol tuples per _{codeword (L CW} /N CBPS /N _S ) is 19.5, which is different from _{the value of N y} calculated by the interleaver 104 (=19). According to Equation 29, _{the value of N y is} the value obtained by taking the floor of the number of data symbol groups (L _CW /N _CBPS /N _{S) of 1 codeword.} Therefore, the symbol (d(19)) in column number 1 and row number 0 is a mixture of the last 4 symbols of codeword 1 and the first 4 symbols before codeword 2. That is, a shift in the correspondence relationship between the column and the code word occurs in the row of the start reading position.

FIG. 25 shows an example of interleaving OFDM symbol 1 (q=1) when the interleaver 104 uses the same parameters as in FIG. 24 (for example, N _SD = 728, L _CW = 624, and N _{CBPS = 4).} As in Fig. 24, the arrow mark for displaying the reading sequence in the two rows containing the start reading position is added, and the arrow for writing and the arrow for reading the remaining rows are omitted.

In FIG. 25, unlike FIG. 21, the interleaver 104 determines the position of the data symbol group containing more than one CW6 data symbol as the starting position (for example, the position of d(10)). That is, when the interleaver 104 in FIG. 21 contains another CW (for example, CW5) data symbol (for example, d(6) in FIG. 21), it is not selected as the start reading position. In FIG. 25 Even when the data symbol of other CW (such as CW5) is included, it is selected as the start reading position when the data symbol of CW6 is still included.

When the reading shown in FIG. 25 is performed, the interleaver 104 uses expression 31 instead of expression 14 in step S2103 of FIG. 9B.

In contrast, the interleaver 104 uses the ceiling function in equation 14 and uses the floor function in equation 31.

26 and FIG. 27 are diagrams showing the distribution of the data symbols of the codeword in the frequency domain when the interleaver 104 performs the interleaving of the OFDM symbols 0 and 1 of FIGS. 24 and 25.

_{The interleaver 104 determines the number of rows N y} based on the number of symbols in one codeword in step S1001 in FIGS. 9A and 9B. Therefore, the codewords 1, 2, 3, 4, 6, 7, and 8 are widely distributed from the low-frequency sub-carriers of the OFDM symbol to the high-frequency sub-carriers.

In addition, the interleaver 100 determines the start in step S2003 of FIG. 9A and step S2103 of FIG. 9B according to the number of data subcarriers (N _SD ) of the OFDM symbol and the number of symbols per _{codeword (L CW} /N CBPS) Read the position. Therefore, when the codeword is split and arranged in a plurality of OFDM symbols, the frequency repetition in the codeword can be reduced, and the subcarriers of the low frequency of the OFDM symbols can be widely dispersed from the subcarriers of the high frequency. Configuration.

In addition, in FIG. 26 and FIG. 27, code word 5 is a repetition of the distribution of data symbols in a part of the frequency subcarriers due to the offset. However, the interleaver 104 decides to read the initial value so that the offset is not accumulated in each OFDM symbol (for example, refer to Equation 31, Equation 19, and Equation 20A). Therefore, the offset can be made a small value compared with the number of subcarriers of the OFDM symbol, which can reduce the performance degradation caused by the repetition of the data symbol distribution.

In addition, in FIG. 26 and FIG. 27, the interleaver 104 maintains the order of the data symbol group in the codeword except for the final part of the codeword for the data symbol group of each codeword, and is arranged in the OFDM symbol The sub-carrier.

For example, in Figure 25, for codeword 6, the last part of codeword 6 (d(29)) is read before d(11) to d(28), for codeword 7, the last part of codeword 7 d(48) is read before d(30) to d(47). Therefore, in Figure 27, for codeword 6, the order of data symbol groups located at d(11) to d(28) is maintained, and for codeword 7, data symbols located at d(30) to d(47) The order of the groups is maintained.

With this, the communication device 100 receives the data of FIG. 26 and FIG. 27 In this case, the deinterleaver 116 can easily maintain the order of the data symbols of each codeword to output data, so the circuit configuration of the demodulation circuit 117 and the FEC decoding circuit 118 in the later stage can be simplified. In addition, it becomes easier for the communication device 100 to perform parallel processing according to each code word, so the data throughput can be improved.

<Operation example 6>

28 and 29 are diagrams showing other examples of interleaving performed by the interleaver 104. In Figs. 28 and 29, similar to Figs. 20 and 21, the case where the number of symbols per _{codeword (L CW} /N CBPS) is not a multiple of the number of symbols per data symbol group (N _{S) is explained.} Although the description is for the case where the interleaver 104 uses the program of FIG. 9A, the same effect is also obtained in the case of using FIG. 9B and FIG. 9C.

FIG. 28 shows an example in which the interleaver 104 performs OFDM symbol 0 (q=0) interleaving _{when N SD} = 728, L _CW = 624, and N _{CBPS = 4, as an example.} In Fig. 28, as in Fig. 21, the arrow used to display the writing sequence is omitted. To make the reading position clear, the first two lines of the arrow used to display the reading sequence are marked up, but it is the same as the rest. The related part is omitted.

In step S1001, the interleaver 104 uses equation 13B to calculate the value of _{N y.} In addition, the number of padding symbols N _yd is calculated using Equation 32.

_[Numerical formula 35] N yd = N _y N _S - L _CW / N _CBPS formula 32

In step S1002, the interleaver 104 writes data symbol groups in the row direction. In addition, the interleaver 104 adds padding symbols and writes in the column direction in the final row. For example, when N _S is 8 and N _yd is 4, the interleaver 104 can also be the data symbol group in the final row (for example, d(19), d(39), d(59), d (79)) Contains N _S -N _yd data symbols (for example, 4 data symbols), and the remaining 4 symbols contain, for example, blanks, pseudo symbols, and filler symbols.

In this way, the header data symbol tuple before each codeword is arranged at line number 0.

FIG. 29 shows an example of interleaving OFDM symbol 1 (q=1) when the interleaver 104 uses the same parameters as in FIG. 24 (for example, N _SD = 728, L _CW = 624, and N _{CBPS = 4).} As in FIG. 28, the arrow mark for displaying the reading order in the two rows containing the start reading position is added, and the arrow for writing and the arrow for reading the remaining rows are omitted.

In step S1002, the interleaver 104 writes data symbol groups in the row direction. The interleaver 104 is a data symbol tuple (for example, d(6), d(26), d( 46), d(66), d(86)), to add filler symbols and write in the column direction. In this way, the header data symbol tuple before each codeword is arranged in the row containing the start reading position.

In FIGS. 28 and 29, the interleaver 104 uses expression 33 instead of expression 14 to calculate the reading start position.

In addition, in Figure 28 and Figure 29, the interleaver 104 can also be used Replace the formula 33 with the formula 34 after the transformation of the formula 18.

Equation 34 is to use L _CW /N _CBPS (equivalent to the number of symbols of 1 codeword) in _{Equation 18 to L CW} /N _CBPS + N _yd (equivalent to 1 when pseudo symbols are included) The number of symbols of the codeword) to replace the formula.

Since the total number of pseudo symbols contained in OFDM symbols is (N _x -1)×N _yd , equation 33 is to take N _SD in equation 14 as N _SD +(N _x -1)×N _yd The formula of replacement.

In the method shown in Figure 28 and Figure 29, the interleaver 104 is the same as the method shown in Figure 10A and Figure 11A. The data symbol of each codeword can be widely dispersed from the low-frequency sub-carrier of the OFDM symbol to the high-frequency sub-carrier. Configuration can improve communication quality.

Furthermore, in the method of FIG. 28 and FIG. 29, the interleaver 104 is the same as the method of FIG. 10A and FIG. Therefore, when the communication device 100 receives packets, in order to simplify the configuration of the processing after the deinterleaver 116 (for example, the demodulation circuit 117, the FEC decoding circuit 118), and make parallel processing easier, the circuit scale is reduced. Reduction can increase data throughput.

(Modification of Embodiment 1)

FIG. 30 is a flowchart showing a method of the interleaving process performed by the interleaver 104 of the communication device 100 which is different from that of FIG. 9A, FIG. 9B, and FIG. 9C. The program of the interleaver 104 in FIG. 9B is to add the offset (n _offset ^(q) ) to the interleave address (idx1(n)) to calculate the read address. In contrast, the program in FIG. 30 is the same as that shown in FIG. 4B also performs interleaving without adding offset, and performs a cyclic shift of the data after interleaving according to the value of _offset ^(q).

Adding the offset when calculating the address as shown in Figure 9B is equivalent to cyclically shifting the data according to the value of the offset. Therefore, no matter which method of FIG. 9A, FIG. 9B, FIG. 9C, or FIG. 30 is used for the interleaver 104 of the communication device 100, the sequence of the output data symbols is the same.

In step S1001 in FIG. 30, the interleaver 104 is the same as step S1001 in FIG. 9B, using Equation 9 and Equation 12 to calculate the number of rows (N _y ) and the number of columns (N _x ) of the interleaver. In addition, when the size (N _s ) of the data symbol group is 1, the interleaver 104 can also use equation 35 and equation 36 instead of equation 9 and equation 12.

[Numerical formula 38] N _y = L _CW / N _CBPS formula 35

In step S1101 in FIG. 30, the interleaver 104 uses equation 13A to calculate the block interleaving address idx0 in the same manner as in step S1101 in FIG. 4B.

The interleaver 104 can also use the formula 37 instead of the formula 13A.

[Numerical formula 40] idx 0( j × N _x + i )= N _y × i + j , i =0,1,K, N _x -1, j =0,1,K, N _y ^-1 37

In step S1102 in FIG. 30, the interleaver 104 is the same as step S1102 in FIG. 4B, _{removing the value above the number of input data symbols (N SD} ) from the block interleaving address idx0 to calculate the interleaving address idx1(0) ,idx1(1),...,idx1(N _SD -1).

In step S1103 of FIG. 30, the interleaver 104 uses the ascending address to write the input data d(k) into the memory in the same way as step S1103 of FIG. 4B.

In step S1104 of FIG. 30, the interleaver 104 uses idx1(n) to read the input data d(k) from the memory as in step S1104 of FIG. 4B.

In step S3101 of FIG. 30, interleaver 104 is a step S2103 of FIG. 9B Similarly, equation 14 is calculated using k _offset ^(q) of the value, calculated using the formula 19 the value of N _L, is calculated using equation 20A The value of n _offset ^(q) is used as the shift amount (n_shift).

Also, interleaver 104 may also be set when the size of data symbols (N _s) is 1, the value of N _L is calculated using Equation 38 instead of Equation 19.

[Equation 41] N _L = N _SD mod N _y Equation 38

In addition, the interleaver 104 can also calculate the value of _{n offset} ^(q) by using equation 39 instead of equation 20A _{when the size (N s) of the data symbol group is 1.}

[Equation 42]

In addition, the interleaver 104 may use the equation 40 instead of the equation 20A to calculate the value of _{n offset} ^(q).

In Equation 40, idx ^-1 (k) is the inverse function of idx(k) and satisfies Equation 41.

[Equation 44] k = idx ( idx ^-1 ( k )) = idx ¹ ( idx ( k )) Equation 41

In addition, the interleaver 104 can also calculate the value of _{n offset} ^(q) by using the formula 42 instead of the formula 40 _{when the size (N s) of the data symbol group is 1.}

The meaning of formula 40 and formula 42 will be explained with reference to FIG. 10A. floor(k _offset ^(q) /N _S ) is the row number (for example, 14) that indicates the position to start reading. A column number ^{_{0 (floor (k offset (q}} ) / N S)) of data symbols in a group of rows is written in step S1103 of the first ^{_{floor (k offset (q) /}} N S) data symbol group d (floor (k _offset ^(q) /N _S )). Since the interleaver 104 reads the data symbol d(k) with the idx ^-1 (k)th, the data symbol group d(floor(k _offset ^(q) /N _S )) is the idx ^-1 (floor(k _offset ^(q) /N _S )) are read. That is, formula 40 and formula 42 are obtained.

In step S3102 of FIG. 30, the interleaver 104 uses n_shift (=n _offset ^(q) ) data symbol group as a component for the array of data symbol groups read in step S1104 to proceed to the left direction (index is 0). The direction) of the cyclic shift.

Fig. 31 is a diagram showing an example of the cyclic shift in step S3102. The data symbol sequence before the cyclic shift is, for example, the same as the read result of FIG. 5B, and d(0) (that is, d(idx(0))) is the first symbol. If the interleaver 104 performs a cyclic shift, it is equivalent to moving the symbol at the start reading position (for example, d(14), that is, d(idx(n _offset ^(q) ))) to the front of the data symbol sequence.

The value of n _offset ^(q) is equivalent to the start reading position in Fig. 10A and Fig. 11A. Steps S1001 to S1104 in FIG. 30 are the same as the procedure in FIG. 4B without adjusting the start reading position (equivalent to step 2104 in FIG. 9B). In this case, the data symbol group corresponding to the start reading position in FIG. 10A and FIG. 11A is read at the n _offset ^(q) +1 th in step S1104.

The interleaver 104 performs a _{cyclic shift of n offset} ^(q) symbols in step S3102, and the data symbol group corresponding to the start reading position can be positioned before the output of the interleaver. The program also interleaves the result.

Hereinafter, the procedure of FIG. 30 will be explained by mathematical formulas. _{The input data symbol sequence (d in} ^(q) ) of the OFDM symbol number q (q is a non-negative integer) to the interleaver 104 is represented by Equation 43.

The output data symbol sequence (d _interleave ^(q) ) of step S1104 is obtained by formula 44.

In equation 43, idx(n) is obtained by equation 45.

[Equation 48] idx ( i × N _S + j ) = idx 1( i ) × N _S + j Equation 45

The output data symbol sequence (d _out ^(q) ) of step S3102 is obtained by formula 46.

In equation 46, mod(x) means x mod N _SD .

In equation 46, the first column is the description of step S3102 in FIG. 30, which is equivalent to the case of performing n _offset ^(q) _{symbol shift on the output data symbol sequence (d interleave} ^{(q)) of step S1104.} In the expression 46, the second column is obtained by substituting the expression 42 and the expression 44 into the first column. In addition, in equation 46, the third column is equivalent to the case of using the program of FIG. 9B, that is, equivalent to the case of adding the offset when calculating the address (idx).

The interleaver 104 can also use any one of the first row, the second row, and the third row of equation 46 to generate the output data sequence.

In addition, the interleaver 104 can also reverse the data symbol sequence in step S3102 in FIG. 30 instead of cyclically shifting the data symbol sequence. The formula 47 shows an example of the calculation formula of the output data symbol sequence (d _out ^{(q) ).}

FIG. 32 is a diagram showing the distribution of data symbols of each code word in the frequency domain when the interleaver 104 uses the formula 47 to perform interleaving. Since equation 47 is used, compared with FIG. 7B, the distribution of data symbols is reversed, and the distribution of data symbols of code word 5 is arranged on the high frequency side. Therefore, there is less repetition of the data symbol distribution (FIG. 6B) of the codeword 5 of the previous OFDM symbol (OFDM symbol 0), which can improve the communication quality in a multi-path propagation environment.

As described above, in the modification of Embodiment 1, the interleaver 104 cyclically shifts the data read from the memory, so that the data symbol group at the beginning of the codeword is arranged at the first subcarrier. Therefore, the repetition of the frequency distribution of the data symbols of the codewords arranged across the plurality of OFDM symbols is reduced, which can improve the communication quality in the multi-path propagation environment.

(Embodiment 2)

FIG. 33 is a block diagram showing the structure of the communication device 100a of the second embodiment. Compared with the communication device 100 of the first embodiment, the order of the demodulation circuit 117a and the deinterleaver 116a is different. That is, in the communication device 100a, the output of the equalization circuit 115 is connected to the demodulation circuit 117a, and the demodulation circuit The output of 117a is connected to the deinterleaver 116a, and the output of the deinterleaver 116a is output to the FEC decoding circuit 118.

The deinterleaver 116a of FIG. 33 is, for example, a circuit for deinterleaving the data interleaved by the procedures of FIG. 4A, FIG. 4B, FIG. 4C, FIG. 9A, FIG. 9B, FIG. 9C, and FIG. 30.

The demodulation circuit 117a outputs N _CBPS pieces of likelihood information (such as LLR, Log Likelihood Ratio) according to each input data symbol. For example, the demodulation circuit 117a generates _{a sequence of N CBPS} LLRs e(n×N _CBPS ), e(n×N _CBPS +1),...,e(n ×N _CBPS +N _CBPS -1).

The deinterleaver 116a deinterleaves N _CBPS LLRs as one data symbol. For example, _{the sequence of N SD} ×N _CBPS LLRs e(idx(0+n _offset ^(q) )),e(idx(0+n _offset ^(q) )+1),...,e( idx(0+n _offset ^(q) )+N _CBPS -1),e(idx(1+n _offset ^(q) )),e(idx(1+n _offset ^(q) )+1),... ,e(idx(1+n _offset ^(q) )+N _CBPS -1),...,e(idx(N _SD -1+n _offset ^(q) )),e(idx(N _SD -1+ n _offset ^(q) )+1),...,e(idx(N _SD -1+n _offset ^(q) )+N _CBPS -1) Rearrange e(0),e(1),. ..,e(N _SD ×N _CBPS -1) output. In addition, the description of mod is omitted here, and idx((x+k)mod N _SD ) is simply described as "idx(x+k)".

In addition, if the inverse function idx ^-1 (k) of idx(k) is used to record, the deinterleaver 116a will convert the sequence of LLR e(0), e(1),...,e(i×N _CBPS +j),...,e(N _SD ×N _CBPS -1) rearrange, move the i×N _CBPS +j LLR(e(i×N _CBPS +j) to idx ^-1 (mod(i +k _offset ^(q) ,N _SD ))×N _CBPS +j position shift and output.

FIG. 34 is a diagram showing an example of the circuit configuration of the deinterleaver 116a. The deinterleaver 116a includes an N _x , N _y calculation circuit 1161, an OFDM symbol number counter 1162, a shift amount calculation circuit 1163, a column counter 1164, a row counter 1165, and a demultiplexer 1166.

N _x , N _y calculation circuit 1161 uses Equation 9 and Equation 12, Equation 13B and Equation 13C, Equation 35 and Equation 36 to calculate the number of columns N _x and the number of rows N _{y of the two-dimensional array.} Input from the shift amount calculation circuit 1163 (corresponding to step S1001 in FIG. 30).

The OFDM symbol number counter 1162 determines the value of the OFDM symbol number (q) in response to the number of LLRs input from the demodulation circuit 117a, and inputs it to the shift amount calculation circuit 1163.

The shift amount calculation circuit 1163 uses Equation 19 and Equation 38 to calculate _{the value of N L} , and uses Equation 20A, Equation 40, and Equation 42 to calculate the value of the shift amount (n_shift=n _offset ^(q) ) (Equivalent to step S3101 in Fig. 30).

The column counter 1164 and the row counter 1165 calculate the column number and row number on the interleaver matrix corresponding to the LLR input from the demodulation circuit 117a. For example, FIG. 10A shows the output sequence of the interleaver and the input sequence of the deinterleaver. For example, when d(14) is input to the deinterleaver 116a at time 0, the column number at time 0 is 0 and the row number is 14. Also, for example, when d(35) is input to the deinterleaver 116a at time 1, the column number at time 1 is 1 and the row number is 14.

Figure 35 shows the column counter 1164 and row counter 1165 A diagram of an example of the action. The case where the value (q) of the OFDM symbol counter is 1 will be described as an example.

When the data symbol groups input from the demodulation circuit 117a at times 0, 1, 2, and 3 are d(14), d(35), d(56), and d(77), refer to FIG. 10A, The line number is 14. In addition, the column numbers are 0, 1, 2, and 3 at times 0, 1, 2, and 3, respectively.

The column counter 1164 outputs the code word number (CW number) corresponding to the data symbol group input from the demodulation circuit 117a. For example, when q is 1, the OFDM symbol contains codewords 5, 6, 7, 8, and 9, so it can also be set to correspond to CW numbers 0, 1, 2, 3, and 4 respectively. For example, as illustrated in FIG. 7A, the data symbol tuple d(14) is the data of the code word 6, so the column counter 1164 outputs the CW number 1 at time 0.

When the value of the row counter exceeds floor(k _offset ^(q) /N _S ), the CW number is the value of the column counter plus one. Also, when the value of the row counter is less than floor (k _offset ^(q) /N _S ), the CW number is equal to the value of the column counter.

In this way, the column counter 1164 of the deinterleaver 116a can easily find the CW number from the value of the column counter, the value of the row counter, and the value of k _offset ^(q). This effect is because the interleaver 104 of the communication device 100 determines the number of rows (N _{y ) based on the codeword size (L CW} ), and adds an offset (n _offset ^(q) ) to the interleaving address to perform interleaving, thereby Let the data symbol tuple before codeword 6 be arranged before the subcarrier.

In addition, the line counter 1165 calculates the order within the codeword (the order within the CW) corresponding to the data symbol group input from the demodulation circuit 117a. For example Say, the data symbol tuple d(14) is the first data in code word 6, so the sequence in CW is 0. Also, for example, the data symbol tuple d(15) is the next data group under d(14) in code word 6, so the order in CW is 1.

The row counter 1165 can also calculate the order within the CW (n _CW ) by using Equation 48.

In this way, the row counter 1165 of the deinterleaver 116a can easily find the order in the CW based on _{the value of the row counter and the value of k offset} ^(q). This is achieved by the following effect: the interleaver 104 of the communication device 100 determines the number of rows (N _{y ) based on the codeword size (L CW} ), and adds an offset (n _offset ^{(q)) to the interleaving address} ) For interleaving, so that the head data symbol group before the code word 6 is arranged at the head of the subcarrier.

The demultiplexer 1166 selects any one of the output port 0 to the output port 5 based on the CW number calculated by the column counter 1164, and outputs the LLR input from the demodulation circuit 117a to the selected output port. For example, since the CW number of the data symbol group d(14) is 1 (equivalent to code word 6), it is output to the output port 1.

The FEC decoding circuit 118 stores the LLR output from the deinterleaver 116a in the LDPC decoding buffer memory based on the data output from output port 0 to output port 5 and the CW sequence output from the line counter 1165 Body (not shown).

In this way, the deinterleaver 116a can be used without deinterleaving Deinterlacing is performed in the case of memory.

In addition, the deinterleaver 116a can also output the CW number to the FEC decoding circuit 118, thereby replacing the demultiplexer 1166. The FEC decoding circuit 118 may also use the information of the CW number and the order in the CW, and store the LLR input from the deinterleaver 116a or the demodulation circuit 117a in the LDPC decoding buffer memory (not shown).

As above, the deinterleaver 116a, for example, calculates the CW number and CW internal sequence corresponding to the data interleaved by the procedures of Figure 4A, Figure 4B, Figure 4C, Figure 9A, Figure 9B, Figure 9C, and Figure 30 , Output to the FEC decoding circuit. Therefore, the communication device 100a can be de-interleaved with a simple configuration, which can reduce processing delay, circuit scale, and power consumption.

<Integration of Implementation Modes>

Regarding one aspect of the present disclosure, a transmitting device includes: an interleaver circuit that interleaves the first to Nth codewords; an OFDM modulation circuit that converts the first to Nth codewords that have undergone the interleaving into an OFDM signal; and The transmitting circuit transmits the OFDM signal, the number of data symbols contained in the first codeword is less than the number of data symbols contained in the second codeword, and the interleaver circuit is from the first codeword to the foregoing Write in ascending order up to the Nth codeword, and read from the aforementioned second codeword.

In the transmitting device related to one aspect of the present disclosure, the interleaver circuit has a memory size of _{N x} × N _{y ; N y} is equal to the number of data symbols contained in the second codeword.

In the transmitting device related to one aspect of the present disclosure, the interleaver circuit uses the following address to read the second codeword: The interleaved address generated by the interleave size is the address after shifting according to the number of data symbols contained in the first codeword.

The receiving device of one aspect of the present disclosure includes: a receiving circuit that receives OFDM signals including the first to Nth codewords interleaved in the transmitting device; and a DFT circuit that extracts the first interleaved first from the OFDM signal To the Nth codeword; and a deinterleaver circuit for deinterleaving the first to Nth codewords that have undergone interleaving. The number of data symbols contained in the first codeword is greater than that of the second codeword. The number of data symbols is small, and the first to Nth codewords after the aforementioned interleaving are generated as follows: the interleaver circuit of the aforementioned transmitting device writes in ascending order from the aforementioned first codeword to the aforementioned Nth codeword, Start reading from the aforementioned 2nd codeword.

In the receiving device of one aspect of the present disclosure, the aforementioned deinterleaver has a memory size of _{N x} × N _{y ; N y} is equal to the number of data symbols contained in the aforementioned second codeword.

In the receiving device of one aspect of the present disclosure, the interleaver circuit uses the following address to read the second codeword: the interleaving address generated in response to the interleaving size corresponds to the first codeword contained The address after shifting the number of data symbols.

Regarding one aspect of the transmission method of the present disclosure, it includes the following processing: interleaving the first to Nth codewords; converting the first to Nth codewords that have undergone the interleaving into OFDM signals; sending the OFDM signal; and the first The number of data symbols contained in the codeword is less than the number of data symbols contained in the aforementioned second codeword; it will be written in ascending order from the aforementioned first codeword to the aforementioned Nth codeword, starting from the aforementioned second codeword Start reading.

Regarding one aspect of the receiving method of the present disclosure, it includes the following processing: receiving an OFDM signal including the first to Nth codewords interleaved by the transmitting device; extracting the first to Nth interleaved codewords from the aforementioned OFDM signal Codeword; de-interlace the first to Nth codewords that have undergone the interleaving; the number of data symbols contained in the first codeword is less than the number of data symbols contained in the second codeword; after the interleaving The first to Nth codewords are generated as follows: In the interleaver circuit of the transmission device, the first codeword to the Nth codeword are written in ascending order, and the reading starts from the second codeword. .

In addition, the present disclosure can be realized by software, hardware, or software that cooperates with hardware. The functional blocks used in the description of the above embodiment can be partly or wholly realized by LSI as an integrated circuit, and the processes described in the above embodiment can be part or whole by an LSI or a combination of LSI control. The LSI can be composed of individual chips, or it can be composed of a single chip that includes part or all of the functional blocks. LSI can also be input and output with data. Depending on the degree of integration, LSI is sometimes referred to as IC, system LSI, super LSI, or ultra LSI. The method of integrated circuitization is not limited to LSI, and can also be realized by a dedicated circuit, a general-purpose processor, or a dedicated processor. Furthermore, it is also possible to use FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI, or a reconfigurable processor that can be reconfigured for the connection and setting of the cells inside the LSI. The present disclosure can also be realized by digital processing or analog processing. Furthermore, if it’s because of the advancement or derivation of other technologies in semiconductor technology, And there is a technology that can replace LSI's integrated circuit, of course, this technology can also be used to integrate functional blocks. In terms of possibility, it may be the application of biochemical technology and so on.

Industrial availability

One aspect of this disclosure is useful for communication systems.

Claims (12)

A transmitting device comprising: an interleaver circuit that interleaves codewords from 1st to Nth (N is an integer greater than 2), and the number of data symbols contained in the first codeword is greater than the number of data symbols contained in the second codeword The number of data symbols is small, and the interleaving is performed as follows: in the row direction, from the first data symbol group contained in the first codeword to the Nth data symbol group contained in the Nth code word Write in ascending order, and start from the first data symbol of the second data symbol group contained in the second codeword, and in the row direction from the first written data symbol group to the The Nth written data symbol group is read; an OFDM modulation circuit converts the first to Nth codewords that have undergone the interleaving into an OFDM signal; and a sending circuit sends the OFDM signal. Such as the sending device of claim 1, wherein the interleaver circuit has a memory size of _{N x} × N _{y , and N x} is the number of rows and is determined by dividing the number of data subcarriers in the OFDM symbol by the second codeword The ceiling function of the number obtained by the number of data symbols contained; N _y is the number of rows and is equal to the number of data symbols contained in the second code word. For example, the sending device of claim 1, wherein the interleaver circuit uses the following address to read the second codeword: the interleaving address generated in response to the interleaving size corresponds to the data symbol contained in the first codeword The address after shifting in the number of yuan. Such as the sending device of claim 1, where the previous OFDM When the number of remaining data symbol groups of the final data symbol in the symbol is 0, starting from the first data symbol of the first data symbol group contained in the first code word, change Read from the first written data symbol tuple to the Nth written data symbol tuple. A receiving device includes: a receiving circuit that receives an OFDM signal including the first to Nth (N is an integer greater than or equal to 2) codewords interleaved in the transmitting device; and a DFT circuit that extracts the interleaved OFDM signal from the OFDM signal The first to Nth codewords; and a deinterleaver circuit for deinterleaving the first to Nth codewords that have undergone the interleaving, and the number of data symbols contained in the first codeword is greater than that of the second codeword The number of data symbols contained is small. The first to Nth codewords that have undergone the interleaving are generated by the interleaver circuit of the transmitting device in the following manner. The data symbol group is written in ascending order from the Nth data symbol group contained in the Nth code word, and the first data symbol from the second data symbol group contained in the second code word Initially, in the row direction, read from the first written data symbol tuple to the Nth written data symbol tuple. Such as the receiving device of claim 5, wherein the deinterleaver has a memory size of _{N x} × N _{y , and N x} is the number of rows and is determined by dividing the number of data subcarriers in the OFDM symbol by the second codeword The ceiling function of the number obtained by the number of data symbols contained; N _y is the number of rows and is equal to the number of data symbols contained in the second code word. For example, the receiving device of claim 5, wherein the interleaver circuit uses the following address to read the second codeword: the interleaving address generated in response to the interleaving size corresponds to the data symbol contained in the first codeword The address after shifting in the number of yuan. For example, in the receiving device of claim 5, in the case where the number of remaining data symbol tuples of the last data symbol in the previous OFDM symbol is 0, the first data symbol contained in the first codeword Starting from the first data symbol of the tuple, read from the first written data symbol to the Nth written data symbol. A sending method, including the following processing: interleaving the first to Nth (N is an integer greater than 2) codewords, the number of data symbols contained in the first codeword is greater than the data symbols contained in the second codeword The number of yuan is small, and the interleaving is performed as follows: in the row direction from the first data symbol group contained in the first codeword to the Nth data symbol group contained in the Nth codeword in ascending order Write, and start from the first data symbol of the second data symbol group contained in the second codeword, and from the first written data symbol group to the Nth data symbol group in the row direction Reading a set of written data symbols; converting the first to Nth codewords that have undergone the interleaving into an OFDM signal; and sending the OFDM signal. Such as the transmission method of claim 9, where the first OFDM When the number of remaining data symbol groups of the final data symbol in the symbol is 0, starting from the first data symbol of the first data symbol group contained in the first code word, change Read from the first written data symbol tuple to the Nth written data symbol tuple. A receiving method includes the following processing: receiving an OFDM signal containing codewords from the first to the Nth (N is an integer greater than 2) interleaved in the transmitting device; extracting the first to the interleaved codewords from the OFDM signal The Nth codeword; and deinterleaving the first to Nth codewords that have undergone the interleaving; the number of data symbols contained in the first codeword is less than the number of data symbols contained in the second codeword; The first to Nth codewords that have undergone the interleaving are generated by the interleaver circuit of the transmitting device in the following manner, from the first data symbol group contained in the first codeword to the Nth code in the column direction Write in ascending order up to the Nth data symbol group contained in the word, and start from the first data symbol of the second data symbol group contained in the second code word, starting from the first data symbol in the row direction From 1 written data symbol tuple to the Nth written data symbol tuple for reading. For example, in the receiving method of claim 11, in the case where the number of remaining data symbol groups of the last data symbol in the previous OFDM symbol is 0, the first data symbol contained in the first codeword Starting from the first data symbol of the tuple, from the first written data symbol to the The Nth written data symbol tuple is read.

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