TWI743611B - Processing device and data access method thereof - Google Patents

Processing device and data access method thereof Download PDF

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TWI743611B
TWI743611B TW108144220A TW108144220A TWI743611B TW I743611 B TWI743611 B TW I743611B TW 108144220 A TW108144220 A TW 108144220A TW 108144220 A TW108144220 A TW 108144220A TW I743611 B TWI743611 B TW I743611B
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register
unit
extended
temporary storage
address
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TW202123013A (en
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李柏誼
蔡德宗
田志新
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新唐科技股份有限公司
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
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Abstract

A processing device includes a processing unit, a register unit and a storage unit. The processing unit performs an addressed command to generate an addressed address. The register unit is coupled to the processing unit, and the storage unit has a plurality of register addresses and a data pointer. The storage unit is coupled to the processing unit. The storage unit defines an extended register region, and the extended register region has a plurality of extended register addresses. The processing unit adds the addressed addresses to the data pointer to map the register addresses of the register unit with the extended register addresses of the storage unit, so that the processing unit directly performs an access operation on the data of the extended register addresses through the register addresses.

Description

處理裝置與其資料存取方法Processing device and its data access method

本發明實施例關於一種處理裝置，特別是關於一種處理裝置與其資料存取方法。The embodiment of the present invention relates to a processing device, in particular to a processing device and a data access method thereof.

微控制單元(Micro Control Unit, MCU)是一種將中央處理器、記憶體、暫存器、計數器及輸出/入介面等元件通通匯集在同一塊積體電路晶片上之微型電腦。一般的微控制單元，透過隨機存取記憶體(Random Access Memory, RAM)及特殊功能暫存器(Special Function Register, SFR)來儲存微控制單元運作過程中所產生之資料，藉以令中央處理器所發出之指令能夠被順利執行。Micro Control Unit (MCU) is a microcomputer that integrates the central processing unit, memory, register, counter, and output/input interface on the same integrated circuit chip. The general micro-control unit uses Random Access Memory (RAM) and Special Function Register (SFR) to store the data generated during the operation of the micro-control unit, so as to enable the central processing unit The instructions issued can be executed smoothly.

第1圖為微控制單元之隨機存取記憶體及特殊功能暫存器的位址示意圖。以單晶片8051的微控制單元為例，微控制單元內部之隨機存取記憶體100具有256個位元組(byte)，以十六進制的定址空間來說，即為00H到FFH。然而，如第1圖所示，在位址80H到位址FFH的定址空間內，隨機存取記憶體110與特殊功能暫存器120為重疊狀態。也就是說，特殊功能暫存器120的儲存空間僅具有128個位元組。隨著微控制單元的應用越來越廣，需要擴增周邊功能的需求也越來越多，如此會使得特殊功能暫存器120不敷使用。因此，如何擴充暫存器的使用功能將成為各家廠商亟欲研究的課題。Figure 1 is a schematic diagram of the addresses of the random access memory and special function registers of the micro-control unit. Taking the single chip 8051 micro control unit as an example, the random access memory 100 inside the micro control unit has 256 bytes, which is 00H to FFH in terms of a hexadecimal address space. However, as shown in FIG. 1, in the address space from address 80H to address FFH, the random access memory 110 and the special function register 120 are overlapped. In other words, the storage space of the special function register 120 only has 128 bytes. As the application of the micro-control unit becomes more and more extensive, there are more and more requirements for expanding peripheral functions, which will make the special function register 120 insufficient. Therefore, how to expand the use function of the register will become an urgent research topic for various manufacturers.

本發明實施例提供一種處理裝置與其資料存取方法，藉以擴充處理裝置之暫存器的使用功能，並減少資料存取操作之指令的大小、加快暫存器之資料讀寫的速度及效率以及增加使用上的便利性。The embodiment of the present invention provides a processing device and a data access method thereof, so as to expand the use function of the register of the processing device, reduce the size of instructions for data access operations, accelerate the speed and efficiency of data reading and writing of the register, and Increase the convenience of use.

本發明實施例提供一種處理裝置，包括處理單元、暫存器單元與暫存器單元。處理單元執行定址指令，以產生定址位址。暫存器單元耦接處理單元，且暫存器單元具有多個暫存位址及資料指標。儲存單元耦接處理單元，且儲存單元定義有擴充暫存器空間，擴充暫存器空間具有多個擴充暫存位址。處理單元將定址位址填入資料指標，以將暫存器單元的暫存位址與儲存單元的擴充暫存位址進行映射，使處理單元透過暫存位址直接對擴充暫存位址的資料進行存取操作。The embodiment of the present invention provides a processing device including a processing unit, a register unit, and a register unit. The processing unit executes the addressing instruction to generate an addressing address. The register unit is coupled to the processing unit, and the register unit has a plurality of temporary storage addresses and data indicators. The storage unit is coupled to the processing unit, and the storage unit is defined with an extended register space, and the extended register space has a plurality of extended register addresses. The processing unit fills the address address into the data indicator to map the temporary storage address of the temporary storage unit with the extended temporary storage address of the storage unit, so that the processing unit directly controls the extended temporary storage address through the temporary storage address Data access operations.

本發明實施例提供一種處理裝置的資料存取方法，包括下列步驟。提供儲存單元，其中儲存單元定義有擴充暫存器空間，擴充暫存器空間具有多個擴充暫存位址。透過處理單元，執行定址指令，以產生定址位址。透過處理單元將定址位址填入暫存器單元的資料指標，以將暫存器單元的多個暫存位址與儲存單元的擴充暫存位址進行映射，使處理單元透過暫存位址直接對擴充暫存位址的資料進行存取。The embodiment of the present invention provides a data access method of a processing device, which includes the following steps. A storage unit is provided, wherein the storage unit is defined with an extended register space, and the extended register space has a plurality of extended temporary storage addresses. Through the processing unit, the addressing command is executed to generate the addressing address. Fill the address address into the data index of the register unit through the processing unit to map the multiple temporary addresses of the register unit and the extended temporary storage address of the storage unit, so that the processing unit can pass the temporary storage address Directly access the data of the extended temporary storage address.

本發明實施例所揭露之處理裝置與其資料存取方法，透過儲存單元定義有擴充暫存器空間，且擴充暫存器空間具有多個擴充暫存位址。接著，透過處理單元執行定址指令，以產生定址位址，並將定址位址填入暫存器單元的資料指標，以將暫存器單元的暫存位址與儲存單元的擴充暫存位址進行映射，使得處理單元可以透過暫存位址直接對擴充暫存位址的資料進行存取。如此一來，可以有效地擴充處理裝置之暫存器的使用功能，並減少資料存取操作之指令的大小、加快暫存器之資料讀寫的速度及效率以及增加使用上的便利性。In the processing device and its data access method disclosed in the embodiment of the present invention, an extended register space is defined through a storage unit, and the extended register space has a plurality of extended register addresses. Then, the processing unit executes the addressing command to generate the address address, and fills the address address into the data index of the register unit to convert the temporary storage address of the register unit and the extended temporary storage address of the storage unit Mapping is performed so that the processing unit can directly access the data of the extended temporary storage address through the temporary storage address. In this way, the use function of the register of the processing device can be effectively expanded, and the size of instructions for data access operations can be reduced, the speed and efficiency of data reading and writing of the register can be accelerated, and the convenience of use can be increased.

在以下所列舉的各實施例中，將以相同的標號代表相同或相似的元件或組件。In the embodiments listed below, the same reference numerals will be used to represent the same or similar elements or components.

第2圖為依據本發明之一實施例之處理裝置的示意圖。在本實施例中，處理裝置200可以是單晶片8051的微控制單元(Micro Control Unit,MCU)。請參考第2圖，處理裝置200包括處理單元210、暫存器單元220與儲存裝置230。 Figure 2 is a schematic diagram of a processing device according to an embodiment of the present invention. In this embodiment, the processing device 200 may be a single chip 8051 Micro Control Unit (MCU). Please refer to FIG. 2, the processing device 200 includes a processing unit 210, a register unit 220 and a storage device 230.

處理單元210執行定址指令，以產生定址位址。其中，定址位址例如為0x8000、0x8100等，但本發明實施例不限於此。在本實施例中，處理單元210例如為中央處理單元(Central Processing Unit,CPU)。 The processing unit 210 executes an address instruction to generate an address address. Wherein, the addressing address is, for example, 0x8000, 0x8100, etc., but the embodiment of the present invention is not limited thereto. In this embodiment, the processing unit 210 is, for example, a central processing unit (CPU).

暫存器單元220耦接處理單元210。進一步來說，暫存器單元220例如透過一暫存器資料匯流排(圖未示)耦接處理單元210，使處理單元210可以與暫存器單元220進行資料傳輸。 The register unit 220 is coupled to the processing unit 210. Furthermore, the register unit 220 is coupled to the processing unit 210 via a register data bus (not shown), so that the processing unit 210 can perform data transmission with the register unit 220.

另外，暫存器單元220具有多個暫存位址及資料指標(Data Pointer)。其中，暫存器位址例如為80H到FFH，且暫存器單元220的儲存空間例如為128位元組。在本實施例中，暫存器單元220例如為特殊功能暫存器(Special Function Register,SFR)，可以對應於第1圖之特殊功能暫存器120。 In addition, the register unit 220 has a plurality of temporary storage addresses and data pointers. Among them, the register address is, for example, 80H to FFH, and the storage space of the register unit 220 is, for example, 128 bytes. In this embodiment, the register unit 220 is, for example, a special function register (SFR), which may correspond to the special function register 120 in FIG. 1.

另外，暫存器單元220主要由處理裝置200中的多個儲存空間所組成，每一儲存空間皆可執行不同之暫存器功用，例如計時計數器(TCON)等。其中，某些功能直接對應至處理單元210之指令集，因此上述功能之儲存空間被視為存在於處理單元210之內部。 In addition, the register unit 220 is mainly composed of a plurality of storage spaces in the processing device 200, and each storage space can perform a different register function, such as a timer counter (TCON). Among them, some functions directly correspond to the instruction set of the processing unit 210, so the storage space for the above functions is regarded as existing inside the processing unit 210.

儲存單元230耦接處理單元210。進一步來說，儲存單元230例如透過一記憶體匯流排240與處理單元210耦接。其中，上述記憶體匯流排240例如包括定址匯流排ABUS、資料匯流排DBUS、寫入匯流排WBUS、讀取匯流排RBUS。 The storage unit 230 is coupled to the processing unit 210. Furthermore, the storage unit 230 is coupled to the processing unit 210 through a memory bus 240, for example. The above-mentioned memory bus 240 includes, for example, an address bus ABUS, a data bus DBUS, a write bus WBUS, and a read bus RBUS.

另外，處理單元210例如透過定址匯流排ABUS對儲存單元230進行定址。處理單元210例如透過資料匯流排DBUS對儲存單元230進行資料傳輸。處理單元210例如透過寫入匯流排WBUS將寫入指令傳送至儲存單元230，以便對儲存單元230的資料進行寫入。處理單元210例如讀取匯流排RBUS將讀取指令傳送至儲存單元230，以便對儲存單元230的資料進行讀取。In addition, the processing unit 210 addresses the storage unit 230 through, for example, an addressing bus ABUS. The processing unit 210 transmits data to the storage unit 230, for example, through the data bus DBUS. The processing unit 210, for example, transmits a write command to the storage unit 230 through the write bus WBUS, so as to write data in the storage unit 230. The processing unit 210, for example, reads the bus RBUS and transmits the read command to the storage unit 230 so as to read the data of the storage unit 230.

此外，儲存單元230定義有擴充暫存器空間231，擴充暫存器空間231具有多個擴充暫存位址，其中擴充暫存位址例如為0FFFH~FFFFH，且擴充暫存器空間231例如為4KB~64KB。在本實施例中，儲存單元230可為外部記憶體，例如隨機存取記憶體(Random Access Memory, RAM)，但不以此為限。另外，擴充暫存器空間231例如為特殊功能暫存器(SRF)空間。In addition, the storage unit 230 defines an extended register space 231. The extended register space 231 has a plurality of extended register addresses, where the extended register addresses are, for example, 0FFFH~FFFFH, and the extended register space 231 is, for example, 4KB~64KB. In this embodiment, the storage unit 230 may be an external memory, such as a random access memory (Random Access Memory, RAM), but it is not limited to this. In addition, the extended register space 231 is, for example, a special function register (SRF) space.

另外，在處理單元210產生定址位址後，處理單元210會將定址位址填入暫存器單元220的資料指標中，以將暫存器單元220的暫存位址與儲存單元230之擴充暫存器空間231的擴充暫存位址進行映射。In addition, after the processing unit 210 generates the address, the processing unit 210 fills the address in the data index of the register unit 220 to expand the temporary address of the register unit 220 and the storage unit 230 The extended temporary storage address of the register space 231 is mapped.

舉例來說，在一些實施例中，假設處理單元210填入暫存器單元220之資料指標中的定址位址為0x8000，以將暫存器單元220之暫存位址與儲存單元230之擴充暫存器空間231的擴充暫存位址進行映射。For example, in some embodiments, it is assumed that the address of the processing unit 210 filled in the data index of the register unit 220 is 0x8000, so as to expand the temporary storage address of the register unit 220 and the storage unit 230 The extended temporary storage address of the register space 231 is mapped.

例如，將暫存器單元220之暫存位址所對應的暫存器的Extend 0~Extend 99映射到儲存單元230之擴充暫存器空間231的擴充暫存位址0x8000~0x8099，如表1所示。此時，擴充暫存器空間231例如為100位元組(B)。For example, map Extend 0~Extend 99 of the register corresponding to the temporary storage address of the register unit 220 to the extended temporary storage address 0x8000~0x8099 of the extended register space 231 of the storage unit 230, as shown in Table 1. Shown. At this time, the extended register space 231 is, for example, 100 bytes (B).

Figure 108144220-A0305-02-0008-1
Figure 108144220-A0305-02-0008-1

另外，在一些實施例中，假設處理單元210填入暫存器單元220之資料指標中的定址位址為0x8100，以將暫存器單元220的暫存位址與儲存單元230之擴充暫存器空間231的擴充暫存位址進行映射。 In addition, in some embodiments, it is assumed that the address of the processing unit 210 filled in the data index of the register unit 220 is 0x8100, so as to combine the temporary storage address of the register unit 220 with the extended temporary storage of the storage unit 230 The extended temporary storage address of the device space 231 is mapped.

例如，將暫存器單元220之暫存位址所對應的暫存器 Extend 0~Extend 99映射到儲存單元230之擴充暫存器空間231的擴充暫存位址0x8100H~0x8199H，如表1所示。此時，擴充暫存器空間231例如為100位元組。其餘定址位址的設定與其暫存器單元220之暫存位址與儲存單元230之擴充暫存器空間231之擴充暫存位址的映射關係則類推，故在此不再贅述。 For example, the register corresponding to the register address of register unit 220 Extend 0~Extend 99 are mapped to the extended temporary storage address 0x8100H~0x8199H of the extended register space 231 of the storage unit 230, as shown in Table 1. At this time, the extended register space 231 is, for example, 100 bytes. The setting of the remaining address addresses and the mapping relationship between the temporary storage address of the register unit 220 and the extended temporary storage address of the extended register space 231 of the storage unit 230 are analogous, so it will not be repeated here.

接著，在暫存器單元220的暫存位址與儲存單元230之擴充暫存器空間231的擴充暫存位址映射完成後，處理單元210透過暫存器單元220的暫存位址直接對儲存單元230之擴充暫存器空間231的擴充暫存位址的資料進行存取操作。 Then, after the mapping between the temporary storage address of the register unit 220 and the extended register space 231 of the storage unit 230 is completed, the processing unit 210 directly matches the temporary storage address of the register unit 220 The data of the extended temporary storage address of the extended register space 231 of the storage unit 230 is accessed.

舉例來說，在一些實施例中，假設處理單元210欲對暫存器單元220之暫存位址84H(例如暫存器)進行存取操作，例如對暫存器單元220之暫存位址84H所對應的暫存器Extend 0。接著，處理單元210會依據資料指標所指定的映射關係，透過定址匯流排ABUS直接定址到儲存單元230之擴充暫存器空間231的擴充暫存位址0x8000。 For example, in some embodiments, it is assumed that the processing unit 210 intends to access the temporary storage address 84H (such as a register) of the register unit 220, for example, to the temporary storage address of the register unit 220 The register Extend 0 corresponding to 84H. Then, the processing unit 210 directly addresses the extended temporary storage address 0x8000 of the extended temporary storage space 231 of the storage unit 230 through the addressing bus ABUS according to the mapping relationship specified by the data indicator.

之後，處理單元210可以透過寫入匯流排WBUS傳送寫入指令至儲存單元230，並透過資料匯流排DBUS對儲存單元230之擴充暫存器空間231的擴充暫存位址0x8000H進行寫入操作，亦即將資料寫入儲存單元230之擴充暫存器空間231的擴充暫存位址0x8000H。 After that, the processing unit 210 can send a write command to the storage unit 230 through the write bus WBUS, and write to the extended temporary storage address 0x8000H of the extended register space 231 of the storage unit 230 through the data bus DBUS. That is, data is written into the extended temporary storage address 0x8000H of the extended temporary storage space 231 of the storage unit 230.

另外，處理單元210可以透過讀取匯流排WBUS傳送讀取指令至儲存單元230，並透過資料匯流排DBUS對儲存單元230之擴充暫存器空間231的擴充暫存位址0x8000H進行讀取操作，亦即將資料由儲存單元230之擴充暫存器空間231的擴充暫存位址0x8000H讀出。In addition, the processing unit 210 can send a read command to the storage unit 230 through the read bus WBUS, and read the extended temporary storage address 0x8000H of the extended register space 231 of the storage unit 230 through the data bus DBUS. That is, the data is read from the extended temporary storage address 0x8000H of the extended temporary storage space 231 of the storage unit 230.

在一些實施例中，假設處理單元210欲對暫存器單元220之暫存位址C0H進行存取操作，例如對暫存器單元220之暫存位址C0H所對應的暫存器Extend 45。接著，處理單元210會依據資料指標所指定的映射關係，透過定址匯流排ABUS直接定址到儲存單元230之擴充暫存器空間231的擴充暫存位址0x8045H。In some embodiments, it is assumed that the processing unit 210 intends to access the temporary storage address C0H of the register unit 220, for example, to the register Extend 45 corresponding to the temporary storage address C0H of the register unit 220. Then, the processing unit 210 directly addresses the extended temporary storage address 0x8045H of the extended register space 231 of the storage unit 230 through the addressing bus ABUS according to the mapping relationship specified by the data indicator.

之後，處理單元210可以透過寫入匯流排WBUS傳送寫入指令至儲存單元230，並透過資料匯流排DBUS對儲存單元230之擴充暫存器空間231的擴充暫存位址0x8045H進行寫入操作，亦即將資料寫入儲存單元230之擴充暫存器空間231的擴充暫存位址0x8045H。After that, the processing unit 210 can send a write command to the storage unit 230 through the write bus WBUS, and write the extended temporary storage address 0x8045H of the extended register space 231 of the storage unit 230 through the data bus DBUS. That is, data is written into the extended temporary storage address 0x8045H of the extended register space 231 of the storage unit 230.

另外，處理單元210可以透過讀取匯流排WBUS傳送讀取指令至儲存單元230，並透過資料匯流排DBUS對儲存單元230之擴充暫存器空間231的擴充暫存位址0x8045H進行讀取操作，亦即將資料由儲存單元230之擴充暫存器空間231的擴充暫存位址0x8045H讀出。其餘擴充暫存位址的存取操作可參考如上實施例的說明，故在此不再贅述。In addition, the processing unit 210 can send a read command to the storage unit 230 through the read bus WBUS, and read the extended temporary storage address 0x8045H of the extended register space 231 of the storage unit 230 through the data bus DBUS. That is, the data is read from the extended temporary storage address 0x8045H of the extended temporary storage space 231 of the storage unit 230. For the remaining extended temporary storage address access operations, please refer to the description of the above embodiment, so it will not be repeated here.

進一步來說，暫存器單元220的暫存位址例如具有位元定址(bit addressable)功能。另外，上述具有位元定址功能的暫存位址例如包括暫存器單元220的位址80H、88H、90H、98H、A0H、A8H、B0H、B8H、C0H、C8H、D0H、D8H、E0H、E8H、F0H及F8H。如表1所示，暫存位址C0H、D8H、E8H、F8H所對應之暫存器Extend 45、Extend 62、Extend 77、Extend 92可以視為具有位元定址功能的暫存器。Furthermore, the temporary storage address of the register unit 220 has a bit addressable function, for example. In addition, the aforementioned temporary storage addresses with bit addressing function include, for example, the addresses 80H, 88H, 90H, 98H, A0H, A8H, B0H, B8H, C0H, C8H, D0H, D8H, E0H, E8H of the temporary storage unit 220. , F0H and F8H. As shown in Table 1, the temporary registers Extend 45, Extend 62, Extend 77, and Extend 92 corresponding to the temporary storage addresses C0H, D8H, E8H, and F8H can be regarded as temporary registers with bit addressing function.

當然地，表1僅示出暫存位址C0H、D8H、E8H、F8H具有位元定址功能(即暫存器Extend 45、Extend 62、Extend 77、Extend 92為具有位元定址功能的暫存器)，其為本發明實施例的一種實施範例，不用於限制本發明實施例的形式。使用者可視其需求自行調整具有位元定址功能之暫存位址的數量，亦即可增加具有位元定址功能的暫存器的數量，以擴充處理裝置200之暫存器的使用功能。Of course, Table 1 only shows that the temporary storage addresses C0H, D8H, E8H, and F8H have bit addressing functions (that is, the temporary registers Extend 45, Extend 62, Extend 77, and Extend 92 are temporary registers with bit addressing functions. ), which is an implementation example of the embodiment of the present invention, and is not used to limit the form of the embodiment of the present invention. Users can adjust the number of temporary storage addresses with bit addressing function according to their needs, and can also increase the number of registers with bit addressing function to expand the use function of the register of the processing device 200.

另外，具有位元定址功能之暫存位址所對應之儲存單元230之擴充暫存器空間231的擴充暫存位址，可以加快處理單元210對儲存單元230之擴充暫存器空間231的擴充暫存位址的資料的存取操作的速度。如此一來，更可有效地加快資料存取的速度及效率，以增加使用上的便利性。In addition, the extended temporary storage address of the extended register space 231 of the storage unit 230 corresponding to the temporary storage address with bit addressing function can speed up the expansion of the extended register space 231 of the storage unit 230 by the processing unit 210 The speed of the access operation of the data of the temporary storage address. In this way, the speed and efficiency of data access can be effectively accelerated to increase the convenience of use.

此外，傳統的微控制單元對外部記憶體進行資料存取的方式為：微控制器單元的中央處理器對外部記憶體的資料進行存取操作時，需要將外部記憶體的資料搬移至中央處理器的核中進行處理，且資料處理完成後，中央處理器再將資料搬移至外部記憶體中。In addition, the traditional micro-control unit accesses data in the external memory as follows: When the central processing unit of the microcontroller unit accesses the data in the external memory, the data in the external memory needs to be moved to the central processing unit. After the data processing is completed, the central processing unit moves the data to the external memory.

相對如上之傳統的方法來說，本發明實施例之中央處理單元210將定址位址填入資料指標中，並依據資料指標所指示的映射關係，將暫存器單元220之暫存位址直接定址到儲存單元230之擴充暫存器空間231的擴充暫存位址，以便直接對擴充暫存位址的資料進行存取操作。如此一來，本發明實施例無需將資料進行搬移的方式，可有效地減少資料存取操作之指令的大小，以加快資料存取的速度及效率，並增加使用上的便利性。Compared with the above-mentioned traditional method, the central processing unit 210 of the embodiment of the present invention fills the address address into the data index, and directs the temporary storage address of the register unit 220 to the data index according to the mapping relationship indicated by the data index. Addressed to the extended temporary storage address of the extended temporary storage space 231 of the storage unit 230, so as to directly access the data of the extended temporary storage address. In this way, the embodiment of the present invention does not need to move the data, which can effectively reduce the size of the instruction of the data access operation, accelerate the speed and efficiency of data access, and increase the convenience of use.

藉由上述實施例的說明，本發明另提出一種處理裝置的資料存取方法。第3圖為依據本發明之一實施例之處理裝置的資料存取方法的流程圖。在步驟S302中，提供儲存單元，其中儲存單元定義有擴充暫存器空間，擴充暫存器空間具有多個擴充暫存位址。Based on the description of the above-mentioned embodiments, the present invention also provides a data access method of a processing device. FIG. 3 is a flowchart of a data access method of a processing device according to an embodiment of the present invention. In step S302, a storage unit is provided, wherein the storage unit defines an extended register space, and the extended register space has a plurality of extended register addresses.

在步驟S304中，透過處理單元，執行定址指令，以產生定址位址。在步驟S306中，透過處理單元將定址位址填入暫存器單元的資料指標，以將暫存器單元的多個暫存位址與儲存單元的擴充暫存位址進行映射，使處理單元透過暫存位址直接對擴充暫存位址的資料進行存取。In step S304, an addressing instruction is executed through the processing unit to generate an addressing address. In step S306, the addressing address is filled into the data index of the register unit through the processing unit, so as to map the multiple temporary storage addresses of the register unit with the extended temporary storage address of the storage unit, so that the processing unit Access the data of the extended temporary storage address directly through the temporary storage address.

在本實施例中，暫存器單元為特殊功能暫存器，儲存單元為隨機存取記憶體，擴充暫存器空間為特殊功能暫存器空間。另外，上述暫存位址具有位元定址功能。此外，上述暫存位址包括暫存器單元的位址80H、88H、90H、98H、A0H、A8H、B0H、B8H、C0H、C8H、D0H、D8H、E0H、E8H、F0H及F8H。In this embodiment, the register unit is a special function register, the storage unit is a random access memory, and the extended register space is a special function register space. In addition, the above-mentioned temporary storage address has a bit addressing function. In addition, the aforementioned temporary storage addresses include the addresses of the temporary storage units 80H, 88H, 90H, 98H, A0H, A8H, B0H, B8H, C0H, C8H, D0H, D8H, E0H, E8H, F0H, and F8H.

綜上所述，本發明實施例所揭露之處理裝置與其資料存取方法，透過儲存單元定義有擴充暫存器空間，且擴充暫存器空間具有多個擴充暫存位址。接著，透過處理單元執行定址指令，以產生定址位址，並將定址位址填入暫存器單元的資料指標，以將暫存器單元的暫存位址與儲存單元的擴充暫存位址進行映射，使得處理單元可以透過暫存位址直接對擴充暫存位址的資料進行存取。如此一來，可以有效地擴充處理裝置之暫存器的使用功能，並減少資料存取操作之指令的大小、加快暫存器之資料讀寫的速度及效率以及增加使用上的便利性。In summary, in the processing device and its data access method disclosed in the embodiments of the present invention, an extended register space is defined through a storage unit, and the extended register space has a plurality of extended register addresses. Then, the processing unit executes the addressing command to generate the address address, and fills the address address into the data index of the register unit to convert the temporary storage address of the register unit and the extended temporary storage address of the storage unit Mapping is performed so that the processing unit can directly access the data of the extended temporary storage address through the temporary storage address. In this way, the use function of the register of the processing device can be effectively expanded, and the size of instructions for data access operations can be reduced, the speed and efficiency of data reading and writing of the register can be accelerated, and the convenience of use can be increased.

本發明雖以實施例揭露如上，然其並非用以限定本發明的範圍，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可做些許的更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention is disclosed as above by embodiments, it is not intended to limit the scope of the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to those defined by the attached patent application scope.

110：隨機存取記憶體 120：特殊功能暫存器 200：處理裝置 210：處理單元 220：暫存器單元 230：儲存單元 231：擴充暫存器空間 240：記憶體匯流排 ABUS：位址匯流排 DBUS：資料匯流排 WBUS：寫入匯流排 RBUS：讀取匯流排 00H、70H、80H、FFH、0000H：位址 0FFFH~FFFFH：擴充暫存位址 S302~S306：步驟 110: Random access memory 120: Special function register 200: processing device 210: Processing Unit 220: register unit 230: storage unit 231: Expand the register space 240: Memory bus ABUS: Address bus DBUS: data bus WBUS: Write to the bus RBUS: read the bus 00H, 70H, 80H, FFH, 0000H: address 0FFFH~FFFFH: extended temporary storage address S302~S306: steps

第1圖為微控制單元之隨機存取記憶體及特殊功能暫存器的位址示意圖。 第2圖為依據本發明之一實施例之處理裝置的示意圖。 第3圖為依據本發明之一實施例之處理裝置的資料存取方法的流程圖。 Figure 1 is a schematic diagram of the addresses of the random access memory and special function registers of the micro-control unit. Figure 2 is a schematic diagram of a processing device according to an embodiment of the present invention. FIG. 3 is a flowchart of a data access method of a processing device according to an embodiment of the present invention.

200：處理裝置 210：處理單元 220：暫存器單元 230：儲存單元 231：擴充暫存器空間 240：記憶體匯流排 ABUS：位址匯流排 DBUS：資料匯流排 WBUS：寫入匯流排 RBUS：讀取匯流排 80H、FFH、0000H：位址 0FFFH~FFFFH：擴充暫存位址 200: processing device 210: Processing Unit 220: register unit 230: storage unit 231: Expand the register space 240: Memory bus ABUS: Address bus DBUS: data bus WBUS: Write to the bus RBUS: read the bus 80H, FFH, 0000H: address 0FFFH~FFFFH: extended temporary storage address

Claims (10)

一種處理裝置，包括： 一處理單元，執行一定址指令，以產生一定址位址； 一暫存器單元，耦接該處理單元，且該暫存器單元具有多個暫存位址及一資料指標；以及 一儲存單元，耦接該處理單元，且該儲存單元該定義有一擴充暫存器空間，該擴充暫存器空間具有多個擴充暫存位址； 其中，該處理單元將該定址位址填入該資料指標，以將該暫存器單元的該些暫存位址與該儲存單元的該些擴充暫存位址進行映射，使該處理單元透過該些暫存位址直接對該些擴充暫存位址的資料進行一存取操作。 A processing device, including: A processing unit that executes a certain address instruction to generate a certain address; A register unit coupled to the processing unit, and the register unit has a plurality of temporary storage addresses and a data indicator; and A storage unit coupled to the processing unit, and the storage unit should define an extended register space, the extended register space having a plurality of extended register addresses; Wherein, the processing unit fills the address address into the data indicator to map the temporary storage addresses of the register unit with the extended temporary storage addresses of the storage unit, so that the processing unit can pass through The temporary storage addresses directly perform an access operation on the data of the extended temporary storage addresses. 如申請專利範圍第1項所述之處理裝置，其中該暫存器單元為一特殊功能暫存器。For the processing device described in item 1 of the scope of patent application, the register unit is a special function register. 如申請專利範圍第1項所述之處理裝置，其中該儲存單元為一隨機存取記憶體，該擴充暫存器空間為一特殊功能暫存器空間。For the processing device described in item 1 of the scope of patent application, the storage unit is a random access memory, and the extended register space is a special function register space. 如申請專利範圍第1項所述之處理裝置，其中該些暫存位址具有位元定址功能。For the processing device described in item 1 of the scope of patent application, the temporary storage addresses have a bit addressing function. 如申請專利範圍第4項所述之處理裝置，其中該些暫存位址包括該暫存器單元的位址80H、88H、90H、98H、A0H、A8H、B0H、B8H、C0H、C8H、D0H、D8H、E0H、E8H、F0H及F8H。For the processing device described in item 4 of the scope of patent application, the temporary storage addresses include the addresses of the temporary storage unit 80H, 88H, 90H, 98H, A0H, A8H, B0H, B8H, C0H, C8H, D0H , D8H, E0H, E8H, F0H and F8H. 一種處理裝置的資料存取方法，包括： 提供一儲存單元，其中該儲存單元定義有一擴充暫存器空間，該擴充暫存器空間具有多個擴充暫存位址； 透過一處理單元，執行一定址指令，以產生一定址位址； 透過該處理單元將該定址位址填入一暫存器單元的一資料指標，以將該暫存器單元的多個暫存位址與該儲存單元的該些擴充暫存位址進行映射，使該處理單元透過該些暫存位址直接對該些擴充暫存位址的資料進行存取。 A data access method of a processing device includes: A storage unit is provided, wherein the storage unit defines an extended register space, and the extended register space has a plurality of extended register addresses; Through a processing unit, execute a certain address command to generate a certain address address; Filling the address address into a data indicator of a register unit through the processing unit to map the plurality of temporary storage addresses of the register unit with the extended temporary storage addresses of the storage unit, The processing unit directly accesses the data of the extended temporary storage addresses through the temporary storage addresses. 如申請專利範圍第6項所述之處理裝置的資料存取方法，其中該暫存器單元為一特殊功能暫存器。For the data access method of the processing device described in item 6 of the scope of patent application, the register unit is a special function register. 如申請專利範圍第6項所述之處理裝置的資料存取方法，其中該儲存單元為一隨機存取記憶體，該擴充暫存器空間為一特殊功能暫存器空間。For the data access method of the processing device described in item 6 of the scope of patent application, the storage unit is a random access memory, and the extended register space is a special function register space. 如申請專利範圍第6項所述之處理裝置的資料存取方法，其中該些暫存位址具有位元定址功能。For the data access method of the processing device described in item 6 of the scope of patent application, the temporary storage addresses have a bit addressing function. 如申請專利範圍第9項所述之處理裝置的資料存取方法，其中該些暫存位址包括該暫存器單元的位址80H、88H、90H、98H、A0H、A8H、B0H、B8H、C0H、C8H、D0H、D8H、E0H、E8H、F0H及F8H。For the data access method of the processing device described in item 9 of the scope of patent application, the temporary storage addresses include the addresses of the register unit 80H, 88H, 90H, 98H, A0H, A8H, B0H, B8H, C0H, C8H, D0H, D8H, E0H, E8H, F0H, and F8H.
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