TWI740655B - Driving method of display device - Google Patents

Abstract

A driving method of display device is disclosed. The display device includes a light emitting element and a driving circuit. The light emitting element is switched between a first display frequency and a second display frequency. The first display frequency includes an active frame. The second display frequency includes the active frame and a skip frame. The driving method of the display device includes: driving the light emitting element by the driving circuit, so as to have a first luminance; and driving the second light emitting element by the driving circuit, so as to have a second luminance. The second luminance is lower than the first luminance.

Description

Driving method of display device

The present invention relates to a driving method of a display device, and more particularly to a driving method of a display device that reduces the brightness change by adjusting the brightness of a light-emitting element in a valid frame and a skipped frame to improve the flicker problem of the display screen.

When operating various electronic products, users often obtain relevant information through the screen presented by the display device. Generally speaking, the display device is provided with a pixel matrix in the display area, and each pixel is driven by a driving circuit to drive the light-emitting element to emit light. , Control the brightness of each pixel in order to display the picture to be presented. As an interface for visual presentation, the display quality of the display device will greatly affect the user's experience when operating an electronic product.

On the other hand, considering the power consumption of the display device, the display device can be driven by changing the display frequency to save the power consumption of the display device in a low frame rate manner. However, in this operation mode, different display frames , The brightness may be inconsistent due to the difference in the driving current. If the brightness changes too much, the user will visually feel that the screen flickers, which will affect the display quality of the display device.

In summary, the inventor of the present invention considered and designed a driving method for a display device in order to improve the problems of the conventional technology, and further enhance the industrial application.

In view of the problems described in the prior art, the purpose of the present invention is to provide a driving method of a display device to avoid the problem of screen flickering in different display frames in the low frame rate operation mode of the display device.

Based on the above objective, the present invention provides a method for driving a display device. The display device includes a light-emitting element and a driving circuit. The light-emitting element is switched between a first display frequency and a second display frequency. The first display frequency includes an active frame (active frame). frame), the second display frequency includes valid frames and skip frames. The driving method of the display device includes: driving the light-emitting element by the driving circuit to have the first brightness in the effective frame; and adjusting the driving circuit to make the light-emitting element have the second brightness in the skipped frame, and the second brightness is lower brightness.

In an embodiment of the present invention, the driving circuit can provide a light-emitting control signal to control the light-emitting time in the valid frame and the skip frame. The light-emitting control signal has the first pulse duration in the valid frame and has the first pulse duration in the skip frame. The duration of the second pulse wave, the duration of the second pulse wave is greater than the duration of the first pulse wave. In the embodiment of the present invention, the second pulse wave duration may be less than the frame time of the skipped frame.

In an embodiment of the present invention, the driving circuit can provide a clock control signal to control the anode reset time of the light-emitting element. The clock control signal has a first reset time in a valid frame and a second reset time in a skipped frame. The reset time, the second reset time is greater than the first reset time. In the embodiment of the present invention, the pulse period of the clock control signal may be smaller than the data time of the clock pulse.

In the embodiment of the present invention, the driving circuit can provide a light-emitting control signal to control the light-emitting time in the valid frame and the skipped frame, and the light-emitting control signal has the first pulse duration in the valid frame. In the skipped frame, there is a second pulse duration, the second pulse duration is greater than the first pulse duration, and a clock control signal is provided to control the anode reset time of the light-emitting element, and the clock control signal There is a first reset time in the valid frame and a second reset time in the skipped frame. The second reset time is greater than the first reset time. In the embodiment of the present invention, the second pulse wave duration may be shorter than the frame time of the skipped frame, and the pulse wave period of the clock control signal may be shorter than the clock pulse wave width.

As mentioned above, the driving method of the display device of the present invention can adjust the display brightness in the effective frame and the skipped frame to avoid the excessive difference in brightness between the effective frame and the skipped frame in the low frame rate display mode. Causes the display device to produce the problem of screen flickering.

10: Drive circuit

11: The first transistor

12: second transistor

13: The third transistor

14: The fourth transistor

15: Fifth transistor

16: sixth transistor

17: seventh transistor

18: Eighth Transistor

20: Light-emitting element

A1, A1’: Waveform of the first clock signal

A2, A2’: The second clock signal waveform

A3, A3’: Illumination control signal waveform

AR1: First anode reset time

AR2: second anode reset time

Data1~Data8: data time

C1: The first capacitor

CK1: The first clock signal

CK2: Second clock signal

CK3: The third clock signal

CK4: The fourth clock signal

CKA: Fifth clock signal

CKB: Sixth clock signal

CKC: Seventh clock signal

EM: Luminous control signal

EM ST: Illumination start signal

Ena: the first luminous clock signal

Enb: second luminous clock signal

F1: First display frame

F2: Second display frame

F3: Third display frame

H1: Duration of the first pulse

H2: Second pulse duration

Id: drive current

N1: the first node

N2: second node

N3: third node

N4: Fourth node

N5: fifth node

OVDD: high voltage source

OVSS: Low voltage source

S1: First scan signal

S2: Second scan signal

V _DATA : data voltage

V _REF : Reference voltage

VST: Start signal

In order to make the technical features, content and advantages of the present invention and its achievable effects more obvious, the present invention will be described with the following drawings: Figure 1A and Figure 1B are the driving of the display device according to the embodiment of the present invention. Schematic diagram of the circuit.

FIG. 2 is a schematic diagram of a driving method of a display device according to an embodiment of the present invention.

3A and 3B are timing diagrams of the driving method of the display device according to the embodiment of the present invention.

FIG. 4 is a schematic diagram of a driving method of a display device according to another embodiment of the present invention.

FIG. 5A and FIG. 5B are timing diagrams of a driving method of a display device according to another embodiment of the present invention.

In order to understand the technical features, content and advantages of the present invention as well as the effects that can be achieved, the present invention is described in detail with the accompanying drawings and in the form of embodiment expressions as follows, and the figures used therein are only For the purpose of illustration and auxiliary manual, it may not be the true ratio and Precise configuration, so it should not be interpreted in terms of the ratio and configuration relationship of the attached drawings, and should not limit the scope of rights of the present invention in actual implementation, and shall be described first.

In the drawings, for the sake of clarity, the thickness or width of the substrate, panel, area, line, etc. are exaggerated. Throughout the specification, the same reference numerals denote the same elements. It should be understood that when an element such as a substrate, panel, area, or circuit is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements can also be present. Conversely, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connection" can refer to a physical and/or electrical connection. Furthermore, "electrical connection" or "coupling" can mean that there are other elements between the two elements. In addition, it should be understood that although the terms "first", "second", and "third" may be used herein to describe various elements, components, regions, layers and/or parts, they are used to refer to an element, component , Region, layer and/or part are distinguished from another element, component, region, layer and/or part. Therefore, it is only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or its sequence relationship.

Unless otherwise defined, all terms used herein have the meanings commonly understood by those with ordinary knowledge in the technical field to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of related technologies and the present invention, and will not be interpreted as idealized or excessive The formal meaning, unless explicitly defined as such in this article.

Please refer to FIG. 1A and FIG. 1B, which are schematic diagrams of frequency switching of the driving circuit of the display device according to the embodiment of the present invention. Among them, FIG. 1A is a schematic diagram of a driving circuit according to an embodiment of the present invention, and FIG. 1B is a schematic diagram of frequency switching of a driving circuit according to an embodiment of the present invention. As shown in Figure 1A, each pixel in the pixel area of the display device may include a driving circuit 10 and a light-emitting element 20, which are driven The circuit 10 receives the control signal to control the light-emitting element 20 of each pixel to emit light. In this embodiment, the driving circuit 10 is a driving circuit with eight transistors and one capacitor (8T1C), but the disclosure is not limited to this, and the driving circuit 10 may also include other numbers of transistors and capacitors.

The driving circuit 10 includes a first transistor 11, a second transistor 12, a third transistor 13, a fourth transistor 14, a fifth transistor 15, a sixth transistor 16, a seventh transistor 17, and an eighth transistor 18 and the first capacitor C1. One end of the first transistor 11 is coupled to the first node N1, the other end is coupled to the reference voltage V _REF , and the control end is coupled to the first scan signal S1; one end of the second transistor 12 is coupled to the data voltage V _DATA and the other end is coupled Connected to the second node N2, the control terminal is coupled to the second scan signal S2; one end of the first capacitor C1 is coupled to the second node N2, and the other end is coupled to the third node N3; one end of the third transistor 13 is coupled to the third node N3 , The other end is coupled to the first node N1, the control end is coupled to the second scan signal S2; one end of the fourth transistor 14 is coupled to the first node N1, the other end is coupled to the fourth node N4, and the control end is coupled to the second scan Signal S2; one end of the fifth transistor 15 is coupled to the high voltage source OVDD, the other end is coupled to the fourth node N4, the control end is coupled to the third node N3; one end of the sixth transistor 16 is coupled to the fourth node N4, and the other One end is coupled to the fifth node N5, and the control end is coupled to the emission control signal EM; one end of the seventh transistor 17 is coupled to the second node N2, the other end is coupled to the reference voltage V _REF , and the control end is coupled to the emission control signal EM; One end of the eight transistor 18 is coupled to the fifth node N5, and the other end is coupled to the control end to the first scan signal S1 in a diode connection manner. One end of the light emitting element 20 is coupled to the fifth node N5, and the other end is coupled to the low voltage source OVSS.

Please refer to Figure 1B at the same time. The display device can be switched between Normal Mode and Idle Mode, that is, switching between different display frequencies. In this embodiment, the display frequency of the display device in the normal mode is 45 Hz. When the display device is switched to the power saving mode, the display frequency is reduced to 15 Hz. However, the present disclosure is not limited to this. The difference between the normal mode and the power saving mode The display frequency can be adjusted according to the needs of the display device. For example, the display frequency of the normal mode can be 60Hz, and the display frequency of the power saving mode can be 15Hz. In this embodiment, in each display frame (Frame) F1, F2, F3... in the normal mode, the driving circuit 10 will execute the procedures of reset, data writing, compensation, anode reset and light emission to drive light emission. Element 20 emits light. When switching to power saving mode, the display frame is divided into active frame and skip frame. The effective frame is the same as each display frame in normal mode, as shown in the figure. In the first display frame F1, the same reset, data writing, compensation, anode reset and light-emitting procedures are executed. If the frame is skipped, the reset, data writing and compensation procedures will not be executed, as shown in the second display In frame F2 and the third display frame F3, only the anode reset and light-emitting procedures are executed. Through the above operation, the display device can be switched from 45 Hz to 15 Hz with a low frame rate, and the power saving effect can be achieved by changing the mode of different display frequencies.

During operation, the driving circuit 10 controls the turning on or off of the sixth transistor 16 through the light emitting control signal EM, and determines whether the driving current Id flows through the light emitting element 20 to drive the light emitting element 20 to emit light. The driving circuit 10 also controls the time of the anode reset process by the first scan signal S1, and controls the time of data writing by the second scan signal S2. As shown in Figure 1B, when the display device is switched to the power saving mode, the driving circuit 10 does not perform reset, data writing, and compensation procedures in the second display frame F2 and the third display frame F3. Therefore, here In the two display frames, the transistor controlled by the second scan signal S2 is turned off and does not perform the data writing operation. However, in the first display frame F1, the transistors controlled by the first scan signal S1 and the second scan signal S2 are turned on at the same time, causing the high voltage source OVDD and the reference voltage V _REF to pull each other, resulting in the first frame of the effective frame. There is a difference in brightness between a display frame F1 and the second display frame F2 and the third display frame F3 of which the frame is skipped, thereby causing flicker during display. To solve the above-mentioned problems, the driving method of the display device of the present disclosure is further described in the following embodiments.

Please refer to FIG. 2, which is a schematic diagram of a driving method of a display device according to an embodiment of the present invention. As shown in the figure, when the display device is in the normal mode, each display frame of the light-emitting element is a valid frame, wherein the first scan signal S1 controls the first anode reset time by the first clock signal waveform A1 AR1, the second scan signal S2 controls the data writing time by the second clock signal waveform A2, and the light emission control signal EM controls the first pulse duration H1 by the light emission control signal waveform A3. When the display device is switched to the power saving mode, the display frame of the light-emitting element includes the valid frame and the skip frame. The signal control waveform of the valid frame remains unchanged. In the skip frame, since there is no data writing process, the second scan The signal S2 will be converted to the second clock signal waveform A2' with a continuous high potential, so that the controlled transistor is turned off without executing the writing process. At this time, the first clock signal waveform A1 of the first scan signal S1 also enables the driving circuit to have the first anode reset time AR1.

In this embodiment, in order to reduce the brightness difference between the effective frame and the skipped frame, during the skipped frame, the emission control signal waveform A3' of the emission control signal EM is adjusted to increase the original first pulse duration H1 to The second pulse duration H2, by increasing the pulse duration of the high potential, reduces the time for the emission control signal EM to turn on the sixth transistor 16 and shortens the emission time of the light-emitting element in the skipped frame, thereby making the skipping frame The brightness is dimmed to achieve the effect of reducing the brightness difference between the effective frame and the skipped frame.

Please refer to FIGS. 3A and 3B, which are timing diagrams of the driving method of the display device according to the embodiment of the present invention. Among them, FIG. 3A is a timing diagram of a valid frame according to an embodiment of the present invention, and FIG. 3B is a timing diagram of a skipped frame according to an embodiment of the present invention. As shown in the figure, the display frame time of a pixel can be divided into eight data times (Data1~Data8). The first scan signal S1, the second scan signal S2, and the emission control signal EM control the corresponding transistors to turn on or off, respectively. And then control the anode reset time, data writing time and light emitting time. In this embodiment, the first clock signal CK1, the second clock signal CK2, the third clock signal CK3, and the fourth clock signal CK4 are used to control the output of the first scan signal S1, and the fifth clock signal CKA, the sixth clock signal CKB, and the seventh clock signal CKC are used to control the output of the second scan signal S2. The light-emitting start signal EM ST, the first light-emitting clock signal Ena, and the second light-emitting clock signal Enb are used to control the output of the light-emitting control signal EM.

In Figure 3A, the effective frame is driven by the first scan signal S1 to control the anode reset time after the start signal VST, the second scan signal S2 to control the data writing time, and the light emission control signal EM to control Glow time. As shown in the figure, the transistors controlled by the first scan signal S1 and the second scan signal S2 are turned on at the same time, and the light-emitting control signal EM turns on the transistor for 4 data times, so that the driving current passes through the light-emitting element to emit light. When the display device is in the normal mode, the driving circuit drives the light-emitting element to emit light according to the driving mode of the effective frame. When the display device is switched to the power saving mode, the driving circuit will include both valid frame and skip frame driving methods. Please refer to Figure 1B. The operation timing of skip frame is explained as follows.

In Figure 3B, the driving method of skipping frames is that after the start signal VST, the anode reset time is controlled by the first scan signal S1, which is the same as the effective frame. However, the data writing process is not executed in the skipped frame, so the fifth clock signal CKA, the sixth clock signal CKB, and the seventh clock signal CKC are all maintained at high potential, and no pulse is generated to turn on the corresponding transistor. , That is, the second scan signal S2 keeps the transistor in the off state without performing data writing. The luminescence control signal EM is changed by the luminescence start signal EM ST, so that the pulse duration, that is, the time of the pulse signal high potential, is increased from the original 4 data time to 8, thereby controlling the transistor to turn off for a longer time Time, the light emission time of the driving current flowing through the light-emitting element is reduced, and the display brightness of the skipped frame is reduced. In this embodiment, the pulse wave duration is adjusted to 8 data times, that is, up to the frame time of one display frame. In other embodiments, the pulse wave duration can be adjusted to other pulse wave durations less than the frame time. Through the above-mentioned control of the clock signal, the control signal waveforms of the first scan signal S1, the second scan signal S2, and the emission control signal EM can be generated respectively, and the change of the control signal waveform makes the display brightness of the skipped frame lower than Effective frame display brightness, reduce The brightness change of the low display device between the effective frame and the skipped frame avoids the problem of image flickering due to excessive change.

Please refer to FIG. 4, which is a schematic diagram of a driving method of a display device according to another embodiment of the present invention. As shown in the figure, when the display device is in the normal mode, each display frame of the light-emitting element is a valid frame, wherein the first scan signal S1 controls the first anode reset time AR1 by the first clock signal waveform A1 The second scan signal S2 controls the data writing time by the second clock signal waveform A2, and the light emission control signal EM controls the first pulse duration H1 by the light emission control signal waveform A3. When the display device is switched to the power saving mode, the display frame of the light-emitting element includes the valid frame and the skip frame. The signal control waveform of the valid frame remains unchanged. In the skip frame, since there is no data writing process, the second scan The signal S2 will be converted to the second clock signal waveform A2' with a continuous high potential, so that the controlled transistor is turned off without executing the writing process.

In this embodiment, in order to reduce the brightness difference between the effective frame and the skipped frame, during the skipped frame, the first clock signal waveform A1' of the first scan signal S1 is adjusted, and the first anode reset time AR1 Increase to the second anode reset time AR2, so that the brightness of the light-emitting element in the skipped frame is reduced, and the brightness difference between the effective frame and the skipped frame is reduced. At this time, the light-emission control signal waveform A3 of the light-emission control signal EM remains unchanged, and the light-emission time is still maintained as the first pulse duration H1.

In another embodiment, in addition to adjusting the first scan signal S1 to increase the anode reset time, the emission control signal EM can be adjusted to the emission control signal waveform A3' described in the previous embodiment at the same time, and the emission time is shortened at the same time. Reduce the brightness difference between valid frames and skipped frames.

Please refer to FIGS. 5A and 5B, which are timing diagrams of a driving method of a display device according to another embodiment of the present invention. Among them, FIG. 5A is a timing diagram of a valid frame according to another embodiment of the present invention, and FIG. 5B is a timing diagram of a skipped frame according to another embodiment of the present invention. As shown in the figure, the display frame time of one pixel can be It is divided into eight data times (Data1~Data8). The first scan signal S1, the second scan signal S2 and the light-emitting control signal EM respectively control the corresponding transistors to turn on or off, and then control the anode reset time, data write time and Glow time. In this embodiment, the first clock signal CK1, the second clock signal CK2, the third clock signal CK3, and the fourth clock signal CK4 are used to control the output of the first scan signal S1, and the fifth clock signal CKA, the sixth clock signal CKB, and the seventh clock signal CKC are used to control the output of the second scan signal S2. The light-emitting start signal EM ST, the first light-emitting clock signal Ena, and the second light-emitting clock signal Enb are used to control the output of the second scan signal S2. Control the output of the luminous control signal EM.

In Figure 5A, the effective frame is driven by the first scan signal S1 to control the anode reset time after the start signal VST, the second scan signal S2 to control the data writing time, and the light emission control signal EM to control the anode reset time. Glow time. As shown in the figure, the transistors controlled by the first scan signal S1 and the second scan signal S2 are turned on at the same time, and the light-emitting control signal EM turns on the transistor for 4 data times, so that the driving current passes through the light-emitting element to emit light. When the display device is in the normal mode, the driving circuit drives the light-emitting element to emit light according to the driving mode of the effective frame. When the display device is switched to the power saving mode, the driving circuit will include both valid frame and skip frame driving methods. Please refer to Figure 1B. The operation timing of skip frame is explained as follows.

In Figure 5B, the skipping frame is driven by the first clock signal CK1, the second clock signal CK2, the third clock signal CK3, and the fourth clock signal CK4 after the start signal VST. The pulse width enables the first scan signal S1 to increase the time that the transistor is turned on to increase the anode reset time. The pulse period of the clock signal is at most the width of one clock pulse, that is, one data time. Therefore, the anode reset time is increased to one data time at most. Similarly, the data writing process is not executed during skipped frames, so the fifth clock signal CKA, the sixth clock signal CKB, and the seventh clock signal CKC are all maintained at a high level, and no pulse is generated to turn on the corresponding Transistor, the second scan signal S2 keeps the transistor at In the closed state, data writing is not performed. The luminescence control signal EM also maintains the same luminescence start signal EM ST, so that the pulse duration remains unchanged. By increasing the anode reset time, the display brightness of the skipped frame is lower than the display brightness of the effective frame, and the brightness change of the display device between the effective frame and the skipped frame is reduced, and the problem of image flicker caused by excessive change is avoided.

In other embodiments, in addition to changing the first scan signal S1 to increase the anode reset time, the pulse duration can also be adjusted by the light emission control signal EM to reduce the light emission time of the light emitting element and further reduce the display brightness of skipped frames. . In this embodiment, the pulse duration is adjusted to the frame time of one display frame at most, and the pulse period of the first scan signal S1 is adjusted to the data time of one clock width at most.

The above descriptions are merely illustrative and not restrictive. Any equivalent modifications or alterations that do not depart from the spirit and scope of the present invention should be included in the scope of the appended patent application.

A1: The first clock signal waveform

A2, A2’: The second clock signal waveform

A3, A3’: Illumination control signal waveform

AR1: First anode reset time

EM: Luminous control signal

H1: Duration of the first pulse

H2: Second pulse duration

S1: First scan signal

S2: Second scan signal

Claims (5)

A driving method of a display device, the display device includes a light emitting element and a driving circuit, the light emitting element is switched between a first display frequency and a second display frequency, the first display frequency includes an effective frame, the The second display frequency includes the effective frame and a skipped frame. The driving method of the display device includes: driving by the driving circuit to make the light-emitting element have a first brightness in the valid frame; and adjusting by the driving circuit The light-emitting element has a second brightness in the skipped frame, the second brightness is lower than the first brightness; wherein the driving circuit provides a clock control signal to control the anode reset time of the light-emitting element, and the clock The control signal has a first reset time in the valid frame and a second reset time in the skipped frame, and the second reset time is greater than the first reset time. The driving method of the display device according to claim 1, wherein the driving circuit provides a light emission control signal to control the light emission time between the valid frame and the skipped frame, and the light emission control signal has a first light emission control signal in the valid frame. The pulse wave duration has a second pulse wave duration in the skipped frame, and the second pulse wave duration is greater than the first pulse wave duration. The driving method of the display device according to claim 2, wherein the second pulse wave duration is less than one frame time of the skipped frame. The driving method of the display device according to claim 1, wherein the pulse period of the clock control signal is less than a clock pulse width. The driving method of the display device according to claim 2, wherein the second pulse wave holds The duration is less than one frame time of the skipped frame, and the pulse wave period of the clock control signal is less than one clock pulse wave width.

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