CN112530356B - Driving method of display device - Google Patents
Driving method of display device Download PDFInfo
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- CN112530356B CN112530356B CN202011607139.4A CN202011607139A CN112530356B CN 112530356 B CN112530356 B CN 112530356B CN 202011607139 A CN202011607139 A CN 202011607139A CN 112530356 B CN112530356 B CN 112530356B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
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- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The invention discloses a driving method of a display device, which comprises a light emitting element and a driving circuit, wherein the light emitting element is switched between a first display frequency and a second display frequency, the first display frequency comprises an effective frame, and the second display frequency comprises an effective frame and a skipped frame. The driving method of the display device includes: driving the light emitting element to have a first brightness in the effective frame by the driving circuit; and adjusting the light emitting element to have a second brightness in the skipped frame by the driving circuit, wherein the second brightness is lower than the first brightness.
Description
Technical Field
The present invention relates to a driving method of a display device, and more particularly, to a driving method of a display device for improving flicker problem of a display screen by adjusting brightness of a light emitting element between an active frame and a skipped frame.
Background
When operating various electronic products, a user often obtains related information through a frame presented by a display device, and in general, the display device sets a pixel matrix in a display area, wherein each pixel is driven by a driving circuit to emit light by a light emitting element, and the brightness of each pixel is sequentially controlled to display the frame to be presented. As an interface for visual presentation, the display quality of the display device will greatly affect the experience of the user when operating the electronic product.
On the other hand, considering the power consumption of the display device, the display device can save the power consumption of the display device in a low frame rate mode by changing the display frequency when in driving, but in the operation mode, the brightness inconsistency can occur between different display frames due to the difference of the driving current, if the brightness change is too large, a user can generate a visual flickering feeling of the picture, and further the display quality of the display device is affected.
In view of the foregoing, the present inventors have conceived and devised a driving method of a display device, so as to solve the problems of the prior art and further enhance the industrial implementation and utilization.
Disclosure of Invention
In view of the above problems, it is an object of the present invention to provide a driving method of a display device, which avoids the problem of flicker of the display device in different display frames in a low frame rate operation mode.
In view of the above, the present invention provides a driving method of a display device, the display device includes a light emitting element and a driving circuit, the light emitting element switches between a first display frequency and a second display frequency, the first display frequency includes an active frame (active frame), and the second display frequency includes an active frame and a skip frame (skip frame). The driving method of the display device includes: driving the light emitting element to have a first brightness in the effective frame by the driving circuit; and adjusting the light emitting element to have a second brightness in the skipped frame by the driving circuit, wherein the second brightness is lower than the first brightness.
In an embodiment of the present invention, the driving circuit may provide a light emission control signal to control a light emission time in the active frame and the skipped frame, the light emission control signal having a first pulse duration in the active frame and a second pulse duration in the skipped frame, the second pulse duration being greater than the first pulse duration. In embodiments of the present invention, the second pulse duration may be less than the frame time (frame time) of the skipped frame.
In an embodiment of the invention, the driving circuit may provide a clock control signal to control the anode reset time of the light emitting element, the clock control signal having a first reset time in the active frame and a second reset time in the skipped frame, the second reset time being greater than the first reset time. In an embodiment of the present invention, the pulse period of the clock control signal may be smaller than the clock pulse width (data time).
In an embodiment of the present invention, the driving circuit may provide a light emission control signal to control a light emission time in an active frame and a skipped frame, the light emission control signal having a first pulse duration in the active frame and a second pulse duration in the skipped frame, the second pulse duration being greater than the first pulse duration, and provide a clock control signal to control an anode reset time of the light emitting element, the clock control signal having a first reset time in the active frame and a second reset time in the skipped frame, the second reset time being greater than the first reset time. In embodiments of the present invention, the second pulse duration may be less than the frame time of the skipped frame and the pulse period of the clock control signal may be less than the clock pulse width.
In view of the above, the driving method of the display device of the present invention can avoid the problem that the display device generates flicker due to too large brightness difference between the effective frame and the skipped frame in the display mode with low frame rate by adjusting the display brightness between the effective frame and the skipped frame.
Drawings
In order to make the technical features, contents and advantages of the present invention and the technical effects that can be achieved thereof more apparent, the present invention will be described with reference to the following drawings:
fig. 1A and 1B are schematic diagrams of a driving circuit of a display device according to an embodiment of the invention.
Fig. 2 is a schematic diagram of a driving method of a display device according to an embodiment of the invention.
Fig. 3A and 3B are timing diagrams illustrating a driving method of a display device according to an embodiment of the invention.
Fig. 4 is a schematic diagram of a driving method of a display device according to another embodiment of the invention.
Fig. 5A and 5B are timing diagrams illustrating a driving method of a display device according to another embodiment of the invention.
Reference numerals illustrate:
10: driving circuit
11: first transistor
12: second transistor
13: third transistor
14: fourth transistor
15: fifth transistor
16: sixth transistor
17: seventh transistor
18: eighth transistor
20: light-emitting element
A1, A1': first clock signal waveform
A2, A2': second clock signal waveform
A3, A3': lighting control signal waveform
AR1: first anode reset time
AR2: second anode reset time
Data1 to Data8: data time
C1: first capacitor
CK1: first clock signal
CK2: second clock signal
CK3: third clock signal
CK4: fourth clock signal
CKA: fifth clock signal
CKB: sixth clock signal
CKC: seventh clock signal
EM: light emission control signal
EM ST: luminous start signal
Ena: first luminous clock signal
Enb: second light-emitting clock signal
F1: first display frame
F2: second display frame
F3: third display frame
H1: first pulse duration
H2: second pulse duration
Id: drive current
N1: first node
N2: second node
And N3: third node
N4: fourth node
N5: fifth node
OVDD: high voltage source
OVSS: low voltage source
S1: first scanning signal
S2: second scanning signal
V DATA : data voltage
V REF : reference voltage
VST: initiation signal
Detailed Description
For the purpose of facilitating understanding of the technical features, contents and advantages of the present invention and the technical effects that the present invention can achieve, the present invention will now be described in detail with reference to the accompanying drawings, and in the form of embodiments, the gist of the accompanying drawings used is only for illustration and assistance of the description, and not necessarily for true proportion and precise arrangement after the implementation of the present invention, so that the proportion and arrangement relation of the accompanying drawings should not be interpreted to limit the present invention to the actual claims to be implemented, and the present invention will be described first.
In the drawings, the thickness or width of a substrate, panel, region, line, etc. is exaggerated for clarity. Like numbers refer to like elements throughout. It will be understood that when an element such as a substrate, panel, region or line is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. "connected" as used herein may refer to physical and/or electrical connection. Furthermore, "electrically connected" or "coupled" may mean that there are other elements between the elements. Furthermore, it will be understood that, although the terms "first," "second," "third," and the like may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should be used to distinguish one element, component, region, layer and/or section from another element, component, region, layer and/or section. Therefore, for descriptive purposes only and not to be construed as indicating or implying relative importance or a sequential relationship thereof.
Unless defined otherwise, all terms used herein have meanings commonly understood by one of ordinary skill in the art to which the present invention pertains. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Fig. 1A and fig. 1B are schematic diagrams illustrating frequency switching of a driving circuit of a display device according to an embodiment of the invention. Fig. 1A is a schematic diagram of a driving circuit according to an embodiment of the invention, and fig. 1B is a schematic diagram of frequency switching of the driving circuit according to the embodiment of the invention. As shown in fig. 1A, each pixel in the pixel area of the display device may include a driving circuit 10 and a light emitting element 20, and the driving circuit 10 receives a control signal to control the light emitting element 20 of each pixel to emit light. In the present embodiment, the driving circuit 10 is a driving circuit with eight transistors and one capacitor (8T 1C), but the disclosure is not limited thereto, and the driving circuit 10 may also include other numbers of transistors and capacitors.
The driving circuit 10 includes a first transistor 11, a second transistor 12, a third transistor 13, a fourth transistor 14, a fifth transistor 15, a sixth transistor 16, a seventh transistor 17, an eighth transistor 18, and a first capacitor C1. One end of the first transistor 11 is coupled to the first node N1, and the other end is coupled to the reference voltage V REF The control end is coupled with the first scanning signal S1; one end of the second transistor 12 is coupled to the data voltage V DATA The other end is coupled with the second node N2, and the control end is coupled with the second scanning signal S2; one end of the first capacitor C1 is coupled to the second node N2, and the other end is coupled to the third node N3; one end of the third transistor 13 is coupled to the third node N3, the other end is coupled to the first node N1, and the control end is coupled to the second scan signal S2; one end of the fourth transistor 14 is coupled to the first node N1, the other end is coupled to the fourth node N4, and the control end is coupled to the second scan signal S2; one end of the fifth transistor 15 is coupled to the high voltage source OVDD, the other end is coupled to the fourth node N4, and the control end is coupled to the third node N3; one end of the sixth transistor 16 is coupled to the fourth node N4, the other end is coupled to the fifth node N5, and the control end is coupled to the emission control signal EM; one end of the seventh transistor 17 is coupled to the second node N2, and the other end is coupled to the reference voltage V REF The control end is coupled with a light-emitting control signal EM; one end of the eighth transistor 18 is coupled to the fifth node N5, and the other end is coupled to the control terminal in a diode-connected manner to the first scanSignal S1 is plotted. One end of the light emitting element 20 is coupled to the fifth node N5, and the other end is coupled to the low voltage source OVSS.
Referring to fig. 1B, the display device can be switched between a Normal Mode (Normal Mode) and a power saving Mode (Idle Mode), i.e. different display frequencies are switched. In this embodiment, the display frequency of the display device in the normal mode is 45Hz, and when the display device is switched to the power saving mode, the display frequency is reduced to 15Hz, but the disclosure is not limited thereto, and the display frequencies of the normal mode and the power saving mode may be adjusted according to the display device requirement, for example, the display frequency of the normal mode may be 60Hz, and the display frequency of the power saving mode may be 15Hz. In this embodiment, each of the display frames (frames) F1, F2, F3. in the normal mode performs the procedures of resetting, data writing, compensation, anode resetting and lighting to drive the lighting element 20 to light, and when the power saving mode is switched, the display frames are divided into an Active Frame and a Skip Frame, the Active Frame is the same as each of the display frames in the normal mode, the first display Frame F1 performs the same procedures of resetting, data writing, compensation, anode resetting and lighting, the Skip Frame does not perform the procedures of resetting, data writing and compensation, and the second display Frame F2 and the third display Frame F3 perform only the procedures of anode resetting and lighting. Through the operation, the display device can be switched from 45Hz to 15Hz with low frame rate, and the power saving effect is achieved by changing the modes of different display frequencies.
In operation, the driving circuit 10 controls the sixth transistor 16 to be turned on or off by the emission control signal EM to determine whether the driving current Id flows through the light emitting element 20 to drive the light emitting element 20 to emit light. The driving circuit 10 also controls the timing of the anode reset program by the first scan signal S1 and controls the timing of the data writing by the second scan signal S2. As shown in fig. 1B, when the display device is switched to the power saving mode, the driving circuit 10 does not perform the reset, data writing and compensation processes in the second display frame F2 and the third display frame F3, and therefore, the transistor controlled by the second scan signal S2 is turned off and does not perform the data writing operation in the two display frames. However, in the first display frame F1, the first scanThe transistors controlled by the scan signal S1 and the second scan signal S2 are turned on simultaneously to enable the high voltage source OVDD and the reference voltage V REF The first display frame F1 of the effective frame, the second display frame F2 of the skipped frame and the third display frame F3 are mutually pulled to cause the brightness difference, thereby generating the flicker phenomenon during display. To solve the above-described problems, a driving method of a display device of the present disclosure is further described in the following embodiments.
Fig. 2 is a schematic diagram illustrating a driving method of a display device according to an embodiment of the invention. As shown in the drawing, when the display device is in the normal mode, each display frame of the light emitting element is an active frame, wherein the first scan signal S1 controls the first anode reset time AR1 through the first clock signal waveform A1, the second scan signal S2 controls the data writing time through the second clock signal waveform A2, and the light emission control signal EM controls the first pulse duration H1 through the light emission control signal waveform A3. When the display device is switched to the power saving mode, the display frame of the light emitting element includes an active frame and a skipped frame, the signal control waveform of the active frame is unchanged, and in the skipped frame, since there is no data writing procedure, the second scan signal S2 is converted into a second clock signal waveform A2' with a continuous high potential, so that the controlled transistor is turned off without executing the writing procedure. At this time, the first clock signal waveform A1 of the first scan signal S1 also makes the driving circuit have the first anode reset time AR1.
In this embodiment, in order to reduce the brightness difference between the effective frame and the skipped frame, the brightness of the skipped frame is reduced by adjusting the light emission control signal waveform A3' of the light emission control signal EM, increasing the original first pulse duration H1 to the second pulse duration H2, and reducing the time for the light emission control signal EM to turn on the sixth transistor 16 by increasing the pulse duration of the high potential, thereby reducing the light emission time of the light emitting element in the skipped frame, and further darkening the brightness of the skipped frame, so as to achieve the effect of reducing the brightness difference between the effective frame and the skipped frame.
Please refer to fig. 3A and 3B, which are timing diagrams illustrating a driving method of a display device according to an embodiment of the invention. Fig. 3A is a timing diagram of an active frame according to an embodiment of the present invention, and fig. 3B is a timing diagram of a skipped frame according to an embodiment of the present invention. As shown in the figure, the display frame time of one pixel can be divided into eight Data times (Data 1 to Data 8), and the first scan signal S1, the second scan signal S2 and the light emission control signal EM respectively control the corresponding transistors to be turned on or off, so as to control the anode reset time, the Data writing time and the light emission time. In the present embodiment, the first clock signal CK1, the second clock signal CK2, the third clock signal CK3 and the fourth clock signal CK4 are used for controlling the output of the first scan signal S1, the fifth clock signal CKA, the sixth clock signal CKB and the seventh clock signal CKC are used for controlling the output of the second scan signal S2, and the light emission start signal EM ST, the first light emission clock signal Ena and the second light emission clock signal Enb are used for controlling the output of the light emission control signal EM.
In fig. 3A, the driving method of the effective frame is that the anode reset time is controlled by the first scan signal S1, the data write time is controlled by the second scan signal S2, and the light emission time is controlled by the light emission control signal EM after the start signal VST. As shown in the figure, the transistors controlled by the first scan signal S1 and the second scan signal S2 are turned on at the same time, and the light emission control signal EM turns on the transistors for 4 data periods, so that the driving current is driven to emit light through the light emitting element. When the display device is in the normal mode, the driving circuit drives the light emitting element to emit light according to the driving mode of the effective frame. When the display device is switched to the power saving mode, the driving circuit includes driving modes of both the active frame and the skipped frame, and the operation sequence of the skipped frame is described as follows with reference to fig. 1B.
In fig. 3B, the skipped frame is driven in such a manner that the anode reset time is controlled by the first scan signal S1 after the start signal VST, which is the same as the active frame. However, the data writing process is not performed in the skipped frame, so that the fifth clock signal CKA, the sixth clock signal CKB and the seventh clock signal CKC are all maintained at high level, and no pulse is generated to turn on the corresponding transistor, i.e. the second scan signal S2 keeps the transistor in the off state and the data writing is not performed. The light emission control signal EM increases the pulse duration, i.e., the time of the high potential of the pulse signal, from the original 4 data times to 8 by the change of the light emission start signal EM ST, and further controls the transistor to turn off for a longer time, so that the light emission time of the driving current flowing through the light emitting element decreases to decrease the display brightness of the skipped frame. In this embodiment, the pulse duration is adjusted to 8 data times, i.e., up to the frame time of one display frame, and in other embodiments, the pulse duration can be adjusted to other pulse durations less than the frame time. By controlling the clock signals, the control signal waveforms of the first scanning signal S1, the second scanning signal S2 and the light-emitting control signal EM can be respectively generated, and the display brightness of the skipped frame is lower than that of the effective frame by changing the control signal waveforms, so that the brightness change of the display device between the effective frame and the skipped frame is reduced, and the problem of picture flicker caused by overlarge change amplitude is avoided.
Fig. 4 is a schematic diagram illustrating a driving method of a display device according to another embodiment of the invention. As shown in the drawing, when the display device is in the normal mode, each display frame of the light emitting element is an active frame, wherein the first scan signal S1 controls the first anode reset time AR1 through the first clock signal waveform A1, the second scan signal S2 controls the data writing time through the second clock signal waveform A2, and the light emission control signal EM controls the first pulse duration H1 through the light emission control signal waveform A3. When the display device is switched to the power saving mode, the display frame of the light emitting element includes an active frame and a skipped frame, the signal control waveform of the active frame is unchanged, and in the skipped frame, since there is no data writing procedure, the second scan signal S2 is converted into a second clock signal waveform A2' with a continuous high potential, so that the controlled transistor is turned off without executing the writing procedure.
In this embodiment, in order to reduce the brightness difference between the effective frame and the skipped frame, the first clock signal waveform A1' of the first scan signal S1 is adjusted during the skipped frame, and the first anode reset time AR1 is increased to the second anode reset time AR2, so that the brightness of the light emitting device during the skipped frame is reduced, and the brightness difference between the effective frame and the skipped frame is reduced. At this time, the emission control signal waveform A3 of the emission control signal EM remains unchanged, and the emission time is still maintained to be the first pulse duration H1.
In another embodiment, in addition to adjusting the first scan signal S1 to increase the anode reset time, the emission control signal EM can be adjusted to the emission control signal waveform A3' described in the previous embodiment at the same time, and the emission time is shortened, so as to further reduce the brightness difference between the effective frame and the skipped frame.
Please refer to fig. 5A and 5B, which are timing diagrams illustrating a driving method of a display device according to another embodiment of the present invention. Fig. 5A is a timing diagram of an active frame according to another embodiment of the present invention, and fig. 5B is a timing diagram of a skipped frame according to another embodiment of the present invention. As shown in the figure, the display frame time of one pixel can be divided into eight Data times (Data 1 to Data 8), and the first scan signal S1, the second scan signal S2 and the light emission control signal EM respectively control the corresponding transistors to be turned on or off, so as to control the anode reset time, the Data writing time and the light emission time. In the present embodiment, the first clock signal CK1, the second clock signal CK2, the third clock signal CK3 and the fourth clock signal CK4 are used for controlling the output of the first scan signal S1, the fifth clock signal CKA, the sixth clock signal CKB and the seventh clock signal CKC are used for controlling the output of the second scan signal S2, and the light emission start signal EM ST, the first light emission clock signal Ena and the second light emission clock signal Enb are used for controlling the output of the light emission control signal EM.
In fig. 5A, the driving method of the effective frame is that the anode reset time is controlled by the first scan signal S1, the data write time is controlled by the second scan signal S2, and the light emission time is controlled by the light emission control signal EM after the start signal VST. As shown in the figure, the transistors controlled by the first scan signal S1 and the second scan signal S2 are turned on at the same time, and the light emission control signal EM turns on the transistors for 4 data periods, so that the driving current is driven to emit light through the light emitting element. When the display device is in the normal mode, the driving circuit drives the light emitting element to emit light according to the driving mode of the effective frame. When the display device is switched to the power saving mode, the driving circuit includes driving modes of both the active frame and the skipped frame, and the operation sequence of the skipped frame is described as follows with reference to fig. 1B.
In fig. 5B, the driving method of the skipped frame is that after the start signal VST, the first clock signal CK1, the second clock signal CK2, the third clock signal CK3 and the fourth clock signal CK4 are respectively increased by the pulse width, so that the first scan signal S1 can increase the transistor turn-on time to increase the anode reset time. The pulse period of the clock signal is at most one clock pulse wide, i.e., one data time, and thus the anode reset time is increased to at most one data time. Similarly, the data writing process is not performed in the skipped frame, so that the fifth clock signal CKA, the sixth clock signal CKB and the seventh clock signal CKC are all maintained at high level, no pulse is generated to turn on the corresponding transistor, and the second scan signal S2 keeps the transistor in the off state and the data writing is not performed. The emission control signal EM also maintains the same emission start signal EM ST so that the pulse duration is unchanged. By increasing the anode reset time, the display brightness of the skipped frame is lower than that of the effective frame, the brightness change between the effective frame and the skipped frame of the display device is reduced, and the problem of picture flicker caused by overlarge change amplitude is avoided.
In other embodiments, in addition to changing the first scan signal S1 to increase the anode reset time, the pulse duration may be adjusted by the emission control signal EM at the same time, so as to reduce the emission time of the light emitting element and further reduce the display brightness of the skipped frame. In the present embodiment, the pulse duration is adjusted to the frame time of one display frame at most, and the pulse period of the first scan signal S1 is adjusted to the data time of one clock width at most.
The foregoing is by way of example only and is not intended as limiting. Any equivalent modifications or alterations to the present invention without departing from the spirit and scope of the present invention are intended to be included in the claims.
Claims (5)
1. The driving method of the display device, the display device includes a light-emitting component and a driving circuit, the light-emitting component switches between a first display frequency and a second display frequency, the first display frequency includes an effective frame, the second display frequency includes the effective frame and a skip frame, the driving method of the display device includes:
driving the light emitting element to have a first brightness in the effective frame by the driving circuit; and
the driving circuit adjusts the light-emitting element to have a second brightness in the skipped frame, the second brightness is lower than the first brightness,
the driving circuit provides a clock control signal to control the anode reset time of the light emitting element, wherein the clock control signal has a first reset time in the effective frame and has a second reset time in the skipped frame, and the second reset time is larger than the first reset time.
2. The driving method of the display device as claimed in claim 1, wherein the driving circuit provides a light emitting control signal to control a light emitting time in the active frame and the skipped frame, the light emitting control signal having a first pulse duration in the active frame and a second pulse duration in the skipped frame, the second pulse duration being greater than the first pulse duration.
3. The driving method of a display device as claimed in claim 2, wherein the second pulse duration is less than a frame time of the skipped frame.
4. The driving method of a display device as claimed in claim 1, wherein a pulse period of the clock control signal is smaller than a clock pulse width.
5. The driving method of a display device as claimed in claim 2, wherein the second pulse duration is less than a frame time of the skipped frame, and the pulse period of the clock control signal is less than a clock pulse width.
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- 2020-09-21 TW TW109132578A patent/TWI740655B/en active
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