TWI739486B - Backplane testing system and method thereof - Google Patents

Abstract

A backplane testing system is provided. Based on the connection relationship and signal transfer relationship among a differential signal transceiver, a backplane and a loop device, the differential signal transceiver can generate a set of pseudo random binary sequence (PRBS) as a differential signal after receiving a first control command, and then can send the differential signal and receive the returned differential signal, and determine whether the differential signal sent and received are the same; and after receiving a second control command, the differential signal transceiver can generate a test signal that conforms to the IEEE-1149.6 boundary scan test standard, and then can send the test signal and receive the returned test signal through a second positive differential signal line and a second negative differential signal line, and determine whether the test signal sent and received through the second positive differential signal line is the same and whether the test signal sent and received through the second negative differential signal line is the same.

Description

Backplane test system and method

The invention relates to a test system and a method thereof, in particular to a backplane test system and a method thereof.

Generally speaking, the traditional backplane test method is to use a server, a large number of hard disks with core test chips, and expansion interface cards (Interface Card, I/F Card) to achieve, however, this method along with the test interface The increase in the number of hard disks has caused an increase in the number of hard disks used, and there is a problem of increased testing costs.

In addition, because the traditional backplane test method requires an expansion interface card, it is difficult to support a differential signal test frequency above 2.5Gbps (that is, the test frequency is low). In addition, traditional backplane testing methods cannot support differential signal lines with multiple capacitors or backplanes with repeaters. In addition, the traditional backplane test method cannot test a single signal line in the differential signal line. Furthermore, the traditional backplane test method uses a serial interface such as IIC or UART to control the cascaded hard disks, which has the problem of slow test speed.

Therefore, it is necessary to propose improved technical means to solve the above-mentioned problems.

The invention discloses a backplane test system and method.

First, the present invention discloses a backplane testing system for testing the backplane, wherein the backplane includes a plurality of Serial Attached Small Computer System Interface (SAS) ports, a first positive differential signal line, and The first negative differential signal line. The backplane test system includes: loop device and core test device. The loop device includes a plurality of dummy SAS units. The dummy SAS units are electrically connected to the SAS ports one-to-one. Each dummy SAS unit is used to receive a differential signal from a corresponding SAS port or conform to IEEE- 1149.6 Boundary scan tests standard test signals, and returns differential signals or test signals to the corresponding SAS port. The core test equipment includes a Joint Test Action Group (JTAG) interface, a control module, and a differential signal transceiver. The JTAG interface is connected to the loop device, the control module is connected to the JTAG interface, and the differential signal transceiver is connected to the control module. Group. The control module is used to send the first control command and the second control command, and control the virtual SAS units in parallel through the JTAG interface; the differential signal transceiver includes a second positive differential signal line and a second negative differential signal line, the first positive The differential signal line is connected to the second positive differential signal line and one SAS port, and the first negative differential signal line is connected to the second negative differential signal line and another SAS port. When the differential signal transceiver generates a set of Pseudo Random Binary Sequence (PRBS) as the differential signal after receiving the first control command, it is sent based on the connection relationship and signal transfer relationship between the differential signal transceiver, the backplane and the loop device Differential signal and receive the returned differential signal, and compare whether the sent and received differential signals are the same; among them, when the differential signal transceiver receives the second control command and generates a test signal conforming to the IEEE-1149.6 boundary scan test standard, respectively The test signal is sent through the second positive differential signal line and the second negative differential signal line, and based on the connection relationship and signal transmission relationship between the differential signal transceiver, the backplane and the loop device, the second positive differential signal line and the second negative differential signal line are respectively used The signal line receives the returned test signal, and the comparison passes the second positive difference Whether the test signals sent and received by the sub-signal line are the same and whether the test signals sent and received through the second negative differential signal line are the same.

In addition, the present invention discloses a backplane test method, the steps of which include: providing a backplane and a backplane test system, wherein the backplane includes a plurality of SAS connection ports, a first positive differential signal line and a first negative differential signal line, and the backplane The board test system includes a loop device and a core test device. The loop device includes a plurality of virtual SAS units. The virtual SAS units are electrically connected to the SAS ports one-to-one, and each virtual SAS unit is connected to the corresponding SAS. The port receives differential signals or test signals that meet the IEEE-1149.6 boundary scan test standard, and returns the differential signal or test signal to the corresponding SAS port. The core test device includes a control module, a differential signal transceiver and a JTAG interface, and a JTAG interface connection Loop device, the control module is connected to the JTAG interface, the differential signal transceiver is connected to the control module, the differential signal transceiver includes a second positive differential signal line and a second negative differential signal line, the first positive differential signal line is connected to the second positive differential signal Line and a SAS port, the first negative differential signal line connects the second negative differential signal line and another SAS port; the control module controls the virtual SAS units in parallel through the JTAG interface; the control module sends the first control command to Differential signal transceiver; when the differential signal transceiver generates a set of PRBS as a differential signal after receiving the first control command, it sends the differential signal to the backplane through the second positive differential signal line and the second negative differential signal line, and is based on the differential signal The connection relationship and signal transfer relationship between the transceiver, the backplane and the loop device receive the returned differential signal, and compare whether the sent and received differential signals are the same; the control module sends the second control command to the differential signal transceiver; and When the differential signal transceiver receives the second control command and generates a test signal that complies with the IEEE-1149.6 boundary scan test standard, it sends the test signal through the second positive differential signal line and the second negative differential signal line, and is based on the differential signal transceiver, The connection relationship and signal transmission relationship between the backplane and the loop device respectively receive the returned test signal through the second positive differential signal line and the second negative differential signal line, and the comparison passes Whether the test signals sent and received by the second positive differential signal line are the same and whether the test signals sent and received through the second negative differential signal line are the same.

The system and method disclosed in the present invention are as above. The difference from the prior art is that the present invention uses the control module of the core test device to control multiple virtual SAS units of the loop device in parallel through the JTAG interface; based on the differential signal transceiver and backplane The connection relationship with the loop device and the signal transmission relationship, so that after the differential signal transceiver generates a set of PRBS as the differential signal after the first control command, it can send the differential signal and receive the returned differential signal, and compare the transmission and reception of the differential signal. Whether the differential signals are the same; and after receiving the second control command, the differential signal transceiver generates a test signal that conforms to the IEEE-1149.6 boundary scan test standard, and can send the test through the second positive differential signal line and the second negative differential signal line respectively Signal and receive the returned test signal, and compare whether the test signal sent and received through the second positive differential signal line are the same and whether the test signal sent and received through the second negative differential signal line are the same.

Through the above technical means, the present invention can only use a single core test device to solve the problem of high test cost caused by the traditional backplane test system requiring a large number of hard disks with core test chips; the differential signal transceiver generates PRBS and uses boundary scan The backplane is tested in a way to perform the data transmission stress test of the differential line of the backplane and the open circuit or short circuit test of the differential line of the backplane, thereby achieving the technical effect of improving the test coverage. In addition, the present invention can support a backplane with a repeater for testing. In addition, the control module of the present invention can use the JTAG interface to control these virtual SAS units in parallel to improve the test speed. Furthermore, the present invention uses a loop device to replace the expansion interface card of the traditional backplane test system, so that the circuit is shorter and the connection is more reliable.

50: backplane

52: SAS port

54: The first positive differential signal line

54a: The first positive differential signal sending unit

54b: The first positive differential signal receiving unit

56: The first negative differential signal line

56a: The first negative differential signal sending unit

56b: The first negative differential signal receiving unit

60: Virtual SAS unit

74: The second positive differential signal line

74a: The second positive differential signal sending unit

74b: The second positive differential signal receiving unit

76: The second negative differential signal line

76a: The second negative differential signal sending unit

76b: The second negative differential signal receiving unit

100: Backplane test system

110: Loop device

120: core test device

124: JTAG interface

126: Control Module

128: Differential signal transceiver

Step 210: Provide backplane and backplane test system

Step 220: The control module controls the virtual SAS units in parallel through the JTAG interface

Step 230: the control module sends the first control command to the differential signal transceiver

Step 240: When the differential signal transceiver generates a set of PRBS as the differential signal after receiving the first control command, it sends the differential signal to the backplane through the second positive differential signal line and the second negative differential signal line, and transmits and receives based on the differential signal The connection of the device, the backplane and the loop device The connection relationship and signal transfer relationship receive the returned differential signal, and compare whether the sent and received differential signals are the same

Step 250: the control module sends the second control command to the differential signal transceiver

Step 260: When the differential signal transceiver generates a test signal conforming to the IEEE-1149.6 boundary scan test standard after receiving the second control command, it sends the test signal through the second positive differential signal line and the second negative differential signal line respectively, and based on the difference The connection relationship and signal transmission relationship between the signal transceiver, the backplane and the loop device respectively receive the returned test signal through the second positive differential signal line and the second negative differential signal line, and compare the transmission and reception through the second positive differential signal line Whether the test signals are the same and whether the test signals sent and received through the second negative differential signal line are the same

Figure 1 is a system block diagram of an embodiment of the backplane test system of the present invention.

FIG. 2 is a flowchart of an embodiment of the backplane test method performed by the backplane test system of FIG. 1. FIG.

The following describes the implementation of the present invention in detail with the drawings and embodiments, so as to fully understand and implement the implementation process of how the present invention uses technical means to solve technical problems and achieve technical effects.

Please refer to "Figure 1" first. "Figure 1" is a system block diagram of an embodiment of the backplane test system of the present invention. The backplane testing system 100 can be used to test the backplane 50, where the backplane 50 can include a plurality of SAS connection ports 52, a first positive differential signal line 54 and a first negative differential signal line 56. In this embodiment, the backplane 50 may include, but is not limited to, two SAS connection ports 52.

In this embodiment, the backplane test system 100 may include: a loop device 110 and a core test device 120. The loop device 110 includes a plurality of virtual SAS units 60, and the virtual SAS units 60 are electrically connected to the SAS connection ports 52 one-to-one. In other words, the number of virtual SAS units 60 is the same as the number of SAS connection ports 52, and the virtual SAS units 60 correspond to different SAS connection ports 52. In this embodiment, the number of virtual SAS units 60 is two. Each virtual SAS unit 60 can receive a differential signal or a test signal conforming to the IEEE-1149.6 boundary scan test standard from the corresponding SAS port 52, and return the differential signal or test signal to the corresponding SAS port 52. In other words, each virtual SAS unit 60 has the characteristic of returning the signal it receives.

In this embodiment, the core test device 120 may include a JTAG interface 124, a control module 126, and a differential signal transceiver 128, where the JTAG interface 124 is connected to the loop device 110, the control module 126 is connected to the JTAG interface 124, and the differential signal transceiver 128 128 is connected to the control module 126.

The differential signal transceiver 128 includes a second positive differential signal line 74 and a second negative differential signal line 76. The first positive differential signal line 54 is connected to the second positive differential signal line 74 and a SAS port 52. The first negative differential signal line 56 is connected to the second negative differential signal line 76 and another SAS connection port 52. In more detail, the first positive differential signal line 54 includes a first positive differential signal transmitting unit 54a and a first positive differential signal receiving unit 54b, and the first negative differential signal line 56 includes a first negative differential signal transmitting unit 56a and a first positive differential signal receiving unit 54b. The negative differential signal receiving unit 56b, the second positive differential signal line 74 includes a second positive differential signal sending unit 74a and a second positive differential signal receiving unit 74b, and the second negative differential signal line 76 includes a second negative differential signal sending unit 76a and The second negative differential signal receiving unit 76b, the first positive differential signal sending unit 54a is connected to the second positive differential signal receiving unit 74b, the first positive differential signal receiving unit 54b is connected to the second positive differential signal sending unit 74a, the first positive The differential signal sending unit 54a and the first positive differential signal receiving unit 54b are connected to a SAS port 52, the first negative differential signal sending unit 56a is connected to the second negative differential signal receiving unit 76b, and the first negative differential signal receiving unit 56b is connected to the second negative differential signal receiving unit 76b. The two negative differential signal sending units 76a are connected, and the first negative differential signal sending unit 56a and the first negative differential signal receiving unit 56b are connected to another SAS connection port 52. The first positive differential signal sending unit 54a and the second positive differential signal sending unit 74a are used to send positive differential signals, and the first positive differential signal receiving unit 54b and the second positive differential signal receiving unit 74b are used to receive positive differential signals. The first negative differential signal sending unit 56a and the second negative differential signal sending unit 76a are used for sending negative differential signals, and the first negative differential signal receiving unit 56b and the second negative differential signal receiving unit 76b are used for receiving negative differential signals.

In this embodiment, the JTAG interface 124, the control module 126, and the differential signal transceiver 128 can transmit signals and data in a wired manner. In actual implementation, the software or firmware stored in the machine-readable storage medium can be executed by one or more general-purpose or special-purpose programmable microprocessors to generate the control module 126.

Next, please refer to "Figure 2". "Figure 2" is a flow chart of an embodiment of the backplane testing method performed by the backplane test system of "Figure 1". The steps include: providing backplane and backplane testing System (step 210); the control module controls the virtual SAS units in parallel through the JTAG interface (step 220); the control module sends the first control command to the differential signal transceiver (step 230); when the differential signal transceiver receives the first When a set of PRBS is generated as the differential signal after the control command, the differential signal is sent to the backplane through the second positive differential signal line and the second negative differential signal line, and based on the connection relationship between the differential signal transceiver, the backplane and the loop device The signal transfer relationship receives the returned differential signal and compares whether the sent and received differential signals are the same (step 240); the control module sends a second control command to the differential signal transceiver (step 250); and when the differential signal transceiver When a test signal conforming to the IEEE-1149.6 boundary scan test standard is generated after receiving the second control command, the test signal is sent through the second positive differential signal line and the second negative differential signal line respectively, based on the differential signal transceiver, backplane and loop The connection relationship and signal transmission relationship of the device receive the returned test signals through the second positive differential signal line and the second negative differential signal line respectively, and compare whether the test signals sent and received through the second positive differential signal line are the same and pass the first Whether the test signals sent and received by the two negative differential signal lines are the same (step 260).

In step 220, since the control module 126 controls the virtual SAS units 60 in parallel through the JTAG interface 124, the test speed can be improved.

In step 240, since the differential signal can be composed of a positive differential signal and a negative differential signal, the differential signal transceiver 128 needs to pass through the second positive differential signal sending unit 74a of the second positive differential signal line 74 and the second negative differential signal line. The second negative differential signal sending unit 76a of 76 sends a differential signal to the first positive differential signal receiving unit 54b of the first positive differential signal line 54 and the first negative differential signal receiving unit 56b of the first negative differential signal line 56 that are correspondingly connected. , The first positive differential signal receiving unit 54b of the first positive differential signal line 54 and the first negative differential signal receiving unit 56b of the first negative differential signal line 56 can transmit the received differential signals to the corresponding SAS connections Port 52. The SAS connection ports 52 can transmit the received differential signals to the corresponding virtual SAS units 60. The virtual SAS units 60 return the received differential signals based on the characteristic of returning the received signals. Signals are returned to the corresponding SAS ports 52, and the SAS ports 52 can transmit the differential signals returned by the virtual SAS units 60 to the first positive differential signal transmission of the corresponding first positive differential signal line 54 The first negative differential signal sending unit 56a of the unit 54a and the first negative differential signal line 56, the first positive differential signal sending unit 54a of the first positive differential signal line 54 and the first negative differential signal of the first negative differential signal line 56 The sending unit 56a can transmit the differential signals returned by the virtual SAS units 60 to the second negative differential signal between the second positive differential signal receiving unit 74b of the second positive differential signal line 74 and the second negative differential signal line 76 that are connected correspondingly. Signal receiving unit 76b.

The differential signal transceiver 128 can compare whether the sent and received differential signals are the same. If the differential signal transceiver 128 compares the differential signal sent and received is different, it can only judge that the backplane 50 fails the test, but It cannot be clearly determined whether the first positive differential signal line 54 has an abnormal state, or the first negative differential signal line 56 has an abnormal state, or both the first positive differential signal line 54 and the first negative differential signal line 56 have an abnormal state.

In addition, in this step, the test frequency of the differential signal can be adjusted to perform a data transmission stress test. In this embodiment, the backplane test system 100 can support a 12Gbps differential through the design of the loop device 110 and the core test device 120 described above. Signal test frequency.

Steps 250 and 260 can be used to solve the above-mentioned problems. The differential signal transceiver 128 can test whether the first positive differential signal line 54 and the first negative differential signal line 56 are abnormal by a boundary scan (Boundary Scan) method. In step 260, the differential signal transceiver 128 generates a test signal after receiving the second control command from the control module 126. Since the test signal is a pulse signal, only a single line is required for transmission, unlike the differential signal consisting of a positive differential signal and a positive differential signal. The negative differential signal is composed of a differential line pair for transmission, so the differential signal transceiver 128 can separately pass through the second positive differential signal sending unit 74a of the second positive differential signal line 74 and the second negative differential signal line 76 of the second negative differential signal line 76. The differential signal sending unit 76a, so when the test signal generated by the differential signal transceiver 128 can pass through the second positive differential signal sending unit 74a of the second positive differential signal line 74 and the second negative differential signal line 76 at the same time or at different times The two negative differential signal sending units 76a send to the first positive differential signal receiving unit 54b of the first positive differential signal line 54 and the first negative differential signal receiving unit 56b of the first negative differential signal line 56 correspondingly connected, and then the test signal It can be sent back to the differential through the first positive differential signal receiving unit 54b, the SAS port 52, the virtual SAS unit 60, the SAS port 52, the first positive differential signal sending unit 54a, and the second positive differential signal receiving unit 74b in sequence. The signal transceiver 128, and sequentially passes through the first negative differential signal receiving unit 56b, the SAS port 52, the virtual SAS unit 60, the SAS port 52, the first negative differential signal sending unit 56a, and the second negative differential signal receiving unit 76b And it is sent back to the differential signal transceiver 128.

Finally, the differential signal transceiver 128 compares whether the test signals sent and received through the second positive differential signal line 74 are the same, and whether the test signals sent and received through the second negative differential signal line 76 are the same. If the differential signal transceiver 128 compares it to pass the second positive differential signal When the test signal sent and received by the line 74 is different, it can be determined that the first positive differential signal line 54 has an abnormal state (when the first positive differential signal line 54 includes a capacitor, it is determined that the capacitor has an open circuit state; when the first positive differential signal line 54 includes a capacitor, it is determined that the capacitor has an open circuit state; When the signal line 54 does not include a capacitor, it is judged that the first positive differential signal line 54 is in a short-circuit state); if the differential signal transceiver 128 compares that the test signal sent and received through the second positive differential signal line 74 is the same, that is It can be determined that the first positive differential signal line 54 is normal. If the differential signal transceiver 128 compares the difference between the test signals sent and received through the second negative differential signal line 76, it can determine that the first negative differential signal line 56 has an abnormal state (when the first negative differential signal line 56 includes When a capacitor is used, it is judged that the capacitor has an open state; when the first negative differential signal line 56 does not include a capacitor, it is judged that the first negative differential signal line 56 has a short-circuit state); if the differential signal transceiver 128 compares it to pass the first When the two negative differential signal lines 76 send and receive the same test signal, it can be determined that the first negative differential signal line 56 is normal.

Therefore, the backplane test system 100 can perform the data transmission stress test of the differential circuit of the backplane based on the same system architecture (i.e. step 240), and can also perform the open circuit or short circuit test of the differential circuit of the backplane (i.e. step 260), and then Improve test coverage.

In summary, it can be seen that the difference between the present invention and the prior art is that the control module of the core test device controls the multiple virtual SAS units of the loop device in parallel through the JTAG interface; based on the differential signal transceiver, the backplane and the loop device The connection relationship and the signal transmission relationship, so that after the differential signal transceiver generates a set of PRBS as the differential signal after the first control command, it can send the differential signal and receive the returned differential signal, and compare whether the differential signal sent and received is The same; and after receiving the second control command, the differential signal transceiver generates a test signal conforming to the IEEE-1149.6 boundary scan test standard, and can send the test signal through the second positive differential signal line and the second negative differential signal line respectively And receive the returned test signal, and compare whether the test signal sent and received through the second positive differential signal line are the same and whether the test signal sent and received through the second negative differential signal line are the same.

Through the above technical means, the present invention can solve the problem of high test cost in the prior art; the differential signal transceiver generates PRBS and uses the boundary scan method to test the backplane to perform the data transmission stress test of the differential line of the backplane The open circuit or short circuit test of the differential circuit with the backplane, thereby achieving the technical effect of improving the test coverage. In addition, the present invention can support a backplane with a repeater for testing. In addition, the control module of the present invention can use the JTAG interface to control these virtual SAS units in parallel to improve the test speed. Furthermore, the present invention uses a loop device to replace the expansion interface card of the traditional backplane test system, so that the circuit is shorter and the connection is more reliable.

Although the present invention is disclosed in the foregoing embodiments as above, it is not intended to limit the present invention. Anyone familiar with similar art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of patent protection shall be subject to the definition of the scope of patent application attached to this specification.

50: backplane

52: SAS port

54: The first positive differential signal line

54a: The first positive differential signal sending unit

54b: The first positive differential signal receiving unit

56: The first negative differential signal line

56a: The first negative differential signal sending unit

56b: The first negative differential signal receiving unit

60: Virtual SAS unit

74: The second positive differential signal line

74a: The second positive differential signal sending unit

74b: The second positive differential signal receiving unit

76: The second negative differential signal line

76a: The second negative differential signal sending unit

76b: The second negative differential signal receiving unit

100: Backplane test system

110: Loop device

120: core test device

124: JTAG interface

126: Control Module

128: Differential signal transceiver

Claims (8)

A backplane test system for testing a backplane. The backplane includes a plurality of Serial Attached Small Computer System Interface (SAS) ports, a first positive differential signal line, and a first negative Differential signal line, the backplane test system includes: a loop device, including a plurality of dummy SAS units, the dummy SAS units are electrically connected to the SAS connection ports one-to-one, and each dummy SAS unit uses To receive a differential signal or a test signal conforming to the IEEE-1149.6 boundary scan test standard from the corresponding SAS port, and return the differential signal or the test signal to the corresponding SAS port; and a core test device, including : A Joint Test Action Group (JTAG) interface, connected to the loop device; a control module, connected to the JTAG interface, used to send a first control command and a second control command, and through the The JTAG interface controls the virtual SAS units in parallel; and a differential signal transceiver connected to the control module, and includes a second positive differential signal line and a second negative differential signal line, the first positive differential signal line is connected to the The second positive differential signal line is connected to one of the SAS ports, and the first negative differential signal line is connected to the second negative differential signal line and the other SAS port; Wherein, when the differential signal transceiver generates a set of pseudo random binary sequence (Pseudo Random Binary Sequence, PRBS) as the differential signal after receiving the first control command, it is based on the differential signal transceiver, the backplane and the loop device The connection relationship and the signal transfer relationship between the transmission of the differential signal and the reception of the returned differential signal, and compare whether the differential signal sent and received are the same; wherein, when the differential signal transceiver receives the second control command, it generates a coincidence When the test signal of the IEEE-1149.6 boundary scan test standard is used, the test signal is sent through the second positive differential signal line and the second negative differential signal line respectively, and is based on the differential signal transceiver, the backplane, and the loop device The connection relationship and the signal transmission relationship are respectively received through the second positive differential signal line and the second negative differential signal line to receive the returned test signal, and compare whether the test signal sent and received through the second positive differential signal line is The same and whether the test signals sent and received through the second negative differential signal line are the same; wherein, when the differential signal transceiver compares the test signals sent and received through the second positive differential signal line to be different, it is determined The first positive differential signal line has an abnormal state; when the differential signal transceiver compares the difference between the test signal sent and received through the second negative differential signal line, it is determined that the first negative differential signal line has an abnormal state. The backplane test system according to claim 1, wherein the second positive differential signal line includes a second positive differential signal sending unit and a second positive differential signal receiving unit, the The second negative differential signal line includes a second negative differential signal sending unit and a second negative differential signal receiving unit. The backplane test system according to claim 1, wherein when the differential signal transceiver compares the difference signal sent and received, it is determined that the backplane fails the test. The backplane test system according to claim 1, wherein the backplane test system supports a test frequency of the differential signal of 12 Gbps. A backplane testing method includes the following steps: providing a backplane and a backplane test system, wherein the backplane includes a plurality of SAS connection ports, a first positive differential signal line and a first negative differential signal line, The backplane test system includes a loop device and a core test device. The loop device includes a plurality of virtual SAS units. The virtual SAS units are electrically connected to the SAS ports one-to-one, and each virtual SAS unit uses To receive a differential signal or a test signal conforming to the IEEE-1149.6 boundary scan test standard from the corresponding SAS port, and return the differential signal or the test signal to the corresponding SAS port, the core test device includes a control Module, a differential signal transceiver and a JTAG interface, the JTAG interface is connected to the loop device, the control module is connected to the JTAG interface, the differential signal transceiver is connected to the control module, the differential signal transceiver includes a second A positive differential signal line and a second negative differential signal line, the first positive differential signal line is connected to the second positive differential signal line and one of the SAS ports, and the first negative differential signal line is connected to the second negative differential signal line With another SAS connection port; the control module controls the virtual SAS units in parallel through the JTAG interface; the control module sends a first control command to the differential signal transceiver; When the differential signal transceiver generates a set of PRBS as the differential signal after receiving the first control command, it sends the differential signal to the backplane through the second positive differential signal line and the second negative differential signal line, and is based on The differential signal transceiver, the connection relationship between the backplane and the loop device and the signal transmission relationship receive the returned differential signal, and compare whether the differential signal sent and received is the same; the control module sends a second control Command to the differential signal transceiver; and when the differential signal transceiver generates the test signal conforming to the IEEE-1149.6 boundary scan test standard after receiving the second control command, it passes through the second positive differential signal line and the second The negative differential signal line sends the test signal, and based on the differential signal transceiver, the connection relationship between the backplane and the loop device, and the signal transmission relationship, the second positive differential signal line and the second negative differential signal line receive and return the signal. And compare whether the test signal sent and received through the second positive differential signal line are the same and whether the test signal sent and received through the second negative differential signal line are the same; where, when the differential signal When the transceiver compares and compares that the test signal sent and received through the second positive differential signal line is different, it determines that the first positive differential signal line has an abnormal state; when the differential signal transceiver compares to pass the second negative differential signal When the test signal sent and received by the signal line is different, it is determined that the first negative differential signal line has an abnormal state. The backplane test method according to claim 5, wherein the second positive differential signal line includes a second positive differential signal transmitting unit and a second positive differential signal receiving unit, the The second negative differential signal line includes a second negative differential signal sending unit and a second negative differential signal receiving unit. The backplane test method according to claim 5, wherein the backplane test method further includes the following steps: when the differential signal transceiver compares the difference signal that it sends and receives is different, it is determined that the backplane cannot pass test. The backplane test method according to claim 5, wherein the backplane test system supports a test frequency of the differential signal of 12 Gbps.

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