TWI733142B - Electronic package - Google Patents

Abstract

An electronic package is that at least two heat-dissipating adhesives are disposed on a multi-chip package body including a plurality of electronic components, and the materials of the at least two heat-dissipating adhesives are different from each other, so that when a heat sink is disposed on the two heat-dissipating adhesives, even if any one of the two heat-dissipating adhesives is formed in a film body due to being pressed, the area of the large film body must be smaller than the area of the upper surface of the multi-chip package body, so structural stress can be prevented from being concentrated on the corners of the electronic components.

Description

Electronic package

The present invention relates to a packaging structure, in particular to a heat-dissipating electronic package.

With the increase in the function and processing speed of electronic products, the semiconductor chip as the core component of the electronic product needs to have higher density electronic circuits (Electronic Circuits), so the semiconductor chip will generate a larger amount of heat energy during operation. . Furthermore, since the traditional encapsulant system for coating the semiconductor chip is a poor heat transfer material with a thermal conductivity of only 0.8W/mk (that is, the heat dissipation efficiency is not good), if the semiconductor chip cannot be effectively dissipated Heat will cause damage to semiconductor chips and product reliability issues.

Therefore, in order to quickly dissipate the heat to the outside, the industry usually configures a heat sink (Heat Sink or Heat Spreader) in the semiconductor package to dissipate the heat generated by the semiconductor chip through the heat sink.

With the evolution of technology, the demand for electronic products has become smaller and smaller. The industry has combined multiple chips into a multi-chip package structure with a larger number of contacts (I/O), such as a multi-chip module (Multi-Chip Module). ) Or multi-chip package (Multi Chip Package) to greatly increase the computing power of the processor and reduce the delay time of signal transmission. However, due to the requirements of multi-chip operation, it is also necessary to take into account the design of heat dissipation. However, the multi-chip package structure shown in Figure 1A (its (The packaging glue and heat sink are omitted in the figure). If multiple semiconductor chips 11 are arranged on the packaging substrate 10, during the process of setting the heat sink, the heat sink will squeeze the heat-dissipating glue 12a to make the heat-dissipating glue 12a Spread out the semiconductor chip 11, so that the separately arranged heat dissipating glue materials 12a (as shown in Figure 1A) are connected to each other into a large piece of heat dissipating glue 12b (as shown in Fig. 1B, the packaging glue and heat dissipation are omitted in the figure). Pieces).

However, with more and more functional requirements, the number of semiconductor chips 11 has also increased, and the overall planar packaging area of the packaging substrate 10 has also become larger. Therefore, the storage modulus of the heat sink 12b ( The material characteristics such as storage modulus), hardness and thermal expansion coefficient are related to the storage modulus, hardness and thermal expansion coefficient (CTE) of the large piece of heat dissipation colloid 12b and the heat sink, semiconductor chip 11 and packaging colloid. The difference is that as the packaging area becomes larger and larger, the stress at the corners of the semiconductor chip 11 will be too large. As a result, the semiconductor chip 11 or the primer (not shown) will be easily broken during the subsequent manufacturing process, resulting in reliability. Poor and low process yield problems.

Therefore, how to overcome the various problems of the above-mentioned conventional technology has actually become a problem that the industry urgently needs to overcome.

In view of the various deficiencies of the above-mentioned conventional technologies, the present invention provides an electronic package including: a multi-chip package including a plurality of electronic components; at least two types of heat-dissipating materials are arranged on the multi-chip package, wherein the The materials of at least two heat-dissipating materials are different from each other.

In the aforementioned electronic package, one of the at least two heat-dissipating glue materials is defined as the first heat-dissipating glue material, and the other heat-dissipating glue material is defined as the second heat-dissipating glue material. Several electronic components are defined as a layout area between the surfaces on the same side, and the first heat-dissipating glue material is arranged on the plurality of electronic components, and the second heat-dissipating glue material is arranged on the periphery of the first heat-dissipating glue material. Located in the deployment area, wherein the thermal conductivity of the first heat-dissipating adhesive material is greater than that of the second heat-dissipating adhesive material, and the storage modulus of the second heat-dissipating adhesive material is lower than the storage modulus of the first heat-dissipating adhesive material .

For example, the first heat-dissipating adhesive material covers the surface of the plurality of electronic components. The second heat-dissipating adhesive material is all over the layout area; or, the second heat-dissipating adhesive material is arranged on the edge of the surface corresponding to the plurality of electronic components in a plurality of rings, but does not cover the layout area; or, the first 2. The heat-dissipating glue material is arranged at the corners of the plurality of electronic components, but the arrangement area is not covered.

In another aspect, the surface of at least one of the plurality of electronic components is provided with the first heat-dissipating glue material and the second heat-dissipating glue material at the same time.

In another aspect, the surface of at least one of the plurality of electronic components is provided with the first heat-dissipating glue material and the third heat-dissipating glue material at the same time, and the material constituting the third heat-dissipating glue material is different from that of the first heat-dissipating glue material. The materials of a heat-dissipating glue material and the second heat-dissipating glue material. For example, the thermal conductivity of the third heat-dissipating glue material is between the heat-conductivity of the first heat-dissipating glue and the heat-conductivity of the second heat-dissipating glue, and the storage modulus of the third heat-dissipating glue and the second heat-dissipating glue The storage modulus of the heat-dissipating adhesive material is lower than the storage modulus of the first heat-dissipating adhesive material.

In another aspect, a third heat-dissipating glue material is formed in the arrangement area, and the material constituting the third heat-dissipating glue material is different from the materials constituting the first heat-dissipating glue material and the second heat-dissipating glue material. For example, the second heat-dissipating glue material is arranged along the non-corner of the surface edge of the electronic component, and the third heat-dissipating glue material is arranged at the corner of the electronic component. Furthermore, the storage modulus of the third heat-dissipating glue material is lower than the storage modulus of the second heat-dissipating glue material.

In the aforementioned electronic package, the multi-chip package further includes a carrying structure for carrying and electrically connecting the plurality of electronic components.

In the aforementioned electronic package, the multi-chip package includes a packaging layer covering the plurality of electronic components and exposing the upper surface of the plurality of electronic components.

The aforementioned electronic package includes a heat dissipating element bonded to the plurality of electronic components by the heat dissipating adhesive material.

It can be seen from the above that the electronic package of the present invention mainly deploys at least two heat-dissipating materials on the multi-chip package, so that after the heat-dissipating parts are installed, even if any heat-dissipating materials are compressed, a large area is formed. The area of the chip body can be smaller than the area of the upper surface of the multi-chip package. Therefore, compared with the prior art, the electronic package of the present invention can prevent the structural stress from being concentrated on the corners of the electronic components, thereby avoiding subsequent During the manufacturing process, the electronic components are broken, resulting in poor reliability and low process yield.

10‧‧‧Packaging substrate

11‧‧‧Semiconductor chip

12a‧‧‧Thermal plastic material

12b‧‧‧Heat Dissipating Gel

2,2’,2”,6‧‧‧electronic package

2a‧‧‧Multi-chip package

20‧‧‧Bearing structure

20’‧‧‧Line structure

200‧‧‧Conductor

201,202‧‧‧Carrier Board

21,21’‧‧‧Electronic components

21a‧‧‧working surface

21b‧‧‧Inactive surface

21c‧‧‧ side

210‧‧‧Conductive bump

211‧‧‧ Primer

22‧‧‧Packaging layer

22a‧‧‧First surface

22b‧‧‧Second surface

23,23’‧‧‧Radiator

230‧‧‧Radiator

231‧‧‧Support foot

24‧‧‧Adhesive layer

25‧‧‧Conductive element

31‧‧‧The first heat dissipation plastic material

32‧‧‧Second heat-dissipating adhesive material

33‧‧‧The third heat-dissipating adhesive

S‧‧‧layout area

FIG. 1A is a schematic partial top view of the conventional multi-chip package structure.

FIG. 1B is a partial top view schematic diagram of the multi-chip package structure of FIG. 1A after the heat sink is installed.

Figure 2 is a schematic cross-sectional view of the electronic package of the present invention.

Figures 2'and 2" are schematic cross-sectional views of other embodiments of the electronic package of the present invention.

3A, 3B, and 3C are partial top views of different aspects of the electronic package of FIG. 2.

4A and 4B are schematic partial top views of various layout patterns of the heat-dissipating adhesive material on one of the electronic components of the electronic package of FIG. 2.

Figures 5A and 5B are schematic partial top views of various layout patterns of heat-dissipating adhesives on all electronic components of the electronic package of Figure 2.

Fig. 6 is a schematic cross-sectional view of another embodiment of Fig. 2.

The following specific examples illustrate the implementation of the present invention. Those familiar with the art can easily understand the other advantages and effects of the present invention from the contents disclosed in this specification.

It should be noted that the structure, ratio, size, etc. shown in the drawings in this manual are only used to match the content disclosed in the manual for the understanding and reading of those who are familiar with the art, and are not intended to limit the implementation of the present invention. Therefore, it does not have any technical significance. Any structural modification, proportional relationship change or size adjustment, without affecting the effects and objectives that can be achieved by the present invention, should still fall within the scope of the present invention. The technical content disclosed by the invention can be covered. At the same time, terms such as "upper", "lower", "first", "second" and "one" cited in this manual are only for ease of description and are not intended to limit the scope of the present invention. The scope of implementation and the change or adjustment of the relative relationship shall be regarded as the scope of the implementation of the present invention without substantive changes to the technical content.

FIG. 2 is a schematic cross-sectional view of the electronic package 2 of the present invention. As shown in Figure 2, the electronic package 2 includes: a multi-chip package 2a (which includes a carrying structure 20, A plurality of electronic components 21, 21' and encapsulation layer 22), a first heat-dissipating glue material 31, a second heat-dissipating glue material 32, and a heat sink 23.

The carrying structure 20 is in the form of a single carrier board (as shown in Figure 2) or in the form of multiple carrier boards 201, 202 electrically stacked on each other through a plurality of conductors 200 (which can be covered by the primer 211) (as shown in Figure 6). As shown in the electronic package 6), this embodiment is described in the form of a single carrier board. The carrier board is, for example, a package substrate with a core layer and a circuit structure, a package substrate with a coreless circuit structure, and Through-silicon via (TSV) silicon interposer (TSI) or other board type, which includes at least one insulating layer and at least one circuit layer combined with the insulating layer, such as at least one fan Fan out type redistribution layer (RDL). It should be understood that the supporting structure 20 can also be other chip-carrying plates, such as a lead frame, a wafer, or other boards with metal routing, and is not limited to the above.

In this embodiment, the carrier structure 20 has various carrier manufacturing processes. For example, a circuit layer can be fabricated by a wafer process, and silicon nitride or silicon oxide can be formed by chemical vapor deposition (CVD). Insulation layer; alternatively, the circuit layer can be formed by a general non-wafer process, that is, a low-cost polymer dielectric material is used as the insulating layer, such as polyimide (PI), polypara-diazole benzene ( Polybenzoxazole, PBO for short), Prepreg (PP for short), molding compound, photosensitive dielectric layer or other materials are formed by coating.

Furthermore, a plurality of conductive elements 25 can be formed on the underside of the supporting structure 20 so that the electronic package 2 can be connected to an electronic device like a circuit board through the conductive elements 25 (the figure is omitted). The conductive element 25 can be a metal pillar such as a copper pillar, a metal bump covered with an insulating block, a solder ball, a solder ball with a Cu core ball, or other conductive structures.

The plurality of electronic components 21, 21' are arranged on the upper side of the supporting structure 20 separately from each other.

The electronic components 21, 21' are active components, passive components, or a combination thereof, wherein the active components are, for example, semiconductor chips, and the passive components are, for example, resistors, capacitors, and inductors. In this embodiment, the electronic components 21, 21' are semiconductor chips, which have opposite active surfaces 21a and non-active surfaces 21b, and the active surface 21a is made of a plurality of materials such as solder materials, metal pillars or Other conductive bumps 210 are arranged on the circuit layer of the carrying structure 20 in a flip chip manner and are electrically connected to the circuit layer, and the conductive bumps 210 are covered with a primer 211; or, the electronic component 21, 21' can be electrically connected to the circuit layer of the supporting structure 20 by wire bonding by a plurality of bonding wires (not shown); or, the electronic components 21, 21' can directly contact the circuit layer of the supporting structure 20. Therefore, the required type and quantity of electronic components can be connected to the supporting structure 20 to improve its electrical functions, and there are many ways to electrically connect the electronic components 21, 21' to the supporting structure 20, which are not limited to the above.

The encapsulation layer 22 is formed on the supporting structure 20 to cover the electronic components 21, 21'.

In this embodiment, the encapsulation layer 22 has a first surface 22a and a second surface 22b opposite to each other, and the first surface 22a is combined with the supporting structure 20, and the non-active surface 21b of the electronic component 21 is flush with the The second surface 22b of the encapsulation layer 22 is such that the electronic components 21 are exposed on the second surface 22b of the encapsulation layer 22, and the second surface 22b of the encapsulation layer 22 is defined as being arranged between the inactive surfaces 21b District S.

Furthermore, the material forming the encapsulation layer 22 is an insulating material, such as polyimide (PI), epoxy resin (epoxy) encapsulant or encapsulation material, which can be molded, lamination or It is formed by coating.

The first heat-dissipating adhesive material 31 is arranged on the non-acting surface 21b of the electronic components 21, 21'.

In this embodiment, the first heat-dissipating adhesive material 31 is a thermal interface material (Thermal Interface Material, referred to as TIM), such as a high thermal conductivity metal adhesive material, and its storage modulus is about 5-10 GPa.

The second heat-dissipating adhesive material 32 is arranged on the periphery of the first heat-dissipating adhesive material 31 and contacts the first heat-dissipating adhesive material 31, such as the layout area S of the second surface 22b of the encapsulation layer 22, wherein the first The material of the heat-dissipating glue 31 is different from that of the second heat-dissipating glue 32.

In this embodiment, the thermal conductivity coefficient of the first heat-dissipating adhesive material 31 is greater than that of the second heat-dissipating adhesive material 32, and the storage modulus of the second heat-dissipating adhesive material 32 is lower than that of the first heat-dissipating adhesive material 31 Store the modulus. For example, the second heat-dissipating glue material 32 is a silicon glue material or an ultraviolet (UV) glue such as acrylic material. Specifically, the storage modulus of silicone material is about 100MPa, and the storage modulus range of UV glue is very large (generally 3~5GPa), but it is still smaller than the storage modulus of high thermal conductivity metal material. Among them, because the silicone material is not only It has high ductility, and its thermal conductivity is higher than that of UV glue. Therefore, compared with UV glue, the second heat-dissipating glue material 32 is preferably a silicon glue material.

Furthermore, as shown in FIG. 3A (the heat sink 23 is omitted in the figure), the second heat-dissipating adhesive material 32 covers the layout area S to cover the second surface 22b of the encapsulation layer 22. Or, as shown in Figure 3B (the heat sink 23 is omitted in the figure), the second heat-dissipating adhesive material 32 does not cover the arrangement area S, and is arranged along the edge of the surface on the same side of the electronic components 21, 21', such as around The electronic component 21, 21' is not used Use the edge of face 21b. Or, as shown in FIG. 3C (the heat sink 23 is omitted in the figure), the second heat-dissipating adhesive material 32 does not cover the layout area S, and is arranged at the corners of the electronic components 21, 21', such as an L-shaped Or punctate.

Moreover, as shown in FIGS. 3A to 3C, the first heat-dissipating adhesive material 31 covers the non-acting surfaces 21b of the electronic components 21, 21'. Alternatively, as shown in FIG. 4A, the non-acting surface 21 b of the electronic component 21 with a larger exposed area may be patterned with the first heat-dissipating glue 31 and the second heat-dissipating glue 32. Or, as shown in FIG. 4B, the non-acting surface 21b of the electronic component 21 may be provided with the first heat-dissipating glue 31 and the third heat-dissipating glue 33, and the material of the third heat-dissipating glue 33 is different from that of the The first heat-dissipating glue material 31 and the second heat-dissipating glue material 32, wherein, in this embodiment, the thermal conductivity coefficient of the third heat-dissipating glue material 33 is between the thermal conductivity coefficient of the first heat-dissipating glue material 31 and the second heat-dissipating glue material The thermal conductivity of the material 32 is lower than the storage modulus of the second heat-dissipating glue material 32 and the storage modulus of the third heat-dissipating glue material 33 are lower than the storage modulus of the first heat-dissipating glue material 31. For example, the third heat-dissipating adhesive material 33 is a silicone material or an ultraviolet (UV) adhesive such as acrylic material.

In addition, in other embodiments, a second heat-dissipating glue material 32 and a third heat-dissipating glue material 33 may be formed in the arrangement area S, as shown in FIGS. 5A and 5B. Specifically, the second heat-dissipating adhesive material 32 is arranged along the periphery of the electronic component 21, 21' to form the surface of the arrangement area S, and the third heat-dissipating adhesive material 33 is arranged on the surface of the electronic component 21, 21' At the corners (as shown in Figure 5A in the dot shape or as shown in the L shape in Figure 5B), the second heat-dissipating adhesive material 32 can fill the layout area S along the non-corner of the periphery (as shown in Figures 5A and 5B). 5B shown) or not filled (not shown). For example, the storage modulus of the third heat-dissipating glue material 33 is lower than that of the second heat-dissipating glue material 32, wherein the third heat-dissipating glue material 33 is a silicone material or ultraviolet (UV) such as acrylic material. )glue.

The heat dissipating element 23 is bonded to the non-acting surface 21b of the plurality of electronic components 21, 21' by the first heat dissipating glue material 31 and the second heat dissipating glue material 32 (and the third heat dissipating glue material 33).

In this embodiment, the heat dissipating element 23 has a heat dissipating body 230 and a plurality of supporting legs 231 provided on the lower side of the heat dissipating body 230. The heat dissipating body 230 is in the form of a heat dissipating fin, and the lower side contacts the first heat dissipating glue The material 31 and the second heat-dissipating glue material 32 (and the third heat-dissipating glue material 33), and the supporting leg 231 is bonded to the supporting structure 20 by an adhesive layer 24.

It should be understood that there are many types of electronic packages 2 related to the present invention, which are not limited to the above. For example, the electronic package 2'in the form of Wafer Level Chip Scale Packaging shown in Figure 2', so that the electronic components 21, 21' of the multi-chip package 2a are directly electrically connected The wiring structure 20' (or the carrying structure 20) is connected, and the heat sink 23' is in the form of a heat sink. Or, as for the electronic package 2" shown in Figure 2", the multi-chip package 2a only includes the electronic components 21, 21', and the second heat-dissipating adhesive material 32 (and the third heat-dissipating adhesive material 33) It is connected with the first heat-dissipating glue 31 to form a piece of glue to bond and carry the electronic components 21, 21', and the second heat-dissipating glue 32 (and the third heat-dissipating glue 33) can be further extended to the electronic components. The side surface 21c of the element 21, 21' is the second heat-dissipating glue 32 shown by the dashed line to cover the electronic components 21, 21' so that the second heat-dissipating glue 32 (and the third heat-dissipating glue 33) For packaging, the above-mentioned encapsulation layer 22 is not required, and the first heat-dissipating adhesive material 31 is thickened or embossed (or roughened) to omit the use of the above-mentioned heat sink 23'.

On the other hand, there are many manufacturing methods for the electronic package 2 of the present invention. Therefore, based on the above-mentioned layout method of the heat-dissipating adhesive material, some implementation aspects of the manufacturing method are listed below.

In one embodiment, the electronic components 21, 21' are first placed on the supporting structure 20, and then the electronic components 21, 21' are covered with the encapsulation layer 22, and the encapsulation layer 22 is removed by grinding. Part of the material of the second surface 22b exposes the non-acting surface 21b of the electronic component 21, 21'. Then, the first heat-dissipating glue 31 (high thermal conductivity metal glue) is coated on the non-acting surface 21b of the electronic components 21, 21', and the first heat-dissipating glue 31 is selectively pre-processed according to the characteristics of the first heat-dissipating glue 31. Baking process. After that, the second heat-dissipating glue material 32 (silicone glue or UV glue) is coated in the arrangement area S, which can cover the arrangement area S (as shown in Fig. 3A) or not cover the arrangement area S ( As shown in Figure 3B or 3C), and if the second heat-dissipating adhesive material 32 is a UV adhesive material, a light curing process is required. Finally, a glue dispensing operation is performed to form an adhesive layer 24, and then the heat sink 23 is bonded to the adhesive layer 24, and the heat sink 23 is thermally pressed to the first heat-dissipating adhesive material 31 and the second heat-dissipating adhesive material 32 Then, the adhesive layer 24 and the first heat dissipation adhesive material 31 and the second heat dissipation adhesive material 32 are baked. In the subsequent manufacturing process, the conductive elements 25 are implanted on the lower side of the supporting structure 20.

In another embodiment, the electronic components 21, 21' are first arranged on the supporting structure 20, and then the electronic components 21, 21' are covered with the packaging layer 22, and the packaging layer is removed by grinding Part of the material of the second surface 22b of 22 exposes the non-acting surface 21b of the electronic component 21, 21'. Then, the first heat-dissipating adhesive material 31 (high thermal conductivity metal adhesive material) is coated on the non-active surface 21b of the electronic component 21' with a smaller area, and only on the non-active surface 21b of the electronic component 21 with the largest area. The first heat-dissipating glue material 31 is partially formed, and the first heat-dissipating glue material 31 is selectively pre-baked. Afterwards, the second heat-dissipating adhesive material 32 (silicone material or UV glue) is coated in the layout area S, and the second heat-dissipating glue can be coated on the remaining area of the non-acting surface 21b of the electronic component 21 with the largest area Material 32 (silicone material or UV glue as shown in Figure 4A) or the third heat-dissipating material 33 (silicone material or UV glue as shown in Figure 4B), wherein the heat conduction of the third heat-dissipating material 33 The coefficient is between the thermal conductivity of the first heat-dissipating adhesive material 31 and the thermal conductivity of the second heat-dissipating adhesive material 32, and the storage modulus of the second heat-dissipating adhesive material 32 and the third heat-dissipating adhesive material 33 are both lower than the first heat-dissipating adhesive material 31 A storage modulus of the heat-dissipating adhesive 31, And if the second heat-dissipating glue material 32 or the third heat-dissipating glue material 33 is a UV glue material, a light curing process is required. Finally, a glue dispensing operation is performed to form an adhesive layer 24, and then the heat sink 23 is bonded to the adhesive layer 24, and the heat sink 23 is thermally pressed to the first heat-dissipating adhesive material 31 and the second heat-dissipating adhesive material 32 (And the third heat dissipation adhesive material 33), and then bake the adhesive layer 24, the first heat dissipation adhesive material 31 and the second heat dissipation adhesive material 32 (and the third heat dissipation adhesive material 33). In the subsequent manufacturing process, the conductive elements 25 are implanted on the lower side of the supporting structure 20.

In another embodiment, the electronic components 21, 21' are first arranged on the supporting structure 20, and then the electronic components 21, 21' are covered with the packaging layer 22, and the packaging layer is removed by grinding Part of the material of the second surface 22b of 22 exposes the non-acting surface 21b of the electronic component 21, 21'. Then, the first heat-dissipating glue 31 (high thermal conductivity metal glue) is coated on the non-acting surface 21b of the electronic components 21, 21', and the first heat-dissipating glue 31 is selectively pre-baked. After that, the second heat-dissipating adhesive material 32 is applied to the straight line of the layout area S (as shown in Figures 5A and 5B), and the third heat-dissipating material is applied to the turning point (or corner) of the layout area S The adhesive material 33 (as shown in Figures 5A and 5B), wherein the storage modulus of the third heat dissipation adhesive material 33 is lower than the storage modulus of the second heat dissipation adhesive material 32, and if the second heat dissipation adhesive material 32 Or when the third heat-dissipating adhesive material 33 is a UV adhesive material, a light curing process is required. Finally, a glue dispensing operation is performed to form an adhesive layer 24, and then the heat sink 23 is bonded to the adhesive layer 24, and the heat sink 23 is thermally pressed to the first heat-dissipating adhesive material 31 and the second heat-dissipating adhesive material 32 (And the third heat dissipation adhesive material 33), and then bake the adhesive layer 24, the first heat dissipation adhesive material 31 and the second heat dissipation adhesive material 32 (and the third heat dissipation adhesive material 33). In the subsequent manufacturing process, the conductive elements 25 are implanted on the lower side of the supporting structure 20.

In summary, the electronic package 2, 2', 2”, 6 of the present invention is mainly arranged on the multi-chip package 2a by at least two heat-dissipating adhesive materials, so that after the heat-dissipating member 23 is installed, even appoint A heat-dissipating adhesive material is pressed to form a large-area sheet body whose area can be smaller than the area of the upper surface of the multi-chip package 2a. Further, the second heat-dissipating adhesive material 32 (and the third heat-dissipating adhesive material 33) with a smaller storage modulus is arranged on the periphery of the first heat-dissipating adhesive material 31 with a larger storage modulus, so that the second heat-dissipating adhesive material 32 (and the third heat-dissipating glue material 33) as a retaining wall, and after the heat sink 23 is installed, the first heat-dissipating glue material 31 is affected by the second heat-dissipating glue material 32 (and the third heat-dissipating glue material 33) The electronic components 21, 21' do not spread out, so that the first heat-dissipating adhesive material 31 remains at the predetermined location without being connected to each other as a whole. Therefore, compared with the conventional technology, the present invention When the electronic package 2, 2', 2", 6 has a larger overall planar package area of the carrying structure 20, it can still avoid the structural stress from being concentrated on the corners of the electronic components 21, 21', thereby avoiding subsequent manufacturing processes. , The electronic components 21, 21' or the primer 211 are broken, resulting in poor reliability and low process yield.

Furthermore, if the area of the non-acting surface 21b of the electronic component 21 is large, the first heat-dissipating glue 31 can be patterned on the non-acting surface 21b, and between the patterns of the first heat-dissipating glue 31 The second heat-dissipating glue material 32 or the third heat-dissipating glue material 33 is formed so that the second heat-dissipating glue material 32 or the third heat-dissipating glue material 33 serves as a partition wall, as shown in Figs. 4A and 4B, so that the The first heat-dissipating glue 31 does not form a large area of glue, so not only the problem of uneven stress on the non-acting surface 21b of the electronic component 21 can be avoided, and the electronic component 21 is added with the second heat-dissipating glue 32 Or, the third heat-dissipating adhesive material 33 can still have a good heat-dissipating effect.

The above-mentioned embodiments are used to exemplify the principles and effects of the present invention, but not to limit the present invention. Anyone familiar with this technique can modify the above-mentioned embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the rights of the present invention should be listed in the scope of patent application described later.

2‧‧‧Electronic package

2a‧‧‧Multi-chip package

20‧‧‧Bearing structure

21,21’‧‧‧Electronic components

21a‧‧‧working surface

21b‧‧‧Inactive surface

210‧‧‧Conductive bump

211‧‧‧ Primer

22‧‧‧Packaging layer

22a‧‧‧First surface

22b‧‧‧Second surface

23‧‧‧Radiator

230‧‧‧Radiator

231‧‧‧Support foot

24‧‧‧Adhesive layer

25‧‧‧Conductive element

31‧‧‧The first heat dissipation plastic material

32‧‧‧Second Heat Dissipating Adhesive Material

S‧‧‧layout area

Claims (14)

An electronic package includes: a multi-chip package including a plurality of electronic components and an encapsulation layer, the encapsulation layer covers the plurality of electronic components and exposes the upper surface of the plurality of electronic components, wherein the plurality of electronic components are on the same side The encapsulation layer between the surfaces is defined as a layout area; a first heat-dissipating adhesive material is arranged on the plurality of electronic components; and a second heat-dissipating adhesive material is arranged on the periphery of the first heat-dissipation adhesive and located in the layout area ; Wherein, the first heat-dissipating glue material and the second heat-dissipating glue material are different from each other. The electronic package described in item 1 of the scope of patent application, wherein the thermal conductivity coefficient of the first heat-dissipating adhesive material is greater than the thermal conductivity coefficient of the second heat-dissipating adhesive material, and the storage modulus of the second heat-dissipating adhesive material is lower than the The storage modulus of the first heat-dissipating adhesive material. According to the electronic package described in item 1 of the scope of patent application, the first heat-dissipating adhesive material covers the surface of the plurality of electronic components. According to the electronic package described in item 1 of the scope of patent application, the second heat-dissipating adhesive material is all over the layout area. For the electronic package described in item 1 of the scope of patent application, wherein the second heat-dissipating adhesive material is arranged on the surface edge of the plurality of electronic components in a plural ring shape, but does not cover the arrangement area. For the electronic package described in item 1 of the scope of patent application, the second heat-dissipating adhesive material is arranged at the corners of the plurality of electronic components, but does not cover the arrangement area. According to the electronic package described in item 1 of the scope of patent application, the surface of at least one of the plurality of electronic components is provided with the first heat-dissipating glue material and the second heat-dissipating glue material at the same time. The electronic package described in item 1 of the scope of patent application, wherein the surface of at least one of the plurality of electronic components is provided with the first heat-dissipating glue material and the third heat-dissipating glue material at the same time, and constitutes the third heat-dissipating material The material of the plastic material is different from the materials that constitute the first heat-dissipating plastic material and the second heat-dissipating plastic material. The electronic package described in item 8 of the scope of patent application, wherein the thermal conductivity of the third heat-dissipating adhesive material is between the thermal conductivity of the first heat-dissipating adhesive material and the thermal conductivity of the second heat-dissipating adhesive material, and The storage modulus of the third heat-dissipating glue material and the storage modulus of the second heat-dissipating glue material are both lower than the storage modulus of the first heat-dissipating glue material. According to the electronic package described in item 1 of the scope of patent application, wherein a third heat-dissipating glue material is formed in the layout area, and the material constituting the third heat-dissipating glue material is different from that of the first heat-dissipating glue material and the The material of the second heat-dissipating plastic material. For the electronic package described in item 10 of the scope of patent application, wherein the second heat-dissipating adhesive material is arranged along the non-corner of the surface edge of the electronic component, and the third heat-dissipating adhesive material is arranged on the surface of the electronic component Corner. The electronic package described in item 10 of the scope of patent application, wherein the storage modulus of the third heat-dissipating glue material is lower than the storage modulus of the second heat-dissipating glue material. According to the electronic package described in item 1 of the scope of patent application, the multi-chip package further includes a carrying structure for carrying and electrically connecting the plurality of electronic components. The electronic package described in item 1 of the scope of the patent application also includes a heat sink that is bonded to the plurality of electronic components by the heat-dissipating adhesive material.

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