TWI731747B - Light-emitting diode epitaxy growth base system method and products - Google Patents

Light-emitting diode epitaxy growth base system method and products Download PDF

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TWI731747B
TWI731747B TW109123954A TW109123954A TWI731747B TW I731747 B TWI731747 B TW I731747B TW 109123954 A TW109123954 A TW 109123954A TW 109123954 A TW109123954 A TW 109123954A TW I731747 B TWI731747 B TW I731747B
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electroforming
deposition
surface layer
layer
light
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TW202205691A (en
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胡志堅
王紀雯
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利佳精密科技股份有限公司
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一種發光二極體磊晶成長基體製法,包括製模基板製備程序,電鑄模板製備程序,第一表層電鑄沉積程序,基層電鑄沉積程序,第二表層電鑄沉積程序及磊晶成長基體產出程序,基板的鎳基合金基層具有良好剛性及熱縮穩定性,加上基體的第一、二導電表層具備導電性,使磊晶穩定在基體的第二導電表層上建立電極;且導電面板可以輕易從基體的第一導電表層表面上卸下分離,使發光二極體的晶粒製程省去切割或分割的工序,有效克服毫/微發光二極體晶粒分割的困難,並且基體具備良好散熱性,更使高密度發光二極體的晶粒使用獲得良好發光效率與品質。 A light-emitting diode epitaxial growth substrate method, including a mold substrate preparation procedure, an electroforming template preparation procedure, a first surface layer electroforming deposition procedure, a base layer electroforming deposition procedure, a second surface layer electroforming deposition procedure, and an epitaxial growth substrate In the production process, the nickel-based alloy base layer of the substrate has good rigidity and thermal shrinkage stability. In addition, the first and second conductive surface layers of the substrate are conductive, so that the epitaxy is stable to establish electrodes on the second conductive surface layer of the substrate; and conductive The panel can be easily removed and separated from the surface of the first conductive surface of the substrate, so that the LED crystal grain manufacturing process eliminates the cutting or division process, which effectively overcomes the difficulty of nano/micro LED crystal particle division, and the substrate With good heat dissipation, it also enables the use of high-density LED crystal grains to obtain good luminous efficiency and quality.

Description

發光二極體磊晶成長基體製法及製品 Light-emitting diode epitaxy growth base system method and products

本發明係有關一種基體製法,尤其是一種改善晶粒散熱不佳、不易切割的發光二極體磊晶成長基體製法。 The present invention relates to a base system method, in particular to a light-emitting diode epitaxial growth base system method that improves the poor heat dissipation of crystal grains and is difficult to cut.

按,發光二極體LED晶粒製作過程中,基板的選擇是影響磊晶生長品質的關鍵之一;選擇基板材料時有兩個很重要的參考因素;第一個為晶格常數的匹配程度,第二個為熱縮穩定性。晶格常數(lattice constant)會在磊晶層與基板界面處產生缺陷,甚至於表面處產生裂痕而破壞結構。而基板的熱縮穩定性對磊晶也有極大影響,磊晶成長強度相當高,當成長結束後,從高溫降回室溫的收縮過程中,若基板的熱縮穩定性不佳,易造成磊晶膜層龜裂。為符合前述因素,多數發光二極體LRD晶粒的製作,是選擇藍寶石(Sapphire)基板成長磊晶,然而,藍寶石基板的散熱不佳問題,載子結合過程所產生大量的熱侷限在主動層附近,高密集度或高溫下容易造成發光效率、波長、飽和電流的影響,甚至是結構的破壞;再者,藍寶石基板硬度很高不易切割,欲切割成邊長小於1毫米(mm)的毫發光二極體(Mini LED)晶粒或邊長小於75微米(um)的微發光二極體(Micro LED)晶粒時,則存在有極高的切割困難度或高昂的切割加工成本。 According to, during the process of making LED dies, the choice of substrate is one of the keys to the quality of epitaxial growth; there are two important reference factors when choosing substrate materials; the first is the matching degree of lattice constants , The second is heat shrinkage stability. The lattice constant will produce defects at the interface between the epitaxial layer and the substrate, and even cracks at the surface to damage the structure. The thermal shrinkage stability of the substrate also has a great influence on the epitaxy. The growth strength of the epitaxy is quite high. When the growth is over, during the shrinking process from high temperature to room temperature, if the thermal shrinkage stability of the substrate is not good, it is easy to cause the The crystal film layer is cracked. In order to meet the aforementioned factors, most of the LRD die of the light-emitting diode is made by choosing a sapphire substrate to grow the epitaxial crystal. However, the heat dissipation problem of the sapphire substrate is not good, and the large amount of heat generated by the carrier bonding process is limited to the active layer. Nearby, high density or high temperature will easily cause the influence of luminous efficiency, wavelength, saturation current, and even the destruction of the structure; in addition, the sapphire substrate is very hard and difficult to cut. It is intended to be cut into millimeters with a side length of less than 1 millimeter (mm). When the light-emitting diode (Mini LED) dies or the side length of the micro-light-emitting diode (Micro LED) dies are less than 75 microns (um), there are extremely high cutting difficulties or high cutting processing costs.

習用一種作法,是選用熱縮穩定性高的鎳鐵合金基板取代藍寶石基板,雖能改善晶粒散熱不佳問題,惟,鎳鐵合金基板很難蝕刻切割, 而雷射切割的極高溫度則存在有基板彎曲變形的問題,以致高密度陣列的毫發光二極體(Mini LED)及、或微發光二極體(Micro LED)晶粒分割,仍有待分割技術的克服或新的解決方案。 A common practice is to use a nickel-iron alloy substrate with high thermal shrinkage stability to replace the sapphire substrate. Although it can improve the problem of poor heat dissipation of the crystal grains, the nickel-iron alloy substrate is difficult to etch and cut. However, the extremely high temperature of laser cutting has the problem of bending and deformation of the substrate. As a result, the high-density array of mini LED and/or micro LED (Micro LED) die is divided and still needs to be divided. Technical overcoming or new solutions.

是以,針對上述習知發光二極體磊晶製法所存在之問題點,如何開發一種大量加工的方法,實使用消費者所殷切企盼,亦係相關業者須努力研發突破之目標及方向。有鑑於此,發明人本於多年從事相關產品之製造開發與設計經驗,針對上述之目標,詳加設計與審慎評估後,終得一確具實用性之本發明方法及其製品。 Therefore, in view of the above-mentioned problems in the conventional light-emitting diode epitaxy manufacturing method, how to develop a large-scale processing method to actually use the ardent expectations of consumers is also the goal and direction that the relevant industry must strive to develop and breakthrough. In view of this, the inventor has been engaged in the manufacturing, development and design of related products for many years. Aiming at the above-mentioned goals, after detailed design and careful evaluation, the method and products of the present invention are finally practical.

亦即,本發明係提供一種發光二極體磊晶成長基體製法,包括一製模基板製備程序,一電鑄模板製備程序,一第一表層電鑄沉積程序,一基層電鑄沉積程序,一第二表層電鑄沉積程序及一磊晶成長基體產出程序; That is, the present invention provides a light emitting diode epitaxial growth substrate method, including a mold substrate preparation procedure, an electroforming template preparation procedure, a first surface layer electroforming deposition procedure, a base layer electroforming deposition procedure, The second surface layer electroforming deposition process and an epitaxial growth substrate production process;

該製模基板製備程序,係在一個以上導電面板上,各披覆至少一絕緣材料層,形成一個以上製模基板的製備; The preparation procedure of the molding substrate is the preparation of more than one conductive panel, each covering at least one insulating material layer to form more than one molding substrate;

該電鑄模板製備程序,係在該製模基板的絕緣材料層表面上設置一規劃有一個以上透光區的遮光罩,以曝光機曝光該透光區,定型該絕緣材料層所對應的該透光區區域,形成一個以上定型的光阻牆,並移除該光阻牆以外的該絕緣材料層材料,使該導電面板上,由該光阻牆區隔出多數個陣列的沉積模穴,完成一電鑄模板的製備; The preparation procedure of the electroforming template is to set a light shield with more than one light-transmitting area on the surface of the insulating material layer of the molding substrate, expose the light-transmitting area with an exposure machine, and shape the insulating material layer corresponding to the In the light-transmitting area, more than one stereotyped photoresist wall is formed, and the insulating material layer material other than the photoresist wall is removed, so that a plurality of arrays of deposition mold cavities are separated by the photoresist wall area on the conductive panel , Complete the preparation of an electroforming template;

該第一表層電鑄沉積程序,係將該電鑄模板置於電鑄槽中進行第一次電鑄沉積,於每一該沉積模穴內的該導電面板裸露處,沉積一層 導電金屬材料,使每一該沉積模穴內各形成有一第一導電表層; The first surface layer electroforming deposition procedure is to place the electroforming template in an electroforming tank for the first electroforming deposition, and deposit a layer on the exposed part of the conductive panel in each deposition cavity Conductive metal material, so that a first conductive surface layer is formed in each deposition cavity;

該基層電鑄沉積程序,係將該電鑄模板置於電鑄槽中進行第二次電鑄沉積,於每一該沉積模穴內的該第一導電表層裸露處,沉積一層鎳基合金材料,使每一該沉積模穴內的該第一導電表層上,形成一鎳基合金基層; The base layer electroforming deposition procedure is to place the electroforming template in an electroforming tank for the second electroforming deposition, and deposit a layer of nickel-based alloy material on the exposed part of the first conductive surface layer in each deposition cavity , So that a nickel-based alloy base layer is formed on the first conductive surface layer in each deposition mold cavity;

該第二表層電鑄沉積程序,係將該電鑄模板置於電鑄槽中進行第三次電鑄沉積,於每一該沉積模穴內的該鎳基合金基層裸露處,沉積一層導電金屬材料,使每一該沉積模穴內的該鎳基合金基層上,形成一第二導電表層; The second surface layer electroforming deposition procedure is to place the electroforming template in an electroforming tank for the third electroforming deposition, and deposit a layer of conductive metal on the exposed part of the nickel-based alloy base layer in each deposition cavity Material such that a second conductive surface layer is formed on the nickel-based alloy base layer in each deposition cavity;

該磊晶成長基體產出程序,係對該電鑄模板進行該光阻牆的去除工作,使該導電面板上,得到多數個相互獨立且陣列佈局的基體; The production process of the epitaxial growth substrate is to perform the removal of the photoresist wall on the electroforming template, so that a plurality of mutually independent substrates with an array layout are obtained on the conductive panel;

藉由每一該基板的鎳基合金基層具有良好剛性及熱縮穩定性,加上該基體的第一、二導電表層具備導電性,俾使磊晶能穩定在該基體的第二導電表層上長成及建立電極;且該導電面板可以輕易從該基體的第一導電表層表面上卸下分離,還使發光二極體的晶粒製程,省去切割或分割的工序,有效克服毫/微發光二極體晶粒分割的困難(降低晶粒製作成本);再且,該基體具備良好散熱性,更使高密度發光二極體的晶粒使用,獲得良好發光效率與品質。 The nickel-based alloy base layer of each substrate has good rigidity and thermal shrinkage stability, and the first and second conductive surface layers of the substrate have conductivity, so that the epitaxial crystal can be stabilized on the second conductive surface layer of the substrate Growing and establishing electrodes; and the conductive panel can be easily detached from the surface of the first conductive surface of the substrate. It also makes the light-emitting diode crystal grain manufacturing process, eliminating the need for cutting or splitting processes, and effectively overcomes nano/micro Difficulties in the division of light-emitting diode crystal grains (reducing the cost of crystal grain production); in addition, the matrix has good heat dissipation, which enables the use of high-density light-emitting diode crystal grains to obtain good luminous efficiency and quality.

本發明之次一目的,係在提供一種發光二極體磊晶成長基體製法,其中,該基層電鑄沉積程序,係於每一該沉積模穴的該第一導電表層裸露處,沉積一層不變鋼(又稱因瓦合金、恆範鋼、殷瓦鋼)材料,使該第一導電表層上,形成由不變鋼材料所構成的該鎳基合金基層;藉由不 變鋼極小的膨脹係數特性(因瓦效應),俾使該基體提供磊晶成長,得到磊晶成長品質的高度穩定效益。 The second object of the present invention is to provide a light-emitting diode epitaxial growth substrate method, wherein the substrate electroforming deposition process is performed on the exposed first conductive surface layer of each deposition cavity to deposit a layer of Invar steel (also known as Invar, Hengfan steel, Invar steel) material, make the nickel-based alloy base layer composed of invariable steel material formed on the first conductive surface layer; The extremely small expansion coefficient characteristics of the steel (Invar effect) enable the substrate to provide epitaxial growth and obtain a highly stable benefit of epitaxial growth quality.

本發明之再一目的,係在提供一種發光二極體磊晶成長基體製法,其中,該電鑄模板製備程序,係以曝光機曝光該遮光罩的透光區,定型該光阻牆並去除光阻牆以外的該絕緣材料層材料,形成該沉積模穴;藉由該光阻牆壁厚允許10微米(um)以下尺寸及該沉積模穴邊長允許50微米(um)以下尺寸,俾使該磊晶成長基體產出程序所產出的該基體促使該磊晶成長,及不須晶圓密度或精密分割,而容易製造出毫發光二極體(Mini LED)及/或微發光二及體(Micro LED)晶粒。 Another object of the present invention is to provide a light-emitting diode epitaxial growth substrate method, wherein the electroforming template preparation process is to expose the light-transmitting area of the light shield with an exposure machine, shape the photoresist wall and remove it The insulating material layer material other than the photoresist wall forms the deposition mold cavity; by allowing the thickness of the photoresist wall to be less than 10 microns (um) and the side length of the deposition mold cavity to be less than 50 microns (um), so The substrate produced by the epitaxial growth substrate production process promotes the epitaxial growth, and does not require wafer density or precise segmentation, and it is easy to manufacture mini LEDs and/or micro LEDs. Body (Micro LED) die.

本發明之另一目的,係在提供一種發光二極體磊晶成長基體製法,其中,該第一表層電鑄沉積程序,該基層電鑄沉積程序及該第二表層電鑄沉積程序,依序在該電鑄模板的沉積模穴內沉積該第一導電表層,鎳基合金基層及第二導電表層,該第一導電表層,鎳基合金基層及第二導電表層的沉積密度比例是1比3比1;藉由該鎳基合金基層的厚度是第一、二導電表層厚度的三倍作用,俾使產出的該基體用於磊晶成長,具備良好的機構強度及很小的膨脹係數。 Another object of the present invention is to provide a light-emitting diode epitaxial growth substrate method, wherein the first surface layer electroforming deposition process, the base layer electroforming deposition process and the second surface layer electroforming deposition process are sequentially Deposit the first conductive surface layer, the nickel-based alloy base layer and the second conductive surface layer in the deposition cavity of the electroforming template, and the deposition density ratio of the first conductive surface layer, the nickel-based alloy base layer and the second conductive surface layer is 1:3 Ratio 1; By the effect of the thickness of the nickel-based alloy base layer being three times the thickness of the first and second conductive surface layers, the resulting base body is used for epitaxial growth, with good mechanical strength and a small expansion coefficient.

有關本發明所採用之技術、手段及其功效,茲舉較佳實施例並配合圖式詳細說明於後,相信本發明上述之目的、構造及特徵,當可由之得一深入而具體的瞭解。 With regard to the techniques, methods and effects adopted by the present invention, the preferred embodiments are described in detail in conjunction with the drawings. It is believed that the above-mentioned purpose, structure and features of the present invention should be understood in depth and concretely.

10:製模基板製備程序 10: Preparing procedure for molding substrate

11:導電面板 11: Conductive panel

12:絕緣材料層 12: Insulating material layer

15:製模基板 15: Molding substrate

20:電鑄模板製備程序 20: Electroforming template preparation procedure

21:遮光罩 21: Lens hood

211:透光區 211: Transmitting Area

22:光阻牆 22: Light resistance wall

23:沉積模穴 23: Deposition mold cavity

25:電鑄模板 25: Electroforming template

30:第一表層電鑄沉積程序 30: The first surface layer electroforming deposition procedure

32:第一導電表層 32: The first conductive surface layer

40:基層電鑄沉積程序 40: Basic layer electroforming deposition procedure

42:鎳基合金基層 42: Nickel-based alloy base layer

50:第二表層電鑄沉積程序 50: The second surface layer electroforming deposition procedure

52:第二導電表層 52: second conductive surface layer

60:磊晶成長基體產出程序 60: Epitaxy growth substrate production process

65:基體 65: matrix

圖1係本發明之應用方法的程序流程圖。 Figure 1 is a program flow chart of the application method of the present invention.

圖2A係本發明之製模基板製備程序的實施剖面圖。 Fig. 2A is a cross-sectional view of the preparation procedure of the molded substrate of the present invention.

圖2B係本發明之電鑄模板製備程序的第一實施剖面圖。 2B is a cross-sectional view of the first embodiment of the preparation procedure of the electroforming template of the present invention.

圖2C係本發明之電鑄模板製備程序的第二實施剖面圖。 2C is a cross-sectional view of the second embodiment of the preparation procedure of the electroforming template of the present invention.

圖3A係本發明之第一表層電鑄沉積程序的電鑄實施圖。 Fig. 3A is an electroforming implementation diagram of the first surface layer electroforming deposition procedure of the present invention.

圖3B係本發明之電鑄形成第一導電表層的剖面示意圖。 3B is a schematic cross-sectional view of the electroforming of the first conductive surface layer of the present invention.

圖4A係本發明之基層電鑄沉積程序的電鑄實施圖。 Fig. 4A is an electroforming implementation diagram of the base layer electroforming deposition process of the present invention.

圖4B係本發明之電鑄形成鎳基合金基層的剖面示意圖。 4B is a schematic cross-sectional view of the nickel-based alloy base layer formed by electroforming of the present invention.

圖5A係本發明之第二表層電鑄沉積程序的電鑄實施圖。 Fig. 5A is an electroforming implementation diagram of the second surface layer electroforming deposition procedure of the present invention.

圖5B係本發明之電鑄形成第二導電表層的剖面示意圖。 FIG. 5B is a schematic cross-sectional view of electroforming the second conductive surface layer of the present invention.

圖6A係本發明之磊晶成長基體產出程序之基體的剖面示意圖。 6A is a schematic cross-sectional view of the substrate of the epitaxial growth substrate production process of the present invention.

圖6B係本發明之多數個基體的俯視圖。 Fig. 6B is a top view of a plurality of substrates of the present invention.

請參閱圖1所示,本發明係在提供一種發光二極體磊晶成長基體製法,包括一製模基板製備程序10,一電鑄模板製備程序20,一第一表層電鑄沉積程序30,一基層電鑄沉積程序40,一第二表層電鑄沉積程序50及一磊晶成長基體產出程序60; Please refer to FIG. 1, the present invention is to provide a light emitting diode epitaxial growth substrate method, including a mold substrate preparation procedure 10, an electroforming template preparation procedure 20, and a first surface layer electroforming deposition procedure 30. A base layer electroforming deposition process 40, a second surface layer electroforming deposition process 50, and an epitaxial growth substrate production process 60;

請參閱圖2A並搭配圖1所示,該製模基板製備程序10,係在一個以上導電面板11上,各披覆至少一絕緣材料層12(為光阻或非導體材料層),形成一個以上製模基板15的製備; Please refer to FIG. 2A in conjunction with FIG. 1. The molding substrate preparation process 10 is on more than one conductive panel 11, each covered with at least one insulating material layer 12 (photoresist or non-conductor material layer) to form one Preparation of the above-mentioned molding substrate 15;

請參閱圖2B、圖2C並搭配圖1所示,該電鑄模板製備程序20,係在該製模基板15的絕緣材料層12表面上設置一規劃有一個以上透光區211的遮光罩21,以曝光機曝光該透光區211,定型該絕緣 材料層12所對應的該透光區211區域,形成一個以上定型的光阻牆22,並移除(藥水移除)該光阻牆22以外的該絕緣材料層12材料,使該導電面板11上,由該光阻牆22區隔出多數個陣列的沉積模穴23,完成一電鑄模板25的製備; Please refer to FIGS. 2B and 2C in conjunction with FIG. 1. The electroforming template preparation process 20 is to provide a light shield 21 with more than one light-transmitting area 211 on the surface of the insulating material layer 12 of the molding substrate 15 , Expose the light-transmitting area 211 with an exposure machine to shape the insulation The light-transmitting area 211 corresponding to the material layer 12 forms more than one stereotyped photoresist wall 22, and the insulating material layer 12 other than the photoresist wall 22 is removed (the medicine is removed) to make the conductive panel 11 Above, a plurality of arrays of deposition mold cavities 23 are separated by the photoresist wall 22 to complete the preparation of an electroforming template 25;

請參閱圖3A、圖3B並搭配圖1所示,該第一表層電鑄沉積程序30,係將該電鑄模板25置於電鑄槽中進行第一次電鑄沉積(陽極置放導電金屬材料,陰極置放該電鑄模板25),於每一該沉積模穴23內的該導電面板11裸露處,沉積一層導電金屬材料(可以是銅Cu),使每一該沉積模穴23內各形成有一第一導電表層32; Please refer to FIG. 3A and FIG. 3B in conjunction with FIG. 1. The first surface layer electroforming deposition process 30 is to place the electroforming template 25 in an electroforming tank for the first electroforming deposition (a conductive metal is placed on the anode). Material, the cathode is placed on the electroforming template 25), and a layer of conductive metal material (may be copper Cu) is deposited on the exposed part of the conductive panel 11 in each deposition cavity 23, so that each deposition cavity 23 Each is formed with a first conductive surface layer 32;

請參閱圖4A、圖4B並搭配圖1所示,該基層電鑄沉積程序40,係將該電鑄模板25置於電鑄槽(可為另一電鑄槽)中進行第二次電鑄沉積(陽極置放鎳基合金材料,陰極置放該電鑄模板25),於每一該沉積模穴23內的該第一導電表層32裸露處,沉積一層鎳基合金材料,使每一該沉積模穴23內的該第一導電表層32上,形成一鎳基合金基層42; Please refer to FIGS. 4A and 4B in conjunction with FIG. 1. The base layer electroforming deposition process 40 is to place the electroforming template 25 in an electroforming tank (may be another electroforming tank) for a second electroforming Deposition (a nickel-based alloy material is placed on the anode, and the electroforming template 25 is placed on the cathode), and a layer of nickel-based alloy material is deposited on the exposed part of the first conductive surface layer 32 in each of the deposition cavities 23, so that each of the A nickel-based alloy base layer 42 is formed on the first conductive surface layer 32 in the deposition cavity 23;

請參閱圖5A、圖5B並搭配圖1所示,該第二表層電鑄沉積程序50,係將該電鑄模板25置於電鑄槽(可同為第一次電鑄沉積的電鑄槽)中進行第三次電鑄沉積(陽極置放導電金屬材料,陰極置放該電鑄模板25),於每一該沉積模穴23內的該鎳基合金基層42裸露處,沉積一層導電金屬材料(可以是銅Cu),使每一該沉積模穴23內的該鎳基合金基層42上,形成一第二導電表層52; Please refer to FIG. 5A and FIG. 5B in conjunction with FIG. 1. The second surface layer electroforming deposition process 50 is to place the electroforming template 25 in the electroforming tank (it can be the same as the electroforming tank for the first electroforming deposition). ) In the third electroforming deposition (a conductive metal material is placed on the anode, and the electroforming template 25 is placed on the cathode), and a layer of conductive metal is deposited on the exposed part of the nickel-based alloy base layer 42 in each deposition cavity 23 The material (may be copper Cu), so that a second conductive surface layer 52 is formed on the nickel-based alloy base layer 42 in each deposition cavity 23;

請參閱圖6A、圖6B並搭配圖1所示,該磊晶成長基體產出程 序60,係對該電鑄模板25進行該光阻牆22的去除(藥劑去除)工作,使該導電面板11上,得到多數個相互獨立且陣列佈局的基體65(本發明之實施邊長為50微米um); Please refer to Figure 6A, Figure 6B and shown in Figure 1, the epitaxial growth substrate production process Step 60 is to remove the photoresist wall 22 (medicine removal) on the electroforming template 25, so that a plurality of independent and arrayed substrates 65 are obtained on the conductive panel 11 (the side length of the present invention is 50 microns um);

藉由每一該基板的鎳基合金基層42具有良好剛性及熱縮穩定性,加上該基體65的第一、二導電表層32、52具備導電性,俾使磊晶能穩定在該基體65的第二導電表層52上長成及建立電極;且該導電面板11可以輕易從該基體65的第一導電表層32表面上卸下分離,還使發光二極體的晶粒製程,省去切割或分割的工序,有效克服毫/微發光二極體晶粒分割的困難(降低晶粒製作成本);再且,該基體65具備良好散熱性,更使高密度發光二極體的晶粒使用,獲得良好發光效率與品質。 Since the nickel-based alloy base layer 42 of each substrate has good rigidity and thermal shrinkage stability, and the first and second conductive surface layers 32, 52 of the base 65 have conductivity, the epitaxial crystal can be stabilized on the base 65 The second conductive surface layer 52 grows and establishes electrodes; and the conductive panel 11 can be easily detached from the surface of the first conductive surface layer 32 of the substrate 65, which also enables the light-emitting diode die manufacturing process, eliminating the need for cutting Or the division process can effectively overcome the difficulty of nano/micro light-emitting diode grain division (reducing the cost of crystal grain production); in addition, the base 65 has good heat dissipation, which makes it possible to use high-density light-emitting diode crystal grains. , To obtain good luminous efficiency and quality.

較佳地,請參閱圖4A、圖4B、圖6A並搭配圖1所示,該基層電鑄沉積程序40,係於每一該沉積模穴23的該第一導電表層32裸露處,沉積一層不變鋼(又稱因瓦合金、恆範鋼、殷瓦鋼)材料,使該第一導電表層32上,形成由不變鋼材料所構成的該鎳基合金基層42;藉由不變鋼極小的膨脹係數特性(因瓦效應),俾使該基體65提供磊晶成長,得到磊晶成長品質的高度穩定效益。 Preferably, referring to FIG. 4A, FIG. 4B, and FIG. 6A in conjunction with FIG. 1, the base layer electroforming deposition process 40 is to deposit a layer on the exposed part of the first conductive surface layer 32 of each deposition cavity 23 Invariable steel (also known as Invar, Hengfan steel, Invar steel) material, so that the first conductive surface layer 32 forms the nickel-based alloy base layer 42 composed of invariable steel material; The extremely small expansion coefficient characteristic (Invar effect) enables the substrate 65 to provide epitaxial growth and obtain a highly stable benefit of epitaxial growth quality.

更佳地,請參閱圖2B並搭配圖1所示,該電鑄模板製備程序20,係以曝光機曝光該遮光罩21的透光區211,定型該光阻牆22並去除光阻牆22以外的該絕緣材料層12材料,形成該沉積模穴23;藉由該光阻牆22壁厚允許10微米(um)以下尺寸及該沉積模穴23邊長允許50微米(um)以下尺寸,俾使該磊晶成長基體產出程序60所產出的 該基體65促使該磊晶成長,及不須晶圓密度或精密分割,而容易製造出毫發光二極體(Mini LED)及/或微發光二及體(Micro LED)晶粒。 More preferably, referring to FIG. 2B in conjunction with FIG. 1, the electroforming template preparation process 20 is to expose the light-transmitting area 211 of the light-shielding mask 21 with an exposure machine, shape the photo-resist wall 22 and remove the photo-resist wall 22 In addition to the insulating material layer 12, the deposition mold cavity 23 is formed; the thickness of the photoresist wall 22 allows the size below 10 micrometers (um) and the side length of the deposition mold cavity 23 allows the size below 50 micrometers (um), So that the epitaxial growth matrix production process 60 produced The substrate 65 promotes the growth of the epitaxial crystal, and does not require wafer density or precise segmentation, and it is easy to manufacture mini LEDs and/or micro LEDs.

最後,請參閱圖1、5B、6A所示,該第一表層電鑄沉積程序30,該基層電鑄沉積程序40及該第二表層電鑄沉積程序50,依序在該電鑄模板25的沉積模穴23內沉積該第一導電表層32,鎳基合金基層42及第二導電表層52,該第一導電表層32,鎳基合金基層42及第二導電表層52的沉積密度比例是1比3比1(本發明之實施為10um:30um:10um);藉由該鎳基合金基層42的厚度是第一、二導電表層32、52厚度的三倍作用,俾使產出的該基體65用於磊晶成長,具備良好的機構強度及很小的膨脹係數。 Finally, please refer to FIGS. 1, 5B, and 6A. The first surface layer electroforming deposition process 30, the base layer electroforming deposition process 40, and the second surface layer electroforming deposition process 50 are in sequence on the electroforming template 25 The first conductive surface layer 32, the nickel-based alloy base layer 42, and the second conductive surface layer 52 are deposited in the deposition cavity 23. The deposition density ratio of the first conductive surface layer 32, the nickel-based alloy base layer 42 and the second conductive surface layer 52 is 1 ratio 3 to 1 (10um: 30um: 10um in the present invention); the thickness of the nickel-based alloy base layer 42 is three times the thickness of the first and second conductive surface layers 32 and 52, so that the resulting base body 65 Used for epitaxial growth, with good mechanical strength and small expansion coefficient.

綜合上述實施例之說明,當可充分了解本發明之操作、使用及本發明產生之功效,惟以上所述實施例僅係為本發明之較佳實施例,當不能以此限定本發明實施之範圍,即依本發明申請專利範圍及發明說明內容所做簡單的等效變化與修飾,皆屬本發明涵蓋之範圍內。 Based on the description of the above embodiments, when the operation and use of the present invention and the effects of the present invention can be fully understood, the above embodiments are only the preferred embodiments of the present invention, and the implementation of the present invention cannot be limited by this. The scope, that is, simple equivalent changes and modifications made according to the scope of the patent application of the present invention and the description of the invention, are all within the scope of the present invention.

10:製模基板製備程序 10: Preparing procedure for molding substrate

20:電鑄模板製備程序 20: Electroforming template preparation procedure

30:第一表層電鑄沉積程序 30: The first surface layer electroforming deposition procedure

40:基層電鑄沉積程序 40: Basic layer electroforming deposition procedure

50:第二表層電鑄沉積程序 50: The second surface layer electroforming deposition procedure

60:磊晶成長基體產出程序 60: Epitaxy growth substrate production process

Claims (5)

一種發光二極體磊晶成長基體製法,包括一製模基板製備程序,一電鑄模板製備程序,一第一表層電鑄沉積程序,一基層電鑄沉積程序,一第二表層電鑄沉積程序及一磊晶成長基體產出程序; A light-emitting diode epitaxial growth matrix method, including a molding substrate preparation procedure, an electroforming template preparation procedure, a first surface layer electroforming deposition procedure, a base layer electroforming deposition procedure, and a second surface layer electroforming deposition procedure And an epitaxial growth substrate production process; 該製模基板製備程序,係在一個以上導電面板上,各披覆至少一絕緣材料層,形成一個以上製模基板的製備; The preparation procedure of the molding substrate is the preparation of more than one conductive panel, each covering at least one insulating material layer to form more than one molding substrate; 該電鑄模板製備程序,係在該製模基板的絕緣材料層表面上設置一規劃有一個以上透光區的遮光罩,以曝光機曝光該透光區,定型該絕緣材料層所對應的該透光區區域,形成一個以上定型的光阻牆,並移除該光阻牆以外的該絕緣材料層材料,使該導電面板上,由該光阻牆區隔出多數個陣列的沉積模穴,完成一電鑄模板的製備; The preparation procedure of the electroforming template is to set a light shield with more than one light-transmitting area on the surface of the insulating material layer of the molding substrate, expose the light-transmitting area with an exposure machine, and shape the insulating material layer corresponding to the In the light-transmitting area, more than one stereotyped photoresist wall is formed, and the insulating material layer material other than the photoresist wall is removed, so that a plurality of arrays of deposition mold cavities are separated by the photoresist wall area on the conductive panel , Complete the preparation of an electroforming template; 該第一表層電鑄沉積程序,係將該電鑄模板置於電鑄槽中進行第一次電鑄沉積,於每一該沉積模穴內的該導電面板裸露處,沉積一層導電金屬材料,使每一該沉積模穴內各形成有一第一導電表層; The first surface layer electroforming deposition procedure is to place the electroforming template in an electroforming tank for the first electroforming deposition, and deposit a layer of conductive metal material on the exposed part of the conductive panel in each deposition cavity, Forming a first conductive surface layer in each deposition mold cavity; 該基層電鑄沉積程序,係將該電鑄模板置於電鑄槽中進行第二次電鑄沉積,於每一該沉積模穴內的該第一導電表層裸露處,沉積一層鎳基合金材料,使每一該沉積模穴內的該第一導電表層上,形成一鎳基合金基層; The base layer electroforming deposition procedure is to place the electroforming template in an electroforming tank for the second electroforming deposition, and deposit a layer of nickel-based alloy material on the exposed part of the first conductive surface layer in each deposition cavity , So that a nickel-based alloy base layer is formed on the first conductive surface layer in each deposition mold cavity; 該第二表層電鑄沉積程序,係將該電鑄模板置於電鑄槽中進行第三次電鑄沉積,於每一該沉積模穴內的該鎳基合金基層裸露處,沉積一層導電金屬材料,使每一該沉積模穴內的該鎳基合金基層上,形成一第二導電表層; The second surface layer electroforming deposition procedure is to place the electroforming template in an electroforming tank for the third electroforming deposition, and deposit a layer of conductive metal on the exposed part of the nickel-based alloy base layer in each deposition cavity Material such that a second conductive surface layer is formed on the nickel-based alloy base layer in each deposition cavity; 該磊晶成長基體產出程序,係對該電鑄模板進行該光阻牆的去除工作,使該導電面板上,得到多數個相互獨立且陣列佈局的基體。 The production process of the epitaxial growth substrate is to remove the photoresist wall from the electroforming template, so that a plurality of independent substrates with an array layout are obtained on the conductive panel. 根據申請專利範圍第1項所述之發光二極體磊晶成長基體製法,其中,該基層電鑄沉積程序,係於每一該沉積模穴的該第一導電表層裸露處,沉積一層不變鋼材料,使該第一導電表層上,形成由不變鋼材料所構成的該鎳基合金基層。 According to the light-emitting diode epitaxial growth substrate method described in the first item of the scope of patent application, the substrate electroforming deposition process is to deposit a constant layer on the exposed part of the first conductive surface layer of each deposition cavity The steel material is used to form the nickel-based alloy base layer made of unchanging steel material on the first conductive surface layer. 根據申請專利範圍第1項所述之發光二極體磊晶成長基體製法,其中,該電鑄模板製備程序,係以曝光機曝光該遮光罩的透光區,定型該光阻牆並去除光阻牆以外的該絕緣材料層材料,形成該沉積模穴。 According to the light-emitting diode epitaxial growth substrate method described in the first item of the scope of patent application, the preparation procedure of the electroforming template is to expose the light-transmitting area of the light shield with an exposure machine, shape the photoresist wall and remove the light The insulating material layer material other than the barrier wall forms the deposition mold cavity. 根據申請專利範圍第1項所述之發光二極體磊晶成長基體製法,其中,該第一表層電鑄沉積程序,該基層電鑄沉積程序及該第二表層電鑄沉積程序,依序在該電鑄模板的沉積模穴內沉積該第一導電表層,鎳基合金基層及第二導電表層,該第一導電表層,鎳基合金基層及第二導電表層的沉積密度比例是1比3比1。 According to the light-emitting diode epitaxial growth substrate method described in item 1 of the scope of patent application, the first surface layer electroforming deposition process, the base layer electroforming deposition process and the second surface layer electroforming deposition process are sequentially The first conductive surface layer, the nickel-based alloy base layer and the second conductive surface layer are deposited in the deposition cavity of the electroforming template. The deposition density ratio of the first conductive surface layer, the nickel-based alloy base layer and the second conductive surface layer is 1:3 1. 一種發光二極體磊晶成長基體製品,係根據申請專利範圍第1項至第4項中任一項所述之發光二極體磊晶成長基體製法所製得。 A light-emitting diode epitaxial growth substrate product is prepared according to the light-emitting diode epitaxial growth substrate method described in any one of items 1 to 4 in the scope of patent application.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5463229A (en) * 1993-04-07 1995-10-31 Mitsui Toatsu Chemicals, Incorporated Circuit board for optical devices
CN106410064A (en) * 2016-11-29 2017-02-15 武汉华星光电技术有限公司 Method for manufacturing OLED mask plate
CN106486572A (en) * 2015-09-02 2017-03-08 新世纪光电股份有限公司 Light-emitting diode chip for backlight unit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5463229A (en) * 1993-04-07 1995-10-31 Mitsui Toatsu Chemicals, Incorporated Circuit board for optical devices
CN106486572A (en) * 2015-09-02 2017-03-08 新世纪光电股份有限公司 Light-emitting diode chip for backlight unit
CN106410064A (en) * 2016-11-29 2017-02-15 武汉华星光电技术有限公司 Method for manufacturing OLED mask plate

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