TWI723902B - Display device - Google Patents

Abstract

A display device includes a display area and a non-display area and includes an array substrate, a cover, a sealing element, a recessed portion and at least one dummy droplet. The array substrate includes a substrate and a pixel array. The pixel array is on the substrate. The cover is disposed on the array substrate. The sealing element is configured to bond the array substrate and the cover and is on the non-display area. The recessed portion is on the non-display area. The recessed portion is at least formed in one of the array substrate and the cover. The dummy droplet is in the recessed portion.

Description

Display device

The present invention relates to a display device.

An organic electronic device is a device that includes a layer of organic material. The organic material uses holes and electrons to generate an alternating current of charge. Compared with conventional light sources, organic light emitting diodes (OLEDs) in organic electronic devices have high color saturation, lower power consumption and faster response speed, and have gradually become current displays. One of the mainstream of development.

Since the organic materials in organic electronic devices are susceptible to deterioration due to the influence of external oxygen and moisture, generally after the production of electronic components and organic materials on the substrate, the organic electronic device will be sealed with a cover plate and a sealing compound (frit). Seal it up. However, if the height difference between the substrate and the cover plate is inconsistent at different positions, it will affect the interference of light and cause bad visual effects.

An embodiment of the present invention provides a display device, which can avoid the Newton ring phenomenon.

The display device of the present invention includes a display area and a non-display area, and includes an array substrate, a cover plate, a sealing element, a recess, and at least one pseudo-droplet. The array substrate includes a substrate and a pixel array, and the pixel array is located on the substrate. The cover plate is arranged on the array substrate. The sealing element is used for joining the array substrate and the cover plate, and is located in the non-display area. The recessed portion is located in the non-display area, and the recessed portion is formed on at least one of the array substrate and the cover plate. The pseudo drop is located in the depression.

Based on the above, the recessed portion accommodates pseudo droplets. As a result, the cover plate is separated from the pseudo droplets, so that the cover plate will not be raised by the pseudo droplets, and the vertical distance between the cover plate in the non-display area and the sealing element is prevented from being too large, and the deformation of the cover plate is increased, so that The surface of the cover plate is not flat or raised, which causes Newton's rings to occur at the edge of the display area and the non-display area when the display device displays images, which helps to maintain the display quality.

Hereinafter, the present invention will be explained more fully with reference to the drawings of this embodiment. However, the present invention can also be embodied in various different forms and should not be limited to the embodiments described herein. The thickness of the layers and regions in the drawing will be exaggerated for clarity. The same or similar reference numbers indicate the same or similar elements, and the following paragraphs will not repeat them one by one. In addition, the directional terms mentioned in the embodiments, for example: up, down, left, right, front or back, etc., are only directions for referring to the attached drawings. Therefore, the directional terms used are used to illustrate but not to limit the present invention.

FIG. 1 is a schematic top view of a display device 10 according to an embodiment of the present invention, and FIG. 2A is a schematic cross-sectional view taken along the section line A-A' of FIG. Please refer to FIG. 1 and FIG. 2A together. The display device 10 has a display area AA and a non-display area NA. In this embodiment, the non-display area NA surrounds the display area AA as an example, but the invention is not limited to this. In other embodiments, the non-display area NA may only be located on one side, two sides, or three sides of the display area AA. The display device 10 includes an array substrate 100, a cover 200, a sealing element 300, a recess 400 and at least one pseudo drop 500. The array substrate 100 includes a substrate 102 and a pixel array 104 disposed on the substrate 102. The pixel array 104 is disposed in the display area AA. When the display device 10 performs display, the pixel array 104 can emit light to present a picture. The cutting line CUT is used to define the area of the display device 10.

The pixel array 104 includes a plurality of pixels P1. For the convenience of description, the first direction D1 and the second direction D2 are shown in Fig. 1, and the first direction D1 and the second direction D2 are different. For example, the first direction D1 and the second direction D2 are as shown in Fig. 1 respectively. The longitudinal direction and the lateral direction are orthogonal to each other. The pixels P1 are arranged along the first direction D1 and the second direction D2. Each pixel P1 may include an active element T1. The active device T1 is disposed on the substrate 102 and has a gate G, a source S, a drain D, and a semiconductor pattern SC. The array substrate 100 may further include a buffer layer 105, a gate insulating layer 106, an interlayer insulating layer 108, an inorganic insulating layer 110, and a flat layer 112. The gate insulating layer 106 is disposed between the semiconductor pattern SC and the gate electrode G. For example, the gate G of the active device T1 can be selectively disposed above the semiconductor pattern SC to form a top gate TFT, but the invention is not limited to this. According to other embodiments, the gate G of the active device T1 can also be arranged under the semiconductor pattern SC, that is, the gate G is located between the semiconductor pattern SC and the substrate 102 to form a bottom gate TFT (bottom gate TFT). ).

The buffer layer 105 is disposed between the substrate 102 and the active device T1. In this embodiment, the semiconductor pattern SC may include a source region SR, a lightly doped source region LSR, a channel region CH, a lightly doped drain region LDR, and a drain region DR. The lightly doped source region LSR is located between the source region SR and the channel region CH, and the lightly doped drain region LDR is located between the drain region DR and the channel region CH. In addition, the gate electrode G overlaps the channel region CH of the semiconductor pattern SC, but the invention is not limited to this. According to other embodiments, the semiconductor pattern SC may only include the source region SR, the channel region CH, and the drain region DR.

The interlayer insulating layer 108 is disposed on the gate insulating layer 106 and covers the gate G of the active device T1. The source S and the drain D of the active device T1 are disposed on the interlayer insulating layer 108, and overlap the source region SR and the drain region DR of the semiconductor pattern SC, respectively. For example, the source S and the drain D of the active device T1 both penetrate the interlayer insulating layer 108 and the gate insulating layer 106 to respectively electrically connect the source region SR and the drain region DR of the semiconductor pattern SC.

In this embodiment, the material of the semiconductor pattern SC is, for example, a low temperature poly silicon (LTPS) semiconductor, that is, the active device T1 may be a low temperature poly silicon thin film transistor. However, the present invention is not limited to this. In other embodiments, the active device T1 may also be an amorphous silicon TFT (a-Si TFT), a micro Si TFT, or a metal oxide. Metal oxide transistor.

The inorganic insulating layer 110 covers the source S, the drain D of the active device T1 and part of the surface of the interlayer insulating layer 108, and may optionally have an opening overlapping the drain D of the active device T1. The flat layer 112 covers part of the surface of the inorganic insulating layer 110 and the drain electrode D. The material of the flat layer 112 includes inorganic materials (for example: silicon oxide, silicon nitride, silicon oxynitride, other suitable materials or stacked layers of at least two of the above), organic materials (for example: polyester (PET), poly Alkenes, polypropylenes, polycarbonates, polyalkylene oxides, polyphenylenes, polyethers, polyketones, polyols, polyaldehydes, other suitable materials or combinations of the above), others Suitable materials or a combination of the above.

Fig. 3 is a schematic diagram of the equivalent circuit of the pixel P1 in Fig. 1. Referring to FIG. 3, in addition to the active device T1, each pixel P1 also includes an active device T2, a capacitor CS, a scan line SL, a data line DL, a power line PL, and a light-emitting unit OLED. Although FIG. 2A only shows the active device T1 for the sake of clarity of the drawing, the active device T2 may be formed on the substrate 102, and the active device T2 may be any thin film transistor known to those with ordinary knowledge in the art. In this embodiment, the active device T2 can be called a switching thin film transistor, which is electrically connected to the scan line SL and the data line DL. The active element T1 can be called a driving thin film transistor, which is electrically connected to the active element T2, the power line PL, and the light-emitting unit OLED. In this embodiment, the capacitor CS is electrically connected to the active elements T1 and T2 and the power line PL. Based on the above, in the present embodiment, the pixel P1 is described with a structure of two active elements (active elements T1, T2) and a capacitor (capacitor CS) (meaning 2T1C) as an example, but the present invention does not take This is limited. In other words, the present invention does not limit the number of active components and capacitors in the pixel P1.

Please return to FIGS. 1 and 2A, the array substrate 100 further includes a pixel definition layer 114, which is located on the flat layer 112, in other words, the flat layer 112 is disposed between the substrate 102 and the pixel definition layer 114 . In addition, the pixel definition layer 114 has a plurality of grooves 114a in the display area AA, and the vertical projection area of the area occupied by each groove 114a on the substrate 102 is substantially the same, but the present invention is not limited thereto. The light emitting unit OLED is formed in a plurality of grooves 114a in the display area AA. In this embodiment, each light-emitting unit OLED includes a first electrode 116, a hole injection layer 118, a hole transport layer 120, a light emitting layer 122, an electron transport layer 124, and a first electrode 116 sequentially stacked on the flat layer 112 of the array substrate 100. The second electrode 126. The light emitting layer 122 includes, for example, a red light emitting layer, a blue light emitting layer, and a green light emitting layer. As mentioned above, the active device T1 is a member for driving the light-emitting layer 122 to display images. Therefore, it can be understood that the active device T1 is located in the display area AA, and the non-display area NA may not have the active device T1.

Each first electrode 116 can be connected to an active element T1 correspondingly. The first electrode 116 is arranged in the display area AA. The plurality of first electrodes 116 respectively penetrate the flat layer 112 and are electrically connected to the drain D of the corresponding active device T1. In some embodiments, the first electrode 116 is, for example, a light-transmitting electrode, and the material of the light-transmitting electrode includes metal oxides, such as indium tin oxide, indium zinc oxide, aluminum tin oxide, and aluminum zinc oxide. , Or other suitable oxides, or a stacked layer of at least two of the above, but the present invention is not limited to this. In other embodiments, the first electrode 116 may also be a reflective electrode, and the reflective electrode may be made of metal, alloy, or other suitable materials, or a stacked layer of a metal material and other conductive materials.

The hole injection layer 118, the hole transport layer 120 and the light emitting layer 122 of each light emitting unit OLED are formed in the groove 114a by ink jet printing (IJP), for example. In this embodiment, the electron transport layer 124 and the second electrode 126 sequentially cover the pixel definition layer 114 and the light-emitting layer 122. For example, in this embodiment, the electron transport layer 124 and the second electrode 126 can extend from the top of the pixel definition layer 114 to conform to the sidewall of the pixel definition layer 114 to the top of the light-emitting layer 122 and cover the light-emitting layer.层122。 The floor 122. In this embodiment, the second electrode 126 is, for example, a light-transmitting electrode, and the material of the light-transmitting electrode includes metal oxides, such as indium tin oxide, indium zinc oxide, aluminum tin oxide, and aluminum zinc oxide. , Or other suitable oxides, or a stacked layer of at least two of the above, but the present invention is not limited to this. In other embodiments, the second electrode 126 may also be a reflective electrode, and the material of the reflective electrode includes a metal, an alloy, or other suitable materials, or a stacked layer of a metal material and other conductive materials.

The cover 200 is disposed on the array substrate 100. The material of the cover 200 can be glass, quartz, organic polymer, or other applicable materials.

The sealing element 300 is used for bonding the array substrate 100 and the cover 200, and is located in the non-display area NA. In this embodiment, the material of the sealing element 300 can be, for example, frit material, ultraviolet light glue, thermosetting glue, acrylic resin or epoxy resin, but not Is limited. In this embodiment, the sealing element 300 surrounds the display area AA. The distance dt1 between the pixel definition layer 114 and the sealing element 300 is 0.5 mm to 5 mm.

The pseudo-droplet 500 is located in the non-display area NA and around the display area AA. For example, the pseudo-droplet 500 may surround the display area AA. And the pseudo-droplet 500 is located between the sealing element 300 and the light-emitting unit OLED. The pseudo-droplet 500 is used to adjust the spraying position of each layer of each light-emitting unit OLED (such as the hole injection layer 118, the hole transport layer 120, and the light-emitting layer 122) in the inkjet coating technology and confirm the spraying position Accuracy, which can improve the position accuracy of inkjet coating.

The pseudo-droplet 500 is formed in the recessed portion 400 by, for example, an inkjet coating technique. Figure 2B is an enlarged schematic view of area R1 in Figure 2A. Please refer to Figure 2B. The material of the pseudo-droplet 500 includes one, two, or more than two organic layers selected from the following groups: Material layers: hole injection layer, hole transport layer and light emitting layer, and the materials of the hole injection layer, hole transport layer and light emitting layer are respectively the same as the layers of each light emitting unit OLED (for example, hole injection layer 118, electricity The materials of the hole transport layer 120 and the light-emitting layer 122) can thereby be compatible with the manufacturing process of the pixel array 104 and simplify the manufacturing process.

Please return to FIG. 1 and FIG. 2A, the recess 400 is located in the non-display area NA. The recess 400 is formed on at least one of the array substrate 100 and the cover 200, and the pseudo-droplet 500 is located in the recess 400. In this embodiment, the recesses 400 are separated from each other by a part of the pixel definition layer 114, and each recess 400 accommodates each pseudo-droplet 500. As a result, the cover plate 200 is separated from the pseudo droplet 500, so that the cover plate 200 will not be raised by the pseudo droplet 500, and the surface of the cover plate 200 will not be uneven or raised. The edge of the display area AA and the non-display area NA generate Newton's rings, which helps maintain the display quality. In this embodiment, the depth of the recess 400 is greater than the thickness of the pseudo-droplet 500.

In the embodiment where the top surface of the sealing element 300 is lower than the top surface of the pixel defining layer 114 (see Figure 2C), the vertical distance dt2 between the top surface of the pixel defining layer 114 and the top surface of the sealing element 300 is less than 1.5 microns. For example, the vertical distance dt2 between the top surface of the pixel definition layer 114 and the top surface of the sealing material is 0.5 μm to 1.5 μm. Since each recess 400 contains each pseudo drop 500, the vertical distance between the cover 200 in the non-display area NA and the sealing element 300 is prevented from being too large, and the deformation of the cover 200 is increased, causing the display device 10 to display Newton's rings are generated at the edge of the display area AA and the non-display area NA during the screen, which helps to maintain the display quality.

The pixel definition layer 114 has hydrophobicity. For example, the material of the pixel definition layer 114 is a polymer material including fluoride ions. In other embodiments, the pixel definition layer 114 can be formed by a halftone process followed by a fluoride ion-containing plasma to hydrophobize it, and the recess 400 can be formed by, for example, a yellow light process. The pixel definition layer 114 is formed by patterning. In this embodiment, the recessed portion 400 is located in the pixel defining layer 114. Because the pixel defining layer 114 is hydrophobic, the pseudo-droplet 500 is hemispherical in the recessed portion 400. For example, the pseudo-droplet 500 is opposite to If the contact angle on the surface of the pixel definition layer 114 is greater than 50 degrees, since the pseudo-droplet 500 contacts the pixel definition layer 114 and will not spread out, it helps to define the spraying position. In this embodiment, the depth of the recess 400 is smaller than the thickness of the pixel definition layer 114. For example, the depth of the recess 400 is 0.1 μm to 1 μm.

In this embodiment, the array substrate 100 further includes a pseudo-pixel array 128, and the pseudo-pixel array 128 includes a plurality of pseudo-pixels P2 arranged in an array. In other words, the pseudo pixels P2 are arranged along the first direction D1 and the second direction D2. Each pseudo pixel P2 is not connected to any active element, so the pseudo pixel array 128 does not provide a display function when the display device 10 displays a frame. The pseudo-pixel array 128 is located in the non-display area NA and between the recess 400 and the pixel array 104. Each pseudo pixel P2 includes a hole injection layer 118a, a hole transport layer 120a, a light emitting layer 122a, an electron transport layer 124a, and a second electrode 126a sequentially stacked on the flat layer 112 of the array substrate 100. And each layer of each pseudo pixel P2 can be formed by inkjet coating.

As mentioned above, the hole injection layer 118a, the hole transport layer 120a, and the light emitting layer 122a of each light emitting unit OLED are sprayed onto the grooves of the pixel definition layer 114 by inkjet coating technology. In 114a, each layer of material is then dried to solidify it, and the material of the droplet includes an organic material and a solvent. The solvent is used to uniformly disperse the organic material and is a volatile liquid. Further, please refer to Figure 1, Figure 2A, Figure 4 and Figure 5. Figure 4 is sprayed along the direction 1000 for forming the hole injection layer 118 and the hole injection layer 118a droplets DP1 and A schematic cross-sectional view of the droplet DP2 used to form a part 5001 of the pseudo droplet 500. FIG. 5 is the hole injection layer 118 and the hole injection layer 118a after the droplet DP1 and the droplet DP2 of FIG. 4 are dried. And a schematic cross-sectional view of a part 5001 of the pseudo-droplet 500. The drying process enables the solvent of the droplets DP1 and DP2 to be volatilized and removed, and the organic material is solidified into the corresponding hole injection layer 118, the hole injection layer 118a, and the pseudo-droplet 500 Part of 5001. Since the pseudo-pixel array 128 is located in the non-display area NA, each layer of the light-emitting unit OLED at the center C1 of the display area AA and each layer of the light-emitting unit OLED at the edge of the display area AA can have the same dry environment to form a uniform film, and then The display device 10 is prevented from being uneven in brightness or color (mura). In this embodiment, the pseudo-pixel array 128 can surround the display area AA, and the recess 400 and the pseudo-droplet 500 surround the pseudo-pixel array 128.

Figure 6 is a schematic top view of the pseudo-droplet 500 and the recessed portion 400. Please refer to Figure 6. The pseudo-droplet 500 has a bottom width a and the recessed portion 400 has a diameter b. The known inkjet coating technology has a spraying precision tolerance c. , The minimum width of the recessed portion 400 is greater than the width of the contact surface of the pseudo droplet 500 and the recessed portion 400, and the relationship between the bottom width a, the diameter b, and the spraying accuracy tolerance c meets b>a+2c, thereby ensuring that the pseudo droplet 500 The droplet 500 does not overflow the recess 400, and the yield of spraying the pseudo drop 500 on the recess 400 is improved.

FIG. 7 is a schematic top view of a display device 10a according to another embodiment of the present invention, and FIG. 8 is a schematic cross-sectional view taken along the section line B1-B1' and the section line B2-B2' of FIG. 7. The display device 10a of Figs. 7 and 8 is similar to the display device 10 of Fig. 1 and Fig. 2A. At least one difference between the two is: in the embodiment of Figs. 7 and 8, the recessed portion 400a is continuous The ground surrounds the display area AA, in a plan view (for example, facing the paper surface of FIG. 7), the recessed portion 400a is ring-shaped.

FIG. 7 shows three recessed portions 400 a arranged at intervals, but the present invention is not limited to this. In other embodiments, the number of recessed portions 400 a can be adjusted according to the number of pseudo droplets 500. In this embodiment, since the recess 400a continuously surrounds the display area AA, the yellowing process for forming the recess 400a can be simplified. In addition, each recess 400a can accommodate a plurality of pseudo-droplets 500, which further improves the process window of the pseudo-droplet 500 spraying process.

FIG. 9 is a schematic top view of a display device 10b according to another embodiment of the present invention, and FIG. 10 is a schematic cross-sectional view taken along the line C-C' of FIG. 9. The display device 10b of FIGS. 9 and 10 is similar to the display device 10a of FIGS. 7 and 8. At least one difference between the two is: in the embodiments of FIGS. 9 and 10, the display device 10b includes only one recess 400b, and each pseudo-droplet 500 is located in the recess 400b.

FIG. 11 is a schematic cross-sectional view of a display device 10c according to another embodiment of the present invention. The display device 10c in FIG. 11 is similar to the display device 10 in FIG. 2A. At least one difference between the two is: in FIG. 11 In the embodiment of, the planarization layer 112 includes at least one trench 600, and the trench 600 is located in the non-display area NA.

In this embodiment, the trench 600 can be formed by patterning the planarization layer 112 through a yellow light process. Since the planarization layer 112 has the trench 600, the pixel definition layer 114 formed thereon will partially fill the trench. In the trench 600, a recess 400c is formed in the pixel defining layer 114 at a position corresponding to the trench 600, and the trench 600 and the recess 400c overlap in the direction perpendicular to the flat layer 112, thus increasing the manufacturing process of the recess 400c elasticity. In other embodiments, the trench 600 can also be formed in any layer below the flat layer 112, such as the buffer layer 105, the gate insulating layer 106, the interlayer insulating layer 108, and the inorganic insulating layer 110. In other embodiments, when the circuit (not shown) under the flat layer 112 in the non-display area NA has ups and downs, the thickness of the flat layer 112 can be reduced, so that the flat layer 112 has the same circuit (not shown). (Illustration) The same surface topography is used to form the trench 600. In this way, the process of forming the trench 600 can be simplified.

FIG. 12 is a schematic top view of a display device 10d according to another embodiment of the present invention, FIG. 13 is a schematic cross-sectional view taken along the line D-D' of FIG. 12, and FIG. 14 is a schematic view of the area R2 of FIG. 12 A three-dimensional exploded schematic view. For the convenience of description, only the cover 200, the pixel definition layer 114, the pseudo-droplet 500 and the recess 400d are shown in Figure 14, while other components are omitted. The display devices in Figures 12 to 14 are shown 10d is similar to the display device 10 of FIG. 2A, and at least one difference between the two is that in the embodiments of FIG. 12 to FIG. 13, the recess 400d is formed on the cover 200. For example, the recessed portion 400d is located on the side of the cover plate 200 facing the array substrate 100, and the pseudo-droplet 500 is disposed in the accommodating space formed by the recessed portion 400d of the cover plate 200 and the pixel definition layer 114. In order to clearly express the diagram, only the cover 200, the recessed portion 400d, the pixel definition layer 114 and the pseudo-droplet 500 are shown in FIG. 14.

In this embodiment, since the recess 400d of the cover plate 200 can accommodate the pseudo droplet 500, the cover plate 200 will not be raised by the pseudo droplet 500, which prevents the cover plate 200 from being placed between the non-display area NA and the sealing element 300. The vertical distance between the two is too large, and the deformation of the cover 200 is increased, and the surface of the cover 200 is uneven or raised. As a result, when the display device 10 displays a picture, a Newton ring is generated at the edge of the display area AA and the non-display area NA. The phenomenon (Newton's rings) helps maintain the display quality. The depth of the recess 400 d is greater than the thickness of the pseudo drop 500. In this embodiment, the height of the pseudo-droplet 500 is 0.1 μm to 2 μm. The thickness of the sealing element 300 is 1 micrometer to 5 micrometers. The pixel definition layer 114 has a thickness of 0.5 μm to 5 μm. The thickness of the flat layer 112 is 1 micrometer to 10 micrometers. The horizontal distance between the pixel definition layer 114 and the sealing element 300 is 0.5 mm to 5 mm. In this embodiment, from a cross-sectional view, the shape of the recessed portion 400d is schematically represented by a rectangle, but the present invention is not limited to this. According to other embodiments, the recessed portion 400d may also have other shapes. In this embodiment, the vertical depth of the recess 400d is 0.5 μm to 3 μm.

Figure 15 is a schematic top view of a display device 10e according to another embodiment of the present invention. Figure 16 is a perspective exploded schematic view of the area R3 in Figure 15. For the convenience of description, only the cover 200 and the picture are shown in Figure 16. The element definition layer 114, the pseudo-droplet 500 and the recess 400e are omitted and other components are omitted. Please refer to FIGS. 15 and 16. The display device 10e in FIG. 15 to FIG. 16 is similar to the display device 10d in FIG. 12. At least one difference between the two is: In an embodiment, the recess 400e continuously surrounds the display area AA, and any two adjacent pseudo-droplets 500 contact each other or partially overlap each other.

In this embodiment, since the recessed portion 400e continuously surrounds the display area AA, in a plan view (for example, facing the paper surface of FIG. 15), the recessed portion 400e has a ring shape. Therefore, the number of pseudo-droplets 500 that can be accommodated in the recessed portion 400e is increased, and the pseudo-droplets 500 can form a continuous pattern together. In this way, the vapor generated by the pseudo-droplets 500 is large enough to draw the center C1 of the display area AA. The light-emitting unit (not shown) of the pixel P1 and the light-emitting unit (not shown) of the pixel P1 at the edge of the display area AA have the same dry environment to form a uniform film, thereby preventing the display device 10 from having uneven brightness or color (mura )Case.

In summary, in the display device of the embodiment of the present invention, the recessed portion is located in the non-display area. The recess is formed on at least one of the array substrate and the cover plate, and the pseudo drop is located in the recess. As a result, the cover plate is separated from the pseudo droplets, so that the cover plate will not be raised by the pseudo droplets, and the vertical distance between the cover plate in the non-display area and the sealing element is prevented from being too large, and the deformation of the cover plate is increased, so that The surface of the cover plate is not flat or raised, which causes Newton's rings to occur at the edge of the display area and the non-display area when the display device displays images, which helps to maintain the display quality.

10, 10a, 10b, 10c, 10d: display device 10e: display device 100: Array substrate 102: substrate 104: pixel array 105: buffer layer 106: gate insulation 108: Interlayer insulation layer 110: Inorganic insulating layer 112: Flat layer 114: Pixel Definition Layer 114a: groove 116: first electrode 118, 118a: hole injection layer 120, 120a: hole transport layer 122, 122a: luminescent layer 124, 124a: electron transport layer 126, 126a: second electrode 128: pseudo pixel array 200: cover 300: sealing element 400, 400a, 400b, 400d: Depressed part 400e: Depressed part 500: pseudo drop 5001: part 600: groove 1000: direction a: bottom width b: diameter c: Spraying accuracy tolerance A-A’: Sectional line AA: Display area B1-B1’: cut line B2-B2’: Cut line C-C’: Cut line C1: Center CS: Capacitor CH: Channel area CUT: cutting line D: Dip pole dt1: distance dt2: vertical distance D1: First direction D2: second direction DL: Data line DP1: droplet DP2: droplet DR: Drain region E-E’: Cut line G: Gate LDR: Lightly doped drain region LSR: Lightly doped source region NA: non-display area OLED: light emitting unit P1: pixel P2: pseudo pixel PL: Power cord R1: area R2: area R3: area S: source SC: Semiconductor pattern SL: scan line SR: Source region T1: Active component T2: Active component

Read the following detailed description and match the corresponding diagrams to understand many aspects of this disclosure. It should be noted that many of the features in the drawing are not drawn in actual proportions according to the standard practice in the industry. In fact, the size of the features can be increased or decreased arbitrarily to facilitate the clarity of the discussion. FIG. 1 is a schematic top view of a display device according to an embodiment of the invention. Fig. 2A is a schematic cross-sectional view taken along the section line A-A' of Fig. 1. FIG. 2B is an enlarged schematic diagram of the area R1 in FIG. 2A. FIG. 2C is a schematic cross-sectional view of a display device according to another embodiment of the invention. Fig. 3 is a schematic diagram of the equivalent circuit of the pixel in Fig. 1. Figure 4 is a schematic cross-sectional view of spraying droplets for forming a hole injection layer. Fig. 5 is a schematic cross-sectional view of the hole injection layer formed by the liquid droplet in Fig. 4 after being dried. Figure 6 is a schematic top view of the pseudo-droplet and the depressed portion. FIG. 7 is a schematic top view of a display device according to another embodiment of the invention. Fig. 8 is a schematic cross-sectional view taken along the line B1-B1' and the line B2-B2' of Fig. 7. FIG. 9 is a schematic top view of a display device according to another embodiment of the invention. Fig. 10 is a schematic cross-sectional view taken along the section line C-C' of Fig. 9. 11 is a schematic cross-sectional view of a display device according to another embodiment of the invention. FIG. 12 is a schematic top view of a display device according to another embodiment of the invention. Fig. 13 is a schematic cross-sectional view taken along the line D-D' of Fig. 12; Fig. 14 is a perspective exploded schematic view of the region R2 of the display device. FIG. 15 is a schematic top view of a display device according to another embodiment of the invention. Fig. 16 is a perspective exploded schematic view of area R3 in Fig. 15.

Domestic deposit information (please note in the order of deposit institution, date and number) no Foreign hosting information (please note in the order of hosting country, institution, date, and number) no

10: Display device

100: Array substrate

102: substrate

105: buffer layer

106: gate insulation

108: Interlayer insulation layer

110: Inorganic insulating layer

112: Flat layer

114: Pixel Definition Layer

114a: groove

116: first electrode

118, 118a: hole injection layer

120, 120a: hole transport layer

122, 122a: luminescent layer

124, 124a: electron transport layer

126, 126a: second electrode

200: cover

300: sealing element

400: Depressed part

500: pseudo drop

A-A’: Sectional line

AA: Display area

CH: Channel area

CUT: cutting line

D: Dip pole

dt1: distance

DR: Drain region

G: Gate

LDR: Lightly doped drain region

LSR: Lightly doped source region

NA: non-display area

OLED: light emitting unit

P1: pixel

P2: pseudo pixel

S: source

SC: Semiconductor pattern

SR: Source region

T1: Active component

R1: area

Claims (10)

A display device has a display area and a non-display area, and includes: an array substrate, including a substrate, a pixel array, and a pixel definition layer, wherein the pixel array is located on the substrate and the pixel definition The layer is located on the substrate and has hydrophobicity; a cover plate is arranged on the array substrate; a sealing element is used to join the array substrate and the cover plate and is located in the non-display area; a recess is located in the non-display area , Wherein the recessed portion is formed at least on one of the array substrate and the cover plate, the depth of the recessed portion is greater than or equal to the thickness of the pseudo drop; and at least one pseudo drop is located in the recess and contacts the painting The element defines a hydrophobic surface of the layer. The display device according to claim 1, wherein the recessed portion is located in the pixel definition layer. The display device according to claim 2, wherein the array substrate further includes: at least one flat layer disposed between the substrate and the pixel definition layer, wherein the flat layer includes at least one groove, and the groove and The recesses overlap in a direction perpendicular to the flat layer. The display device according to claim 3, wherein the pixel definition layer is partially filled in the groove. The display device according to claim 2, wherein the contact angle of the pseudo-droplet with respect to the surface of the pixel definition layer is greater than 50 degrees. The display device of claim 1, wherein the array substrate further comprises: a pseudo-pixel array located in the non-display area, wherein the pseudo-pixel array surrounds the display area and is located between the recessed portion and the pixel array . The display device according to claim 1, wherein the recessed portion continuously surrounds the display area. The display device according to claim 1, wherein the depth of the recessed portion is less than the thickness of the pixel definition layer. The display device according to claim 1, wherein the minimum width of the recessed portion is greater than the width of the contact surface between the pseudo-droplet and the recessed portion. The display device according to claim 1, wherein the material of the pseudo-droplet includes one, two or more than two organic material layers selected from the group consisting of: hole injection layer, hole Transmission layer and light-emitting layer.

Images