TWI722017B - Method and inspection system for inspecting an object, and non-transitory computer readable medium - Google Patents
Method and inspection system for inspecting an object, and non-transitory computer readable medium Download PDFInfo
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Description
本發明係有關於包括錯位的IBUMP及線跡下通孔製程缺陷之自動化光學檢驗技術。 The present invention relates to an automated optical inspection technology including misaligned IBUMP and through hole process defects under the trace.
在最小化PCB佈局的製程中,PCB製造商開發了一種可允許有較密集銅信號佈局的生產製程。 In the process of minimizing PCB layout, PCB manufacturers have developed a production process that allows denser copper signal layout.
iBump係指直接駐留在另一銅層之上的一附加銅信號層;線跡下通孔(VUT)係指一層間通孔,與典型的雷射通孔相反,其產生不用鑽孔穿透過在它們中之該等連接的信號層或間隙,並通常具有大約與在它之上之該連接焊墊相同的尺寸。 iBump refers to an additional copper signal layer that resides directly on top of another copper layer; via under trace (VUT) refers to a via between layers, which is contrary to a typical laser via, which does not need to be drilled through The connected signal layers or gaps among them usually have approximately the same size as the connection pads above it.
這些技術對於生產和自動檢驗帶來挑戰。在生產中,在製程層之間對準之嚴格公差係至關重要的。在檢驗中,在該檢驗影像中之該獨立經移位信號與iBump層間的對齊和區分並不被當前的AOI解決方案來支援。VUT移位估計係具有挑戰性的,因為該通孔被部分地隱藏在該信號層之下。 These technologies pose challenges for production and automatic inspection. In production, strict tolerances for alignment between process layers are critical. In the inspection, the alignment and differentiation between the independent shifted signal and the iBump layer in the inspection image are not supported by current AOI solutions. VUT shift estimation is challenging because the via is partially hidden under the signal layer.
一種用於檢驗一物體的方法,其中該方法可包括獲取一物體的一影像;其中該物體可包括可不導電的一基底層,一第一導電層的第一導體及一第二導電層的第二導體,其中該等第一導體可被置於在該基底層與該等第二導體之間,其中該等第一導體接觸第二導 體;計算一第一對齊變換其表示在(a)該等第一導體之經成像的形狀及位置與(b)該等第一導體之經設計的形狀及位置之間的一第一空間關係;計算一第二對齊變換其表示在(a)該等第二導體之經成像的形狀及位置與(b)該等第二導體之經設計的形狀及位置之間的一第二空間關係;基於該影像及該第二對齊變換偵測第一導體缺陷;以及基於該影像及該第二對齊變換偵測第二導體缺陷。 A method for inspecting an object, wherein the method may include acquiring an image of an object; wherein the object may include a non-conductive base layer, a first conductor of a first conductive layer, and a first conductor of a second conductive layer Two conductors, where the first conductors can be placed between the base layer and the second conductors, where the first conductors contact the second conductors Body; calculate a first alignment transformation which represents a first spatial relationship between (a) the imaged shape and position of the first conductors and (b) the designed shape and position of the first conductors Calculate a second alignment transformation which represents a second spatial relationship between (a) the imaged shapes and positions of the second conductors and (b) the designed shapes and positions of the second conductors; The first conductor defect is detected based on the image and the second alignment transformation; and the second conductor defect is detected based on the image and the second alignment transformation.
該等第一導體缺陷的該偵測可以與該等第二導體缺陷的該偵測分開執行。 The detection of the first conductor defects can be performed separately from the detection of the second conductor defects.
該物體可以是一印刷電路板而該等第二導體可以是iBump。 The object can be a printed circuit board and the second conductors can be iBumps.
該物體可以是一印刷電路板而該等第一導體可以是線跡下通孔。 The object can be a printed circuit board and the first conductors can be under-trace vias.
該等第一導體缺陷的該偵測可包括尋找一給定線跡下通孔的一部分,其延伸在可能被定位於該給定線跡下通孔之上的一給定第二導體,並計算出在該給定測試下通孔與該第二導體之間的一偏移。 The detection of the first conductor defects may include finding a portion of a via under a given trace that extends over a given second conductor that may be positioned above the via under the given trace, and Calculate an offset between the via hole and the second conductor under the given test.
該方法可以包括計算該給定線跡下通孔的一中心以及該給定第二導體的一中心。 The method may include calculating a center of the through hole under the given trace and a center of the given second conductor.
該第一對齊變換的該計算可以包括根據該等第二導體之該等經設計的形狀和位置來遮罩物體部分。 The calculation of the first alignment transformation may include masking the object part according to the designed shapes and positions of the second conductors.
該第二對齊變換的該計算可以包括根據該等第一導體之該等經設計的形狀和位置來遮罩物體部分。 The calculation of the second alignment transformation may include masking the object part according to the designed shapes and positions of the first conductors.
該方法可包括執行計算該第一對齊變換及計算該第二對齊變換之該等步驟的多次重複;其中每一次重複產生可被饋送到一隨後重複的一重複結果。 The method may include performing multiple iterations of the steps of calculating the first alignment transformation and calculating the second alignment transformation; wherein each iteration produces a repeated result that can be fed to a subsequent iteration.
該方法可包括執行計算該第一對齊變換及計算該第二對齊變換之該等步驟的多次重複;其中每一次重複可根據該等第二導 體之該等經設計的形狀和位置來遮罩物體部分以計算該第一對齊變換;其中每一次重複產生可被饋送到一隨後重複的一重複結果。 The method may include multiple repetitions of the steps of calculating the first alignment transformation and calculating the second alignment transformation; wherein each repetition may be based on the second derivative The designed shapes and positions of the body are used to mask the object part to calculate the first alignment transformation; wherein each repetition produces a repetitive result that can be fed to a subsequent repetition.
該方法可包括執行計算該第一對齊變換及計算該第二對齊變換之該等步驟的多次重複;其中每一次重複可根據該等第一導體之該等經設計的形狀和位置來遮罩物體部分以計算該第二對齊變換;其中每一次重複產生可被饋送到一隨後重複的一重複結果。 The method may include multiple iterations of the steps of calculating the first alignment transformation and calculating the second alignment transformation; wherein each iteration may be masked according to the designed shapes and positions of the first conductors Part of the object to calculate the second alignment transformation; where each repetition produces a repetitive result that can be fed to a subsequent repetition.
一種用於檢驗一物體的檢驗系統,其中該檢驗系統可包括用於獲取一物體之一影像的一影像取像模組;其中該物體可包括可以是不導電的一基底層,一第一導電層的第一導體及一第二導電層的第二導體,其中該等第一導體可被置於在該基底層與該等第二導體之間,其中該等第一導體接觸該等第二導體;一第一對準處理器用於計算一第一對齊變換其表示在(a)該等第一導體之經成像的形狀及位置與(b)該等第一導體之經設計的形狀及位置之間的一第一空間關係;一第二對準處理器用於計算一第二對齊變換其表示在(a)該等第二導體之經成像的形狀及位置與(b)該等第二導體之經設計的形狀及位置之間的一第二空間關係;以及一檢驗處理器用以基於該影像及該第二對齊變換偵測第一導體缺陷,和用以基於該影像及該第二對齊變換偵測第二導體缺陷。 An inspection system for inspecting an object, wherein the inspection system may include an image capturing module for acquiring an image of an object; wherein the object may include a base layer that may be non-conductive, and a first conductive Layer of the first conductor and a second conductor of the second conductive layer, wherein the first conductors can be placed between the base layer and the second conductors, wherein the first conductors contact the second conductors Conductor; a first alignment processor is used to calculate a first alignment transformation which is expressed in (a) the imaged shape and position of the first conductors and (b) the designed shape and position of the first conductors A first spatial relationship between; a second alignment processor is used to calculate a second alignment transformation which is expressed in (a) the imaged shapes and positions of the second conductors and (b) the second conductors A second spatial relationship between the designed shape and position; and an inspection processor for detecting the first conductor defect based on the image and the second alignment transformation, and for detecting the first conductor defect based on the image and the second alignment transformation Detect defects in the second conductor.
該檢驗系統,其中該檢驗處理器可被組配成偵測該等第一導體缺陷分開於該等第二導體缺陷的該偵測。 In the inspection system, the inspection processor can be configured to detect the first conductor defects separately from the detection of the second conductor defects.
該物體可以是一印刷電路板而該等第二導體可以是iBump。 The object can be a printed circuit board and the second conductors can be iBumps.
該物體可以是一印刷電路板而該等第一導體可以是線跡下通孔。 The object can be a printed circuit board and the first conductors can be under-trace vias.
該檢驗處理器可被組配成偵測該等第一導體缺陷係藉由尋找一給定線跡下通孔的一部分,其延伸在可能被定位於該給定線跡下通孔之上的一給定第二導體之外,並計算出在該給定測試下通孔 與該第二導體之間的一偏移。 The inspection processor can be configured to detect the first conductor defects by looking for a part of the via under a given trace, which extends over the via that may be positioned under the given trace Outside of a given second conductor, and calculate the through hole under the given test An offset from the second conductor.
該檢驗處理器可被組配成計算該給定線跡下通孔的一中心以及該給定第二導體的一中心。 The inspection processor can be configured to calculate a center of the through hole under the given trace and a center of the given second conductor.
該第一對準處理器可被組配成根據該等第二導體之該等經設計的形狀和位置來遮罩物體部分以計算該第一對齊變換。 The first alignment processor can be configured to mask the object part according to the designed shapes and positions of the second conductors to calculate the first alignment transformation.
該第二對準處理器可被組配成計算該第二對齊變換可包括根據該等第一導體之該等經設計的形狀和位置來遮罩物體部分。 The second alignment processor may be configured to calculate the second alignment transformation may include masking the object part according to the designed shapes and positions of the first conductors.
該檢驗系統可被組配成執行計算該第一對齊變換及計算該第二對齊變換之該等步驟的多次重複;其中每一次重複產生可被饋送到一隨後重複的一重複結果。 The inspection system can be configured to perform multiple repetitions of the steps of calculating the first alignment transformation and calculating the second alignment transformation; wherein each repetition produces a repetitive result that can be fed to a subsequent repetition.
該檢驗系統可被組配成執行計算該第一對齊變換及計算該第二對齊變換之該等步驟的多次重複;其中每一次重複可以根據該等第二導體之該等經設計的形狀和位置來遮罩物體部分以計算該第一對齊變換;其中每一次重複產生可被饋送到一隨後重複的一重複結果。 The inspection system can be configured to perform multiple repetitions of the steps of calculating the first alignment transformation and calculating the second alignment transformation; wherein each repetition can be based on the designed shapes and the second conductors The position is used to mask the object part to calculate the first alignment transformation; where each iteration produces a iteration result that can be fed to a subsequent iteration.
該檢驗系統可被組配成執行計算該第一對齊變換及計算該第二對齊變換之該等步驟的多次重複;其中每一次重複可以根據該等第一導體之該等經設計的形狀和位置來遮罩物體部分以計算該第二對齊變換;其中每一次重複產生可被饋送到一隨後重複的一重複結果。 The inspection system can be configured to perform multiple repetitions of the steps of calculating the first alignment transformation and calculating the second alignment transformation; wherein each repetition can be based on the designed shapes and the first conductors The position is used to mask the object part to calculate the second alignment transformation; where each repetition produces a repetitive result that can be fed to a subsequent repetition.
一種非暫時性的電腦可讀取媒體其儲存有指令,一旦由一檢驗系統來執行時,會致使該檢驗系統來執行以下的該等步驟:獲取一物體之一影像;其中該物體可包括可以是不導電的一基底層,一第一導電層的第一導體及一第二導電層的第二導體,其中該等第一導體可被置於在該基底層與該等第二導體之間,其中該等第一導體接觸該等第二導體;計算一第一對齊變換其表示在(a)該等第一導體之經成像的形狀及位置與(b)該等第一導體之經設計的形狀及位置之間 的一第一空間關係;計算一第二對齊變換其表示在(a)該等第二導體之經成像的形狀及位置與(b)該等第二導體之經設計的形狀及位置之間的一第二空間關係;基於該影像及該第二對齊變換偵測第一導體缺陷,和基於該影像及該第二對齊變換偵測第二導體缺陷。 A non-transitory computer-readable medium that stores instructions. Once executed by an inspection system, it will cause the inspection system to perform the following steps: acquiring an image of an object; wherein the object may include It is a non-conductive base layer, a first conductor of a first conductive layer and a second conductor of a second conductive layer, wherein the first conductors can be placed between the base layer and the second conductors , Where the first conductors contact the second conductors; calculate a first alignment transformation which is expressed in (a) the imaged shape and position of the first conductors and (b) the design of the first conductors Between the shape and position A first spatial relationship of; calculating a second alignment transformation which represents the difference between (a) the imaged shape and position of the second conductors and (b) the designed shape and position of the second conductors A second spatial relationship; detecting a first conductor defect based on the image and the second alignment transformation, and detecting a second conductor defect based on the image and the second alignment transformation.
100:工作台 100: workbench
101:受檢驗物品 101: Items to be inspected
103:控制和處理模組 103: control and processing module
104:儲存器 104: Storage
105:使用者介面 105: User Interface
106:網路介面、遠端網路、網路 106: Network interface, remote network, network
107:處理子系統 107: Processing Subsystem
200:檢驗影像供應器 200: Inspection image provider
102:光學、照明、和相機組件;相機 102: Optical, lighting, and camera components; camera
201:參考資料供應器 201: Reference Material Provider
202:信號對準處理器 202: signal alignment processor
203a:iBump對準處理器 203a: iBump alignment processor
203b:VUT移位估計器 203b: VUT shift estimator
204:檢驗處理器 204: Inspection processor
205:檢驗結果處理器 205: Inspection result processor
300:方法 300: method
301-320:步驟 301-320: steps
從以下的詳細描述配合該等附圖,其中圖1-4示出根據本發明的一實施例系統和方法,本發明將被更充分地理解並體會。 From the following detailed description in conjunction with the accompanying drawings, in which Figures 1-4 show an embodiment of the system and method according to the present invention, the present invention will be more fully understood and experienced.
因為在大部分的情況下,實現本發明的該裝置係由本領域的習知技藝者所公知的電子組件和電路所構成,為了理解和體認本發明的該等潛在概念以及為了不模糊或偏離本發明的該等教導,電路細節將不會以比以上所示所需要之任何更大的程度來進行解釋。 Because in most cases, the device implementing the present invention is composed of electronic components and circuits known to those skilled in the art, in order to understand and appreciate the potential concepts of the present invention and in order not to obscure or deviate. The teachings and circuit details of the present invention will not be explained to any greater extent than necessary as shown above.
在以下的說明書中,本發明將參考本發明之實施例的具體實例來說明。然而,很明顯的是各種修改和變化可被做出而不脫 離如在所附發明申請專利範圍中所闡述之本發明較寬的精神和範圍。 In the following description, the present invention will be described with reference to specific examples of embodiments of the present invention. However, it is clear that various modifications and changes can be made without breaking away It is away from the broader spirit and scope of the present invention as set forth in the scope of the appended invention application.
在本說明書中對一方法之任何的提及應比照適用於一能夠執行該方法的系統,並應比照適用於儲存有指令之一非暫時性的電腦可讀取媒體,其一旦由電腦執行時會導致該方法的執行。 Any reference to a method in this manual shall apply mutatis mutandis to a system capable of executing the method, and shall be mutatis mutandis to a non-transitory computer-readable medium storing instructions, once it is executed by a computer Will lead to the execution of the method.
在本說明書中對一系統之任何的提及應比照適用於一能夠由該系統所執行的方法,並應比照適用於儲存有指令之一非暫時性的電腦可讀取媒體,其可由該系統來執行。 Any reference to a system in this manual shall apply mutatis mutandis to a method that can be executed by the system, and shall be mutatis mutandis to a non-transitory computer-readable medium that stores instructions that can be used by the system To execute.
在本說明書中對一非暫時性的電腦可讀取媒體之任何的提及應比照適用於一能夠執行儲存在該非暫時性的電腦可讀取媒體中該等指令的系統,並應比照適用於一方法,該方法可由可讀出儲存在該非暫時性電腦可讀取媒體中該等指令的一電腦來執行。 Any reference to a non-transitory computer readable medium in this manual shall apply mutatis mutandis to a system capable of executing the instructions stored in the non-transitory computer readable medium, and shall apply mutatis mutandis to A method that can be executed by a computer that can read the instructions stored in the non-transitory computer-readable medium.
下表說明了可由該建議系統所克服之該等問題的一些。 The following table illustrates some of these problems that can be overcome by the proposed system.
本發明提供了一種方法其檢驗和報告「線跡下通孔」(VUT)及「iBump」生產缺陷用於產生和製程控制使用。該VUT屬於一VUT層而iBump屬於一凸塊層。 The present invention provides a method for inspecting and reporting "via under trace" (VUT) and "iBump" production defects for generation and process control. The VUT belongs to a VUT layer and the iBump belongs to a bump layer.
該方法將使得使用這些先進技術的PCB製造商來檢驗生產批次及有助於製程品質控制,以實現更好的產量。 This method will enable PCB manufacturers using these advanced technologies to inspect production batches and help process quality control to achieve better yields.
該方法係當前可用檢驗能力的一附加部分。 This method is an additional part of the currently available inspection capabilities.
該AOI系統包括一工作台100,該受檢驗物品101被放置在其上;光學、照明、和相機組件102其擷取該物品的一影像(使用該等組件及/或工作台相對於彼此移動);各種控制和處理模組103其提供與該等組件及工作台、相機影像及CAD及其他資料的儲存器104、使用者介面105及/或網路介面106、等等的通訊與控制;並且,特別的是,由分析檢驗影像和其他資料,並輸出測量、經發現的缺陷、以及其他的資料給該使用者介面、網路、及/或儲存器之模組所構成的一處理子系統107。一示意圖被展示於圖1中。所有這些部件可位在一實體外殼內,或者可被散佈在幾個機櫃或者甚至幾個位置中,例如,該工作台和相機裝置可被安置於遠離該等處理單元,而該使用者介面也可以是遠端的,所有的這些都透過網路來進行互動。該等處理和控制單元的一些或全部可以以軟體或專用硬體等等來實現。
The AOI system includes a
參考圖2,檢驗影像供應器200提供該經檢驗物品的影像或它的一部分,其來自該相機102、遠端網路106、或儲存器104。
參考資料供應器201提供相關於該作業的所有資料,包括CAD資料、工作參數、偵測規格、等等。信號對準處理器202接收從200來的檢驗影像及從201來的信號層CAD資料以及其他資料,並計算在該影像中之該信號層與CAD座標之間的最佳的對齊變換(對準)。
Referring to FIG. 2, the
iBump對準處理器203a從200及iBump層CAD以及來自201之其他的資料接收檢驗影像,並計算在該影像中之該iBump層與
CAD座標之間的最佳的對齊變換(對準)。可選擇性地,它獨立地計算每一個iBump物體的對準。可選擇性地,202和203a的每一個還接收另外一層(分別為iBump或信號)該的CAD資料,並使用它來識別或遮罩屬於另一影像的該等該影像部分,以有助於隔離該等相關的影像部分並估計每一層之該獨立的對準變換。更可選擇性地,202和203a交換它們經計算的變換以進一步助於及改進其精確性,可選擇性地係以一種反覆的方式。
The
該檢驗處理器204接收來自200和201的參考和影像資料,以及來自處理器202和203a該等經計算出的對準結果。
The
在當前應用中所提到之該等處理器的每一個可以是一硬體處理器諸如一影像處理器、一通用處理器、一圖形處理器、一ASIC、一FPGA及類似者-其被組配以執行可致使該處理器起作用的程式。 Each of the processors mentioned in the current application can be a hardware processor such as an image processor, a general-purpose processor, a graphics processor, an ASIC, an FPGA, and the like-which are grouped together It is equipped with a program that can cause the processor to work.
該等獨立的對準結果使得該檢驗處理器可準確地定位及分離該信號層之可見的該等影像部分及該iBump之可見的該等影像部分。然後,它獨立地執行這些部件之各自的檢驗,發現在該信號及該iBump層兩者中的缺陷,使用檢驗參數及可選擇性地根據接收自201的該檢驗規格。該檢驗處理器還執行其他測量,包括計算在iBump物體與信號物體之間該相對的移位或錯位,根據來自處理器202和203a的該等結果。
The independent alignment results enable the inspection processor to accurately locate and separate the visible image parts of the signal layer and the visible image parts of the iBump. Then, it performs the respective inspections of these components independently, finds defects in both the signal and the iBump layer, uses inspection parameters and optionally according to the inspection specifications received from 201. The inspection processor also performs other measurements, including calculating the relative displacement or misalignment between the iBump object and the signal object, based on the results from the
該檢驗結果處理器205接收來自檢驗處理器204之所有的缺陷、測量及其他的結果,並把它們分送給該AOI系統之其他的適當的部件,包括使用者介面105、網路106、和儲存器104。
The
對於具有VUT的PCB,一類似的子處理系統被使用,具有一圖3所示類似的結構。與上述針對iBump所討論之解決方案的主要區別如下:一VUT移位估計器203b同時地接收該信號及來自201之該VUT層CAD資料,並各別地估計每一個VUT物體(通孔)的該移 位。這裡,該等通孔通常被隱藏在該信號層下面,並因此不是在該影像中可見的,除非它們被顯著地移位以便被顯示為在一信號物體之該側面的一突出部分。因此,該VUT移位估計器203b使用來自兩個CAD層的該資料並把它們與覆蓋該通孔之該信號物體的該可見形狀做比較。然後,它採用了一種幾何估計模組,其找出在可見突出部分與該通孔的可能位錯之間的最佳配適。 For PCBs with VUTs, a similar sub-processing system is used, with a similar structure as shown in Figure 3. The main difference from the solution discussed above for iBump is as follows: a VUT displacement estimator 203b simultaneously receives the signal and the VUT layer CAD data from 201, and separately estimates the value of each VUT object (via) Should move Bit. Here, the through holes are usually hidden under the signal layer and therefore are not visible in the image unless they are significantly shifted so as to be displayed as a protrusion on the side of a signal object. Therefore, the VUT displacement estimator 203b uses the data from the two CAD layers and compares them with the visible shape of the signal object covering the via. Then, it uses a geometric estimation module that finds the best fit between the visible protrusion and the possible dislocation of the through hole.
局部對準:如以上所描述的,對準處理器處理影像並找出每一層的最佳對齊(變換)。在實踐中,一單一矩陣無法描述用於整個檢驗面板的一適當變換,因為該等層可能被是非均勻地變形或用多次曝光被產生,肇因於非線性光學失真、等等。因此,該等對準處理器能夠分別地處理更小的影像區塊,導致對應到每一個影像區塊變換的一種映射。提供一概述的變換映射有一個額外的優點是可以方便地指出層拉伸、旋轉、整個單元或陣列之移位等等的全域性問題。該資訊可以反饋給該AOI運算子(用於該面板之更好的定位)以及生產品質控制。一影像區塊可包括,例如,1000x1000個像素。這是相當小的,考慮到以一適度放大率所掃描之一典型的PCB板可包含約50000x40000像素。 Local alignment: As described above, the alignment processor processes the image and finds the best alignment (transformation) for each layer. In practice, a single matrix cannot describe an appropriate transformation for the entire inspection panel, because the layers may be deformed non-uniformly or produced with multiple exposures, due to nonlinear optical distortions, etc. Therefore, the alignment processors can process smaller image blocks separately, resulting in a mapping corresponding to the transformation of each image block. Providing an overview of the transformation mapping has an additional advantage that it can easily point out global issues such as layer stretching, rotation, and displacement of the entire unit or array. The information can be fed back to the AOI operator (for better positioning of the panel) and production quality control. An image block may include, for example, 1000×1000 pixels. This is quite small, considering that a typical PCB board scanned at a moderate magnification may contain about 50000x40000 pixels.
此外,在一些製程中,各別的凸塊或VUT通孔有可能被不同的移位。在這種情況下,該凸塊層對準處理器獨立地執行每一個各別凸塊/VUT的對準。該使用者或操作員可決定何時使用一區域變換及何時運用一各別的轉換。 In addition, in some manufacturing processes, individual bumps or VUT vias may be shifted differently. In this case, the bump layer alignment processor independently performs the alignment of each individual bump/VUT. The user or operator can decide when to use a zone transformation and when to use a separate transformation.
影像分析:由對準處理器所使用的該等影像處理方法同時取決於該照明品質與該製品的表面特性。在一些製造過程中,該iBump層通常有光澤且比該線跡銅層更亮。因此,在該凸塊銅與線跡銅之間的該邊界上有一可見的邊緣,使得可在該對準過程中區分它們。此外,一合適的強度臨界值可以進一步區分該等凸塊與該線跡銅。然而,在一些其他的製造程序中,這兩個層具有相似的特徵亮 度。在這種情況下,使用一具較窄角度範圍之照明可能是有利的,使得該等凸塊的該等「牆」會在該影像中看起來較暗,提供在該凸塊周圍有一可見的暗色邊界。 Image analysis: The image processing methods used by the alignment processor simultaneously depend on the lighting quality and the surface characteristics of the product. In some manufacturing processes, the iBump layer is usually shiny and brighter than the trace copper layer. Therefore, there is a visible edge on the boundary between the bump copper and the trace copper, so that they can be distinguished during the alignment process. In addition, an appropriate strength threshold can further distinguish the bumps from the trace copper. However, in some other manufacturing processes, these two layers have similar characteristics. degree. In this case, it may be advantageous to use a narrow angle range of illumination, so that the "walls" of the bumps will appear darker in the image, providing a visible light around the bumps Dark border.
應當注意的是,在一自動光學檢驗下,該使用者經常執行特定的校準和調整及其他準備以設置用於掃描一特定種類面板的該系統。特別的是,這些行動包括校準或組配置該照明區塊。 It should be noted that under an automatic optical inspection, the user often performs specific calibrations and adjustments and other preparations to set up the system for scanning a specific type of panel. In particular, these actions include calibration or group configuration of the lighting block.
該等對準處理器可以使用這些暗色輪廓來把該等凸塊與該等線跡,並計算它們的變換。 The alignment processors can use the dark contours to combine the bumps and the stitches, and calculate their transformations.
反覆兩層對準:在兩層對準中的主要挑戰是,它們都一起出現在一影像中,具有凸塊物體和線跡物體並排出現及/或線跡物體被部分地或完全地隱藏在凸塊物體之下。這使得常規的對齊方法(諸如參考影像與檢驗影像的交互相關)是不適合的。該等凸塊物體會混淆該信號層對準處理器,而信號物體會混淆該凸塊層對準處理器。 Repeated two-layer alignment: The main challenge in two-layer alignment is that they all appear together in an image, with bump objects and stitch objects appearing side by side and/or stitch objects are partially or completely hidden Below the bumpy object. This makes conventional alignment methods (such as the interactive correlation between the reference image and the test image) unsuitable. The bump objects will confuse the signal layer alignment processor, and the signal objects will confuse the bump layer alignment processor.
一可能的解決方案係提供每一個處理器兩個CAD層,使用另外一層作為遮罩。換句話說,該信號層對準處理器遮罩由凸塊所佔據的該等區域(根據該CAD),忽略在那裡發現的邊緣,同樣的該凸塊層對準處理器遮罩由線跡所佔據的該等區域(根據該CAD),忽略在那裡發現的邊緣。然而,該對準變換最初係未知的,所以該遮罩通常是不準確的,並且該等對準結果可能是次佳的。因此,該製程可反覆被重複,其中在每一次反覆中該等處理器重新計算該等對準變換,使用來自該先前反覆之該等經更新的變換來當產生該遮罩時變換另一層的該CAD影像。該程序被圖示於圖4中。 A possible solution is to provide two CAD layers per processor, and use another layer as a mask. In other words, the signal layer aligns the processor mask to the areas occupied by bumps (according to the CAD), ignoring the edges found there, and the same bump layer aligns the processor mask to the traces For the occupied areas (according to the CAD), the edges found there are ignored. However, the alignment transformation is initially unknown, so the mask is usually inaccurate, and the alignment results may be sub-optimal. Therefore, the process can be repeated iteratively, where in each iteration the processors recalculate the alignment transformations, using the updated transformations from the previous iteration to transform another layer of the mask when generating the mask. The CAD image. This procedure is illustrated in Figure 4.
圖4圖示出方法300,其始於步驟301接收包括有iBump設計資訊及信號設計資訊之一經檢驗的影像(影像)及參考資料。
FIG. 4 illustrates the
步驟301之後跟著可由該信號層對準處理器來執行的一第一步驟序列302-307和可由該凸塊層對準處理器來執行之一第二 步驟序列312-317。 Step 301 is followed by a first sequence of steps 302-307 that can be executed by the signal layer alignment processor and a second sequence of steps that can be executed by the bump layer alignment processor. Sequence of steps 312-317.
步驟302和312係可選擇性的。其他步驟可以是可選擇性的。
該第一步驟序列始於步驟302,載入該凸塊層(凸塊設計資訊)作為一遮罩-從而忽略由凸塊所填充之該影像的部分(根據該凸塊設計資料)。
The first sequence of steps starts at
步驟303包括計算在該等信號導體之經成像的形狀及位置與該等信號導體之經設計的形狀及位置之間的一凸塊層變換(對準)。信號導體屬於該信號層-一傳送信號的層。 Step 303 includes calculating a bump layer transformation (alignment) between the imaged shape and position of the signal conductors and the designed shape and position of the signal conductors. The signal conductor belongs to the signal layer-a layer that transmits signals.
步驟304包括接收該凸塊層變換。 Step 304 includes receiving the bump layer transformation.
步驟305包括產生一經變換的凸塊層遮罩-根據該凸塊層變換調整該遮罩。 Step 305 includes generating a transformed bump layer mask-adjusting the mask according to the bump layer transformation.
步驟306包括計算該信號層變換(使用該經變換的凸塊層遮罩)。 Step 306 includes calculating the signal layer transformation (using the transformed bump layer mask).
步驟307係檢查是否已達到了一預定反覆數量的一控制步驟。如果沒有-跳到步驟304。否則-跳到步驟320。值得注意的是,其他的停止準則可被使用。例如-該停止準則可以是回應於在一反覆過程中所發現之該校正及/或錯誤量。該停止狀態可以表示一種收斂-更多次反覆不會改變該結果(例如將不會顯著地改變該凸塊遮罩)高於一預定的臨界值。 Step 307 is a control step of checking whether a predetermined number of iterations has been reached. If not-skip to step 304. Otherwise-skip to step 320. It is worth noting that other stopping criteria can be used. For example-the stopping criterion may be in response to the amount of correction and/or error found in an iterative process. The stopped state may indicate a convergence-more iterations will not change the result (for example, the bump mask will not be significantly changed) above a predetermined threshold.
該第二步驟序列始於步驟312,載入該信號層(信號設計資訊)作為一遮罩-從而忽略由信號導體所填充之該影像的部分(根據該凸塊設計資料)。
The second sequence of steps begins at
步驟313包括計算在該等凸塊之經成像的形狀及位置與該等凸塊之經設計的形狀及位置之間的一凸塊層變換(對準)。步驟314包括接收該信號層變換。 Step 313 includes calculating a bump layer transformation (alignment) between the imaged shape and location of the bumps and the designed shape and location of the bumps. Step 314 includes receiving the signal layer transformation.
步驟315包括產生一經變換的信號層遮罩-根據該信 號層變換調整該遮罩。 Step 315 includes generating a transformed signal layer mask-according to the signal Change the number layer to adjust the mask.
步驟316包括計算該凸塊層變換(使用該經變換的信號層遮罩)。 Step 316 includes calculating the bump layer transform (using the transformed signal layer mask).
步驟317係檢查是否已達到了一預定反覆數量的一控制步驟。如果沒有-跳到步驟314。否則-跳到步驟320。值得注意的是,其他的停止準則可被使用。例如-該停止準則可以是回應於在一反覆過程中所發現之該校正及/或錯誤量。該停止狀態可以表示一種收斂-更多次反覆不會改變該結果(例如將不會顯著地改變該凸塊遮罩)高於一預定的臨界值。 Step 317 is a control step of checking whether a predetermined number of iterations has been reached. If not-skip to step 314. Otherwise-skip to step 320. It is worth noting that other stopping criteria can be used. For example-the stopping criterion may be in response to the amount of correction and/or error found in an iterative process. The stopped state may indicate a convergence-more iterations will not change the result (for example, the bump mask will not be significantly changed) above a predetermined threshold.
步驟320包括輸出該信號層變換及該凸塊層變換。 Step 320 includes outputting the signal layer transformation and the bump layer transformation.
一相同的程序可被應用至一VUT層。 A same procedure can be applied to a VUT layer.
缺陷類型:本提出的系統及方法適合成為一全檢驗PCB AOI的一補充,即,它們不削弱AOI的全檢驗能力,包括尋找及測量關鍵和非關鍵缺陷包括開路、短路、缺口、突出部分、佈線和空間寬度違反、針孔、孤立區、鑽頭缺陷、等等。藉由致使可找出與該凸塊及/或VUT層相關之關鍵和非關鍵缺陷和測量及其與該信號層的互動,該提出的系統和方法還提升了該AOI系統。 Defect types: The proposed system and method are suitable to be a supplement to the full inspection of PCB AOI, that is, they do not impair the full inspection capability of AOI, including finding and measuring critical and non-critical defects including open circuits, short circuits, gaps, protruding parts, Wiring and space width violations, pinholes, isolated areas, drill defects, etc. By enabling the identification and measurement of critical and non-critical defects related to the bump and/or VUT layer and their interaction with the signal layer, the proposed system and method also enhance the AOI system.
這些包括:˙在該等兩層之間相對移位的測量(並報告臨界尺寸之大的移位);˙透過相對於信號層之凸塊/VUT移位的空間違反(並報告臨界尺寸的違反);˙缺少凸塊及多餘的凸塊;˙凸塊尺寸違反(並報告臨界尺寸的違反);˙凸塊表面缺陷(缺口、突出部分、針孔、在該凸塊上的氧化等等)。 These include: ˙Measurement of the relative displacement between the two layers (and report the large displacement of the critical dimension); ˙By the space violation of the bump/VUT displacement relative to the signal layer (and report the critical dimension Violation); ˙Lack of bumps and extra bumps; ˙Bump size violation (and report the violation of critical size); ˙Bump surface defects (notches, protrusions, pinholes, oxidation on the bumps, etc.) ).
這種豐富的檢驗能力是可能的,肇因於該系統執行每一層獨立對準的能力,從而允許該檢驗處理器可產生精確的遮罩(考慮到所有的CAD資料和該等經計算出的對準變換)其隔離了在該檢驗 影像中之每一層的該等可見部份,並因此提供獨立的缺陷分析並為每一層做報告。 This rich inspection capability is possible due to the system's ability to perform independent alignment of each layer, allowing the inspection processor to generate accurate masks (taking into account all CAD data and the calculated Alignment transformation) which isolates the The visible parts of each layer in the image, and therefore provide independent defect analysis and report for each layer.
此外,本領域的習知技藝者將體認到在該等上述操作的該功能之間的該等邊界僅是說明性的。多個操作的該功能可以被組合成一單一操作,及/或一單一操作的該功能可被散佈在額外的操作中。而且,替代的實施例可以包括一特定操作的多個實例,並且在各種其他的實施例中操作的順序可被改變。 In addition, those skilled in the art will recognize that the boundaries between the functions of the above-mentioned operations are only illustrative. The function of multiple operations may be combined into a single operation, and/or the function of a single operation may be dispersed in additional operations. Also, alternative embodiments may include multiple instances of a specific operation, and the order of operations may be changed in various other embodiments.
因此,將被理解的是,本文所描述的該等架構僅是示例性的,並且事實上許多其他的架構可被實現其實現相同的功能。在一種抽象,但仍明確的意義上,組件之任何佈置以實現相同的功能被有效地「相關聯」使得該所欲的功能被實現。因此,在本文中任何兩個組件被組合以實現一特定功能可被視為是「相關聯於」彼此使該所欲的功能被實現,而不管結構或中間組件。同樣地,如此相關聯之任何兩個組件也可被視為是「可操作地連接」或「可操作地耦合」於彼此以實現該所欲的功能。 Therefore, it will be understood that the architectures described herein are only exemplary, and in fact many other architectures can be implemented to achieve the same function. In an abstract but still clear sense, any arrangement of components to achieve the same function is effectively "associated" so that the desired function is realized. Therefore, in this document, any two components combined to achieve a specific function can be regarded as being "associated with" each other to enable the desired function to be realized, regardless of the structure or intermediate components. Similarly, any two components so related can also be regarded as being "operably connected" or "operably coupled" to each other to achieve the desired function.
本發明還可在一電腦程式中被實現用於在一電腦系統上執行,至少包括程式碼部分用於執行根據本發明之一方法的步驟,當執行在一可規劃的裝置上時,諸如一電腦系統或使得一可規劃裝置可執行根據本發明之一裝置或系統的功能。該電腦程式可致使該儲存系統來分配磁碟到磁碟群組。 The present invention can also be implemented in a computer program for execution on a computer system, including at least part of the program code for executing the steps of a method according to the present invention, when executed on a programmable device, such as a The computer system may enable a programmable device to perform the functions of a device or system according to the present invention. The computer program can cause the storage system to allocate disks to disk groups.
一電腦程式是一指令序列諸如一特定的應用程式及/或一作業系統。該電腦程式可例如包括以下的一或多種:子程式、一函數、一程序、一物件方法、一物件實現方式、一可執行應用程式、一小應用程式、一servlet、一來源碼、一目的碼、一共享程式庫/動態載入程式庫及/或設計用於在電腦系統上執行之其他的指令序列。 A computer program is a sequence of commands such as a specific application program and/or an operating system. The computer program may, for example, include one or more of the following: a subprogram, a function, a program, an object method, an object implementation method, an executable application, a small application, a servlet, a source code, and a purpose Code, a shared library/dynamically loaded library, and/or other instruction sequences designed to be executed on a computer system.
該電腦程式可被儲存在一非暫時性電腦可讀取媒體的內部。該電腦程式的全部或部分可被永久地提供在電腦可讀取媒體 上,可移除式地或被遠端耦合到一資訊處理系統。該電腦可讀取媒體可包括,例如但不侷限於,任意數量的:包括磁碟和磁帶儲存媒體之磁性儲存媒體;光儲存媒體諸如一光碟媒體(例如,CD-ROM、CD-R、等等)以及數位視訊碟儲存媒體;非依電性儲存儲存媒體,包括基於半導體的記憶體單元諸如快閃記憶體、EEPROM、EPROM、ROM;鐵磁數位記憶體;MRAM;依電性儲存媒體包括暫存器、緩衝器或快取、主記憶體、RAM、等等。 The computer program can be stored in a non-transitory computer readable medium. All or part of the computer program can be permanently provided on computer readable media Above, it can be removably or remotely coupled to an information processing system. The computer-readable media may include, for example, but not limited to, any number of magnetic storage media including magnetic disks and tape storage media; optical storage media such as a CD-ROM media (for example, CD-ROM, CD-R, etc.) Etc.) and digital video disc storage media; non-electrical storage storage media, including semiconductor-based memory units such as flash memory, EEPROM, EPROM, ROM; ferromagnetic digital memory; MRAM; electrical storage media including Register, buffer or cache, main memory, RAM, etc.
一電腦行程通常包括一執行(運行)的程式或一程式的一部分、當前的程式數值及狀態資訊、以及由該作業系統所使用的該等資源來管理該行程的執行。一作業系統(OS)是軟體,其管理一電腦之該等資源的該共享並為程序設計師提供用來存取這些資源的一介面。一作業系統處理系統資料及使用者輸入,而回應係藉由分配及管理任務以及內部系統資源作為一服務給該系統之使用者和程式。 A computer program usually includes an executing (running) program or a part of a program, current program values and status information, and the resources used by the operating system to manage the execution of the program. An operating system (OS) is software that manages the sharing of the resources of a computer and provides an interface for programmers to access these resources. An operating system processes system data and user input, and responds by assigning and managing tasks and internal system resources as a service to users and programs of the system.
該電腦系統可例如包括至少一個處理單元、相關聯的記憶體和數個輸入/輸出(I/O)裝置。當執行該電腦程式時,該電腦系統根據該電腦程式處理資訊,並且經由I/O裝置產生所得的輸出資訊。 The computer system may, for example, include at least one processing unit, associated memory, and several input/output (I/O) devices. When the computer program is executed, the computer system processes information according to the computer program, and generates the resulting output information through the I/O device.
在前述的說明書中,本發明已經參照本發明的實施例的具體實例進行了說明。然而,很明顯的是各種修改和變化可被做出而不脫離如在所附發明申請專利範圍中所闡述之本發明較寬的精神和範圍。 In the foregoing specification, the present invention has been described with reference to specific examples of embodiments of the present invention. However, it is obvious that various modifications and changes can be made without departing from the broader spirit and scope of the present invention as set forth in the appended patent application scope.
此外,在該說明和發明申請專利範圍中「前」、「後」、「頂部」、「底部」、「之上」、「之下」等用語和類似者,如果有的話,係被使用於描述性的目的並不一定用於描述永久的相對位置。 應被理解的是,如此使用的用詞在適當的情況下是可以互換的,使得在本文所描述之本發明的該等實施例,例如,能夠在不是如本文所說明或以其他方式所描述那些的其他方位來操作。 In addition, the terms "front", "rear", "top", "bottom", "above", "below" and similar terms in the description and the scope of the invention application, if any, are used For descriptive purposes, it is not necessarily used to describe permanent relative positions. It should be understood that the terms so used are interchangeable under appropriate circumstances, so that the embodiments of the present invention described herein, for example, can be described in other ways. Those other directions to operate.
本領域的習知技藝者將體認到的是在邏輯方塊之間的該等邊界僅是說明性的並且替代的實施例可以合併邏輯方塊或電路元件或者對各種邏輯方塊或電路元件施加功能性的一種替代的分解。因此,可被理解的是,本文所描述的架構僅是示例性的,並且事實上許多其他的結構可被實現其實現了相同的功能。 Those skilled in the art will recognize that the boundaries between logic blocks are only illustrative and alternative embodiments may incorporate logic blocks or circuit elements or apply functionality to various logic blocks or circuit elements. An alternative decomposition. Therefore, it can be understood that the architecture described herein is only exemplary, and in fact many other structures can be implemented to achieve the same function.
組件之任何佈置以實現相同的功能被有效地「相關聯」使得該所欲的功能被實現。因此,在本文中任何兩個組件被組合以實現一特定功能可被視為是「相關聯於」彼此使該所欲的功能被實現,而不管結構或中間組件。同樣地,如此相關聯之任何兩個組件也可被視為是「可操作地連接」或「可操作地耦合」於彼此以實現該所欲的功能。 Any arrangement of components to achieve the same function is effectively "associated" so that the desired function is realized. Therefore, in this document, any two components combined to achieve a specific function can be regarded as being "associated with" each other to enable the desired function to be realized, regardless of the structure or intermediate components. Similarly, any two components so related can also be regarded as being "operably connected" or "operably coupled" to each other to achieve the desired function.
再者,本領域的習知技藝者將體認到在該等上述操作的該功能之間的該等邊界僅是說明性的。多個操作的該功能可被組合成一單一操作,及/或一單一操作的該功能可被分佈在額外的操作中而且可在時間上至少部分地重疊來執行操作。此外,替代的實施例可以包括一特定操作的多個實例,並且在各種其他的實施例中操作的順序可被改變。 Furthermore, those skilled in the art will recognize that the boundaries between the functions of the above-mentioned operations are only illustrative. The function of multiple operations may be combined into a single operation, and/or the function of a single operation may be distributed in additional operations and may at least partially overlap in time to perform operations. In addition, alternative embodiments may include multiple instances of a specific operation, and the order of operations may be changed in various other embodiments.
而且,例如,在一實施例中,該圖示的實例可以被實現為位於一單一積體電路上或在相同裝置內的電路。或者,該等實例可被實現為任何數目以合適方式彼此互連之分開的積體電路或分開的裝置。 Also, for example, in one embodiment, the illustrated example may be implemented as a circuit located on a single integrated circuit or within the same device. Alternatively, the examples can be implemented as any number of separate integrated circuits or separate devices interconnected with each other in a suitable manner.
而且,例如,該等實例,或其部分,可被實現成實體電路或可轉換成實體電路之邏輯表示的軟體或程式碼呈現,諸如用一種任何適當類型的硬體描述語言。 Moreover, for example, the examples, or parts thereof, can be implemented as physical circuits or can be converted into software or code presentations that can be converted into logical representations of physical circuits, such as using any suitable type of hardware description language.
而且,本發明並不侷限在實現於非可規劃硬體中的實體裝置或單元,但也可以被應用在可規劃裝置或單元中,其能夠由根據適當的程式碼操作來執行所欲的裝置功能,諸如大型主機、迷你電腦、 伺服器、工作站、個人電腦、筆記型電腦、個人數位助理、電子遊戲機、汽車和其他嵌入式系統、蜂巢式電話和各種其他的無線裝置,在本申請中統稱為「電腦系統」。 Moreover, the present invention is not limited to physical devices or units implemented in non-programmable hardware, but can also be applied to programmable devices or units, which can be operated according to appropriate code to execute the desired device Functions, such as mainframes, minicomputers, Servers, workstations, personal computers, notebook computers, personal digital assistants, electronic game consoles, automobiles and other embedded systems, cellular phones and various other wireless devices are collectively referred to as "computer systems" in this application.
然而,其他的修改、變型和替換也是有可能的。相應地,本說明書和該等附圖也被認為是一種說明性的而不是一種限制性的意義。 However, other modifications, variations, and replacements are also possible. Correspondingly, this specification and the drawings are also regarded as an explanatory rather than a restrictive meaning.
在該發明申請專利範圍中,置於括號之間任何的參考符號不應被解讀為限制該請求項。「包含」一詞並不排除在一請求項中所列出者之外還有其他元件或步驟的存在。此外,「一」或「一個」等用詞,如在本文中所使用的,被定義為一個或多於一個。而且,在該等請求項中介紹性詞組的使用諸如「至少一個」及「一或多個」不應該被解讀成暗示由該等不定冠詞「一」或「一個」對另一請求項元件的該介紹限制了發明中包含這種經介紹請求項元件之任何特定的請求項只包含一個這樣的元件,就算當該相同的請求項包括該等介紹性詞組「一或多個」或「至少一個」和不定冠詞諸如「一」或「一個」時。 In the scope of the patent application for this invention, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "include" does not exclude the existence of other elements or steps besides those listed in a request item. In addition, terms such as "one" or "one", as used in this article, are defined as one or more than one. Moreover, the use of introductory phrases such as "at least one" and "one or more" in these claims should not be interpreted as implying that the indefinite articles "a" or "one" refer to elements of another claim. The introduction limits the invention to any specific claim that contains such an introduced claim element to include only one such element, even when the same claim includes the introductory phrases "one or more" or "at least one". "And indefinite articles such as "一" or "one".
這對於定冠詞的使用亦然。除非另外地被指出,諸如「第一」和「第二」等詞被使用來用於此類用詞所描述之該等元件間的任意區分。因此,這些用詞不一定意圖旨在此類元件的時間或其他的優先次序。簡單的事實為被陳述在相互不同請求項中之特定的措施並不表示這些措施的一種組合不能被有利地使用。 This is also true for the use of definite articles. Unless otherwise indicated, terms such as "first" and "second" are used to arbitrarily distinguish between the elements described by such terms. Therefore, these terms are not necessarily intended to refer to the timing or other priorities of such elements. The simple fact that specific measures are stated in mutually different claims does not mean that a combination of these measures cannot be used to advantage.
雖然本發明的特定特徵已在本文中被說明和描述,但是本領域的普通技術人員現在將可想出許多的修改、替換、改變、和等效者。因此,可被理解的是該所附的發明申請專利範圍旨在覆蓋落在本發明之該真正精神內之所有的這些修改和變化。 Although the specific features of the present invention have been illustrated and described herein, those of ordinary skill in the art will now be able to think of many modifications, substitutions, changes, and equivalents. Therefore, it can be understood that the scope of the appended invention application is intended to cover all these modifications and changes that fall within the true spirit of the present invention.
100:工作台 100: workbench
101:受檢驗物品 101: Items to be inspected
102:光學、照明、和相機組件;相機 102: Optical, lighting, and camera components; camera
103:控制和處理模組 103: control and processing module
104:儲存器 104: Storage
105:使用者介面 105: User Interface
106:網路介面、遠端網路、網路 106: Network interface, remote network, network
107:處理子系統 107: Processing Subsystem
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US5761337A (en) * | 1993-05-13 | 1998-06-02 | Sharp Kabushiki Kaisha | Method and apparatus for inspection of the appearance of bumps |
US6870611B2 (en) * | 2001-07-26 | 2005-03-22 | Orbotech Ltd. | Electrical circuit conductor inspection |
TWM388639U (en) * | 2007-06-15 | 2010-09-11 | King Yuan Electronics Co Ltd | Automatic optical inspection device |
TWI379066B (en) * | 2004-07-29 | 2012-12-11 | Agency Science Tech & Res | Inspection system and method for three dimensional inspection of a plurality of solder balls distributed on a substrate |
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US5761337A (en) * | 1993-05-13 | 1998-06-02 | Sharp Kabushiki Kaisha | Method and apparatus for inspection of the appearance of bumps |
US6870611B2 (en) * | 2001-07-26 | 2005-03-22 | Orbotech Ltd. | Electrical circuit conductor inspection |
TWI379066B (en) * | 2004-07-29 | 2012-12-11 | Agency Science Tech & Res | Inspection system and method for three dimensional inspection of a plurality of solder balls distributed on a substrate |
TWM388639U (en) * | 2007-06-15 | 2010-09-11 | King Yuan Electronics Co Ltd | Automatic optical inspection device |
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