JP2017133868A - Pattern inspection device and pattern inspection method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To detect a defect around a false defect with high accuracy while reducing false reports.SOLUTION: An imaging unit 213 of a pattern inspection device 1 captures the image of a substrate on which a real pattern based on design data 48 is formed by etching and thereby acquires a real pattern image indicating the real pattern. A limit area specification unit 412 compares the real pattern image with a design pattern indicated by the design data and thereby acquires an extraction area, and specifies the overlapping portion of an area of interest that is set on the basis of the design pattern and the extraction area as a limit area, i.e., an area where underetching or overetching is likely to occur in an etching process. A defect detection unit 413 sets detection sensitivity to the limit area that is different from those of other areas in the real pattern image of other substrates on which the real pattern based on the design data is formed, and while so doing, detects a defective area. Thus, it is possible to detect a defect around a false defect with high accuracy while reducing false reports.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a technique for inspecting a pattern formed on a substrate by an etching process.

  In appearance inspection of a printed circuit board, inspection is performed based on design data such as CAM (Computer Aided Manufacturing) data. For example, a design pattern indicated by design data is compared with an image showing a wiring pattern of a printed circuit board, and a place having a certain difference or more is extracted as a defect. Such a method is called a comparative inspection method.

  Note that Patent Document 1 discloses a defect inspection method for a pattern formed on a reticle or a semiconductor wafer. In this method, the detection sensitivity is set according to the number of corners of the reference pattern (design pattern) and the angle of the corners, and the detection sensitivity is used while comparing the image of the pattern to be inspected with the reference pattern. Pattern defects are detected. With the method of Patent Document 1, it is possible to reduce the number of detected pseudo defects, that is, reduce false alarms.

Japanese Patent No. 4644210

  By the way, in the manufacture of a printed circuit board, a wiring pattern is formed by removing unnecessary portions from a copper film formed on the surface of a resin substrate by etching (referred to as a subtractive method). In this case, in the concavo-convex portion of the wiring pattern, a shape which is different from the design pattern but is not a defect may occur. Specifically, in the pattern recess of the wiring pattern, a portion of the copper film that is not removed according to the design pattern by under etching remains, and in the pattern protrusion of the wiring pattern, the copper film that is removed excessively by the over etching than the design pattern The part of is produced. When such an image of a wiring pattern is compared with a design pattern, a large number of pseudo defects that do not need to be detected as defects are detected, that is, a large number of false reports are generated. In order to reduce false alarms due to under-etching or over-etching, it is conceivable to lower the detection sensitivity of the entire wiring pattern, but it becomes easy to miss a true defect.

  In the inspection of the printed circuit board, it is conceivable to reduce the false alarm by adopting the method of Patent Document 1. However, in this case, since a detection sensitivity different from that of other regions is set for a wide range in the pattern convex portion and the pattern concave portion, a true defect existing around the pseudo defect is missed. In addition, the state of under-etching and over-etching varies depending on the etching conditions such as the concentration and temperature of the etchant or the position on the printed circuit board (pattern area density). It is difficult to correct.

  The present invention has been made in view of the above problems, and an object thereof is to accurately detect a defect around a pseudo defect while reducing false information.

  The invention according to claim 1 is a pattern inspection apparatus for inspecting a pattern formed by etching on a substrate, and a storage unit for storing design data indicating a design pattern, and based on the design data by etching. An imaging unit that acquires an actual pattern image indicating the actual pattern by imaging the substrate on which the actual pattern is formed, an extraction region that is acquired by comparing the actual pattern image and the design pattern, and etching A limited region specifying unit that specifies a region that overlaps a region of interest set based on the design pattern as a region that is likely to cause under-etching or over-etching during processing, and an actual pattern based on the design data is formed In the actual pattern image of the other substrate that has been subjected to The region while setting different detection sensitivity, and a defect detector for detecting a defective area.

  A second aspect of the present invention is the pattern inspection apparatus according to the first aspect, wherein a part of the background region in the pattern concave portion of the design pattern is a first attention region where under-etching is likely to occur in the etching process. A part of the pattern region in the pattern convex portion of the design pattern is set as a second region of interest where over-etching is likely to occur in the etching process.

  A third aspect of the present invention is the pattern inspection apparatus according to the second aspect, further comprising an attention area acquisition unit that acquires the first attention area and the second attention area based on the design pattern.

  A fourth aspect of the present invention is the pattern inspection apparatus according to the second or third aspect, wherein the restricted area specifying unit is a part included in the pattern area of the actual pattern image in the extracted area. A region where one extraction region and the first region of interest overlap is specified as a first restriction region, and a second extraction region that is a portion of the extraction region that is not included in the pattern region of the actual pattern image; A region that overlaps the second region of interest is identified as the second restricted region.

  A fifth aspect of the present invention is the pattern inspection apparatus according to any one of the first to fourth aspects, wherein the defect detection unit compares the actual pattern image of the other substrate with the design pattern. By acquiring a binary candidate area image indicating each defect candidate area as a set of defect candidate pixels, the number of defect candidate pixels included in the window while moving a window of a predetermined size in the candidate area image Based on the defect detection process, a defect detection process for identifying a defective pixel included in the defect area is performed, and in the defect detection process, a defect candidate pixel included in the restriction area is given a lower weight than other defect candidate pixels. The

  The invention according to claim 6 is a pattern inspection method for inspecting a pattern formed by etching on a substrate, wherein a) a step of preparing design data indicating a design pattern, and b) the design by etching. A step of obtaining a real pattern image showing the real pattern by imaging a substrate on which a real pattern based on the data is formed; and c) an extraction obtained by comparing the real pattern image with the design pattern. Identifying a region where the region overlaps with a region of interest set based on the design pattern as a region where under-etching or over-etching is likely to occur in the etching process, and d) an actual result based on the design data Obtaining an actual pattern image of another substrate on which a pattern is formed; e) the other In the actual pattern image of the substrate, the other area while setting different detection sensitivity to the restricted area, and a step of detecting a defective area.

  A seventh aspect of the present invention is the pattern inspection method according to the sixth aspect, wherein a part of the background region in the pattern concave portion of the design pattern is a first attention region where under-etching is likely to occur in the etching process. A part of the pattern region in the pattern convex portion of the design pattern is set as a second region of interest where over-etching is likely to occur in the etching process.

  The invention according to claim 8 is the pattern inspection method according to claim 7, wherein in the step c), the first extraction region is a portion included in the pattern region of the actual pattern image in the extraction region. And a region where the first region of interest overlaps is specified as a first restricted region, a second extraction region that is a portion of the extraction region that is not included in the pattern region of the actual pattern image, and the second region of interest A region overlapping with the region is specified as the second restricted region.

  A ninth aspect of the present invention is the pattern inspection method according to any of the sixth to eighth aspects, wherein in the step e), the actual pattern image of the other substrate is compared with the design pattern. Thus, a binary candidate area image indicating each defect candidate area as a set of defect candidate pixels is acquired, and the number of defect candidate pixels included in the window while moving a window of a predetermined size in the candidate area image Based on the defect detection process, a defect detection process for identifying a defective pixel included in the defect area is performed. In the defect detection process, the defect candidate pixel included in the restriction area is given a lower weight than other defect candidate pixels. Is done.

  According to the present invention, it is possible to detect a defect around a pseudo defect with high accuracy while reducing a false alarm by using a limited region in which a region of interest is narrowed based on an actual pattern.

It is a figure which shows the structure of a pattern inspection apparatus. It is a figure which shows the structure of a computer. It is a block diagram which shows the function structure in a pattern inspection apparatus. It is a figure which shows the flow of the process which test | inspects a board | substrate. It is a figure which shows the binary image of a design pattern. It is a figure for demonstrating the process which acquires a 1st attention area. It is a figure for demonstrating the process which acquires a 1st attention area. It is a figure for demonstrating the process which acquires a 1st attention area. It is a figure which shows the binary image of a design pattern. It is a figure for demonstrating the process which acquires a 2nd attention area. It is a figure for demonstrating the process which acquires a 2nd attention area. It is a figure for demonstrating the process which acquires a 2nd attention area. It is a figure for demonstrating the process which specifies a 1st restriction | limiting area | region. It is a figure for demonstrating the process which specifies a 1st restriction | limiting area | region. It is a figure for demonstrating the process which specifies a 1st restriction | limiting area | region. It is a figure for demonstrating the process which specifies a 1st restriction | limiting area | region. It is a figure for demonstrating the process which specifies a 2nd restriction | limiting area | region. It is a figure for demonstrating the process which specifies a 2nd restriction | limiting area | region. It is a figure for demonstrating the process which specifies a 2nd restriction | limiting area | region. It is a figure for demonstrating the process which specifies a 2nd restriction | limiting area | region. It is a figure which shows a correction inspection area | region image. It is a figure which shows a candidate area | region image. It is a figure which shows the real pattern image in the process of a comparative example. It is a figure which shows the actual pattern image of the first board | substrate. It is a figure which shows the real pattern image of another board | substrate.

  FIG. 1 is a diagram showing a configuration of a pattern inspection apparatus 1 according to an embodiment of the present invention. The pattern inspection apparatus 1 is an apparatus that inspects the appearance of a printed circuit board (also referred to as a printed wiring board) before electronic components are mounted, for example.

  Here, the printed circuit board has a wiring pattern formed of a conductive material such as copper on the surface of a resin substrate 9 (hereinafter simply referred to as “substrate 9”). In the manufacture of a printed circuit board, a conductive material film (conductive film) is provided on the surface of the substrate 9. A resist film, which is a photosensitive material, is formed on the conductive film, and a pattern image based on the design data is directly drawn on the resist film by a drawing apparatus (direct drawing apparatus). The substrate 9 on which the pattern is drawn is subjected to development processing, etching processing, resist stripping processing, and the like. Thereby, a wiring pattern is formed on the substrate 9. The etching process for the substrate 9 is, for example, wet etching performed by applying an etching solution to the substrate 9. As the etching process for the substrate 9, for example, dry etching using plasma or the like may be performed. Further, a pattern may be formed (exposed) on the resist film using a photomask showing a design pattern.

  The pattern inspection apparatus 1 includes an apparatus main body 2 that captures an image of the substrate 9 and a computer 3 that controls the overall operation of the pattern inspection apparatus 1 and that implements a calculation unit and the like described later. The apparatus main body 2 captures the substrate 9 and acquires a captured image (data) of multi-gradation, a stage 22 that holds the substrate 9, and the stage 22 relative to the imaging device 21. It has a stage drive unit 23 that moves. The imaging device 21 electrically outputs an illumination unit 211 that emits illumination light, an optical system 212 that guides illumination light to the substrate 9 and is incident with light from the substrate 9, and an image of the substrate 9 formed by the optical system 212. An imaging unit 213 that converts the signal into a signal is included. The stage drive unit 23 includes a ball screw, a guide rail, a motor, and the like. A predetermined area on the substrate 9 is imaged by the computer 3 controlling the stage drive unit 23 and the imaging device 21.

  FIG. 2 is a diagram illustrating the configuration of the computer 3. The computer 3 has a general computer system configuration including a CPU 31 that performs various arithmetic processes, a ROM 32 that stores basic programs, and a RAM 33 that stores various information. The computer 3 is readable by a computer such as a fixed disk 34 for storing information, a display 35 for displaying various information such as images, a keyboard 36a and a mouse 36b for receiving input from an operator, an optical disk, a magnetic disk, a magneto-optical disk, etc. Further, a reading device 37 that reads information from the recording medium 8 and a communication unit 38 that transmits and receives signals to and from other components of the pattern inspection device 1 are further included.

  In the computer 3, the program 80 is read in advance from the recording medium 8 via the reading device 37 and stored in the fixed disk 34. The CPU 31 executes arithmetic processing while using the RAM 33 and the fixed disk 34 according to the program 80.

  FIG. 3 is a block diagram showing a functional configuration of the pattern inspection apparatus 1. In FIG. 3, the functional configuration realized by the CPU 31, the ROM 32, the RAM 33, the fixed disk 34, etc. of the computer 3 is indicated by a broken-line rectangle denoted by reference numeral 3. Surrounded by. The computer 3 includes a calculation unit 41 and a storage unit 49. The calculation unit 41 includes a region of interest acquisition unit 411, a limited region specification unit 412, and a defect detection unit 413. The storage unit 49 stores design data 48 such as CAM data (or CAD data). Details of functions realized by these configurations will be described later. In addition, these functions may be constructed by a dedicated electric circuit, or a dedicated electric circuit may be partially used.

  FIG. 4 is a diagram showing a flow of processing in which the pattern inspection apparatus 1 inspects the substrate 9. Here, it is assumed that a plurality of substrates 9 manufactured as one lot (hereinafter referred to as “target lot”) are inspection targets. The plurality of substrates 9 included in the target lot are used for manufacturing the same product, and the same wiring pattern is formed under the same conditions.

  In the pattern inspection apparatus 1, first, design data 48 used when forming a wiring pattern on the surface of the substrate 9 (hereinafter, an actual wiring pattern on the substrate 9 is referred to as “real pattern”) is stored in the storage unit 49. It is input and prepared (step S11). The design data 48 in the present embodiment is vector data indicating a design pattern. The design data 48 may be raster data. Actual patterns on the plurality of substrates 9 included in the target lot are formed by etching processing based on the design data 48.

  In the attention area acquisition unit 411, a binary image showing the design pattern 6 is generated as shown in FIG. 5 (in FIG. 5, only a part of the design pattern 6 is shown, and so on). In the image showing the design pattern 6, a plurality of pixels are arranged in the row direction and the column direction. In the following description, the value of each pixel included in the pattern area 61 (hereinafter referred to as “design pattern area 61”) is 1. It is assumed that the value of each pixel included in the background area 62 is 0 (the same applies hereinafter). Subsequently, each pixel not included in the design pattern area 61 in the design pattern 6, that is, each pixel included in the background area 62 is set as a target pixel, and each of eight directions set at intervals of 45 degrees is determined from the target pixel. The distance to the edge of the design pattern area 61 (hereinafter referred to as “background measurement distance”) is measured. In FIG. 5, the background measurement distances in eight directions when the pixel 82 is the target pixel are indicated by arrows 81 (one arrow is denoted by reference numeral 81 a).

  In the target pixel, when only the background measurement distance in one direction is greater than or equal to the predetermined determination distance and the background measurement distances in the other seven directions are less than the determination distance, the target pixel is specified as a concave pixel. In the pixel 82 in FIG. 5, since only the background measurement distance indicated by the arrow 81a is greater than or equal to the determination distance, the pixel 82 is a recessed pixel. In practice, a set of concave pixels adjacent to each other is acquired as a concave region. The recess area indicates a recess 63 of the design pattern area 61 (hereinafter referred to as “pattern recess 63”). The upper limit of the background measurement distance is determined in advance, and the arrow 81a in FIG. 5 is the upper limit background measurement distance.

  FIGS. 6A to 6C are diagrams for explaining processing for obtaining a first attention area described later from the recessed area. For example, when the recessed area 83 with parallel diagonal lines in FIG. 6A is acquired, the recessed area 83 is subjected to a predetermined number of expansion processes, and the expanded recessed area 84 is acquired as shown in FIG. 6B. The Then, as shown in FIG. 6C, the portion of the expanded recessed portion 84 that is not included in the design pattern region 61 of the design pattern 6, that is, the portion of the expanded recessed portion 84 that is included in the background region 62 is the first. It is acquired as the attention area 85 (step S12). In FIG. 6C, the 1st attention area | region 85 is shown as the continuous line, and the other area | region is shown with the broken line. The first attention area 85 is a part of the background area 62 in the pattern recess 63 of the design pattern 6 and is an area where under-etching is likely to occur during the etching process. Actually, the number of times of expansion processing for the recessed region 83 is determined so that the region where the under etching occurs in the actual pattern is almost certainly present in the first attention region 85 (the second attention region described later). Same for acquisition).

  In the attention area acquisition unit 411, in the image of the design pattern 6 shown in FIG. 7, each pixel included in the design pattern area 61 is set as the target pixel, and the target pixel is set for each of the eight directions set at intervals of 45 degrees. To the edge of the design pattern area 61 (hereinafter referred to as “pattern measurement distance”). In FIG. 7, the pattern measurement distances in eight directions when the pixels 72 and 72A are the target pixels are indicated by arrows 71 (three arrows are denoted by reference numerals 71a, 71b, and 71c).

  In the target pixel, when only the pattern measurement distance in one direction is greater than or equal to the predetermined determination distance, and the pattern measurement distance in the other seven directions is less than the determination distance, the target pixel is specified as a convex pixel. The In the pixel 72 in FIG. 7, since only the pattern measurement distance indicated by the arrow 71a is equal to or greater than the determination distance, the pixel 72 is a convex pixel (in FIG. 7, a convex pixel indicating the tip of the pad). Further, in the pixel 72A, since the two pattern measurement distances indicated by the arrows 71b and 71c are equal to or greater than the determination distance, the pixel 72A is not a convex pixel. Actually, a set of convex pixels adjacent to each other is acquired as a convex region. The convex portion area indicates a convex portion 64 of the design pattern region 61 (hereinafter referred to as “pattern convex portion 64”). The upper limit of the pattern measurement distance is determined in advance, and arrows 71a and 71b in FIG. 7 are the upper limit pattern measurement distance.

  FIG. 8A to FIG. 8C are diagrams for explaining processing for acquiring a second attention area described later from the convex area. For example, when the convex region 73 with parallel diagonal lines in FIG. 8A is acquired, the convex region 73 is subjected to a predetermined number of expansion processes, and as shown in FIG. 8B, the expanded convex region 74 is obtained. Is acquired. Then, as shown in FIG. 8C, a portion of the expanded convex region 74 that is not included in the background region 62 of the design pattern 6, that is, a portion of the expanded convex region 74 that is included in the design pattern region 61 is Obtained as the second region of interest 75 (step S13). In FIG. 8C, the 2nd attention area | region 75 is shown as the continuous line, and the other area | region is shown with the broken line. The second region of interest 75 is a part of the design pattern region 61 in the pattern convex portion 64 of the design pattern 6 and is a region where over-etching is likely to occur during the etching process.

  In the apparatus main body 2, the first substrate 9 among the plurality of substrates 9 included in the target lot is placed on the stage 22 (see FIG. 1), and a predetermined area on the substrate 9 is imaged by the stage driving unit 23. 213 is arranged in the imaging region. Then, a captured image showing an actual pattern (hereinafter referred to as “real pattern image”) is acquired by the imaging unit 213 and output to the calculation unit 41 (step S14). In the actual pattern image, similarly to the image of the design pattern 6, a plurality of pixels are arranged in the row direction and the column direction.

  In the restricted area specifying unit 412, the actual pattern image is binarized with a predetermined threshold, and as shown by a solid line in FIG. 9A, a binary image 50 indicating the actual pattern (hereinafter “actual pattern binary image 50”). Is generated.). FIG. 9A is an image showing the same part as the design pattern 6 shown in FIGS. 6A to 6C. In FIG. 9A, the design pattern 6 is also indicated by a broken line (the same applies to FIG. 10A described later and FIGS. 13 to 15).

  Subsequently, of the pattern area 51 in the actual pattern binary image 50 (hereinafter referred to as “actual pattern area 51”), there is an area that does not overlap with the design pattern area 61 of the design pattern 6 (that is, only the actual pattern area 51 exists). Area) is extracted as the first extraction area 55 as shown in FIG. 9B. The first extraction area 55 can be easily extracted as an area having the value of one sign in the signed differential image of the binary image showing the design pattern 6 and the real pattern binary image 50 (second 2 described later). The same applies to the extraction area 57). In the first extraction region 55 where only the actual pattern region 51 exists, most of the first extraction region 55 indicates an actual pattern region in which under-etching has actually occurred in the first substrate 9 of the target lot.

  Subsequently, the first region of interest 85 of FIG. 6C is overlaid on the image showing the first extraction region 55 of FIG. 9B as shown in FIG. 9C. In FIG. 9C, the first attention area 85 is shaded in parallel. Then, an image indicating pixels included in the first extraction region 55 and included in the first attention region 85, that is, a logical product (AND) of pixels corresponding to each other in the image of FIG. 9B and the image of FIG. 6C. An image is acquired as shown in FIG. 9D. The area 56 specified in the image of FIG. 9D is hereinafter referred to as “first restricted area 56”. In this way, the first restricted area 56 that is an area where the first extraction area 55 and the first attention area 85 overlap is specified (step S15).

  The first restricted region 56 is a region in which the first region of interest 85 in which under-etching is likely to occur in the etching process is restricted by a first extraction region 55 that indicates a region where under-etching actually occurs in the actual pattern. In the first restricted region 56, the actual etching conditions such as the concentration and temperature of the etching solution and the influence on the under-etching due to the position on the substrate 9 (density of the pattern region) (distribution of the state of the under-etching) are reflected. Can be seen as being.

  Further, in the limited area specifying unit 412, in the design pattern area 61 of the design pattern 6 indicated by the broken line in the actual pattern binary image 50 shown in FIG. 10A, an area that does not overlap with the actual pattern area 51 (that is, the design pattern area 61 10B is extracted as the second extraction region 57 as shown in FIG. 10B. FIG. 10A is an image showing the same part as the design pattern 6 shown in FIGS. 8A to 8C. In the second extraction region 57 where only the design pattern region 61 exists, most of the second extraction region 57 indicates a region where overetching actually occurs in the first substrate 9 of the target lot.

  Here, when the first extraction region 55 (see FIG. 9B) and the second extraction region 57 described above are collectively referred to as “extraction region”, the second extraction region 57 is not included in the actual pattern region 51 among the extraction regions. Part. The first extraction area 55 is a part included in the actual pattern area 51 in the extraction area. The extraction area is a difference between the actual pattern binary image 50 and the design pattern 6 binary image. For example, an exclusive OR (or an absolute value of a difference) of values at each position in both images is obtained. Can be specified. Actually, the first extraction area 55 and the second extraction area 57 also include an area that is generated due to a positional deviation between the design pattern area 61 and the actual pattern area 51.

  Subsequently, the second region of interest 75 of FIG. 8C is overlaid on the image showing the second extraction region 57 of FIG. 10B as shown in FIG. 10C. In FIG. 10C, the second attention area 75 is shaded in parallel. An image indicating pixels included in the second extraction region 57 and included in the second attention region 75, that is, a logical product (AND) of pixels corresponding to each other in the image of FIG. 10B and the image of FIG. 8C. An image is acquired as shown in FIG. 10D. The region 58 specified in the image of FIG. 10D is hereinafter referred to as “second restricted region 58”. In this way, the second restricted area 58 that is an area where the second extraction area 57 and the second attention area 75 overlap is specified (step S16).

  The second restricted region 58 is a region in which the second region of interest 75 where overetching is likely to occur in the etching process is restricted by the second extraction region 57 that indicates a region where overetching actually occurs in the actual pattern. In the second restricted region 58, it can be considered that the actual etching conditions and the influence on the overetching by the position on the substrate 9 (distribution of the overetching state) are reflected.

  In the present embodiment, an inspection area image is used in defect detection described later by the defect detection unit 413. The inspection area image is an image showing an inspection target area on the substrate 9. The resolution in the row direction and the column direction of the inspection area image is the same as the resolution in the row direction and the column direction of the actual pattern image. That is, the size of the region on the substrate 9 indicated by one pixel of the inspection region image is the same as the size of the region on the substrate 9 indicated by one pixel of the actual pattern image. By specifying the first restricted area 56 and the second restricted area 58 (hereinafter collectively referred to as “restricted area”) in steps S15 and S16, pixels included in the restricted area in the examination area image are identified from the examination target area. The corrected inspection area image is acquired (step S17). In the corrected inspection area image, the restricted area is included in the non-inspection area. In FIG. 11, a corrected inspection area image 91 is shown, and areas included in the non-inspection area 92 in the process of step S17 are indicated by parallel diagonal lines.

  Subsequently, an actual pattern image of the substrate 9 to be inspected is acquired (step S18). Here, since the first substrate 9 of the target lot is also an inspection target, the processing in step S18 is omitted, and the actual pattern image acquired in step S14 is used.

  In the defect detection unit 413, an image obtained by binarizing the actual pattern image with a predetermined threshold (here, the aforementioned actual pattern binary image 50), a binary image indicating the design pattern 6, and An image showing the difference is acquired as a candidate area image 53 as shown in FIG. The candidate area image 53 is a binary image that indicates an exclusive OR of the values of the pixels corresponding to each other in both the images that have been aligned, and the pixels specified in the candidate area image 53 are defect candidate pixels. A set of defect candidate pixels adjacent to each other becomes a defect candidate region 54. That is, the candidate area image 53 shows each defect candidate area 54 as a set of defect candidate pixels.

  Subsequently, defect detection processing using a window W having a predetermined size is performed in the candidate area image 53. Specifically, the window W is set on the candidate area image 53. In the window W, a plurality of elements having the same size as the pixels in the candidate area image 53 (indicated by thin solid rectangles in FIG. 12) are arranged in the row direction and the column direction. Then, with each pixel of the candidate area image 53 corresponding to the inspection target area of the corrected inspection area image 91 as the target pixel, the central element (may be another element) of the window W overlaps the target pixel. In the state where the window W is arranged, the number of defect candidate pixels included in the window W is counted. Note that the pixels of the candidate area image 53 corresponding to the non-inspection area 92 of the corrected inspection area image 91 are excluded from the target pixels. In FIG. 12, the non-inspection region 92 (corresponding region) is shaded in parallel.

  Here, it is considered that the defect candidate pixels included in the above-described restricted region indicate pseudo defects caused by under-etching or over-etching in the etching process. Therefore, in counting the number of defect candidate pixels included in the window W, the correction inspection area image 91 in FIG. 11 is referred to, and the defect candidate pixels included in the non-inspection area 92 are not counted (ignored). That is, the number of defect candidate pixels included in the window W and not included in the non-inspection area 92 is counted and obtained as a defect evaluation value for the target pixel. Then, when the defect evaluation value is greater than or equal to a predetermined threshold, the target pixel is specified as a defective pixel. A set of defective pixels adjacent to each other serves as a defect region indicating a defect. As described above, the defect detection unit 413 detects a defect in the restricted area by counting the number of defect candidate pixels not included in the restricted area in the window W while moving the window W in the candidate area image 53. The defect area is detected with the sensitivity substantially lower than the other areas (step S19).

  When the inspection for the first substrate 9 is completed, the second substrate 9 included in the target lot is imaged by the imaging unit 213, and an actual pattern image is acquired (steps S20 and S18). Then, in the same manner as described above, acquisition of the candidate area image 53 from the actual pattern image and defect detection processing using the window W in the candidate area image 53 are performed (step S19). As described above, since the plurality of substrates 9 included in the target lot are manufactured under the same conditions, even in the second substrate 9, an area in which under-etching and over-etching actually occur (a pseudo defect) Region) is close to the first substrate 9. Therefore, the above-described defect detection process ignoring the defect candidate pixels included in the non-inspection area 92 (decreasing the detection sensitivity for the restriction area) suppresses false information in which the pseudo defect area is detected as the defect area. When the processes in steps S18 and S19 are performed on all the substrates 9 included in the target lot, the process in the pattern inspection apparatus 1 is completed (step S20).

  Here, a process of a comparative example in which the first attention area 85 and the second attention area 75 (hereinafter collectively referred to as “attention area”) in the corrected inspection area image will be described. In the process of the comparative example, for example, an attention area (second attention area) 75 indicated by parallel oblique lines is set for the design pattern 6 indicated by a broken line in FIG. 75 is included in the non-inspection area. Actually, other attention areas are also set, but are not shown in FIG. In the defect detection processing for the real pattern image 5 indicated by the solid line in FIG. 13, the defect candidate pixels in the attention area 75 are ignored, so that the defect area included in the attention area 75 together with the pseudo defect area D0 indicating the pseudo defect. D1 is not detected either. Thus, in the process of the comparative example, it is difficult to detect the defect area D1 around the pseudo defect area D0.

  On the other hand, in the pattern inspection apparatus 1, a region where the extraction region acquired by comparing the actual pattern image of the first substrate 9 with the design pattern 6 overlaps the attention region is specified as the restriction region. Therefore, in the example of the actual pattern image 5 of the first substrate 9 shown in FIG. 14, a restricted area 58 (shown with parallel diagonal lines) obtained by narrowing the attention area 75 (see FIG. 13) is acquired. In the detection of the defect area of the other substrate 9, in the actual pattern image of the other substrate 9, a detection sensitivity different from that of the other area is set for the limited area. In the example of the actual pattern image 5 of the other substrate 9 shown in FIG. 15, the pseudo defect area D0 included in the restricted area 58 is not detected in the defect detection process, but the defect area D1 that does not overlap the restricted area 58 can be detected. . In this way, by using the limited region in which the region of interest is narrowed based on the actual pattern of one substrate 9 for detection of the defect region with respect to the other substrate 9, defects around the pseudo defect are reduced while reducing the false alarm. Accurate detection is realized. In addition, the detection sensitivity in a region other than the restricted region can be increased, and defects can be detected with higher accuracy.

  In the acquisition of the first restricted region 56, a part of the background region 62 in the pattern recess 63 of the design pattern 6 is set as the first attention region 85 in which under-etching is likely to occur in the etching process. Further, a portion included in the actual pattern area 51 in the extraction area is extracted as the first extraction area 55. Then, an area where the first attention area 85 and the first extraction area 55 overlap is specified as the first restricted area 56. Thereby, the 1st restriction area 56 concerning under etching can be acquired with sufficient accuracy.

  In the acquisition of the second restricted region 58, a part of the design pattern region 61 in the pattern convex portion 64 of the design pattern 6 is set as the second attention region 75 in which over-etching is likely to occur in the etching process. Further, a portion of the extraction area that is not included in the actual pattern area 51 is extracted as the second extraction area 57. Then, an area where the second attention area 75 and the second extraction area 57 overlap is specified as the second restricted area 58. Thereby, the second restricted area 58 related to over-etching can be obtained with high accuracy.

  In the pattern inspection apparatus 1, an attention area (first attention area 85 and second attention area 75) is acquired based on the design pattern 6 by the attention area acquisition unit 411, and a restriction area (first restriction area) is obtained by the restriction area specifying unit 412. 56 and the second restricted area 58). Thereby, workability | operativity can be improved compared with the case where an attention area or a restriction | limiting area | region is acquired according to an operator's input.

  The pattern inspection apparatus 1 can be variously modified.

  The attention area based on the design pattern 6 may be acquired by other methods. For example, the attention area may be specified by commercially available etching simulation software, or may be specified by the operator via the mouse 36b or the like. The region of interest may be a rough region that almost certainly includes a region where under-etching or over-etching occurs in the actual pattern.

  In the above-described embodiment, the real pattern binary image 50 is generated when the actual pattern image and the design pattern 6 are compared to acquire the extraction region. However, the multi-tone real pattern image is directly used as the design pattern 6. May be compared. For example, a difference image between an image of the design pattern 6 in which the design pattern region 61 and the background region 62 are given the average value of the pattern region and the average value of the background region in the actual pattern image, respectively, and the actual pattern image. May be obtained, and the extraction region may be acquired by binarizing the difference image with a predetermined threshold (the same applies to the acquisition of the candidate region image 53).

  In the defect detection process, the restricted area does not necessarily need to be included in the non-inspection area. For example, the pixel included in the restricted area is multiplied by a weight (coefficient) that is greater than 0 and less than 1. The number of defect candidate pixels included in the window W may be counted. On the other hand, in the above processing example in which the restricted area is included in the non-inspection area, the weight is regarded as 0. As described above, in the defect detection process, the defect candidate pixel included in the restricted area is given a lower weight than the other defect candidate pixels, so that the restricted area has a lower detection sensitivity than the other areas. It is possible to easily detect the defective area while setting.

  In the above embodiment, the defective pixels included in the defect area are specified based on the number of defect candidate pixels included in the window W while moving the window W in the candidate area image 53. May be detected without using. For example, each defect candidate area 54 is extracted from the candidate area image 53 by labeling processing, and the defect candidate area 54 is compared with an evaluation value using the width, height, and the like of the defect candidate area 54. Is determined to be a defective area. At this time, when the defect candidate area 54 overlaps the restricted area, the determination threshold is set lower than the other areas. That is, a lower detection sensitivity is set for the restricted area than for other areas. Also, different detection sensitivities may be set in the first restricted area 56 and the second restricted area 58.

  Depending on the use of the substrate 9, only one of the first restricted area 56 and the second restricted area 58 may be specified. That is, the limited region may be a region where the region of interest set based on the design pattern 6 and the extraction region overlap as a region where under-etching or over-etching is likely to occur in the etching process.

  The state of under-etching and over-etching largely depends on the etching conditions such as the concentration of the etchant and the temperature, and therefore the state of under-etching and over-etching may differ depending on the lot. Therefore, in the above method, the limited region is specified using the first substrate 9 among the plurality of substrates 9 manufactured in the same lot, and the defective region of the other substrate 9 of the lot is used by using the limited region. It can be said that it is particularly suitable for detecting. When the etching conditions are kept constant, the restricted area acquired for the target lot may be used for the inspection of the substrate 9 of another lot.

  The substrate to be inspected in the pattern inspection apparatus 1 may be a semiconductor substrate, a glass substrate, or the like. The pattern inspection apparatus 1 can inspect patterns formed on various substrates by etching.

  The configurations in the above-described embodiments and modifications may be combined as appropriate as long as they do not contradict each other.

DESCRIPTION OF SYMBOLS 1 Pattern inspection apparatus 5 Real pattern image 6 Design pattern 9 Board | substrate 48 Design data 49 Memory | storage part 51 Real pattern area 53 Candidate area image 54 Defect candidate area 55 1st extraction area 56 1st restriction area 57 2nd extraction area 58 2nd restriction | limiting Area 61 Design pattern area 62 Background area 63 Pattern concave portion 64 Pattern convex portion 75 Second attention area 85 First attention area 213 Imaging section 411 Attention area acquisition section 412 Restriction area specifying section 413 Defect detection section D1 Defect area S11 to S20 Step W window

Claims (9)

A pattern inspection apparatus for inspecting a pattern formed by etching on a substrate,
A storage unit for storing design data indicating a design pattern;
An imaging unit that acquires an actual pattern image indicating the actual pattern by imaging a substrate on which an actual pattern based on the design data is formed by etching processing;
A region where an extraction region obtained by comparing the actual pattern image and the design pattern overlaps with a region of interest set based on the design pattern as a region where under-etching or over-etching is likely to occur in the etching process A restriction area specifying unit for specifying as a restriction area,
In a real pattern image of another substrate on which a real pattern based on the design data is formed, a defect detection unit that detects a defect region while setting a detection sensitivity different from that of the other region with respect to the limited region;
A pattern inspection apparatus comprising: The pattern inspection apparatus according to claim 1,
A part of the background area in the pattern concave part of the design pattern is set as a first attention area where under-etching is likely to occur in the etching process, and a part of the pattern area in the pattern convex part of the design pattern is over in the etching process. A pattern inspection apparatus characterized in that it is set as a second region of interest where etching is likely to occur. The pattern inspection apparatus according to claim 2,
The pattern inspection apparatus further comprising an attention area acquisition unit that acquires the first attention area and the second attention area based on the design pattern. The pattern inspection apparatus according to claim 2 or 3,
The restricted area specifying unit specifies, as the first restricted area, an area where the first extracted area that is a part included in the pattern area of the actual pattern image in the extracted area and the first attention area overlap, A pattern inspection apparatus that identifies, as a second restricted region, a region where a second extraction region that is not included in the pattern region of the actual pattern image in the extraction region and the second attention region overlap. . The pattern inspection apparatus according to any one of claims 1 to 4,
The defect detection unit obtains a binary candidate area image indicating each defect candidate area as a set of defect candidate pixels by comparing the actual pattern image of the other substrate and the design pattern, and the candidate Performing a defect detection process for identifying a defective pixel included in the defective area based on the number of defect candidate pixels included in the window while moving a window of a predetermined size in the area image;
In the defect detection process, a pattern inspection apparatus characterized in that a weight lower than other defect candidate pixels is given to a defect candidate pixel included in the restricted region. A pattern inspection method for inspecting a pattern formed by etching on a substrate,
a) preparing design data indicating a design pattern;
b) acquiring a real pattern image indicating the real pattern by imaging a substrate on which a real pattern based on the design data is formed by an etching process;
c) An extraction region obtained by comparing the actual pattern image and the design pattern, and a region of interest set based on the design pattern as a region where under-etching or over-etching is likely to occur in the etching process. Identifying the overlapping area as a restricted area;
d) obtaining an actual pattern image of another substrate on which an actual pattern based on the design data is formed;
e) detecting a defect area in the actual pattern image of the other substrate while setting a detection sensitivity different from that of the other area with respect to the limited area;
A pattern inspection method comprising: The pattern inspection method according to claim 6,
A part of the background area in the pattern concave part of the design pattern is set as a first attention area where under-etching is likely to occur in the etching process, and a part of the pattern area in the pattern convex part of the design pattern is over in the etching process. A pattern inspection method, wherein the pattern inspection method is set as a second region of interest where etching is likely to occur. The pattern inspection method according to claim 7,
In the step c), a region where a first extraction region, which is a portion included in the pattern region of the actual pattern image, and the first attention region in the extraction region is specified as a first restriction region, and the extraction is performed. A pattern inspection method characterized in that a region where a second extraction region that is a portion not included in the pattern region of the actual pattern image and the second region of interest overlaps is specified as a second restricted region. . The pattern inspection method according to any one of claims 6 to 8,
In the step e), by comparing the actual pattern image of the other substrate and the design pattern, a binary candidate region image indicating each defect candidate region as a set of defect candidate pixels is obtained, and the candidate A defect detection process for identifying a defective pixel included in the defective region based on the number of defective candidate pixels included in the window while moving a window of a predetermined size in the region image is performed,
In the defect detection process, a pattern inspection method characterized by assigning a lower weight to defect candidate pixels included in the restricted area than other defect candidate pixels.

Images