TWI692636B - Induction chip for measuring electrostatic capacitance and measuring instrument with the same - Google Patents

Abstract

It can measure electrostatic capacitance with high directivity in a specific direction.

The induction wafer for measuring capacitance according to an embodiment has a first electrode, a second electrode, and a third electrode. The first electrode system has a first part. The second electrode has a second part extending over the first part of the first electrode, and is insulated from the first electrode in the induction wafer. The third electrode has a front surface extending in the direction where the first part of the first electrode and the second part of the second electrode intersect, and is provided on the first part and the second part, and One electrode and the second electrode are insulated.

Description

Induction chip for measuring electrostatic capacitance and measuring instrument with the same

The embodiment of the present invention relates to an induction chip for measuring electrostatic capacitance and a measuring instrument provided with the induction chip.

In the manufacture of electronic components called so-called semiconductor components, a processing device for processing the object to be processed is used. The processing device generally has a processing container and a mounting table. The body to be processed is carried into the processing container by the conveying device and placed on the mounting table. Then, the object to be processed is processed in the processing container.

The position of the object to be processed on the mounting table is a very important element in order to satisfy various requirements of the so-called uniformity of the processing surface of the object to be processed. Therefore, the transport device needs to transport the object to be treated to a predetermined position on the mounting table.

When the conveyance position of the object to be processed deviates from the predetermined position due to the conveyance device, it is necessary to correct the coordinate information specifying the conveyance position of the conveyance device.

In order to correct the coordinate information of the conveying device, it is necessary to detect the position of the object to be processed on the mounting table. In the past, electrostatic capacitance sensors were used for such position detection. The detection system of the position where an electrostatic capacitance is used is described in the following patent document 1, for example.

【Prior Technical Literature】

【Patent Literature】

Patent Document 1: Japanese Patent No. 4956328

In addition, in the processing device of a so-called plasma processing device, an electrostatic jig that attracts the object to be processed is used. In addition, a focus ring is provided on the mounting table so as to surround the edge of the object to be processed.

FIG. 1 is a cross-sectional view showing an example of the structure of an electrostatic fixture and a focusing ring. As shown in Fig. 1, the electrostatic fixture ESC has a slightly disc shape. The focus ring FR is designed to surround the electrostatic fixture ESC It extends in the circumferential direction with respect to the central axis AXE of the electrostatic jig ESC. The focus ring FR system has a first part P1 and a second part P2. The first part P1 and the second part P2 have an annular plate shape. The second part P2 is provided on the first part P1. The inner edge P2i of the second part P2 has a larger diameter than the inner edge P1i of the first part P1. The object to be processed (wafer W in FIG. 1) is placed on the electrostatic jig ESC in such a way that its edge region will be located on the first part P1 of the focus ring FR.

In the configuration using the electrostatic jig ESC and the focus ring FR as described above, when the gap distance between the edge of the object to be processed and the inner edge P2i of the second part P2 of the focus ring FR changes in the surrounding direction, plasma deviation occurs As a result, the deviation of the characteristics such as the change of the etching size in the body surface to be processed occurs. In addition, the particles may locally adhere to the object to be processed. Therefore, it is necessary to correct the coordinate information of the conveying device in a manner that the gap distance between the edge of the object to be processed and the inner edge P2i of the second part of the focus ring FR becomes slightly fixed in the peripheral direction, that is, the object to be processed The coordinate information of the transport location. Therefore, it is necessary to measure the gap distance between the edge of the object to be processed and the inner edge P2i of the second part P2 of the focus ring FR.

Therefore, the inventor of the present invention has developed a technique in which a capacitance measuring capacitance is used as a sensing chip for reflecting the above-mentioned distance as a physical quantity to be mounted on a measuring instrument of the same shape as the object to be processed, and the measuring instrument is transported by a transport device On the electrostatic fixture, the electrostatic capacitance is obtained by the measuring instrument. FIG. 2 shows a longitudinal cross-sectional structure of an example of a sensing chip for measuring electrostatic capacitance. The sensing chip 1000 shown in FIG. 2 is an example of a sensing chip that can be arranged along the edge of the measuring device of the same shape as the object to be processed, and has a substrate portion 1002 and an electrode 1004. The substrate portion 1002 has a body portion 1002m. The body portion 1002m is formed of silicon, for example. An insulating region 1002f is formed on the surface of the body portion 1002m. The insulating region 1002f is, for example, a thermal oxide film. The substrate portion 1002 has an upper surface 1002a, a lower surface 1002b, and an end surface 1002c. The end surface 1002c is formed in a trapezoidal shape, and the lower portion 1002d of the end surface 1002c will protrude from the focus ring FR side than the upper portion 1002u of the end surface 1002c. The electrode 1004 is provided along the upper portion 1002u of the end surface 1002c.

FIG. 3 shows that the electrodes of the sensing chip shown in FIG. 2 are connected to an electrostatic capacitor, and the sensing chip 1000 is moved in the direction RD (see FIG. 2) toward the inner edge P2i of the second part P2 of the focus ring FR The measured electrostatic capacitance. In addition, the distance LVD (see FIG. 2) between the upper surface P1t of the first portion P1 and the lower surface of the induction wafer 1000 during the measurement of the electrostatic capacitance is 100 μm. In FIG. 3, the horizontal axis represents the lower part 1002d of the end surface 1002c of the substrate portion 1002 and the second part P2 of the focus ring FR The distance LRD between the inner edges P2i (see FIG. 2), the vertical axis shows the electrostatic capacitance. In addition, FIG. 3 shows the calculation value of the electrostatic capacitance assuming that there is an electrostatic capacitance only in the direction RD and the actual measurement value of the electrostatic capacitance measured using the sensing chip 1000.

When comparing the calculated value shown in FIG. 3 with reference to the measured value, when the distance LRD is about 2.5 mm, a phenomenon occurs that the electrostatic capacitance (measured value) obtained by the measurement using the sensor chip 100 suddenly increases. This 2.5 mm distance LRD is the same distance L12 (see FIG. 2) between the inner edge P2i of the second part P2 and the inner edge P1i of the first part P1. Therefore, this phenomenon represents not only the electrostatic capacitance in a specific direction (direction RD in FIG. 2) existing on the inner edge of the focus ring FR (the inner edge P2i of the second part P2) relative to the electrode 1004 of the sensing chip 1000, The electrostatic capacitance below (direction VD in FIG. 2) will also affect the measurement of the sensing chip 1000. However, in the measurement of the distance LRD between the inner edge of the focus ring FR and the sensing wafer 1000, the electrostatic capacitance below the sensing wafer 1000 is unnecessary.

Therefore, it is necessary to have high directivity in a specific direction to measure electrostatic capacitance.

In one aspect, a sensor chip for measuring electrostatic capacitance is provided. This induction wafer has a first electrode, a second electrode, and a third electrode. The first electrode system has a first part. The second electrode has a second part extending over the first part of the first electrode, and is insulated from the first electrode in the induction wafer. The third electrode has a front surface extending in the direction where the first part of the first electrode and the second part of the second electrode intersect, and is provided on the first part and the second part, and One electrode and the second electrode are insulated.

In one aspect, the sensing chip is to provide the third electrode of the sensing electrode on the first part of the first electrode, and the second part of the second electrode is interposed between the first part of the first electrode and the third electrode section. When using this sensor chip, the potential of the first electrode is set to the ground potential, and a high-frequency signal is supplied to the second electrode and the third electrode. At this time, the voltage amplitude of the third electrode is not affected by the direction in which the first electrode is provided with respect to the third electrode, that is, the electrostatic capacitance under the sensing chip, and becomes reflected in a specific direction, that is, the third electrode 3 The voltage amplitude of the electrostatic capacitance in the direction that the front face of the electrode faces. Therefore, by using the sensing chip, the electrostatic capacitance can be measured with high directivity in a specific direction.

In one embodiment, the first electrode and the second electrode may be in a region before the third electrode The side is open and extends to surround the third electrode. According to this embodiment, the third electrode can be shielded by the first electrode and the second electrode in directions other than the specific direction. Therefore, the directivity with respect to the specific direction in the measurement of the electrostatic capacitance can be further improved.

In one embodiment, the sensing wafer is further provided with an end surface, the end surface is a curved surface having a predetermined curvature, and the front surface of the third electrode may also extend along the end surface. According to this embodiment, the radial distance between each position on the front surface of the third electrode and the inner edge of the focus ring can be set to be slightly equidistant. Therefore, the measurement accuracy of the electrostatic capacitance can be further improved.

In one embodiment, the induction wafer is further provided with a substrate portion. The substrate portion has a surface including a front surface and a bottom surface, and the surface has insulation properties. The third electrode extends along the front surface of the substrate portion, and the second portion of the second electrode extends along the lower surface of the substrate portion. In one embodiment, the substrate portion is formed of an insulating material. By forming the substrate portion from an insulating material, the internal electrostatic capacitance of the sensing chip can be reduced. Furthermore, in one embodiment, the insulating material may be borosilicate glass, silicon nitride, quartz, or aluminum oxide.

In another aspect, a measuring device for measuring electrostatic capacitance is provided. The measuring instrument is provided with a base substrate, a plurality of sensing chips and a circuit substrate. The plurality of sensing chips are any of the above sensing chips, and are arranged along the edge of the base substrate. The circuit board is mounted on the base substrate. The circuit board includes a ground potential line, a high-frequency oscillator, a C/V conversion circuit, and an A/D converter. The ground potential line can be electrically connected to the first electrode. The high-frequency oscillator is configured to generate a high-frequency signal, and is electrically connected to the second electrode and the third electrode. The C/V conversion circuit is configured to convert the voltage amplitude in the third electrode of each complex sensing chip into a voltage signal representing electrostatic capacitance. The A/D converter converts the voltage signal output by the C/V conversion circuit into a digital value. According to the measuring instrument of this aspect, the digital value representing the electrostatic capacitance can be obtained from the voltage amplitude in the third electrode of the sensing chip.

In one embodiment, the circuit board further includes a memory device and a communication device. The memory device is configured to memorize the digital value. The communication device is configured to wirelessly transmit the digital values memorized by the memory device. According to this embodiment, the digital values memorized by the memory device can be transmitted wirelessly.

In one embodiment, the circuit board may further include a switch for selectively connecting the first electrode to the ground potential line. When the first electrode is selectively connected to the earth potential line, measure The device can measure the electrostatic capacitance in the above specific direction. On the other hand, when the first electrode is cut from the ground potential line, the measuring instrument can measure the total capacitance of the electrostatic capacitance in the above-mentioned specific direction and the electrostatic capacitance below.

In one embodiment, the base substrate has a disk shape, and a plurality of sensing wafers can also be arranged along the edge of the base substrate. In this embodiment, each complex sensor wafer has an end surface, the end surface is a curved surface with a predetermined curvature, and the front surface of the third electrode extends along the end surface. In this embodiment, the measuring device has a shape that is slightly the same as the shape of the disc-shaped object to be processed. Also, the measuring instrument can measure the electrostatic capacitance in a specific direction reflecting the distance between the focus ring and the edge of the measuring instrument with high accuracy.

As described above, the electrostatic capacitance can be measured with high directivity in a specific direction.

1‧‧‧ processing system

LM‧‧‧Loading module

AN‧‧‧Aligner

LL1, LL2‧‧‧‧Loading chamber

TC‧‧‧Transition chamber

TU1, TU2‧‧‧Conveying device

PM1~PM6‧‧‧Program module

MC‧‧‧Control Department

10‧‧‧Plasma processing device

12‧‧‧Handling container

30‧‧‧Upper electrode

40‧‧‧Gas source group

50‧‧‧Exhaust

62‧‧‧The first high frequency power supply

64‧‧‧The second high frequency power supply

PD‧‧‧Placing table

LE‧‧‧Lower electrode

ESC‧‧‧Static fixture

FR‧‧‧focus ring

P1‧‧‧Part 1

P2‧‧‧Part 2

100‧‧‧Measurer

102‧‧‧ Base substrate

104‧‧‧Induction chip

104A~104H‧‧‧Induction chip

104f‧‧‧Front end face

141‧‧‧First electrode

141a‧‧‧Part 1

142‧‧‧ 2nd electrode

142a‧‧‧Part 2

143‧‧‧The third electrode

143f‧‧‧front

106‧‧‧ circuit board

108, 108A~108H‧‧‧Wiring group

161‧‧‧High frequency oscillator

162‧‧‧C/V conversion circuit

162A~162H‧‧‧C/V conversion circuit

163‧‧‧A/D converter

164‧‧‧ processor

165‧‧‧memory device

167‧‧‧Power

GL‧‧‧Earth potential wire

SWG‧‧‧Switch

FIG. 1 is a cross-sectional view showing an example of an electrostatic fixture and a focusing ring.

FIG. 2 is a diagram showing an example of a sensor chip for measuring electrostatic capacitance.

Fig. 3 shows the electrostatic capacitance measured using the sensing chip of Fig. 2.

FIG. 4 is a diagram illustrating a processing system having a conveying device.

5 is a diagram showing an example of a plasma processing apparatus.

6 is a perspective view of a measuring device according to an embodiment.

7 is a perspective view of an induction chip related to an embodiment.

FIG. 8 is a cross-sectional view taken along line VIII-VIII of FIG. 7.

9 is a cross-sectional view taken along line IX-IX of FIG. 8.

FIG. 10 is a diagram showing the configuration of a circuit board in an embodiment.

FIG. 11 is an equivalent circuit diagram of the circuit board 106 and the sensing chip 104.

FIG. 12 is a flowchart showing an adjustment method of the conveying device of the processing system according to an embodiment.

FIG. 13 is a longitudinal cross-sectional view of an induction wafer related to another embodiment.

14 is a graph showing the performance evaluation results of the sensor wafer.

15 is a longitudinal cross-sectional view of an induction wafer according to another embodiment.

Hereinafter, various embodiments will be described in detail with reference to the drawings. In addition, in each drawing, the same or corresponding parts are given the same symbols.

First, the processing device for processing the object to be processed (hereinafter, referred to as "wafer W") and the processing system having the transfer device for transferring the object to the processing device will be described . FIG. 4 is a diagram illustrating a processing system having a conveying device. The processing system 1 shown in FIG. 4 is equipped with tables 2a to 2d, containers 4a to 4d, loading modules LM, positioners AN, loading chambers LL1, LL2, program modules PM1 to PM6, and transfer chamber TC .

The stages 2a~2d will be arranged along an edge of the loading module LM. The containers 4a to 4d will be mounted on the tables 2a to 2d, respectively. The containers 4a to 4d are each configured to house the wafer W.

The loading module LM has a chamber wall that defines a transfer space in an atmospheric pressure state inside. The loading module LM has a transfer device TU1 in this transfer space. The transfer device TU1 is configured to transfer wafers W between the containers 4a to 4d and the register AN, between the register AN and the loading chambers LL1 to LL2, and between the loading chambers LL1 to LL2 and the containers 4a to 4d .

The aligner AN is connected to the loading module LM. The register AN is configured to adjust the position (position correction) of the wafer W. The position adjustment of the wafer W in the aligner AN can be performed using the orientation plane or notch of the wafer W or the like.

The loading chamber LL1 and the loading chamber LL2 are provided between the loading module LM and the transfer chamber TC. Each loading chamber LL1 and loading chamber LL2 will provide a preliminary decompression chamber.

The transfer chamber TC is connected to the loading chamber LL1 and the loading chamber LL2 through a gate valve. The transfer chamber TC will provide a decompression chamber that can be decompressed, and the transfer device TU2 is stored in the decompression chamber. The transfer device TU2 is configured to transfer the wafer W between the loading chambers LL1 to LL2 and the program modules PM1 to PM6 and between any two of the program modules PM1 to PM6.

The program modules PM1~PM6 are connected to the transfer chamber TC through gate valves. Each of the program modules PM1 to PM6 is configured as a processing device that performs a special process called wafer processing on the wafer W.

A series of operations when processing the wafer W in this processing system 1 are exemplified as follows. The transfer device TU1 of the loading module LM takes out the wafer W from any one of the containers 4a to 4d and transfers the wafer W to the register AN. Then, the transfer device TU1 takes out the position-adjusted wafer W from the register AN and transfers the wafer W to one of the loading chamber LL1 and the loading chamber LL2 Loading chamber. Then, one of the loading chambers will reduce the pressure in the preliminary decompression chamber to a predetermined pressure. Next, the transfer device TU2 of the transfer chamber TC takes out the wafer W from one of the loading chambers, and transfers the wafer W to any one of the program modules PM1 to PM6. Then, more than one of the program modules PM1 to PM6 will process the wafer W. Then, the transfer device TU2 transfers the processed wafer from the program module to the load chamber of one of the load chamber LL1 and the load chamber LL2. Then, the transfer device TU1 transfers the wafer W from one of the loading chambers to any of the containers 4a to 4d.

This processing system 1 is further provided with a control unit MC. The control unit MC may be a computer equipped with a processor, a memory device called a memory, a display device, an input/output device, and a communication device. A series of operations of the above-mentioned processing system 1 will be realized by controlling each part of the processing system 1 according to the control part MC according to the program memorized by the memory device.

FIG. 5 is a diagram showing an example of a plasma processing apparatus that can use any of the program modules PM1 to PM6. The plasma processing apparatus 10 shown in FIG. 5 is a capacitive coupling type plasma etching apparatus. The plasma processing apparatus 10 is provided with a processing container 12 having a slightly cylindrical shape. The processing container 12 is made of, for example, aluminum, and its inner wall surface can be anodized. The processing container 12 is securely grounded.

A support portion 14 having a substantially cylindrical shape is provided on the bottom of the processing container 12. The support portion 14 is made of, for example, an insulating material. The support portion 14 extends from the bottom of the processing container 12 in the vertical direction in the processing container 12. Moreover, the mounting table PD is installed in the processing container 12. The mounting table PD is supported by the support portion 14.

The mounting table PD has a lower electrode LE and an electrostatic jig ESC. The lower electrode LE includes a first plate 18a and a second plate 18b. The first plate body 18a and the second plate body 18b are made of, for example, a metal called aluminum, and have a substantially disc shape. The second plate body 18b is provided on the first plate body 18a and electrically connected to the first plate body 18a.

An electrostatic jig ESC is provided on the second plate body 18b. The electrostatic fixture ESC has a structure in which electrodes of a conductive film are arranged between a pair of insulating layers or insulating plates, and has a slightly disc shape. The electrode of the electrostatic fixture ESC is electrically connected to the DC power supply 22 through the switch 23. The electrostatic fixture ESC will attract the wafer W by the electrostatic force such as the Coulomb force generated by the DC voltage from the DC power source 22. Thereby, the electrostatic fixture ESC can hold the wafer W.

A focus ring FR is provided on the peripheral portion of the second plate body 18b. The focus ring FR is the same as The focus ring is the same. That is, the focus ring FR will be arranged around the edge of the wafer W and the electrostatic fixture ESC. The focus ring FR system has a first part P1 and a second part P2. The first part P1 and the second part P2 have an annular plate shape. The second part P2 is provided on the first part P1. The inner edge P2i of the second part P2 has a larger diameter than the inner edge P1i of the first part P1. The wafer W is placed on the electrostatic fixture ESC in such a way that its edge area will be located on the first part P1 of the focus ring FR. The focus ring FR may be formed of any of various materials such as silicon, silicon carbide, and silicon oxide.

A refrigerant flow path 24 is provided inside the second plate body 18b. The refrigerant flow channel 24 will constitute a temperature control mechanism. The refrigerant flow path 24 is supplied with refrigerant from the cooling unit provided outside the processing container 12 through the piping 26a. The refrigerant supplied to the refrigerant flow path 24 returns to the cooling unit through the piping 26b. In this way, refrigerant will circulate between the refrigerant channel 24 and the cooling unit. The temperature of the wafer W supported by the electrostatic fixture ESC is controlled by controlling the temperature of the refrigerant.

In addition, the plasma processing apparatus 10 is provided with a gas supply line 28. The gas supply line 28 supplies the heat conduction gas from the heat conduction gas supply mechanism, such as He gas, between the upper surface of the electrostatic jig ESC and the inner surface of the wafer W.

In addition, the plasma processing apparatus 10 includes an upper electrode 30. The upper electrode 30 is arranged to face the mounting table PD above the mounting table PD. Between the upper electrode 30 and the mounting table PD, a processing space S for plasma processing the wafer W is provided.

The upper electrode 30 is supported by the upper part of the processing container 12 through the insulating shield member 32. The upper electrode 30 may include a top plate 34 and a support 36. The top plate 34 faces the processing space S, and the top plate 34 is provided with a plurality of gas ejection holes 34a. The top plate 34 may be formed of silicon or quartz. Alternatively, the top plate 34 can be formed by forming a plasma-resistant film called yttrium oxide on the surface of the aluminum substrate.

The supporting body 36 detachably supports the top plate 34 and may be made of a conductive material called aluminum, for example. This support 36 may have a water-cooled structure. A gas diffusion chamber 36a is provided inside the support 36. From this gas diffusion chamber 36a, a plurality of gas flow holes 36b communicating with the gas ejection holes 34a extend downward. In addition, the support 36 is formed with a gas introduction port 36c for introducing the processing gas into the gas diffusion chamber 36a, and the gas introduction port 36c is connected to the gas supply pipe 38.

The gas supply pipe 38 is connected to the gas source group 40 through the valve group 42 and the flow controller group 44. The gas source group 40 is a plural gas source for plural gases. The valve group 42 contains a plurality of valves, flow The quantity controller group 44 is a complex flow controller including a so-called mass flow controller. The plural gas sources of the gas source group 40 are respectively connected to the gas supply pipe 38 through the valve corresponding to the valve group 42 and the flow controller corresponding to the flow controller group 44.

In addition, the plasma processing apparatus 10 is provided with a deposition protector 46 detachably along the inner wall of the processing container 12. The deposition protector 46 is also disposed on the outer periphery of the support portion 14. The deposition protector 46 prevents etching by-products (deposition) from adhering to the processing container 12 and can be constructed by coating ceramics such as Y ₂ O _{3 with} aluminum.

An exhaust plate 48 is provided on the bottom side of the processing container 12 and between the support portion 14 and the side wall of the processing container 12. The exhaust plate 48 can be constructed by coating ceramics such as Y ₂ O ₃ with aluminum. The exhaust plate 48 is formed with a plurality of holes penetrating through its thickness direction. An exhaust port 12e is provided under the exhaust plate 48 and in the processing container 12. The exhaust port 12e is connected to the exhaust device 50 through the exhaust pipe 52. The exhaust device 50 is a vacuum pump having a pressure regulating valve, a turbo molecular pump, and the like, and can decompress the space in the processing container 12 to a desired vacuum degree. In addition, the side wall of the processing container 12 is provided with a carry-out port 12g of the wafer W. The carry-out port 12g can be opened and closed by the gate valve 54.

In addition, the plasma processing apparatus 10 further includes a first high-frequency power supply 62 and a second high-frequency power supply 64. The first high-frequency power source 62 is a power source that generates high frequencies for plasma generation, for example, high frequencies of 27 to 100 MHz. The first high-frequency power supply 62 is connected to the upper electrode 30 through the matching device 66. The matching device 66 has a circuit for matching the output impedance of the first high-frequency power source 62 and the input impedance of the load side (upper electrode 30 side). In addition, the first high-frequency power supply 62 may be connected to the lower electrode LE through the matching device 66.

The second high-frequency power supply 64 generates a high-frequency bias for attracting ions to the wafer W, for example, generates a high-frequency bias with a frequency in the range of 400 kHz to 13.56 MHz. The second high-frequency power supply 64 is connected to the lower electrode LE through the matching device 68. The matching device 68 has a circuit for matching the output impedance of the second high-frequency power supply 64 and the input impedance of the load side (lower electrode LE side).

This plasma processing apparatus 10 supplies gas from the one or more gas sources selected from the plural gas sources into the processing container 12. In addition, the pressure in the space inside the processing container 12 is set to a predetermined pressure by the exhaust device 50. Furthermore, the gas in the processing container 12 is excited by the high frequency from the first high-frequency power source 62. This is used to generate plasma. Then, the wafer W is processed by the generated active group. In addition, the high-frequency bias of the second high-frequency power supply 64 can be used to attract ions Lead to wafer W.

Hereinafter, an embodiment of a measuring device for measuring the electrostatic capacitance reflected by the distance from the focus ring FR will be described. 6 is a perspective view of a measuring device according to an embodiment. The measuring instrument 100 shown in FIG. 6 is provided with a base substrate 102. The base substrate 102 is formed of silicon, for example, and has the same slightly disk shape as the wafer W. The diameter of the base substrate 102 is the same as the diameter of the wafer W, for example, 300 mm.

The base substrate 102 has a lower portion 102a and an upper portion 102b. The lower portion 102a is a portion closer to the electrostatic clamp ESC when the measuring instrument 100 is disposed above the electrostatic clamp ESC. The lower portion 102a of the base substrate 102 is mounted with sensing chips 104A to 104H for measuring capacitance. In addition, the number of sensing chips mounted on the measuring device 100 may be any number of three or more. The plurality of sensing chips 104A-104H will be along the edge of the base substrate 102, for example, arranged at equal intervals over the entire circumference of the edge. Specifically, the front end surface 104f of each of the plurality of sensing chips 104A-104H is disposed along the edge of the lower portion 102a of the base substrate 102. In addition, in FIG. 6, the sensing chips 104A to 104C of the plurality of sensing chips 104A to 104H can be observed.

A concave portion 102r is defined on the upper portion 102b of the base substrate 102. The recess 102r includes a central region 102c and a plurality of radiation regions 102h. The central area 102c is an area that crosses the central axis AX100. The central axis AX100 is an axis passing through the center of the base substrate 102 in the plate thickness direction. The central region 102c is provided with a circuit board 106. The complex radiation area 102h extends from the central area 102c in the radial direction to the area above the area where the complex sensor wafers 104A-104H are arranged relative to the central axis AX100. The plurality of radiation regions 102h are provided with wiring groups 108A-108H for electrically connecting the plurality of sensing chips 104A-104H and the circuit board 106, respectively. In addition, in the measuring instrument 100 shown in FIG. 6, although the plurality of sensing wafers 104A to 104H are mounted on the lower portion 102a of the base substrate 102, the plurality of sensing wafers 104A to 104H may also be mounted on the upper portion 102b of the base substrate 102.

The sensor wafer will be described in detail below. FIG. 7 is a perspective view of an induction chip related to an embodiment. 8 is a cross-sectional view taken along line VIII-VIII of FIG. 7 and shows the base substrate of the measuring device together with the sensing chip. 9 is a cross-sectional view taken along line IX-IX of FIG. 8. The sensing chip 104 shown in FIGS. 7 to 9 is used as the plural sensing chips 104A to 104H of the measuring device 100. The sensor chip used. In addition, in the following description, the XYZ orthogonal coordinate system will be appropriately referred to. The X direction indicates the front direction of the sensing chip, the Y direction is a direction orthogonal to the X direction, and indicates the width direction of the sensing chip 104, and the Z direction is the direction orthogonal to the X direction and the Y direction, and indicates the direction of the sensing chip 104. Above direction.

As shown in FIGS. 7-9, in one embodiment, the sensing wafer 104 has a front side 104f, an upper surface 104t, a lower surface 104b, a pair of side surfaces 104s, and a rear end surface 104r. The front end surface 104f will constitute the front surface of the sensing wafer 104 in the X direction. The sensor wafer 104 is mounted on the base substrate 102 of the measuring instrument 100 so that the front end surface 104f faces the radial direction with respect to the central axis AX100 (see FIG. 6 ). In addition, in a state where the sensing wafer 104 is mounted on the base substrate 102, the front end surface 104f extends along the edge of the base substrate 102. Therefore, the front end surface 104f will face the inner edge of the focus ring FR when the measuring instrument 100 is placed on the electrostatic jig ESC.

The rear end surface 104r constitutes the rear surface of the sensing wafer 104 in the X direction. The rear side surface 104r is located closer to the central axis AX100 than the front side end surface 104f when the sensing chip 104 is mounted on the base substrate 102. The upper surface 104t will constitute the upper surface of the sensing wafer 104 in the Z direction, and the lower surface 104b will constitute the lower surface of the sensing wafer 104 in the Z direction. In addition, a pair of side surfaces 104s will constitute the surface of the sensing wafer 104 in the Y direction.

The induction wafer 104 has a first electrode 141, a second electrode 142, and a third electrode 143. The first electrode 141 is formed by a conductor. The first electrode 141 has a first portion 141a. As shown in FIGS. 7 and 8, in one embodiment, the first portion 141a extends in the X direction and the Y direction.

The second electrode 142 is formed by a conductor. The second electrode 142 has a second portion 142a. The second part 142a will be extended on the first part 141a. The second electrode 142 is insulated from the first electrode 141 in the induction wafer 104. As shown in FIGS. 7 and 8, in one embodiment, the second portion 142a extends in the X direction and the Y direction on the first portion 141a.

The third electrode 143 is an induction electrode formed of a conductor, and is provided on the first portion 141a of the first electrode 141 and the second portion 142a of the second electrode 142. The third electrode 143 is insulated from the first electrode 141 and the second electrode 142 in the induction wafer 104. The third electrode 143 has a front surface 143f. The front surface 143f extends in the direction where the first portion 141a and the second portion 142a intersect. In addition, the front surface 143f extends along the front end surface 104f of the sensing wafer 104. In one embodiment, the front surface 143f constitutes a part of the front side surface 104f of the sensing wafer 104. Alternatively, the sensing chip 104 may also have The front surface of the front surface 143f of the 3-electrode 143 covers the insulating layer of the front surface 143f.

As shown in FIGS. 7 to 9, in one embodiment, the first electrode 141 and the second electrode 142 are opened on the area side (X direction) of the front surface 143 f where the third electrode 143 is arranged, and surround the third electrode 143 Way to extend it. That is, the first electrode 141 and the second electrode 142 extend above, behind, and on the side of the third electrode 143 so as to surround the third electrode 143.

As shown in FIGS. 7 and 9, in one embodiment, the front side surface 104 f of the sensing wafer 104 is a curved surface having a predetermined curvature. That is, the front end face 104f has a fixed curvature at any position on the front end face. The curvature of the front end face 104f is the reciprocal of the distance between the central axis AX100 of the measuring device 100 and the front end face 104f. The sensing chip 104 is mounted on the base substrate 102 such that the center of curvature of the front end surface 104f coincides with the central axis AX100.

In one embodiment, the sensing wafer 104 further includes a substrate portion 144, insulating regions 146-148, contacts 151-153, and interlayer connection wiring 154. The substrate portion 144 has a body portion 144m and a surface portion 144f. The body portion 144m is formed of silicon, for example. The surface layer portion 144f covers the surface of the body portion 144m. The surface layer portion 144f is formed of an insulating material. The surface layer portion 144f is a thermal oxide film such as silicon.

The second portion 142a of the second electrode 142 extends below the substrate portion 144, and an insulating region 146 is provided between the substrate portion 144 and the second electrode 142. The insulating region 146 is formed of, for example, SiO ₂ , SiN, Al ₂ O ₃ or polyimide.

The first portion 141a of the first electrode 141 extends below the substrate portion 144 and the second portion 142a of the second electrode 142. An insulating region 147 is provided between the first electrode 141 and the second electrode 142. The insulating region 147 is formed of, for example, SiO ₂ , SiN, Al ₂ O ₃ or polyimide.

The insulating region 148 will constitute the upper surface 104t of the sensing chip 104. The insulating region 148 is formed of, for example, SiO ₂ , SiN, Al ₂ O ₃ or polyimide. The insulating area 148 is formed with contacts 151-153. The contact 153 is formed by a conductor and connected to the third electrode 143. Specifically, the third electrode 143 and the contact 153 are connected to each other by the interlayer connection wiring 154 penetrating the insulating region 146, the second electrode 142, the insulating region 147, and the first electrode 141. An insulator is provided around the interlayer connection wiring 154, and the interlayer connection wiring 154 is insulated from the first electrode 141 and the second electrode 142. The contact 153 is connected to the circuit board 106 through the interlayer connection wiring 123 provided on the base substrate 102 and the wiring 183 provided on the radiation area 102h of the recess 102r. The contact 151 and the contact 152 are also formed by conductors. The contact 151 and the contact 152 are connected to the first electrode 141 and the second electrode 142 through the corresponding interlayer connection wiring, respectively. The contact 151 and the contact 152 are connected to the circuit board 106 through the corresponding interlayer connection wiring provided on the base substrate 102 and the corresponding wiring provided on the radiation area 102h of the recess 102r.

The structure of the circuit board 106 will be described below. FIG. 10 is a diagram showing the structure of a circuit board in an embodiment. As shown in FIG. 10, the circuit board 106 includes a high-frequency oscillator 161, complex C/V conversion circuits 162A to 162H, and an A/D converter 163. In one embodiment, the circuit board 106 may further include a memory device 165 and a communication device 166. In yet another embodiment, the circuit board 106 may further include a processor 164 and a power supply 167.

Each of the plurality of sensing chips 104A-104 is connected to the circuit board 106 through the corresponding wiring group in the plurality of wiring groups 108A-108H. In addition, each of the plurality of sensing chips 104A to 104H is connected to the corresponding C/V conversion circuit of the plurality of C/V conversion circuits 162A to 162H through several wires included in the corresponding wiring group. In the following, one sensor chip 104 having the same configuration as each of the plurality of sensor chips 104A to 104H, one wiring group 108 having the same configuration as the plurality of wiring groups 108A to 108H, and the same as each complex C/V conversion circuit 162A to 162H A C/V conversion circuit 162 constituted will be described.

The wiring group 108 includes wirings 181 to 183. One end of the wiring 181 is connected to the contact 151 to which the first electrode 141 is connected. The wiring 181 is connected to the ground potential line GL connected to the ground GC of the circuit board 106 through the switch SWG. In addition, one end of the wiring 182 is connected to the contact 152 to which the second electrode 142 is connected, and the other end of the wiring 182 is connected to the C/V conversion circuit 162. In addition, one end of the wiring 183 is connected to the contact 153 to which the third electrode 143 is connected, and the other end of the wiring 183 is connected to the C/V conversion circuit 162.

The high-frequency oscillator 161 is connected to a so-called battery power supply 167 and is configured to generate high-frequency signals after receiving power from the power supply 167. In addition, the power supply 167 is also connected to the processor 164 and the communication device 166. The high-frequency oscillator 161 has a complex output line. The high-frequency oscillator 161 applies the generated high-frequency signal to the wiring 182 and the wiring 183 through a plurality of output lines. Therefore, the high-frequency signal from the high-frequency oscillator 161 is applied to the second electrode 142 and the electric 3 electrode 143 of the sensing chip 104.

The input of the C/V conversion circuit 162 is connected with wiring 182 and wiring 183. That is, the second electrode 142 and the third electrode 143 of the sensor chip 104 are connected to the input of the C/V conversion circuit 162. The C/V conversion circuit 162 is configured to generate a signal representing the electrode connected to the input from the voltage amplitude at its input. The voltage signal of the formed electrostatic capacitor is outputted. In addition, the larger the electrostatic capacitance formed by the electrodes connected to the C/V conversion circuit 162, the larger the magnitude of the voltage signal output by the C/V conversion circuit.

FIG. 11 shows an equivalent circuit diagram of the circuit board 106 and the sensing chip 104. In FIG. 11, the capacitive element C1 is an element that senses that the third electrode 143 of the wafer 104 corresponds to the electrostatic capacitance formed in front of it (in the X direction). In addition, the capacitive element C2 is an element that senses that the second electrode 142 of the chip 104 corresponds to the electrostatic capacitance formed below (-Z direction). The measuring instrument 100 is a moving object conveyed by the conveying device, and the ground GC of the circuit board 106 is not connected to the ground GND of the program module. Therefore, the potential of the ground GC of the circuit board 106 does not have the same potential as the ground GND. Therefore, in the equivalent circuit of FIG. 11, the ground GC is represented as being connected to the ground GND through the voltage source VS and the impedance R3. In the equivalent circuit, one end of the capacitive element C1 is shown to be connected to the ground GND through the voltage source VS and the impedance R1, and one end of the capacitive element C2 is shown to be connected to the ground GND through the voltage source VS and impedance R2. In addition, the other end of the capacitive element C1, that is, the third electrode 143 is connected to the high-frequency oscillator 161, and the other end of the capacitive element C2, that is, the second electrode 142 is connected to the high-frequency oscillator 161 through the switch SW.

The switch SW is turned on in the equivalent circuit of FIG. 11 in a state where the wiring 181 is connected to the ground potential line GL. Therefore, in a state where the wiring 181 is connected to the ground potential line GL, the second electrode 142 is cut from the C/V conversion circuit 162. Therefore, in this state, the C/V conversion circuit 162 outputs a voltage signal corresponding to the size of the electrostatic capacitance formed by the third electrode 143. On the other hand, the switch SW is turned off in the equivalent circuit of FIG. 11 in a state where the wiring 181 is not connected to the ground potential line GL. Therefore, when the wiring 181 is not connected to the ground potential line GL, the second electrode 142 is connected to the C/V conversion circuit 162. Therefore, in this state, the C/V conversion circuit 162 outputs the electrostatic capacitance formed corresponding to the third electrode 143 in front of it (X direction) and the second electrode 142 formed in it below (-Z direction) The voltage signal of the voltage of the total capacitance of the electrostatic capacitance.

The input of the A/D converter 163 is connected to the outputs of the complex C/V conversion circuits 162A to 162H. In addition, the A/D converter 163 is connected to the processor 164. The A/D converter 163 is controlled by the control signal from the processor 164 to convert the output signals (voltage signals) of the complex C/V conversion circuits 162A to 162G into digital values. That is, the A/D converter 163 generates a digital value indicating the size of the electrostatic capacitance, and outputs the digital value to the processor.

The processor 164 is connected with a memory device 165. The memory device 165 is a so-called non-volatile memory device, and is configured to memorize the digital value output by the A/D converter 163.

The communication device 166 is a communication device according to any wireless communication specification. For example, the communication device 166 will conform to Bluetooth (registered trademark). The communication device 166 may be configured to wirelessly transmit the digital values memorized by the memory device 165.

As described above, in the sensing wafer 104 mounted on the measuring instrument 100, the third electrode 143, which is the sensing electrode, is provided on the first electrode 141, and the second electrode is interposed between the first electrode 141 and the third electrode 143. Part 2 of 142. When the sensing chip 104 is used, the potential of the first electrode 141 is set to the ground potential, and the second electrode 142 and the third electrode 143 are supplied with high-frequency signals. At this time, the voltage amplitude of the third electrode 143 will not be affected by the electrostatic capacitance below the sensing electrode 104 from the direction in which the first electrode 141 is provided with respect to the third electrode 143, and will reflect the specific direction. That is, the voltage amplitude of the electrostatic capacitance in the direction (X direction) toward the front surface 143f of the third electrode 143. Therefore, by sensing the chip 104, the electrostatic capacitance can be measured with high directivity in a specific direction.

Furthermore, in one embodiment, the first electrode 141 and the second electrode 142 are opened on the side of the area (X direction) before the third electrode 143 is arranged and extend so as to surround the third electrode 143. According to this embodiment, the first electrode 141 and the second electrode 142 can shield the third electrode 143 in a direction other than a specific direction. Therefore, the directivity of the sensing chip 104 with respect to a specific direction in the measurement of electrostatic capacitance can be further improved.

Furthermore, in one embodiment, the front end surface 104f of the sensing wafer 104 is configured as a curved surface having a specific curvature, and the front surface 143f of the third electrode 143 extends along the front end surface 104f. According to this embodiment, the radial distance between each position of the front surface 143f of the third electrode 143 and the inner edge of the focus ring FR can be set to be slightly equidistant. Therefore, the measurement accuracy of the electrostatic capacitance can be further improved.

Furthermore, in the measuring device 100, the sensing chips 104A-104H are arranged along the edge of the base substrate 102. Therefore, when the measuring instrument 100 is disposed on the electrostatic fixture ESC, a complex digital value representing the electrostatic capacitance between the focus ring FR and each of the sensing chips 104A-104H can be obtained. In addition, the electrostatic capacitance C is expressed by C=ε S/d. ε is the dielectric constant of the medium between the front surface 143f of the third electrode 143 and the inner edge of the focus ring FR, S is the area of the front surface 143f of the third electrode 143, and d can be regarded as the front surface 143f of the third electrode 143 and the focus ring FR The distance between the inner edges. Therefore, the complex digital value obtained by the measuring device 100 is the distance between the front surface 143f of the third electrode 143 and the inner edge of the focus ring FR The bigger, the smaller.

In one embodiment, the measuring device 100 is configured to store the digital value in the memory device 165 and wirelessly transmit the digital value from the communication device 166. By using the digital value of wireless transmission in this way, the gap distance (distance in the radial direction relative to the central axis AX100) between the edge of the measuring device 100 and the inner edge of the focus ring FR can be fixed in the peripheral direction Way to correct the coordinate information of the conveying position of the conveying device.

Hereinafter, the adjustment method of the conveying device of the processing system 1 using the measuring device 100 will be described. FIG. 12 is a flowchart showing an adjustment method of the conveying device of the processing system according to an embodiment. In the method MT shown in FIG. 12, the measuring device 100 stored in any of the containers 4 a to 4 d is transferred to the register AN by the transfer device TU1. Then, in step ST1, the position adjustment (position correction) of the measuring device 100 is performed by the register AN.

The next step ST2 is to transport the measuring instrument 100 to any one of the program modules PM1 to PM6. Specifically, the measuring device 100 is transported to the loading chamber of one of the loading chamber LL1 and the loading chamber LL2 by the transport device TU1. Then, the measuring device 100 is transported to any one of the program modules PM1 to PM6 by the transport device TU2 from one of the loading chambers, and is placed on the electrostatic fixture ESC.

In the next step ST3, the measuring instrument 100 measures the electrostatic capacitance. Specifically, the measuring device 100 obtains a complex digital value corresponding to the electrostatic capacitance between the inner edge of the focus ring FR and the third electrode 143 of each sensing chip 104A to 104H of the measuring device 100, and memorizes the complex digital value于Memory装置165. In addition, the complex digital value can be obtained at a predetermined time point under the control of the processor 164.

The next step ST4 is to take out the measuring instrument 100 from the program module and return to any one of the containers 4a to 4d. The next step ST5 is to transmit the complex digital value stored in the memory device 165 to the control unit MC. The complex digital value may be transmitted from the communication device 166 to the control unit MC by a command from the control unit MC, or may be controlled by the processor 164 based on the count of the timer provided on the circuit board 106. The time is transmitted to the control unit MC.

In the next step ST6, the control unit MC confirms the transport position of the measuring instrument 100 based on the received complex digital value. Specifically, the control unit MC will confirm the distribution of the gap distance between the inner edge of the focus ring FR and the edge of the measuring device 100 in the peripheral direction from the complex digital value, and according to A predetermined reference is used to determine whether the distribution of the gap distance between the inner edge of the focus ring FR and the edge of the measuring device 100 in the peripheral direction can be regarded as fixed.

If the distribution of the gap distance between the inner edge of the focus ring FR and the edge of the measuring device 100 in the circumferential direction cannot be regarded as fixed, it will be determined in the next step STJ that it is necessary to specify the transfer position of the transfer device TU2 For the correction of coordinate information, the control unit MC corrects the coordinate information of the conveying device TU2 in step ST7. For example, a correction amount is calculated from the complex digital value to make the distribution of the gap distance between the inner edge of the focus ring FR and the edge of the measuring device 100 in the circumferential direction fixed, and this correction amount is used to correct the coordinate information of the conveying device TU2. Then, steps ST1 to ST6 and step STJ are executed again. On the other hand, when the distribution of the gap distance between the inner edge of the focus ring FR and the edge of the measuring device 100 in the peripheral direction can be regarded as fixed, it is determined in the process STJ that there is no need to specify the transfer position of the transfer device TU2 Correction of the coordinate information of.

According to the method MT of using the measuring device 100 in this way, the measuring device 100 can provide the complex digital values that can be used for correcting the coordinate information of the conveying position of the conveying device TU2 of the processing system 1 and correct the conveying as needed The coordinate information of device TU2. By using the corrected transport device TU2 for the transport of the wafer W, the gap distance between the inner edge of the focus ring FR and the wafer W can be set slightly fixed. As a result, it is possible to suppress the deviation of the plasma and the characteristic deviation of the so-called etching dimension change in the wafer surface. In addition, the generation of particles onto the wafer W can be suppressed.

In the following, a sensor chip related to another embodiment of the measuring instrument 100 will be described. FIG. 13 is a cross-sectional view of an induction wafer related to another embodiment. FIG. 13 shows a longitudinal cross-sectional view of the sensing wafer 204, and the focus ring FR will be displayed together with the sensing wafer 204.

The induction wafer 204 has a first electrode 241, a second electrode 242, and a third electrode 243. Furthermore, in one embodiment, the sensing wafer 204 may further have a substrate portion 244 and an insulating region 247.

The substrate portion 244 has a body portion 244m and a surface portion 244f. The body portion 244m is formed of silicon, for example. The surface layer portion 244f covers the surface of the body portion 244m. The surface layer portion 244f is formed of an insulating material. The surface layer portion 244f is a thermal oxide film such as silicon.

The substrate portion 244 has an upper surface 244a, a lower surface 244b, and a front end surface 244c. The second electrode 242 is provided below the lower surface 244b of the substrate portion 244 and extends in the X direction and the Y direction. In addition, the first electrode 241 is provided under the second electrode 242 through the insulating region 247 and extends in the X direction and the Y direction.

The front end surface 244c of the substrate portion 244 is formed in a stepped shape. The lower portion 244d of the front end surface 244c protrudes to the focus ring FR side than the upper portion 244u of the front end side surface 244c. The third electrode 243 extends along the upper portion 244u of the front end surface 244c.

When this sensing chip 204 is used as the sensing chip of the measuring device 100, the first electrode 241 is connected to the wiring 181, the second electrode 242 is connected to the wiring 182, and the third electrode 243 is connected to the wiring 183.

In the sensing chip 204, the first electrode 241 and the second electrode 242 shield the third electrode 243 as the sensing electrode from below the sensing chip 204. Therefore, according to the sensing chip 204, the electrostatic capacitance can be measured in a specific direction, that is, the direction (X direction) in which the front surface 243f of the third electrode 243 faces (direction X).

The performance evaluation results of the sensor wafer 204 will be described below. In this performance evaluation, the third electrode 243 of the sensing chip 204 is connected to a capacitance measuring device, and the sensing chip 204 is moved in the direction RD toward the inner edge P2i of the second part P2 of the focus ring FR, and the static electricity is measured capacitance. For comparison, the electrode 1004 of the sensing chip 1000 shown in FIG. 2 is connected to the capacitance measuring device, and the sensing chip 1000 is moved in the direction RD toward the inner edge P2i of the second part P2 of the focus ring FR, And measure the electrostatic capacitance. In addition, the distance LVD between the upper surface P1t of the first portion P1 and the lower surface 244b of the sensing wafer 204 when measuring the electrostatic capacitance is 300 μm. In addition, the distance LVD between the upper surface P1t of the first portion P1 and the lower surface 1002b of the sensing wafer 1000 when measuring the electrostatic capacitance is also 300 μm.

A graph representing the measured electrostatic capacitance is shown in Figure 14. In FIG. 14, the horizontal axis represents the distance LRD between the lower portion of the front end surface 244c of the sensing wafer 204 and the inner edge P2i of the second portion P2 of the focus ring FR, and the lower portion 244d of the end surface 1002c of the sensing wafer 1000. The distance LRD between the inner edges P2i of the second part P2 of the focus ring FR, the vertical axis represents the electrostatic capacitance. As shown in FIG. 14, although the electrostatic capacitance measured by the sensing chip 1000 will increase when the LRD is 2.5 mm, the electrostatic capacitance measured by the sensing chip 204 will decrease by the increase when the LRD is 2.5 mm. That is, it is confirmed that the sensing chip 204 can measure the electrostatic capacitance with high directivity in a specific direction (direction RD in FIG. 13).

In the following, a sensor chip related to another embodiment of the measuring instrument 100 will be described. 15 is a longitudinal cross-sectional view of an induction wafer according to another embodiment. Induction shown in Figure 15 The wafer 104A is a modified form of the sensing wafer 104, and is different from the sensing wafer 104 in terms of having the substrate portion 144A instead of the substrate portion 144. The substrate portion 144A is formed of an insulating material. For example, the substrate portion 144A is formed of borosilicate glass. In addition, the substrate portion 144A may be formed of silicon nitride.

The substrate portion 144A is a polyhedron, and has a surface including a front surface 144a and a lower surface 144b. In one example, the surface of the substrate portion 144A further includes an upper surface 144c, a rear surface 144d, and a pair of side surfaces. The lower surface 144b and the upper surface 144c will extend in the X and Y directions and face each other. The front surface 144a constitutes the front end surface of the substrate portion 144A in the X direction, and extends in the direction where the lower surface 144b intersects. The front face 144a may have a predetermined curvature. This curvature is the reciprocal of the distance between the central axis AX100 and the front surface 144a when the sensing wafer 104A is mounted on the base substrate 102. The rear face 144d constitutes the rear end face of the substrate portion 144A in the X direction and faces the front face 144a. A pair of sides will be between an edge in the Y direction of the front 144a and an edge in the Y direction of the back 144d, and another edge in the Y direction of the front 144a and another edge in the Y direction of the back 144d To extend between departments.

The third electrode 143 extends along the front surface 144a and the upper surface 144c of the substrate portion 144A. The insulating region 146 extends so as to cover the lower surface 144b, the upper surface 144c, the rear surface 144d, and the pair of side surfaces of the substrate 144A and the third electrode 143 extending on the upper surface 144c. The second electrode 142 is provided to cover the insulating region 146. In addition, the second portion 142a of the second electrode 142 extends through the insulating region 146 to the lower surface 144b of the substrate portion 144A. In addition, the insulating region 147 extends to cover the second electrode 142. In addition, the first electrode 141 is provided to cover the insulating region 147. In addition, the first portion 141 a of the first electrode 141 extends through the insulating region 147 below the second portion 142 a of the second electrode 142.

In the case where the body portion 144m of the substrate portion 144 of the sensing chip 104 is formed of silicon, the sensing chip 104 will have an internal electrostatic capacitance. Because of this internal electrostatic capacitance, it is necessary to set the output of the high-frequency oscillator 161 to a larger output. On the other hand, since the substrate portion 144A in the sensing wafer 104A is formed of an insulating material, the internal electrostatic capacitance will be extremely small. Therefore, the output of the high-frequency oscillator 161 can be reduced in the measuring device 100 having the sensing wafer 104A.

In addition, since the measuring instrument 100 can be used in a temperature zone containing a high temperature (for example, 20° C. to 80° C.) and a reduced-pressure environment (for example, 1 Torr (133.3 Pa) or less), it is necessary to suppress the generation of gas from the substrate portion 144A. Therefore, the substrate portion can be formed by borosilicate glass, silicon nitride, quartz or alumina 144A. By the substrate portion 144A in this way, the generation of gas can be suppressed.

In addition, since the measuring instrument 100 is used in a temperature zone containing a high temperature (for example, 20° C. to 80° C.), the substrate portion 144A preferably has a linear expansion coefficient close to the linear expansion coefficient of the constituent material of the base substrate 102. Therefore, in the case where the base substrate 102 is formed of silicon, the substrate portion 144A can be formed by, for example, borosilicate glass or silicon nitride. In this way, the linear expansion coefficient of the substrate portion 144A is close to the linear expansion coefficient of the base substrate 102. Therefore, damage to the sensing wafer 104 and peeling of the sensing wafer 104 from the base substrate 102 due to the difference between the linear expansion coefficient of the substrate portion 144A and the base substrate 102 can be suppressed.

Also, the weight of the measuring device 100 is preferably smaller. Therefore, the density (mass per unit volume) of the substrate portion 144A is preferably close to or lower than the density of the base substrate 102. Therefore, in the case where the base substrate 102 is formed of silicon, the substrate portion 144A can be formed of, for example, borosilicate glass.

Although various embodiments have been described above, they are not limited to the above-mentioned embodiments and various modifications can be made. For example, the number of program modules of the processing system 1 may be any number more than one. Furthermore, in the above description, although a plasma processing device is exemplified as the example of the program modules PM1 to PM6, the program modules PM1 to PM6 may be any processing devices as long as they use electrostatic fixtures and focus rings. In addition, although the plasma processing apparatus 10 described above is a capacitively coupled plasma processing apparatus, the plasma processing apparatus that can be used as the program modules PM1 to PM6 can also be an inductively coupled plasma processing apparatus that uses so-called microwave The surface wave plasma processing device is any plasma processing device.

In addition, although in the above-described embodiment, the control unit MC obtains the complex digital value from the measuring device 100 to correct the coordinate information of the conveying device TU2, it may be carried out from the measuring device by another computer different from the control unit MC Acquisition of complex digital values of 100 and correction of the coordinate information of the conveyor TU2.

102‧‧‧ Base substrate

102h‧‧‧Radiation area

104‧‧‧Induction chip

104b‧‧‧below

104f‧‧‧Front end face

104t‧‧‧top

104r‧‧‧End face

123‧‧‧Wiring

141‧‧‧First electrode

141a‧‧‧Part 1

142‧‧‧ 2nd electrode

142a‧‧‧Part 2

143‧‧‧The third electrode

143f‧‧‧front

144‧‧‧Substrate Department

144f‧‧‧Surface Department

144m‧‧‧Body

146‧‧‧Insulation area

147‧‧‧Insulated area

148‧‧‧Insulation area

153‧‧‧Contact

154‧‧‧Wiring

183‧‧‧Wiring

Claims (9)

An inductive chip is an inductive chip for measuring electrostatic capacitance, comprising: a first electrode with a first part; a second electrode with a second part extending on the first part and in the inductive chip It is insulated from the first electrode; the third electrode has a front extending in the direction where the first part and the second part intersect, and is provided on the first part and the second part, and The sensing chip is insulated from the first electrode and the second electrode; and the end face; the end face is a curved surface with a predetermined curvature; the front face of the third electrode extends along the end face. An induction wafer as claimed in item 1 of the patent application, in which the first electrode and the second electrode are opened on the front side of the area where the third electrode is arranged, and extend to surround the third electrode . The induction wafer according to any one of the items 1 or 2 of the patent application, which is further provided with a substrate portion, has a surface including a front surface and a lower surface, the surface is insulating; the third electrode will be along the substrate portion The front surface of the second electrode extends; the second portion of the second electrode extends along the lower surface of the substrate portion. As in the sensing chip of claim 3, the substrate portion is formed of an insulating material. For example, the induction chip of patent application item 4, wherein the insulating material is borosilicate glass, silicon nitride, quartz or alumina. A measuring device is a measuring device for measuring electrostatic capacitance, which is provided with: a base substrate; A plurality of sensing chips are arranged along the edge of the base substrate, and each is a sensing chip according to any one of claims 1 to 5; and a circuit substrate is mounted on the base substrate; The circuit board has: a ground potential line, which can be electrically connected to the first electrode; a high-frequency oscillator, which is a high-frequency oscillator that generates a high-frequency signal, and is electrically connected to the second electrode and the third electrode Electrodes; C/V conversion circuit, which converts the voltage amplitude in the third electrode of each complex sensor chip into a voltage signal representing electrostatic capacitance; and A/D converter, which outputs the C/V conversion circuit The voltage signal is converted into a digital value. For example, in the measurement device of claim 6, the circuit board further includes: a memory device for memorizing the digital value; and a communication device for wirelessly transmitting the digital value memorized by the memory device. As in the measuring device of claim 6 or 7, the circuit board further has a switch for selectively connecting the first electrode to the ground potential line. The measuring device according to any one of items 6 or 7 of the patent application, wherein the base substrate has a disc shape; each of the plurality of sensing chips is the sensing chip according to item 3 of the patent application; each of the plurality of sensing chips The end surface is disposed along the edge of the base substrate.

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